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fdf9b3e8
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1/*
2 * SH4 emulation
5fafdf24 3 *
fdf9b3e8
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4 * Copyright (c) 2005 Samuel Tardieu
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
8167ee88 17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
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18 */
19#include <assert.h>
852d481f 20#include <stdlib.h>
fdf9b3e8 21#include "exec.h"
a7812ae4 22#include "helper.h"
fdf9b3e8 23
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24static void cpu_restore_state_from_retaddr(void *retaddr)
25{
26 TranslationBlock *tb;
27 unsigned long pc;
28
29 if (retaddr) {
30 pc = (unsigned long) retaddr;
31 tb = tb_find_pc(pc);
32 if (tb) {
33 /* the PC is inside the translated code. It means that we have
34 a virtual CPU fault */
618ba8e6 35 cpu_restore_state(tb, env, pc);
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36 }
37 }
38}
39
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40#ifndef CONFIG_USER_ONLY
41
42#define MMUSUFFIX _mmu
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43
44#define SHIFT 0
45#include "softmmu_template.h"
46
47#define SHIFT 1
48#include "softmmu_template.h"
49
50#define SHIFT 2
51#include "softmmu_template.h"
52
53#define SHIFT 3
54#include "softmmu_template.h"
55
6ebbf390 56void tlb_fill(target_ulong addr, int is_write, int mmu_idx, void *retaddr)
fdf9b3e8 57{
fdf9b3e8 58 CPUState *saved_env;
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59 int ret;
60
61 /* XXX: hack to restore env in all cases, even if not called from
62 generated code */
63 saved_env = env;
64 env = cpu_single_env;
6ebbf390 65 ret = cpu_sh4_handle_mmu_fault(env, addr, is_write, mmu_idx, 1);
fdf9b3e8 66 if (ret) {
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67 /* now we have a real cpu fault */
68 cpu_restore_state_from_retaddr(retaddr);
1162c041 69 cpu_loop_exit(env);
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70 }
71 env = saved_env;
72}
73
74#endif
75
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76void helper_ldtlb(void)
77{
78#ifdef CONFIG_USER_ONLY
79 /* XXXXX */
43dc2a64 80 cpu_abort(env, "Unhandled ldtlb");
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81#else
82 cpu_load_tlb(env);
83#endif
84}
85
fd4bab10 86static inline void raise_exception(int index, void *retaddr)
e6afc2f4 87{
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88 env->exception_index = index;
89 cpu_restore_state_from_retaddr(retaddr);
1162c041 90 cpu_loop_exit(env);
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91}
92
fd4bab10
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93void helper_raise_illegal_instruction(void)
94{
95 raise_exception(0x180, GETPC());
96}
97
e6afc2f4
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98void helper_raise_slot_illegal_instruction(void)
99{
fd4bab10 100 raise_exception(0x1a0, GETPC());
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101}
102
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103void helper_raise_fpu_disable(void)
104{
fd4bab10 105 raise_exception(0x800, GETPC());
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106}
107
108void helper_raise_slot_fpu_disable(void)
109{
fd4bab10 110 raise_exception(0x820, GETPC());
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111}
112
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113void helper_debug(void)
114{
115 env->exception_index = EXCP_DEBUG;
1162c041 116 cpu_loop_exit(env);
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117}
118
f24f381b 119void helper_sleep(uint32_t next_pc)
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120{
121 env->halted = 1;
efac4154 122 env->in_sleep = 1;
e6afc2f4 123 env->exception_index = EXCP_HLT;
f24f381b 124 env->pc = next_pc;
1162c041 125 cpu_loop_exit(env);
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126}
127
128void helper_trapa(uint32_t tra)
129{
130 env->tra = tra << 2;
fd4bab10 131 raise_exception(0x160, GETPC());
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132}
133
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134void helper_movcal(uint32_t address, uint32_t value)
135{
136 if (cpu_sh4_is_cached (env, address))
137 {
138 memory_content *r = malloc (sizeof(memory_content));
139 r->address = address;
140 r->value = value;
141 r->next = NULL;
142
143 *(env->movcal_backup_tail) = r;
144 env->movcal_backup_tail = &(r->next);
145 }
146}
147
148void helper_discard_movcal_backup(void)
149{
150 memory_content *current = env->movcal_backup;
151
152 while(current)
153 {
154 memory_content *next = current->next;
155 free (current);
156 env->movcal_backup = current = next;
b9d38e95 157 if (current == NULL)
852d481f
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158 env->movcal_backup_tail = &(env->movcal_backup);
159 }
160}
161
162void helper_ocbi(uint32_t address)
163{
164 memory_content **current = &(env->movcal_backup);
165 while (*current)
166 {
167 uint32_t a = (*current)->address;
168 if ((a & ~0x1F) == (address & ~0x1F))
169 {
170 memory_content *next = (*current)->next;
171 stl(a, (*current)->value);
172
b9d38e95 173 if (next == NULL)
852d481f
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174 {
175 env->movcal_backup_tail = current;
176 }
177
178 free (*current);
179 *current = next;
180 break;
181 }
182 }
183}
184
6f06939b 185uint32_t helper_addc(uint32_t arg0, uint32_t arg1)
fdf9b3e8
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186{
187 uint32_t tmp0, tmp1;
188
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189 tmp1 = arg0 + arg1;
190 tmp0 = arg1;
191 arg1 = tmp1 + (env->sr & 1);
fdf9b3e8
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192 if (tmp0 > tmp1)
193 env->sr |= SR_T;
194 else
195 env->sr &= ~SR_T;
6f06939b 196 if (tmp1 > arg1)
fdf9b3e8 197 env->sr |= SR_T;
6f06939b 198 return arg1;
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199}
200
6f06939b 201uint32_t helper_addv(uint32_t arg0, uint32_t arg1)
fdf9b3e8
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202{
203 uint32_t dest, src, ans;
204
6f06939b 205 if ((int32_t) arg1 >= 0)
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206 dest = 0;
207 else
208 dest = 1;
6f06939b 209 if ((int32_t) arg0 >= 0)
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210 src = 0;
211 else
212 src = 1;
213 src += dest;
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214 arg1 += arg0;
215 if ((int32_t) arg1 >= 0)
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216 ans = 0;
217 else
218 ans = 1;
219 ans += dest;
220 if (src == 0 || src == 2) {
221 if (ans == 1)
222 env->sr |= SR_T;
223 else
224 env->sr &= ~SR_T;
225 } else
226 env->sr &= ~SR_T;
6f06939b 227 return arg1;
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228}
229
230#define T (env->sr & SR_T)
231#define Q (env->sr & SR_Q ? 1 : 0)
232#define M (env->sr & SR_M ? 1 : 0)
233#define SETT env->sr |= SR_T
234#define CLRT env->sr &= ~SR_T
235#define SETQ env->sr |= SR_Q
236#define CLRQ env->sr &= ~SR_Q
237#define SETM env->sr |= SR_M
238#define CLRM env->sr &= ~SR_M
239
69d6275b 240uint32_t helper_div1(uint32_t arg0, uint32_t arg1)
fdf9b3e8
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241{
242 uint32_t tmp0, tmp2;
243 uint8_t old_q, tmp1 = 0xff;
244
69d6275b 245 //printf("div1 arg0=0x%08x arg1=0x%08x M=%d Q=%d T=%d\n", arg0, arg1, M, Q, T);
fdf9b3e8 246 old_q = Q;
69d6275b 247 if ((0x80000000 & arg1) != 0)
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248 SETQ;
249 else
250 CLRQ;
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251 tmp2 = arg0;
252 arg1 <<= 1;
253 arg1 |= T;
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254 switch (old_q) {
255 case 0:
256 switch (M) {
257 case 0:
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258 tmp0 = arg1;
259 arg1 -= tmp2;
260 tmp1 = arg1 > tmp0;
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261 switch (Q) {
262 case 0:
263 if (tmp1)
264 SETQ;
265 else
266 CLRQ;
267 break;
268 case 1:
269 if (tmp1 == 0)
270 SETQ;
271 else
272 CLRQ;
273 break;
274 }
275 break;
276 case 1:
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277 tmp0 = arg1;
278 arg1 += tmp2;
279 tmp1 = arg1 < tmp0;
fdf9b3e8
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280 switch (Q) {
281 case 0:
282 if (tmp1 == 0)
283 SETQ;
284 else
285 CLRQ;
286 break;
287 case 1:
288 if (tmp1)
289 SETQ;
290 else
291 CLRQ;
292 break;
293 }
294 break;
295 }
296 break;
297 case 1:
298 switch (M) {
299 case 0:
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300 tmp0 = arg1;
301 arg1 += tmp2;
302 tmp1 = arg1 < tmp0;
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303 switch (Q) {
304 case 0:
305 if (tmp1)
306 SETQ;
307 else
308 CLRQ;
309 break;
310 case 1:
311 if (tmp1 == 0)
312 SETQ;
313 else
314 CLRQ;
315 break;
316 }
317 break;
318 case 1:
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319 tmp0 = arg1;
320 arg1 -= tmp2;
321 tmp1 = arg1 > tmp0;
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322 switch (Q) {
323 case 0:
324 if (tmp1 == 0)
325 SETQ;
326 else
327 CLRQ;
328 break;
329 case 1:
330 if (tmp1)
331 SETQ;
332 else
333 CLRQ;
334 break;
335 }
336 break;
337 }
338 break;
339 }
340 if (Q == M)
341 SETT;
342 else
343 CLRT;
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344 //printf("Output: arg1=0x%08x M=%d Q=%d T=%d\n", arg1, M, Q, T);
345 return arg1;
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346}
347
6f06939b 348void helper_macl(uint32_t arg0, uint32_t arg1)
fdf9b3e8
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349{
350 int64_t res;
351
352 res = ((uint64_t) env->mach << 32) | env->macl;
6f06939b 353 res += (int64_t) (int32_t) arg0 *(int64_t) (int32_t) arg1;
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354 env->mach = (res >> 32) & 0xffffffff;
355 env->macl = res & 0xffffffff;
356 if (env->sr & SR_S) {
357 if (res < 0)
358 env->mach |= 0xffff0000;
359 else
360 env->mach &= 0x00007fff;
361 }
362}
363
6f06939b 364void helper_macw(uint32_t arg0, uint32_t arg1)
fdf9b3e8
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365{
366 int64_t res;
367
368 res = ((uint64_t) env->mach << 32) | env->macl;
6f06939b 369 res += (int64_t) (int16_t) arg0 *(int64_t) (int16_t) arg1;
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370 env->mach = (res >> 32) & 0xffffffff;
371 env->macl = res & 0xffffffff;
372 if (env->sr & SR_S) {
373 if (res < -0x80000000) {
374 env->mach = 1;
375 env->macl = 0x80000000;
376 } else if (res > 0x000000007fffffff) {
377 env->mach = 1;
378 env->macl = 0x7fffffff;
379 }
380 }
381}
382
6f06939b 383uint32_t helper_subc(uint32_t arg0, uint32_t arg1)
fdf9b3e8
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384{
385 uint32_t tmp0, tmp1;
386
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387 tmp1 = arg1 - arg0;
388 tmp0 = arg1;
389 arg1 = tmp1 - (env->sr & SR_T);
fdf9b3e8
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390 if (tmp0 < tmp1)
391 env->sr |= SR_T;
392 else
393 env->sr &= ~SR_T;
6f06939b 394 if (tmp1 < arg1)
fdf9b3e8 395 env->sr |= SR_T;
6f06939b 396 return arg1;
fdf9b3e8
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397}
398
6f06939b 399uint32_t helper_subv(uint32_t arg0, uint32_t arg1)
fdf9b3e8
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400{
401 int32_t dest, src, ans;
402
6f06939b 403 if ((int32_t) arg1 >= 0)
fdf9b3e8
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404 dest = 0;
405 else
406 dest = 1;
6f06939b 407 if ((int32_t) arg0 >= 0)
fdf9b3e8
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408 src = 0;
409 else
410 src = 1;
411 src += dest;
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AJ
412 arg1 -= arg0;
413 if ((int32_t) arg1 >= 0)
fdf9b3e8
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414 ans = 0;
415 else
416 ans = 1;
417 ans += dest;
418 if (src == 1) {
419 if (ans == 1)
420 env->sr |= SR_T;
421 else
422 env->sr &= ~SR_T;
423 } else
424 env->sr &= ~SR_T;
6f06939b 425 return arg1;
fdf9b3e8
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426}
427
cc4ba6a9
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428static inline void set_t(void)
429{
430 env->sr |= SR_T;
431}
432
433static inline void clr_t(void)
434{
435 env->sr &= ~SR_T;
436}
437
390af821
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438void helper_ld_fpscr(uint32_t val)
439{
26ac1ea5
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440 env->fpscr = val & FPSCR_MASK;
441 if ((val & FPSCR_RM_MASK) == FPSCR_RM_ZERO) {
390af821 442 set_float_rounding_mode(float_round_to_zero, &env->fp_status);
26ac1ea5 443 } else {
390af821 444 set_float_rounding_mode(float_round_nearest_even, &env->fp_status);
26ac1ea5 445 }
a0d4ac33 446 set_flush_to_zero((val & FPSCR_DN) != 0, &env->fp_status);
390af821 447}
cc4ba6a9 448
21829e9b
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449static void update_fpscr(void *retaddr)
450{
451 int xcpt, cause, enable;
452
453 xcpt = get_float_exception_flags(&env->fp_status);
454
455 /* Clear the flag entries */
456 env->fpscr &= ~FPSCR_FLAG_MASK;
457
458 if (unlikely(xcpt)) {
459 if (xcpt & float_flag_invalid) {
460 env->fpscr |= FPSCR_FLAG_V;
461 }
462 if (xcpt & float_flag_divbyzero) {
463 env->fpscr |= FPSCR_FLAG_Z;
464 }
465 if (xcpt & float_flag_overflow) {
466 env->fpscr |= FPSCR_FLAG_O;
467 }
468 if (xcpt & float_flag_underflow) {
469 env->fpscr |= FPSCR_FLAG_U;
470 }
471 if (xcpt & float_flag_inexact) {
472 env->fpscr |= FPSCR_FLAG_I;
473 }
474
475 /* Accumulate in cause entries */
476 env->fpscr |= (env->fpscr & FPSCR_FLAG_MASK)
477 << (FPSCR_CAUSE_SHIFT - FPSCR_FLAG_SHIFT);
478
479 /* Generate an exception if enabled */
480 cause = (env->fpscr & FPSCR_CAUSE_MASK) >> FPSCR_CAUSE_SHIFT;
481 enable = (env->fpscr & FPSCR_ENABLE_MASK) >> FPSCR_ENABLE_SHIFT;
482 if (cause & enable) {
483 cpu_restore_state_from_retaddr(retaddr);
484 env->exception_index = 0x120;
1162c041 485 cpu_loop_exit(env);
21829e9b
AJ
486 }
487 }
488}
489
d6c424c5 490float32 helper_fabs_FT(float32 t0)
cc4ba6a9 491{
d6c424c5 492 return float32_abs(t0);
cc4ba6a9
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493}
494
d6c424c5 495float64 helper_fabs_DT(float64 t0)
cc4ba6a9 496{
d6c424c5 497 return float64_abs(t0);
cc4ba6a9
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498}
499
d6c424c5 500float32 helper_fadd_FT(float32 t0, float32 t1)
cc4ba6a9 501{
21829e9b 502 set_float_exception_flags(0, &env->fp_status);
d6c424c5 503 t0 = float32_add(t0, t1, &env->fp_status);
21829e9b 504 update_fpscr(GETPC());
d6c424c5 505 return t0;
cc4ba6a9
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506}
507
d6c424c5 508float64 helper_fadd_DT(float64 t0, float64 t1)
cc4ba6a9 509{
21829e9b 510 set_float_exception_flags(0, &env->fp_status);
d6c424c5 511 t0 = float64_add(t0, t1, &env->fp_status);
21829e9b 512 update_fpscr(GETPC());
d6c424c5 513 return t0;
cc4ba6a9
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514}
515
d6c424c5 516void helper_fcmp_eq_FT(float32 t0, float32 t1)
cc4ba6a9 517{
21829e9b 518 int relation;
9850d1e8 519
21829e9b 520 set_float_exception_flags(0, &env->fp_status);
d6c424c5 521 relation = float32_compare(t0, t1, &env->fp_status);
21829e9b
AJ
522 if (unlikely(relation == float_relation_unordered)) {
523 update_fpscr(GETPC());
524 } else if (relation == float_relation_equal) {
cc4ba6a9 525 set_t();
21829e9b 526 } else {
cc4ba6a9 527 clr_t();
21829e9b 528 }
cc4ba6a9
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529}
530
d6c424c5 531void helper_fcmp_eq_DT(float64 t0, float64 t1)
cc4ba6a9 532{
21829e9b 533 int relation;
9850d1e8 534
21829e9b 535 set_float_exception_flags(0, &env->fp_status);
d6c424c5 536 relation = float64_compare(t0, t1, &env->fp_status);
21829e9b
AJ
537 if (unlikely(relation == float_relation_unordered)) {
538 update_fpscr(GETPC());
539 } else if (relation == float_relation_equal) {
cc4ba6a9 540 set_t();
21829e9b 541 } else {
cc4ba6a9 542 clr_t();
21829e9b 543 }
cc4ba6a9
AJ
544}
545
d6c424c5 546void helper_fcmp_gt_FT(float32 t0, float32 t1)
cc4ba6a9 547{
21829e9b 548 int relation;
9850d1e8 549
21829e9b 550 set_float_exception_flags(0, &env->fp_status);
d6c424c5 551 relation = float32_compare(t0, t1, &env->fp_status);
21829e9b
AJ
552 if (unlikely(relation == float_relation_unordered)) {
553 update_fpscr(GETPC());
554 } else if (relation == float_relation_greater) {
cc4ba6a9 555 set_t();
21829e9b 556 } else {
cc4ba6a9 557 clr_t();
21829e9b 558 }
cc4ba6a9
AJ
559}
560
d6c424c5 561void helper_fcmp_gt_DT(float64 t0, float64 t1)
cc4ba6a9 562{
21829e9b 563 int relation;
9850d1e8 564
21829e9b 565 set_float_exception_flags(0, &env->fp_status);
d6c424c5 566 relation = float64_compare(t0, t1, &env->fp_status);
21829e9b
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567 if (unlikely(relation == float_relation_unordered)) {
568 update_fpscr(GETPC());
569 } else if (relation == float_relation_greater) {
cc4ba6a9 570 set_t();
21829e9b 571 } else {
cc4ba6a9 572 clr_t();
21829e9b 573 }
cc4ba6a9
AJ
574}
575
d6c424c5 576float64 helper_fcnvsd_FT_DT(float32 t0)
cc4ba6a9 577{
d6c424c5 578 float64 ret;
21829e9b 579 set_float_exception_flags(0, &env->fp_status);
d6c424c5 580 ret = float32_to_float64(t0, &env->fp_status);
21829e9b 581 update_fpscr(GETPC());
d6c424c5 582 return ret;
cc4ba6a9
AJ
583}
584
d6c424c5 585float32 helper_fcnvds_DT_FT(float64 t0)
cc4ba6a9 586{
d6c424c5 587 float32 ret;
21829e9b 588 set_float_exception_flags(0, &env->fp_status);
d6c424c5 589 ret = float64_to_float32(t0, &env->fp_status);
21829e9b 590 update_fpscr(GETPC());
d6c424c5 591 return ret;
cc4ba6a9
AJ
592}
593
d6c424c5 594float32 helper_fdiv_FT(float32 t0, float32 t1)
cc4ba6a9 595{
21829e9b 596 set_float_exception_flags(0, &env->fp_status);
d6c424c5 597 t0 = float32_div(t0, t1, &env->fp_status);
21829e9b 598 update_fpscr(GETPC());
d6c424c5 599 return t0;
cc4ba6a9
AJ
600}
601
d6c424c5 602float64 helper_fdiv_DT(float64 t0, float64 t1)
cc4ba6a9 603{
21829e9b 604 set_float_exception_flags(0, &env->fp_status);
d6c424c5 605 t0 = float64_div(t0, t1, &env->fp_status);
21829e9b 606 update_fpscr(GETPC());
d6c424c5 607 return t0;
cc4ba6a9
AJ
608}
609
d6c424c5 610float32 helper_float_FT(uint32_t t0)
cc4ba6a9 611{
d6c424c5 612 float32 ret;
21829e9b 613 set_float_exception_flags(0, &env->fp_status);
d6c424c5 614 ret = int32_to_float32(t0, &env->fp_status);
21829e9b 615 update_fpscr(GETPC());
d6c424c5 616 return ret;
cc4ba6a9
AJ
617}
618
d6c424c5 619float64 helper_float_DT(uint32_t t0)
cc4ba6a9 620{
d6c424c5 621 float64 ret;
21829e9b 622 set_float_exception_flags(0, &env->fp_status);
d6c424c5 623 ret = int32_to_float64(t0, &env->fp_status);
21829e9b 624 update_fpscr(GETPC());
d6c424c5 625 return ret;
cc4ba6a9
AJ
626}
627
d6c424c5 628float32 helper_fmac_FT(float32 t0, float32 t1, float32 t2)
5b7141a1 629{
21829e9b 630 set_float_exception_flags(0, &env->fp_status);
d6c424c5
AJ
631 t0 = float32_mul(t0, t1, &env->fp_status);
632 t0 = float32_add(t0, t2, &env->fp_status);
21829e9b 633 update_fpscr(GETPC());
d6c424c5 634 return t0;
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635}
636
d6c424c5 637float32 helper_fmul_FT(float32 t0, float32 t1)
cc4ba6a9 638{
21829e9b 639 set_float_exception_flags(0, &env->fp_status);
d6c424c5 640 t0 = float32_mul(t0, t1, &env->fp_status);
21829e9b 641 update_fpscr(GETPC());
d6c424c5 642 return t0;
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643}
644
d6c424c5 645float64 helper_fmul_DT(float64 t0, float64 t1)
cc4ba6a9 646{
21829e9b 647 set_float_exception_flags(0, &env->fp_status);
d6c424c5 648 t0 = float64_mul(t0, t1, &env->fp_status);
21829e9b 649 update_fpscr(GETPC());
d6c424c5 650 return t0;
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651}
652
d6c424c5 653float32 helper_fneg_T(float32 t0)
7fdf924f 654{
d6c424c5 655 return float32_chs(t0);
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656}
657
d6c424c5 658float32 helper_fsqrt_FT(float32 t0)
cc4ba6a9 659{
21829e9b 660 set_float_exception_flags(0, &env->fp_status);
d6c424c5 661 t0 = float32_sqrt(t0, &env->fp_status);
21829e9b 662 update_fpscr(GETPC());
d6c424c5 663 return t0;
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664}
665
d6c424c5 666float64 helper_fsqrt_DT(float64 t0)
cc4ba6a9 667{
21829e9b 668 set_float_exception_flags(0, &env->fp_status);
d6c424c5 669 t0 = float64_sqrt(t0, &env->fp_status);
21829e9b 670 update_fpscr(GETPC());
d6c424c5 671 return t0;
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672}
673
d6c424c5 674float32 helper_fsub_FT(float32 t0, float32 t1)
cc4ba6a9 675{
21829e9b 676 set_float_exception_flags(0, &env->fp_status);
d6c424c5 677 t0 = float32_sub(t0, t1, &env->fp_status);
21829e9b 678 update_fpscr(GETPC());
d6c424c5 679 return t0;
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680}
681
d6c424c5 682float64 helper_fsub_DT(float64 t0, float64 t1)
cc4ba6a9 683{
21829e9b 684 set_float_exception_flags(0, &env->fp_status);
d6c424c5 685 t0 = float64_sub(t0, t1, &env->fp_status);
21829e9b 686 update_fpscr(GETPC());
d6c424c5 687 return t0;
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688}
689
d6c424c5 690uint32_t helper_ftrc_FT(float32 t0)
cc4ba6a9 691{
21829e9b 692 uint32_t ret;
21829e9b 693 set_float_exception_flags(0, &env->fp_status);
d6c424c5 694 ret = float32_to_int32_round_to_zero(t0, &env->fp_status);
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695 update_fpscr(GETPC());
696 return ret;
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697}
698
d6c424c5 699uint32_t helper_ftrc_DT(float64 t0)
cc4ba6a9 700{
21829e9b 701 uint32_t ret;
21829e9b 702 set_float_exception_flags(0, &env->fp_status);
d6c424c5 703 ret = float64_to_int32_round_to_zero(t0, &env->fp_status);
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704 update_fpscr(GETPC());
705 return ret;
cc4ba6a9 706}
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707
708void helper_fipr(uint32_t m, uint32_t n)
709{
710 int bank, i;
711 float32 r, p;
712
713 bank = (env->sr & FPSCR_FR) ? 16 : 0;
714 r = float32_zero;
715 set_float_exception_flags(0, &env->fp_status);
716
717 for (i = 0 ; i < 4 ; i++) {
718 p = float32_mul(env->fregs[bank + m + i],
719 env->fregs[bank + n + i],
720 &env->fp_status);
721 r = float32_add(r, p, &env->fp_status);
722 }
723 update_fpscr(GETPC());
724
725 env->fregs[bank + n + 3] = r;
726}
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727
728void helper_ftrv(uint32_t n)
729{
730 int bank_matrix, bank_vector;
731 int i, j;
732 float32 r[4];
733 float32 p;
734
735 bank_matrix = (env->sr & FPSCR_FR) ? 0 : 16;
736 bank_vector = (env->sr & FPSCR_FR) ? 16 : 0;
737 set_float_exception_flags(0, &env->fp_status);
738 for (i = 0 ; i < 4 ; i++) {
739 r[i] = float32_zero;
740 for (j = 0 ; j < 4 ; j++) {
741 p = float32_mul(env->fregs[bank_matrix + 4 * j + i],
742 env->fregs[bank_vector + j],
743 &env->fp_status);
744 r[i] = float32_add(r[i], p, &env->fp_status);
745 }
746 }
747 update_fpscr(GETPC());
748
749 for (i = 0 ; i < 4 ; i++) {
750 env->fregs[bank_vector + i] = r[i];
751 }
752}