[qemu.git] / target-sh4 / op_helper.c

/*
 *  SH4 emulation
 *
 *  Copyright (c) 2005 Samuel Tardieu
 *
 * This library is free software; you can redistribute it and/or
 * modify it under the terms of the GNU Lesser General Public
 * License as published by the Free Software Foundation; either
 * version 2 of the License, or (at your option) any later version.
 *
 * This library is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * Lesser General Public License for more details.
 *
 * You should have received a copy of the GNU Lesser General Public
 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
 */
#include <assert.h>
#include <stdlib.h>
#include "cpu.h"
#include "dyngen-exec.h"
#include "helper.h"

static void cpu_restore_state_from_retaddr(void *retaddr)
{
    TranslationBlock *tb;
    unsigned long pc;

    if (retaddr) {
        pc = (unsigned long) retaddr;
        tb = tb_find_pc(pc);
        if (tb) {
            /* the PC is inside the translated code. It means that we have
               a virtual CPU fault */
            cpu_restore_state(tb, env, pc);
        }
    }
}

#ifndef CONFIG_USER_ONLY
#include "softmmu_exec.h"

#define MMUSUFFIX _mmu

#define SHIFT 0
#include "softmmu_template.h"

#define SHIFT 1
#include "softmmu_template.h"

#define SHIFT 2
#include "softmmu_template.h"

#define SHIFT 3
#include "softmmu_template.h"

void tlb_fill(CPUState *env1, target_ulong addr, int is_write, int mmu_idx,
              void *retaddr)
{
    CPUState *saved_env;
    int ret;

    saved_env = env;
    env = env1;
    ret = cpu_sh4_handle_mmu_fault(env, addr, is_write, mmu_idx);
    if (ret) {
        /* now we have a real cpu fault */
        cpu_restore_state_from_retaddr(retaddr);
        cpu_loop_exit(env);
    }
    env = saved_env;
}

#endif

void helper_ldtlb(void)
{
#ifdef CONFIG_USER_ONLY
    /* XXXXX */
    cpu_abort(env, "Unhandled ldtlb");
#else
    cpu_load_tlb(env);
#endif
}

static inline void raise_exception(int index, void *retaddr)
{
    env->exception_index = index;
    cpu_restore_state_from_retaddr(retaddr);
    cpu_loop_exit(env);
}

void helper_raise_illegal_instruction(void)
{
    raise_exception(0x180, GETPC());
}

void helper_raise_slot_illegal_instruction(void)
{
    raise_exception(0x1a0, GETPC());
}

void helper_raise_fpu_disable(void)
{
    raise_exception(0x800, GETPC());
}

void helper_raise_slot_fpu_disable(void)
{
    raise_exception(0x820, GETPC());
}

void helper_debug(void)
{
    env->exception_index = EXCP_DEBUG;
    cpu_loop_exit(env);
}

void helper_sleep(uint32_t next_pc)
{
    env->halted = 1;
    env->in_sleep = 1;
    env->exception_index = EXCP_HLT;
    env->pc = next_pc;
    cpu_loop_exit(env);
}

void helper_trapa(uint32_t tra)
{
    env->tra = tra << 2;
    raise_exception(0x160, GETPC());
}

void helper_movcal(uint32_t address, uint32_t value)
{
    if (cpu_sh4_is_cached (env, address))
    {
	memory_content *r = malloc (sizeof(memory_content));
	r->address = address;
	r->value = value;
	r->next = NULL;

	*(env->movcal_backup_tail) = r;
	env->movcal_backup_tail = &(r->next);
    }
}

void helper_discard_movcal_backup(void)
{
    memory_content *current = env->movcal_backup;

    while(current)
    {
	memory_content *next = current->next;
	free (current);
	env->movcal_backup = current = next;
	if (current == NULL)
	    env->movcal_backup_tail = &(env->movcal_backup);
    } 
}

void helper_ocbi(uint32_t address)
{
    memory_content **current = &(env->movcal_backup);
    while (*current)
    {
	uint32_t a = (*current)->address;
	if ((a & ~0x1F) == (address & ~0x1F))
	{
	    memory_content *next = (*current)->next;
	    stl(a, (*current)->value);
	    
	    if (next == NULL)
	    {
		env->movcal_backup_tail = current;
	    }

	    free (*current);
	    *current = next;
	    break;
	}
    }
}

uint32_t helper_addc(uint32_t arg0, uint32_t arg1)
{
    uint32_t tmp0, tmp1;

    tmp1 = arg0 + arg1;
    tmp0 = arg1;
    arg1 = tmp1 + (env->sr & 1);
    if (tmp0 > tmp1)
	env->sr |= SR_T;
    else
	env->sr &= ~SR_T;
    if (tmp1 > arg1)
	env->sr |= SR_T;
    return arg1;
}

uint32_t helper_addv(uint32_t arg0, uint32_t arg1)
{
    uint32_t dest, src, ans;

    if ((int32_t) arg1 >= 0)
	dest = 0;
    else
	dest = 1;
    if ((int32_t) arg0 >= 0)
	src = 0;
    else
	src = 1;
    src += dest;
    arg1 += arg0;
    if ((int32_t) arg1 >= 0)
	ans = 0;
    else
	ans = 1;
    ans += dest;
    if (src == 0 || src == 2) {
	if (ans == 1)
	    env->sr |= SR_T;
	else
	    env->sr &= ~SR_T;
    } else
	env->sr &= ~SR_T;
    return arg1;
}

#define T (env->sr & SR_T)
#define Q (env->sr & SR_Q ? 1 : 0)
#define M (env->sr & SR_M ? 1 : 0)
#define SETT env->sr |= SR_T
#define CLRT env->sr &= ~SR_T
#define SETQ env->sr |= SR_Q
#define CLRQ env->sr &= ~SR_Q
#define SETM env->sr |= SR_M
#define CLRM env->sr &= ~SR_M

uint32_t helper_div1(uint32_t arg0, uint32_t arg1)
{
    uint32_t tmp0, tmp2;
    uint8_t old_q, tmp1 = 0xff;

    //printf("div1 arg0=0x%08x arg1=0x%08x M=%d Q=%d T=%d\n", arg0, arg1, M, Q, T);
    old_q = Q;
    if ((0x80000000 & arg1) != 0)
	SETQ;
    else
	CLRQ;
    tmp2 = arg0;
    arg1 <<= 1;
    arg1 |= T;
    switch (old_q) {
    case 0:
	switch (M) {
	case 0:
	    tmp0 = arg1;
	    arg1 -= tmp2;
	    tmp1 = arg1 > tmp0;
	    switch (Q) {
	    case 0:
		if (tmp1)
		    SETQ;
		else
		    CLRQ;
		break;
	    case 1:
		if (tmp1 == 0)
		    SETQ;
		else
		    CLRQ;
		break;
	    }
	    break;
	case 1:
	    tmp0 = arg1;
	    arg1 += tmp2;
	    tmp1 = arg1 < tmp0;
	    switch (Q) {
	    case 0:
		if (tmp1 == 0)
		    SETQ;
		else
		    CLRQ;
		break;
	    case 1:
		if (tmp1)
		    SETQ;
		else
		    CLRQ;
		break;
	    }
	    break;
	}
	break;
    case 1:
	switch (M) {
	case 0:
	    tmp0 = arg1;
	    arg1 += tmp2;
	    tmp1 = arg1 < tmp0;
	    switch (Q) {
	    case 0:
		if (tmp1)
		    SETQ;
		else
		    CLRQ;
		break;
	    case 1:
		if (tmp1 == 0)
		    SETQ;
		else
		    CLRQ;
		break;
	    }
	    break;
	case 1:
	    tmp0 = arg1;
	    arg1 -= tmp2;
	    tmp1 = arg1 > tmp0;
	    switch (Q) {
	    case 0:
		if (tmp1 == 0)
		    SETQ;
		else
		    CLRQ;
		break;
	    case 1:
		if (tmp1)
		    SETQ;
		else
		    CLRQ;
		break;
	    }
	    break;
	}
	break;
    }
    if (Q == M)
	SETT;
    else
	CLRT;
    //printf("Output: arg1=0x%08x M=%d Q=%d T=%d\n", arg1, M, Q, T);
    return arg1;
}

void helper_macl(uint32_t arg0, uint32_t arg1)
{
    int64_t res;

    res = ((uint64_t) env->mach << 32) | env->macl;
    res += (int64_t) (int32_t) arg0 *(int64_t) (int32_t) arg1;
    env->mach = (res >> 32) & 0xffffffff;
    env->macl = res & 0xffffffff;
    if (env->sr & SR_S) {
	if (res < 0)
	    env->mach |= 0xffff0000;
	else
	    env->mach &= 0x00007fff;
    }
}

void helper_macw(uint32_t arg0, uint32_t arg1)
{
    int64_t res;

    res = ((uint64_t) env->mach << 32) | env->macl;
    res += (int64_t) (int16_t) arg0 *(int64_t) (int16_t) arg1;
    env->mach = (res >> 32) & 0xffffffff;
    env->macl = res & 0xffffffff;
    if (env->sr & SR_S) {
	if (res < -0x80000000) {
	    env->mach = 1;
	    env->macl = 0x80000000;
	} else if (res > 0x000000007fffffff) {
	    env->mach = 1;
	    env->macl = 0x7fffffff;
	}
    }
}

uint32_t helper_subc(uint32_t arg0, uint32_t arg1)
{
    uint32_t tmp0, tmp1;

    tmp1 = arg1 - arg0;
    tmp0 = arg1;
    arg1 = tmp1 - (env->sr & SR_T);
    if (tmp0 < tmp1)
	env->sr |= SR_T;
    else
	env->sr &= ~SR_T;
    if (tmp1 < arg1)
	env->sr |= SR_T;
    return arg1;
}

uint32_t helper_subv(uint32_t arg0, uint32_t arg1)
{
    int32_t dest, src, ans;

    if ((int32_t) arg1 >= 0)
	dest = 0;
    else
	dest = 1;
    if ((int32_t) arg0 >= 0)
	src = 0;
    else
	src = 1;
    src += dest;
    arg1 -= arg0;
    if ((int32_t) arg1 >= 0)
	ans = 0;
    else
	ans = 1;
    ans += dest;
    if (src == 1) {
	if (ans == 1)
	    env->sr |= SR_T;
	else
	    env->sr &= ~SR_T;
    } else
	env->sr &= ~SR_T;
    return arg1;
}

static inline void set_t(void)
{
    env->sr |= SR_T;
}

static inline void clr_t(void)
{
    env->sr &= ~SR_T;
}

void helper_ld_fpscr(uint32_t val)
{
    env->fpscr = val & FPSCR_MASK;
    if ((val & FPSCR_RM_MASK) == FPSCR_RM_ZERO) {
	set_float_rounding_mode(float_round_to_zero, &env->fp_status);
    } else {
	set_float_rounding_mode(float_round_nearest_even, &env->fp_status);
    }
    set_flush_to_zero((val & FPSCR_DN) != 0, &env->fp_status);
}

static void update_fpscr(void *retaddr)
{
    int xcpt, cause, enable;

    xcpt = get_float_exception_flags(&env->fp_status);

    /* Clear the flag entries */
    env->fpscr &= ~FPSCR_FLAG_MASK;

    if (unlikely(xcpt)) {
        if (xcpt & float_flag_invalid) {
            env->fpscr |= FPSCR_FLAG_V;
        }
        if (xcpt & float_flag_divbyzero) {
            env->fpscr |= FPSCR_FLAG_Z;
        }
        if (xcpt & float_flag_overflow) {
            env->fpscr |= FPSCR_FLAG_O;
        }
        if (xcpt & float_flag_underflow) {
            env->fpscr |= FPSCR_FLAG_U;
        }
        if (xcpt & float_flag_inexact) {
            env->fpscr |= FPSCR_FLAG_I;
        }

        /* Accumulate in cause entries */
        env->fpscr |= (env->fpscr & FPSCR_FLAG_MASK)
                      << (FPSCR_CAUSE_SHIFT - FPSCR_FLAG_SHIFT);

        /* Generate an exception if enabled */
        cause = (env->fpscr & FPSCR_CAUSE_MASK) >> FPSCR_CAUSE_SHIFT;
        enable = (env->fpscr & FPSCR_ENABLE_MASK) >> FPSCR_ENABLE_SHIFT;
        if (cause & enable) {
            cpu_restore_state_from_retaddr(retaddr);
            env->exception_index = 0x120;
            cpu_loop_exit(env);
        }
    }
}

float32 helper_fabs_FT(float32 t0)
{
    return float32_abs(t0);
}

float64 helper_fabs_DT(float64 t0)
{
    return float64_abs(t0);
}

float32 helper_fadd_FT(float32 t0, float32 t1)
{
    set_float_exception_flags(0, &env->fp_status);
    t0 = float32_add(t0, t1, &env->fp_status);
    update_fpscr(GETPC());
    return t0;
}

float64 helper_fadd_DT(float64 t0, float64 t1)
{
    set_float_exception_flags(0, &env->fp_status);
    t0 = float64_add(t0, t1, &env->fp_status);
    update_fpscr(GETPC());
    return t0;
}

void helper_fcmp_eq_FT(float32 t0, float32 t1)
{
    int relation;

    set_float_exception_flags(0, &env->fp_status);
    relation = float32_compare(t0, t1, &env->fp_status);
    if (unlikely(relation == float_relation_unordered)) {
        update_fpscr(GETPC());
    } else if (relation == float_relation_equal) {
	set_t();
    } else {
	clr_t();
    }
}

void helper_fcmp_eq_DT(float64 t0, float64 t1)
{
    int relation;

    set_float_exception_flags(0, &env->fp_status);
    relation = float64_compare(t0, t1, &env->fp_status);
    if (unlikely(relation == float_relation_unordered)) {
        update_fpscr(GETPC());
    } else if (relation == float_relation_equal) {
	set_t();
    } else {
	clr_t();
    }
}

void helper_fcmp_gt_FT(float32 t0, float32 t1)
{
    int relation;

    set_float_exception_flags(0, &env->fp_status);
    relation = float32_compare(t0, t1, &env->fp_status);
    if (unlikely(relation == float_relation_unordered)) {
        update_fpscr(GETPC());
    } else if (relation == float_relation_greater) {
	set_t();
    } else {
	clr_t();
    }
}

void helper_fcmp_gt_DT(float64 t0, float64 t1)
{
    int relation;

    set_float_exception_flags(0, &env->fp_status);
    relation = float64_compare(t0, t1, &env->fp_status);
    if (unlikely(relation == float_relation_unordered)) {
        update_fpscr(GETPC());
    } else if (relation == float_relation_greater) {
	set_t();
    } else {
	clr_t();
    }
}

float64 helper_fcnvsd_FT_DT(float32 t0)
{
    float64 ret;
    set_float_exception_flags(0, &env->fp_status);
    ret = float32_to_float64(t0, &env->fp_status);
    update_fpscr(GETPC());
    return ret;
}

float32 helper_fcnvds_DT_FT(float64 t0)
{
    float32 ret;
    set_float_exception_flags(0, &env->fp_status);
    ret = float64_to_float32(t0, &env->fp_status);
    update_fpscr(GETPC());
    return ret;
}

float32 helper_fdiv_FT(float32 t0, float32 t1)
{
    set_float_exception_flags(0, &env->fp_status);
    t0 = float32_div(t0, t1, &env->fp_status);
    update_fpscr(GETPC());
    return t0;
}

float64 helper_fdiv_DT(float64 t0, float64 t1)
{
    set_float_exception_flags(0, &env->fp_status);
    t0 = float64_div(t0, t1, &env->fp_status);
    update_fpscr(GETPC());
    return t0;
}

float32 helper_float_FT(uint32_t t0)
{
    float32 ret;
    set_float_exception_flags(0, &env->fp_status);
    ret = int32_to_float32(t0, &env->fp_status);
    update_fpscr(GETPC());
    return ret;
}

float64 helper_float_DT(uint32_t t0)
{
    float64 ret;
    set_float_exception_flags(0, &env->fp_status);
    ret = int32_to_float64(t0, &env->fp_status);
    update_fpscr(GETPC());
    return ret;
}

float32 helper_fmac_FT(float32 t0, float32 t1, float32 t2)
{
    set_float_exception_flags(0, &env->fp_status);
    t0 = float32_mul(t0, t1, &env->fp_status);
    t0 = float32_add(t0, t2, &env->fp_status);
    update_fpscr(GETPC());
    return t0;
}

float32 helper_fmul_FT(float32 t0, float32 t1)
{
    set_float_exception_flags(0, &env->fp_status);
    t0 = float32_mul(t0, t1, &env->fp_status);
    update_fpscr(GETPC());
    return t0;
}

float64 helper_fmul_DT(float64 t0, float64 t1)
{
    set_float_exception_flags(0, &env->fp_status);
    t0 = float64_mul(t0, t1, &env->fp_status);
    update_fpscr(GETPC());
    return t0;
}

float32 helper_fneg_T(float32 t0)
{
    return float32_chs(t0);
}

float32 helper_fsqrt_FT(float32 t0)
{
    set_float_exception_flags(0, &env->fp_status);
    t0 = float32_sqrt(t0, &env->fp_status);
    update_fpscr(GETPC());
    return t0;
}

float64 helper_fsqrt_DT(float64 t0)
{
    set_float_exception_flags(0, &env->fp_status);
    t0 = float64_sqrt(t0, &env->fp_status);
    update_fpscr(GETPC());
    return t0;
}

float32 helper_fsub_FT(float32 t0, float32 t1)
{
    set_float_exception_flags(0, &env->fp_status);
    t0 = float32_sub(t0, t1, &env->fp_status);
    update_fpscr(GETPC());
    return t0;
}

float64 helper_fsub_DT(float64 t0, float64 t1)
{
    set_float_exception_flags(0, &env->fp_status);
    t0 = float64_sub(t0, t1, &env->fp_status);
    update_fpscr(GETPC());
    return t0;
}

uint32_t helper_ftrc_FT(float32 t0)
{
    uint32_t ret;
    set_float_exception_flags(0, &env->fp_status);
    ret = float32_to_int32_round_to_zero(t0, &env->fp_status);
    update_fpscr(GETPC());
    return ret;
}

uint32_t helper_ftrc_DT(float64 t0)
{
    uint32_t ret;
    set_float_exception_flags(0, &env->fp_status);
    ret = float64_to_int32_round_to_zero(t0, &env->fp_status);
    update_fpscr(GETPC());
    return ret;
}

void helper_fipr(uint32_t m, uint32_t n)
{
    int bank, i;
    float32 r, p;

    bank = (env->sr & FPSCR_FR) ? 16 : 0;
    r = float32_zero;
    set_float_exception_flags(0, &env->fp_status);

    for (i = 0 ; i < 4 ; i++) {
        p = float32_mul(env->fregs[bank + m + i],
                        env->fregs[bank + n + i],
                        &env->fp_status);
        r = float32_add(r, p, &env->fp_status);
    }
    update_fpscr(GETPC());

    env->fregs[bank + n + 3] = r;
}

void helper_ftrv(uint32_t n)
{
    int bank_matrix, bank_vector;
    int i, j;
    float32 r[4];
    float32 p;

    bank_matrix = (env->sr & FPSCR_FR) ? 0 : 16;
    bank_vector = (env->sr & FPSCR_FR) ? 16 : 0;
    set_float_exception_flags(0, &env->fp_status);
    for (i = 0 ; i < 4 ; i++) {
        r[i] = float32_zero;
        for (j = 0 ; j < 4 ; j++) {
            p = float32_mul(env->fregs[bank_matrix + 4 * j + i],
                            env->fregs[bank_vector + j],
                            &env->fp_status);
            r[i] = float32_add(r[i], p, &env->fp_status);
        }
    }
    update_fpscr(GETPC());

    for (i = 0 ; i < 4 ; i++) {
        env->fregs[bank_vector + i] = r[i];
    }
}
Commit	Line	Data
fdf9b3e8 FB	1	/*
fdf9b3e8 FB	2	* SH4 emulation
5fafdf24	3	*
fdf9b3e8 FB	4	* Copyright (c) 2005 Samuel Tardieu
	5	*
	6	* This library is free software; you can redistribute it and/or
	7	* modify it under the terms of the GNU Lesser General Public
	8	* License as published by the Free Software Foundation; either
	9	* version 2 of the License, or (at your option) any later version.
	10	*
	11	* This library is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	14	* Lesser General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU Lesser General Public
8167ee88	17	* License along with this library; if not, see <http://www.gnu.org/licenses/>.
fdf9b3e8 FB	18	*/
fdf9b3e8 FB	19	#include <assert.h>
852d481f	20	#include <stdlib.h>
3e457172 BS	21	#include "cpu.h"
3e457172 BS	22	#include "dyngen-exec.h"
a7812ae4	23	#include "helper.h"
fdf9b3e8	24
21829e9b AJ	25	static void cpu_restore_state_from_retaddr(void *retaddr)
	26	{
	27	TranslationBlock *tb;
	28	unsigned long pc;
	29
	30	if (retaddr) {
	31	pc = (unsigned long) retaddr;
	32	tb = tb_find_pc(pc);
	33	if (tb) {
	34	/* the PC is inside the translated code. It means that we have
	35	a virtual CPU fault */
618ba8e6	36	cpu_restore_state(tb, env, pc);
21829e9b AJ	37	}
	38	}
	39	}
	40
fdf9b3e8	41	#ifndef CONFIG_USER_ONLY
3e457172	42	#include "softmmu_exec.h"
fdf9b3e8 FB	43
fdf9b3e8 FB	44	#define MMUSUFFIX _mmu
fdf9b3e8 FB	45
	46	#define SHIFT 0
	47	#include "softmmu_template.h"
	48
	49	#define SHIFT 1
	50	#include "softmmu_template.h"
	51
	52	#define SHIFT 2
	53	#include "softmmu_template.h"
	54
	55	#define SHIFT 3
	56	#include "softmmu_template.h"
	57
bccd9ec5 BS	58	void tlb_fill(CPUState *env1, target_ulong addr, int is_write, int mmu_idx,
bccd9ec5 BS	59	void *retaddr)
fdf9b3e8	60	{
fdf9b3e8	61	CPUState *saved_env;
fdf9b3e8 FB	62	int ret;
fdf9b3e8 FB	63
fdf9b3e8	64	saved_env = env;
bccd9ec5	65	env = env1;
97b348e7	66	ret = cpu_sh4_handle_mmu_fault(env, addr, is_write, mmu_idx);
fdf9b3e8	67	if (ret) {
21829e9b AJ	68	/* now we have a real cpu fault */
21829e9b AJ	69	cpu_restore_state_from_retaddr(retaddr);
1162c041	70	cpu_loop_exit(env);
fdf9b3e8 FB	71	}
	72	env = saved_env;
	73	}
	74
	75	#endif
	76
ea2b542a AJ	77	void helper_ldtlb(void)
	78	{
	79	#ifdef CONFIG_USER_ONLY
	80	/* XXXXX */
43dc2a64	81	cpu_abort(env, "Unhandled ldtlb");
ea2b542a AJ	82	#else
	83	cpu_load_tlb(env);
	84	#endif
	85	}
	86
fd4bab10	87	static inline void raise_exception(int index, void *retaddr)
e6afc2f4	88	{
fd4bab10 AJ	89	env->exception_index = index;
fd4bab10 AJ	90	cpu_restore_state_from_retaddr(retaddr);
1162c041	91	cpu_loop_exit(env);
e6afc2f4 AJ	92	}
e6afc2f4 AJ	93
fd4bab10 AJ	94	void helper_raise_illegal_instruction(void)
	95	{
	96	raise_exception(0x180, GETPC());
	97	}
	98
e6afc2f4 AJ	99	void helper_raise_slot_illegal_instruction(void)
e6afc2f4 AJ	100	{
fd4bab10	101	raise_exception(0x1a0, GETPC());
e6afc2f4 AJ	102	}
e6afc2f4 AJ	103
d8299bcc AJ	104	void helper_raise_fpu_disable(void)
d8299bcc AJ	105	{
fd4bab10	106	raise_exception(0x800, GETPC());
d8299bcc AJ	107	}
	108
	109	void helper_raise_slot_fpu_disable(void)
	110	{
fd4bab10	111	raise_exception(0x820, GETPC());
d8299bcc AJ	112	}
d8299bcc AJ	113
e6afc2f4 AJ	114	void helper_debug(void)
	115	{
	116	env->exception_index = EXCP_DEBUG;
1162c041	117	cpu_loop_exit(env);
e6afc2f4 AJ	118	}
e6afc2f4 AJ	119
f24f381b	120	void helper_sleep(uint32_t next_pc)
e6afc2f4 AJ	121	{
e6afc2f4 AJ	122	env->halted = 1;
efac4154	123	env->in_sleep = 1;
e6afc2f4	124	env->exception_index = EXCP_HLT;
f24f381b	125	env->pc = next_pc;
1162c041	126	cpu_loop_exit(env);
e6afc2f4 AJ	127	}
	128
	129	void helper_trapa(uint32_t tra)
	130	{
	131	env->tra = tra << 2;
fd4bab10	132	raise_exception(0x160, GETPC());
e6afc2f4 AJ	133	}
e6afc2f4 AJ	134
852d481f EI	135	void helper_movcal(uint32_t address, uint32_t value)
	136	{
	137	if (cpu_sh4_is_cached (env, address))
	138	{
	139	memory_content *r = malloc (sizeof(memory_content));
	140	r->address = address;
	141	r->value = value;
	142	r->next = NULL;
	143
	144	*(env->movcal_backup_tail) = r;
	145	env->movcal_backup_tail = &(r->next);
	146	}
	147	}
	148
	149	void helper_discard_movcal_backup(void)
	150	{
	151	memory_content *current = env->movcal_backup;
	152
	153	while(current)
	154	{
	155	memory_content *next = current->next;
	156	free (current);
	157	env->movcal_backup = current = next;
b9d38e95	158	if (current == NULL)
852d481f EI	159	env->movcal_backup_tail = &(env->movcal_backup);
	160	}
	161	}
	162
	163	void helper_ocbi(uint32_t address)
	164	{
	165	memory_content **current = &(env->movcal_backup);
	166	while (*current)
	167	{
	168	uint32_t a = (*current)->address;
	169	if ((a & ~0x1F) == (address & ~0x1F))
	170	{
	171	memory_content next = (current)->next;
	172	stl(a, (*current)->value);
	173
b9d38e95	174	if (next == NULL)
852d481f EI	175	{
	176	env->movcal_backup_tail = current;
	177	}
	178
	179	free (*current);
	180	*current = next;
	181	break;
	182	}
	183	}
	184	}
	185
6f06939b	186	uint32_t helper_addc(uint32_t arg0, uint32_t arg1)
fdf9b3e8 FB	187	{
	188	uint32_t tmp0, tmp1;
	189
6f06939b AJ	190	tmp1 = arg0 + arg1;
	191	tmp0 = arg1;
	192	arg1 = tmp1 + (env->sr & 1);
fdf9b3e8 FB	193	if (tmp0 > tmp1)
	194	env->sr \|= SR_T;
	195	else
	196	env->sr &= ~SR_T;
6f06939b	197	if (tmp1 > arg1)
fdf9b3e8	198	env->sr \|= SR_T;
6f06939b	199	return arg1;
fdf9b3e8 FB	200	}
fdf9b3e8 FB	201
6f06939b	202	uint32_t helper_addv(uint32_t arg0, uint32_t arg1)
fdf9b3e8 FB	203	{
	204	uint32_t dest, src, ans;
	205
6f06939b	206	if ((int32_t) arg1 >= 0)
fdf9b3e8 FB	207	dest = 0;
	208	else
	209	dest = 1;
6f06939b	210	if ((int32_t) arg0 >= 0)
fdf9b3e8 FB	211	src = 0;
	212	else
	213	src = 1;
	214	src += dest;
6f06939b AJ	215	arg1 += arg0;
6f06939b AJ	216	if ((int32_t) arg1 >= 0)
fdf9b3e8 FB	217	ans = 0;
	218	else
	219	ans = 1;
	220	ans += dest;
	221	if (src == 0 \|\| src == 2) {
	222	if (ans == 1)
	223	env->sr \|= SR_T;
	224	else
	225	env->sr &= ~SR_T;
	226	} else
	227	env->sr &= ~SR_T;
6f06939b	228	return arg1;
fdf9b3e8 FB	229	}
	230
	231	#define T (env->sr & SR_T)
	232	#define Q (env->sr & SR_Q ? 1 : 0)
	233	#define M (env->sr & SR_M ? 1 : 0)
	234	#define SETT env->sr \|= SR_T
	235	#define CLRT env->sr &= ~SR_T
	236	#define SETQ env->sr \|= SR_Q
	237	#define CLRQ env->sr &= ~SR_Q
	238	#define SETM env->sr \|= SR_M
	239	#define CLRM env->sr &= ~SR_M
	240
69d6275b	241	uint32_t helper_div1(uint32_t arg0, uint32_t arg1)
fdf9b3e8 FB	242	{
	243	uint32_t tmp0, tmp2;
	244	uint8_t old_q, tmp1 = 0xff;
	245
69d6275b	246	//printf("div1 arg0=0x%08x arg1=0x%08x M=%d Q=%d T=%d\n", arg0, arg1, M, Q, T);
fdf9b3e8	247	old_q = Q;
69d6275b	248	if ((0x80000000 & arg1) != 0)
fdf9b3e8 FB	249	SETQ;
	250	else
	251	CLRQ;
69d6275b AJ	252	tmp2 = arg0;
	253	arg1 <<= 1;
	254	arg1 \|= T;
fdf9b3e8 FB	255	switch (old_q) {
	256	case 0:
	257	switch (M) {
	258	case 0:
69d6275b AJ	259	tmp0 = arg1;
	260	arg1 -= tmp2;
	261	tmp1 = arg1 > tmp0;
fdf9b3e8 FB	262	switch (Q) {
	263	case 0:
	264	if (tmp1)
	265	SETQ;
	266	else
	267	CLRQ;
	268	break;
	269	case 1:
	270	if (tmp1 == 0)
	271	SETQ;
	272	else
	273	CLRQ;
	274	break;
	275	}
	276	break;
	277	case 1:
69d6275b AJ	278	tmp0 = arg1;
	279	arg1 += tmp2;
	280	tmp1 = arg1 < tmp0;
fdf9b3e8 FB	281	switch (Q) {
	282	case 0:
	283	if (tmp1 == 0)
	284	SETQ;
	285	else
	286	CLRQ;
	287	break;
	288	case 1:
	289	if (tmp1)
	290	SETQ;
	291	else
	292	CLRQ;
	293	break;
	294	}
	295	break;
	296	}
	297	break;
	298	case 1:
	299	switch (M) {
	300	case 0:
69d6275b AJ	301	tmp0 = arg1;
	302	arg1 += tmp2;
	303	tmp1 = arg1 < tmp0;
fdf9b3e8 FB	304	switch (Q) {
	305	case 0:
	306	if (tmp1)
	307	SETQ;
	308	else
	309	CLRQ;
	310	break;
	311	case 1:
	312	if (tmp1 == 0)
	313	SETQ;
	314	else
	315	CLRQ;
	316	break;
	317	}
	318	break;
	319	case 1:
69d6275b AJ	320	tmp0 = arg1;
	321	arg1 -= tmp2;
	322	tmp1 = arg1 > tmp0;
fdf9b3e8 FB	323	switch (Q) {
	324	case 0:
	325	if (tmp1 == 0)
	326	SETQ;
	327	else
	328	CLRQ;
	329	break;
	330	case 1:
	331	if (tmp1)
	332	SETQ;
	333	else
	334	CLRQ;
	335	break;
	336	}
	337	break;
	338	}
	339	break;
	340	}
	341	if (Q == M)
	342	SETT;
	343	else
	344	CLRT;
69d6275b AJ	345	//printf("Output: arg1=0x%08x M=%d Q=%d T=%d\n", arg1, M, Q, T);
69d6275b AJ	346	return arg1;
fdf9b3e8 FB	347	}
fdf9b3e8 FB	348
6f06939b	349	void helper_macl(uint32_t arg0, uint32_t arg1)
fdf9b3e8 FB	350	{
	351	int64_t res;
	352
	353	res = ((uint64_t) env->mach << 32) \| env->macl;
6f06939b	354	res += (int64_t) (int32_t) arg0 *(int64_t) (int32_t) arg1;
fdf9b3e8 FB	355	env->mach = (res >> 32) & 0xffffffff;
	356	env->macl = res & 0xffffffff;
	357	if (env->sr & SR_S) {
	358	if (res < 0)
	359	env->mach \|= 0xffff0000;
	360	else
	361	env->mach &= 0x00007fff;
	362	}
	363	}
	364
6f06939b	365	void helper_macw(uint32_t arg0, uint32_t arg1)
fdf9b3e8 FB	366	{
	367	int64_t res;
	368
	369	res = ((uint64_t) env->mach << 32) \| env->macl;
6f06939b	370	res += (int64_t) (int16_t) arg0 *(int64_t) (int16_t) arg1;
fdf9b3e8 FB	371	env->mach = (res >> 32) & 0xffffffff;
	372	env->macl = res & 0xffffffff;
	373	if (env->sr & SR_S) {
	374	if (res < -0x80000000) {
	375	env->mach = 1;
	376	env->macl = 0x80000000;
	377	} else if (res > 0x000000007fffffff) {
	378	env->mach = 1;
	379	env->macl = 0x7fffffff;
	380	}
	381	}
	382	}
	383
6f06939b	384	uint32_t helper_subc(uint32_t arg0, uint32_t arg1)
fdf9b3e8 FB	385	{
	386	uint32_t tmp0, tmp1;
	387
6f06939b AJ	388	tmp1 = arg1 - arg0;
	389	tmp0 = arg1;
	390	arg1 = tmp1 - (env->sr & SR_T);
fdf9b3e8 FB	391	if (tmp0 < tmp1)
	392	env->sr \|= SR_T;
	393	else
	394	env->sr &= ~SR_T;
6f06939b	395	if (tmp1 < arg1)
fdf9b3e8	396	env->sr \|= SR_T;
6f06939b	397	return arg1;
fdf9b3e8 FB	398	}
fdf9b3e8 FB	399
6f06939b	400	uint32_t helper_subv(uint32_t arg0, uint32_t arg1)
fdf9b3e8 FB	401	{
	402	int32_t dest, src, ans;
	403
6f06939b	404	if ((int32_t) arg1 >= 0)
fdf9b3e8 FB	405	dest = 0;
	406	else
	407	dest = 1;
6f06939b	408	if ((int32_t) arg0 >= 0)
fdf9b3e8 FB	409	src = 0;
	410	else
	411	src = 1;
	412	src += dest;
6f06939b AJ	413	arg1 -= arg0;
6f06939b AJ	414	if ((int32_t) arg1 >= 0)
fdf9b3e8 FB	415	ans = 0;
	416	else
	417	ans = 1;
	418	ans += dest;
	419	if (src == 1) {
	420	if (ans == 1)
	421	env->sr \|= SR_T;
	422	else
	423	env->sr &= ~SR_T;
	424	} else
	425	env->sr &= ~SR_T;
6f06939b	426	return arg1;
fdf9b3e8 FB	427	}
fdf9b3e8 FB	428
cc4ba6a9 AJ	429	static inline void set_t(void)
	430	{
	431	env->sr \|= SR_T;
	432	}
	433
	434	static inline void clr_t(void)
	435	{
	436	env->sr &= ~SR_T;
	437	}
	438
390af821 AJ	439	void helper_ld_fpscr(uint32_t val)
390af821 AJ	440	{
26ac1ea5 AJ	441	env->fpscr = val & FPSCR_MASK;
26ac1ea5 AJ	442	if ((val & FPSCR_RM_MASK) == FPSCR_RM_ZERO) {
390af821	443	set_float_rounding_mode(float_round_to_zero, &env->fp_status);
26ac1ea5	444	} else {
390af821	445	set_float_rounding_mode(float_round_nearest_even, &env->fp_status);
26ac1ea5	446	}
a0d4ac33	447	set_flush_to_zero((val & FPSCR_DN) != 0, &env->fp_status);
390af821	448	}
cc4ba6a9	449
21829e9b AJ	450	static void update_fpscr(void *retaddr)
	451	{
	452	int xcpt, cause, enable;
	453
	454	xcpt = get_float_exception_flags(&env->fp_status);
	455
	456	/* Clear the flag entries */
	457	env->fpscr &= ~FPSCR_FLAG_MASK;
	458
	459	if (unlikely(xcpt)) {
	460	if (xcpt & float_flag_invalid) {
	461	env->fpscr \|= FPSCR_FLAG_V;
	462	}
	463	if (xcpt & float_flag_divbyzero) {
	464	env->fpscr \|= FPSCR_FLAG_Z;
	465	}
	466	if (xcpt & float_flag_overflow) {
	467	env->fpscr \|= FPSCR_FLAG_O;
	468	}
	469	if (xcpt & float_flag_underflow) {
	470	env->fpscr \|= FPSCR_FLAG_U;
	471	}
	472	if (xcpt & float_flag_inexact) {
	473	env->fpscr \|= FPSCR_FLAG_I;
	474	}
	475
	476	/* Accumulate in cause entries */
	477	env->fpscr \|= (env->fpscr & FPSCR_FLAG_MASK)
	478	<< (FPSCR_CAUSE_SHIFT - FPSCR_FLAG_SHIFT);
	479
	480	/* Generate an exception if enabled */
	481	cause = (env->fpscr & FPSCR_CAUSE_MASK) >> FPSCR_CAUSE_SHIFT;
	482	enable = (env->fpscr & FPSCR_ENABLE_MASK) >> FPSCR_ENABLE_SHIFT;
	483	if (cause & enable) {
	484	cpu_restore_state_from_retaddr(retaddr);
	485	env->exception_index = 0x120;
1162c041	486	cpu_loop_exit(env);
21829e9b AJ	487	}
	488	}
	489	}
	490
d6c424c5	491	float32 helper_fabs_FT(float32 t0)
cc4ba6a9	492	{
d6c424c5	493	return float32_abs(t0);
cc4ba6a9 AJ	494	}
cc4ba6a9 AJ	495
d6c424c5	496	float64 helper_fabs_DT(float64 t0)
cc4ba6a9	497	{
d6c424c5	498	return float64_abs(t0);
cc4ba6a9 AJ	499	}
cc4ba6a9 AJ	500
d6c424c5	501	float32 helper_fadd_FT(float32 t0, float32 t1)
cc4ba6a9	502	{
21829e9b	503	set_float_exception_flags(0, &env->fp_status);
d6c424c5	504	t0 = float32_add(t0, t1, &env->fp_status);
21829e9b	505	update_fpscr(GETPC());
d6c424c5	506	return t0;
cc4ba6a9 AJ	507	}
cc4ba6a9 AJ	508
d6c424c5	509	float64 helper_fadd_DT(float64 t0, float64 t1)
cc4ba6a9	510	{
21829e9b	511	set_float_exception_flags(0, &env->fp_status);
d6c424c5	512	t0 = float64_add(t0, t1, &env->fp_status);
21829e9b	513	update_fpscr(GETPC());
d6c424c5	514	return t0;
cc4ba6a9 AJ	515	}
cc4ba6a9 AJ	516
d6c424c5	517	void helper_fcmp_eq_FT(float32 t0, float32 t1)
cc4ba6a9	518	{
21829e9b	519	int relation;
9850d1e8	520
21829e9b	521	set_float_exception_flags(0, &env->fp_status);
d6c424c5	522	relation = float32_compare(t0, t1, &env->fp_status);
21829e9b AJ	523	if (unlikely(relation == float_relation_unordered)) {
	524	update_fpscr(GETPC());
	525	} else if (relation == float_relation_equal) {
cc4ba6a9	526	set_t();
21829e9b	527	} else {
cc4ba6a9	528	clr_t();
21829e9b	529	}
cc4ba6a9 AJ	530	}
cc4ba6a9 AJ	531
d6c424c5	532	void helper_fcmp_eq_DT(float64 t0, float64 t1)
cc4ba6a9	533	{
21829e9b	534	int relation;
9850d1e8	535
21829e9b	536	set_float_exception_flags(0, &env->fp_status);
d6c424c5	537	relation = float64_compare(t0, t1, &env->fp_status);
21829e9b AJ	538	if (unlikely(relation == float_relation_unordered)) {
	539	update_fpscr(GETPC());
	540	} else if (relation == float_relation_equal) {
cc4ba6a9	541	set_t();
21829e9b	542	} else {
cc4ba6a9	543	clr_t();
21829e9b	544	}
cc4ba6a9 AJ	545	}
cc4ba6a9 AJ	546
d6c424c5	547	void helper_fcmp_gt_FT(float32 t0, float32 t1)
cc4ba6a9	548	{
21829e9b	549	int relation;
9850d1e8	550
21829e9b	551	set_float_exception_flags(0, &env->fp_status);
d6c424c5	552	relation = float32_compare(t0, t1, &env->fp_status);
21829e9b AJ	553	if (unlikely(relation == float_relation_unordered)) {
	554	update_fpscr(GETPC());
	555	} else if (relation == float_relation_greater) {
cc4ba6a9	556	set_t();
21829e9b	557	} else {
cc4ba6a9	558	clr_t();
21829e9b	559	}
cc4ba6a9 AJ	560	}
cc4ba6a9 AJ	561
d6c424c5	562	void helper_fcmp_gt_DT(float64 t0, float64 t1)
cc4ba6a9	563	{
21829e9b	564	int relation;
9850d1e8	565
21829e9b	566	set_float_exception_flags(0, &env->fp_status);
d6c424c5	567	relation = float64_compare(t0, t1, &env->fp_status);
21829e9b AJ	568	if (unlikely(relation == float_relation_unordered)) {
	569	update_fpscr(GETPC());
	570	} else if (relation == float_relation_greater) {
cc4ba6a9	571	set_t();
21829e9b	572	} else {
cc4ba6a9	573	clr_t();
21829e9b	574	}
cc4ba6a9 AJ	575	}
cc4ba6a9 AJ	576
d6c424c5	577	float64 helper_fcnvsd_FT_DT(float32 t0)
cc4ba6a9	578	{
d6c424c5	579	float64 ret;
21829e9b	580	set_float_exception_flags(0, &env->fp_status);
d6c424c5	581	ret = float32_to_float64(t0, &env->fp_status);
21829e9b	582	update_fpscr(GETPC());
d6c424c5	583	return ret;
cc4ba6a9 AJ	584	}
cc4ba6a9 AJ	585
d6c424c5	586	float32 helper_fcnvds_DT_FT(float64 t0)
cc4ba6a9	587	{
d6c424c5	588	float32 ret;
21829e9b	589	set_float_exception_flags(0, &env->fp_status);
d6c424c5	590	ret = float64_to_float32(t0, &env->fp_status);
21829e9b	591	update_fpscr(GETPC());
d6c424c5	592	return ret;
cc4ba6a9 AJ	593	}
cc4ba6a9 AJ	594
d6c424c5	595	float32 helper_fdiv_FT(float32 t0, float32 t1)
cc4ba6a9	596	{
21829e9b	597	set_float_exception_flags(0, &env->fp_status);
d6c424c5	598	t0 = float32_div(t0, t1, &env->fp_status);
21829e9b	599	update_fpscr(GETPC());
d6c424c5	600	return t0;
cc4ba6a9 AJ	601	}
cc4ba6a9 AJ	602
d6c424c5	603	float64 helper_fdiv_DT(float64 t0, float64 t1)
cc4ba6a9	604	{
21829e9b	605	set_float_exception_flags(0, &env->fp_status);
d6c424c5	606	t0 = float64_div(t0, t1, &env->fp_status);
21829e9b	607	update_fpscr(GETPC());
d6c424c5	608	return t0;
cc4ba6a9 AJ	609	}
cc4ba6a9 AJ	610
d6c424c5	611	float32 helper_float_FT(uint32_t t0)
cc4ba6a9	612	{
d6c424c5	613	float32 ret;
21829e9b	614	set_float_exception_flags(0, &env->fp_status);
d6c424c5	615	ret = int32_to_float32(t0, &env->fp_status);
21829e9b	616	update_fpscr(GETPC());
d6c424c5	617	return ret;
cc4ba6a9 AJ	618	}
cc4ba6a9 AJ	619
d6c424c5	620	float64 helper_float_DT(uint32_t t0)
cc4ba6a9	621	{
d6c424c5	622	float64 ret;
21829e9b	623	set_float_exception_flags(0, &env->fp_status);
d6c424c5	624	ret = int32_to_float64(t0, &env->fp_status);
21829e9b	625	update_fpscr(GETPC());
d6c424c5	626	return ret;
cc4ba6a9 AJ	627	}
cc4ba6a9 AJ	628
d6c424c5	629	float32 helper_fmac_FT(float32 t0, float32 t1, float32 t2)
5b7141a1	630	{
21829e9b	631	set_float_exception_flags(0, &env->fp_status);
d6c424c5 AJ	632	t0 = float32_mul(t0, t1, &env->fp_status);
d6c424c5 AJ	633	t0 = float32_add(t0, t2, &env->fp_status);
21829e9b	634	update_fpscr(GETPC());
d6c424c5	635	return t0;
5b7141a1 AJ	636	}
5b7141a1 AJ	637
d6c424c5	638	float32 helper_fmul_FT(float32 t0, float32 t1)
cc4ba6a9	639	{
21829e9b	640	set_float_exception_flags(0, &env->fp_status);
d6c424c5	641	t0 = float32_mul(t0, t1, &env->fp_status);
21829e9b	642	update_fpscr(GETPC());
d6c424c5	643	return t0;
cc4ba6a9 AJ	644	}
cc4ba6a9 AJ	645
d6c424c5	646	float64 helper_fmul_DT(float64 t0, float64 t1)
cc4ba6a9	647	{
21829e9b	648	set_float_exception_flags(0, &env->fp_status);
d6c424c5	649	t0 = float64_mul(t0, t1, &env->fp_status);
21829e9b	650	update_fpscr(GETPC());
d6c424c5	651	return t0;
cc4ba6a9 AJ	652	}
cc4ba6a9 AJ	653
d6c424c5	654	float32 helper_fneg_T(float32 t0)
7fdf924f	655	{
d6c424c5	656	return float32_chs(t0);
7fdf924f AJ	657	}
7fdf924f AJ	658
d6c424c5	659	float32 helper_fsqrt_FT(float32 t0)
cc4ba6a9	660	{
21829e9b	661	set_float_exception_flags(0, &env->fp_status);
d6c424c5	662	t0 = float32_sqrt(t0, &env->fp_status);
21829e9b	663	update_fpscr(GETPC());
d6c424c5	664	return t0;
cc4ba6a9 AJ	665	}
cc4ba6a9 AJ	666
d6c424c5	667	float64 helper_fsqrt_DT(float64 t0)
cc4ba6a9	668	{
21829e9b	669	set_float_exception_flags(0, &env->fp_status);
d6c424c5	670	t0 = float64_sqrt(t0, &env->fp_status);
21829e9b	671	update_fpscr(GETPC());
d6c424c5	672	return t0;
cc4ba6a9 AJ	673	}
cc4ba6a9 AJ	674
d6c424c5	675	float32 helper_fsub_FT(float32 t0, float32 t1)
cc4ba6a9	676	{
21829e9b	677	set_float_exception_flags(0, &env->fp_status);
d6c424c5	678	t0 = float32_sub(t0, t1, &env->fp_status);
21829e9b	679	update_fpscr(GETPC());
d6c424c5	680	return t0;
cc4ba6a9 AJ	681	}
cc4ba6a9 AJ	682
d6c424c5	683	float64 helper_fsub_DT(float64 t0, float64 t1)
cc4ba6a9	684	{
21829e9b	685	set_float_exception_flags(0, &env->fp_status);
d6c424c5	686	t0 = float64_sub(t0, t1, &env->fp_status);
21829e9b	687	update_fpscr(GETPC());
d6c424c5	688	return t0;
cc4ba6a9 AJ	689	}
cc4ba6a9 AJ	690
d6c424c5	691	uint32_t helper_ftrc_FT(float32 t0)
cc4ba6a9	692	{
21829e9b	693	uint32_t ret;
21829e9b	694	set_float_exception_flags(0, &env->fp_status);
d6c424c5	695	ret = float32_to_int32_round_to_zero(t0, &env->fp_status);
21829e9b AJ	696	update_fpscr(GETPC());
21829e9b AJ	697	return ret;
cc4ba6a9 AJ	698	}
cc4ba6a9 AJ	699
d6c424c5	700	uint32_t helper_ftrc_DT(float64 t0)
cc4ba6a9	701	{
21829e9b	702	uint32_t ret;
21829e9b	703	set_float_exception_flags(0, &env->fp_status);
d6c424c5	704	ret = float64_to_int32_round_to_zero(t0, &env->fp_status);
21829e9b AJ	705	update_fpscr(GETPC());
21829e9b AJ	706	return ret;
cc4ba6a9	707	}
af8c2bde AJ	708
	709	void helper_fipr(uint32_t m, uint32_t n)
	710	{
	711	int bank, i;
	712	float32 r, p;
	713
	714	bank = (env->sr & FPSCR_FR) ? 16 : 0;
	715	r = float32_zero;
	716	set_float_exception_flags(0, &env->fp_status);
	717
	718	for (i = 0 ; i < 4 ; i++) {
	719	p = float32_mul(env->fregs[bank + m + i],
	720	env->fregs[bank + n + i],
	721	&env->fp_status);
	722	r = float32_add(r, p, &env->fp_status);
	723	}
	724	update_fpscr(GETPC());
	725
	726	env->fregs[bank + n + 3] = r;
	727	}
17075f10 AJ	728
	729	void helper_ftrv(uint32_t n)
	730	{
	731	int bank_matrix, bank_vector;
	732	int i, j;
	733	float32 r[4];
	734	float32 p;
	735
	736	bank_matrix = (env->sr & FPSCR_FR) ? 0 : 16;
	737	bank_vector = (env->sr & FPSCR_FR) ? 16 : 0;
	738	set_float_exception_flags(0, &env->fp_status);
	739	for (i = 0 ; i < 4 ; i++) {
	740	r[i] = float32_zero;
	741	for (j = 0 ; j < 4 ; j++) {
	742	p = float32_mul(env->fregs[bank_matrix + 4 * j + i],
	743	env->fregs[bank_vector + j],
	744	&env->fp_status);
	745	r[i] = float32_add(r[i], p, &env->fp_status);
	746	}
	747	}
	748	update_fpscr(GETPC());
	749
	750	for (i = 0 ; i < 4 ; i++) {
	751	env->fregs[bank_vector + i] = r[i];
	752	}
	753	}