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Update to a hopefully more future proof FSF address
[qemu.git] / target-sh4 / op_helper.c
CommitLineData
fdf9b3e8
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1/*
2 * SH4 emulation
5fafdf24 3 *
fdf9b3e8
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4 * Copyright (c) 2005 Samuel Tardieu
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
8167ee88 17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
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18 */
19#include <assert.h>
852d481f 20#include <stdlib.h>
fdf9b3e8 21#include "exec.h"
a7812ae4 22#include "helper.h"
fdf9b3e8 23
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24#ifndef CONFIG_USER_ONLY
25
26#define MMUSUFFIX _mmu
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27
28#define SHIFT 0
29#include "softmmu_template.h"
30
31#define SHIFT 1
32#include "softmmu_template.h"
33
34#define SHIFT 2
35#include "softmmu_template.h"
36
37#define SHIFT 3
38#include "softmmu_template.h"
39
6ebbf390 40void tlb_fill(target_ulong addr, int is_write, int mmu_idx, void *retaddr)
fdf9b3e8
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41{
42 TranslationBlock *tb;
43 CPUState *saved_env;
44 unsigned long pc;
45 int ret;
46
47 /* XXX: hack to restore env in all cases, even if not called from
48 generated code */
49 saved_env = env;
50 env = cpu_single_env;
6ebbf390 51 ret = cpu_sh4_handle_mmu_fault(env, addr, is_write, mmu_idx, 1);
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52 if (ret) {
53 if (retaddr) {
54 /* now we have a real cpu fault */
55 pc = (unsigned long) retaddr;
56 tb = tb_find_pc(pc);
57 if (tb) {
58 /* the PC is inside the translated code. It means that we have
59 a virtual CPU fault */
60 cpu_restore_state(tb, env, pc, NULL);
61 }
62 }
e6afc2f4 63 cpu_loop_exit();
fdf9b3e8
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64 }
65 env = saved_env;
66}
67
68#endif
69
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70void helper_ldtlb(void)
71{
72#ifdef CONFIG_USER_ONLY
73 /* XXXXX */
74 assert(0);
75#else
76 cpu_load_tlb(env);
77#endif
78}
79
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80void helper_raise_illegal_instruction(void)
81{
82 env->exception_index = 0x180;
83 cpu_loop_exit();
84}
85
86void helper_raise_slot_illegal_instruction(void)
87{
88 env->exception_index = 0x1a0;
89 cpu_loop_exit();
90}
91
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92void helper_raise_fpu_disable(void)
93{
94 env->exception_index = 0x800;
95 cpu_loop_exit();
96}
97
98void helper_raise_slot_fpu_disable(void)
99{
100 env->exception_index = 0x820;
101 cpu_loop_exit();
102}
103
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104void helper_debug(void)
105{
106 env->exception_index = EXCP_DEBUG;
107 cpu_loop_exit();
108}
109
f24f381b 110void helper_sleep(uint32_t next_pc)
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111{
112 env->halted = 1;
113 env->exception_index = EXCP_HLT;
f24f381b 114 env->pc = next_pc;
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115 cpu_loop_exit();
116}
117
118void helper_trapa(uint32_t tra)
119{
120 env->tra = tra << 2;
121 env->exception_index = 0x160;
122 cpu_loop_exit();
123}
124
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125void helper_movcal(uint32_t address, uint32_t value)
126{
127 if (cpu_sh4_is_cached (env, address))
128 {
129 memory_content *r = malloc (sizeof(memory_content));
130 r->address = address;
131 r->value = value;
132 r->next = NULL;
133
134 *(env->movcal_backup_tail) = r;
135 env->movcal_backup_tail = &(r->next);
136 }
137}
138
139void helper_discard_movcal_backup(void)
140{
141 memory_content *current = env->movcal_backup;
142
143 while(current)
144 {
145 memory_content *next = current->next;
146 free (current);
147 env->movcal_backup = current = next;
148 if (current == 0)
149 env->movcal_backup_tail = &(env->movcal_backup);
150 }
151}
152
153void helper_ocbi(uint32_t address)
154{
155 memory_content **current = &(env->movcal_backup);
156 while (*current)
157 {
158 uint32_t a = (*current)->address;
159 if ((a & ~0x1F) == (address & ~0x1F))
160 {
161 memory_content *next = (*current)->next;
162 stl(a, (*current)->value);
163
164 if (next == 0)
165 {
166 env->movcal_backup_tail = current;
167 }
168
169 free (*current);
170 *current = next;
171 break;
172 }
173 }
174}
175
6f06939b 176uint32_t helper_addc(uint32_t arg0, uint32_t arg1)
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177{
178 uint32_t tmp0, tmp1;
179
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180 tmp1 = arg0 + arg1;
181 tmp0 = arg1;
182 arg1 = tmp1 + (env->sr & 1);
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183 if (tmp0 > tmp1)
184 env->sr |= SR_T;
185 else
186 env->sr &= ~SR_T;
6f06939b 187 if (tmp1 > arg1)
fdf9b3e8 188 env->sr |= SR_T;
6f06939b 189 return arg1;
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190}
191
6f06939b 192uint32_t helper_addv(uint32_t arg0, uint32_t arg1)
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193{
194 uint32_t dest, src, ans;
195
6f06939b 196 if ((int32_t) arg1 >= 0)
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197 dest = 0;
198 else
199 dest = 1;
6f06939b 200 if ((int32_t) arg0 >= 0)
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201 src = 0;
202 else
203 src = 1;
204 src += dest;
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205 arg1 += arg0;
206 if ((int32_t) arg1 >= 0)
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207 ans = 0;
208 else
209 ans = 1;
210 ans += dest;
211 if (src == 0 || src == 2) {
212 if (ans == 1)
213 env->sr |= SR_T;
214 else
215 env->sr &= ~SR_T;
216 } else
217 env->sr &= ~SR_T;
6f06939b 218 return arg1;
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219}
220
221#define T (env->sr & SR_T)
222#define Q (env->sr & SR_Q ? 1 : 0)
223#define M (env->sr & SR_M ? 1 : 0)
224#define SETT env->sr |= SR_T
225#define CLRT env->sr &= ~SR_T
226#define SETQ env->sr |= SR_Q
227#define CLRQ env->sr &= ~SR_Q
228#define SETM env->sr |= SR_M
229#define CLRM env->sr &= ~SR_M
230
69d6275b 231uint32_t helper_div1(uint32_t arg0, uint32_t arg1)
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232{
233 uint32_t tmp0, tmp2;
234 uint8_t old_q, tmp1 = 0xff;
235
69d6275b 236 //printf("div1 arg0=0x%08x arg1=0x%08x M=%d Q=%d T=%d\n", arg0, arg1, M, Q, T);
fdf9b3e8 237 old_q = Q;
69d6275b 238 if ((0x80000000 & arg1) != 0)
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239 SETQ;
240 else
241 CLRQ;
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242 tmp2 = arg0;
243 arg1 <<= 1;
244 arg1 |= T;
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245 switch (old_q) {
246 case 0:
247 switch (M) {
248 case 0:
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249 tmp0 = arg1;
250 arg1 -= tmp2;
251 tmp1 = arg1 > tmp0;
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252 switch (Q) {
253 case 0:
254 if (tmp1)
255 SETQ;
256 else
257 CLRQ;
258 break;
259 case 1:
260 if (tmp1 == 0)
261 SETQ;
262 else
263 CLRQ;
264 break;
265 }
266 break;
267 case 1:
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268 tmp0 = arg1;
269 arg1 += tmp2;
270 tmp1 = arg1 < tmp0;
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271 switch (Q) {
272 case 0:
273 if (tmp1 == 0)
274 SETQ;
275 else
276 CLRQ;
277 break;
278 case 1:
279 if (tmp1)
280 SETQ;
281 else
282 CLRQ;
283 break;
284 }
285 break;
286 }
287 break;
288 case 1:
289 switch (M) {
290 case 0:
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291 tmp0 = arg1;
292 arg1 += tmp2;
293 tmp1 = arg1 < tmp0;
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294 switch (Q) {
295 case 0:
296 if (tmp1)
297 SETQ;
298 else
299 CLRQ;
300 break;
301 case 1:
302 if (tmp1 == 0)
303 SETQ;
304 else
305 CLRQ;
306 break;
307 }
308 break;
309 case 1:
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310 tmp0 = arg1;
311 arg1 -= tmp2;
312 tmp1 = arg1 > tmp0;
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313 switch (Q) {
314 case 0:
315 if (tmp1 == 0)
316 SETQ;
317 else
318 CLRQ;
319 break;
320 case 1:
321 if (tmp1)
322 SETQ;
323 else
324 CLRQ;
325 break;
326 }
327 break;
328 }
329 break;
330 }
331 if (Q == M)
332 SETT;
333 else
334 CLRT;
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335 //printf("Output: arg1=0x%08x M=%d Q=%d T=%d\n", arg1, M, Q, T);
336 return arg1;
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337}
338
6f06939b 339void helper_macl(uint32_t arg0, uint32_t arg1)
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340{
341 int64_t res;
342
343 res = ((uint64_t) env->mach << 32) | env->macl;
6f06939b 344 res += (int64_t) (int32_t) arg0 *(int64_t) (int32_t) arg1;
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345 env->mach = (res >> 32) & 0xffffffff;
346 env->macl = res & 0xffffffff;
347 if (env->sr & SR_S) {
348 if (res < 0)
349 env->mach |= 0xffff0000;
350 else
351 env->mach &= 0x00007fff;
352 }
353}
354
6f06939b 355void helper_macw(uint32_t arg0, uint32_t arg1)
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356{
357 int64_t res;
358
359 res = ((uint64_t) env->mach << 32) | env->macl;
6f06939b 360 res += (int64_t) (int16_t) arg0 *(int64_t) (int16_t) arg1;
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361 env->mach = (res >> 32) & 0xffffffff;
362 env->macl = res & 0xffffffff;
363 if (env->sr & SR_S) {
364 if (res < -0x80000000) {
365 env->mach = 1;
366 env->macl = 0x80000000;
367 } else if (res > 0x000000007fffffff) {
368 env->mach = 1;
369 env->macl = 0x7fffffff;
370 }
371 }
372}
373
6f06939b 374uint32_t helper_negc(uint32_t arg)
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375{
376 uint32_t temp;
377
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378 temp = -arg;
379 arg = temp - (env->sr & SR_T);
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380 if (0 < temp)
381 env->sr |= SR_T;
382 else
383 env->sr &= ~SR_T;
6f06939b 384 if (temp < arg)
fdf9b3e8 385 env->sr |= SR_T;
6f06939b 386 return arg;
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387}
388
6f06939b 389uint32_t helper_subc(uint32_t arg0, uint32_t arg1)
fdf9b3e8
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390{
391 uint32_t tmp0, tmp1;
392
6f06939b
AJ
393 tmp1 = arg1 - arg0;
394 tmp0 = arg1;
395 arg1 = tmp1 - (env->sr & SR_T);
fdf9b3e8
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396 if (tmp0 < tmp1)
397 env->sr |= SR_T;
398 else
399 env->sr &= ~SR_T;
6f06939b 400 if (tmp1 < arg1)
fdf9b3e8 401 env->sr |= SR_T;
6f06939b 402 return arg1;
fdf9b3e8
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403}
404
6f06939b 405uint32_t helper_subv(uint32_t arg0, uint32_t arg1)
fdf9b3e8
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406{
407 int32_t dest, src, ans;
408
6f06939b 409 if ((int32_t) arg1 >= 0)
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410 dest = 0;
411 else
412 dest = 1;
6f06939b 413 if ((int32_t) arg0 >= 0)
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414 src = 0;
415 else
416 src = 1;
417 src += dest;
6f06939b
AJ
418 arg1 -= arg0;
419 if ((int32_t) arg1 >= 0)
fdf9b3e8
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420 ans = 0;
421 else
422 ans = 1;
423 ans += dest;
424 if (src == 1) {
425 if (ans == 1)
426 env->sr |= SR_T;
427 else
428 env->sr &= ~SR_T;
429 } else
430 env->sr &= ~SR_T;
6f06939b 431 return arg1;
fdf9b3e8
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432}
433
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434static inline void set_t(void)
435{
436 env->sr |= SR_T;
437}
438
439static inline void clr_t(void)
440{
441 env->sr &= ~SR_T;
442}
443
390af821
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444void helper_ld_fpscr(uint32_t val)
445{
446 env->fpscr = val & 0x003fffff;
447 if (val & 0x01)
448 set_float_rounding_mode(float_round_to_zero, &env->fp_status);
449 else
450 set_float_rounding_mode(float_round_nearest_even, &env->fp_status);
451}
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452
453uint32_t helper_fabs_FT(uint32_t t0)
454{
9850d1e8
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455 CPU_FloatU f;
456 f.l = t0;
457 f.f = float32_abs(f.f);
458 return f.l;
cc4ba6a9
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459}
460
461uint64_t helper_fabs_DT(uint64_t t0)
462{
9850d1e8
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463 CPU_DoubleU d;
464 d.ll = t0;
465 d.d = float64_abs(d.d);
466 return d.ll;
cc4ba6a9
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467}
468
469uint32_t helper_fadd_FT(uint32_t t0, uint32_t t1)
470{
9850d1e8
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471 CPU_FloatU f0, f1;
472 f0.l = t0;
473 f1.l = t1;
474 f0.f = float32_add(f0.f, f1.f, &env->fp_status);
475 return f0.l;
cc4ba6a9
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476}
477
478uint64_t helper_fadd_DT(uint64_t t0, uint64_t t1)
479{
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480 CPU_DoubleU d0, d1;
481 d0.ll = t0;
482 d1.ll = t1;
483 d0.d = float64_add(d0.d, d1.d, &env->fp_status);
484 return d0.ll;
cc4ba6a9
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485}
486
487void helper_fcmp_eq_FT(uint32_t t0, uint32_t t1)
488{
9850d1e8
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489 CPU_FloatU f0, f1;
490 f0.l = t0;
491 f1.l = t1;
492
493 if (float32_compare(f0.f, f1.f, &env->fp_status) == 0)
cc4ba6a9
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494 set_t();
495 else
496 clr_t();
497}
498
499void helper_fcmp_eq_DT(uint64_t t0, uint64_t t1)
500{
9850d1e8
AJ
501 CPU_DoubleU d0, d1;
502 d0.ll = t0;
503 d1.ll = t1;
504
505 if (float64_compare(d0.d, d1.d, &env->fp_status) == 0)
cc4ba6a9
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506 set_t();
507 else
508 clr_t();
509}
510
511void helper_fcmp_gt_FT(uint32_t t0, uint32_t t1)
512{
9850d1e8
AJ
513 CPU_FloatU f0, f1;
514 f0.l = t0;
515 f1.l = t1;
516
517 if (float32_compare(f0.f, f1.f, &env->fp_status) == 1)
cc4ba6a9
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518 set_t();
519 else
520 clr_t();
521}
522
523void helper_fcmp_gt_DT(uint64_t t0, uint64_t t1)
524{
9850d1e8
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525 CPU_DoubleU d0, d1;
526 d0.ll = t0;
527 d1.ll = t1;
528
529 if (float64_compare(d0.d, d1.d, &env->fp_status) == 1)
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530 set_t();
531 else
532 clr_t();
533}
534
535uint64_t helper_fcnvsd_FT_DT(uint32_t t0)
536{
9850d1e8
AJ
537 CPU_DoubleU d;
538 CPU_FloatU f;
539 f.l = t0;
540 d.d = float32_to_float64(f.f, &env->fp_status);
541 return d.ll;
cc4ba6a9
AJ
542}
543
544uint32_t helper_fcnvds_DT_FT(uint64_t t0)
545{
9850d1e8
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546 CPU_DoubleU d;
547 CPU_FloatU f;
548 d.ll = t0;
549 f.f = float64_to_float32(d.d, &env->fp_status);
550 return f.l;
cc4ba6a9
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551}
552
553uint32_t helper_fdiv_FT(uint32_t t0, uint32_t t1)
554{
9850d1e8
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555 CPU_FloatU f0, f1;
556 f0.l = t0;
557 f1.l = t1;
558 f0.f = float32_div(f0.f, f1.f, &env->fp_status);
559 return f0.l;
cc4ba6a9
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560}
561
562uint64_t helper_fdiv_DT(uint64_t t0, uint64_t t1)
563{
9850d1e8
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564 CPU_DoubleU d0, d1;
565 d0.ll = t0;
566 d1.ll = t1;
567 d0.d = float64_div(d0.d, d1.d, &env->fp_status);
568 return d0.ll;
cc4ba6a9
AJ
569}
570
571uint32_t helper_float_FT(uint32_t t0)
572{
9850d1e8
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573 CPU_FloatU f;
574 f.f = int32_to_float32(t0, &env->fp_status);
575 return f.l;
cc4ba6a9
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576}
577
578uint64_t helper_float_DT(uint32_t t0)
579{
9850d1e8
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580 CPU_DoubleU d;
581 d.d = int32_to_float64(t0, &env->fp_status);
582 return d.ll;
cc4ba6a9
AJ
583}
584
5b7141a1
AJ
585uint32_t helper_fmac_FT(uint32_t t0, uint32_t t1, uint32_t t2)
586{
587 CPU_FloatU f0, f1, f2;
588 f0.l = t0;
589 f1.l = t1;
590 f2.l = t2;
591 f0.f = float32_mul(f0.f, f1.f, &env->fp_status);
592 f0.f = float32_add(f0.f, f2.f, &env->fp_status);
593 return f0.l;
594}
595
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596uint32_t helper_fmul_FT(uint32_t t0, uint32_t t1)
597{
9850d1e8
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598 CPU_FloatU f0, f1;
599 f0.l = t0;
600 f1.l = t1;
601 f0.f = float32_mul(f0.f, f1.f, &env->fp_status);
602 return f0.l;
cc4ba6a9
AJ
603}
604
605uint64_t helper_fmul_DT(uint64_t t0, uint64_t t1)
606{
9850d1e8
AJ
607 CPU_DoubleU d0, d1;
608 d0.ll = t0;
609 d1.ll = t1;
610 d0.d = float64_mul(d0.d, d1.d, &env->fp_status);
611 return d0.ll;
cc4ba6a9
AJ
612}
613
7fdf924f
AJ
614uint32_t helper_fneg_T(uint32_t t0)
615{
9850d1e8
AJ
616 CPU_FloatU f;
617 f.l = t0;
618 f.f = float32_chs(f.f);
619 return f.l;
7fdf924f
AJ
620}
621
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622uint32_t helper_fsqrt_FT(uint32_t t0)
623{
9850d1e8
AJ
624 CPU_FloatU f;
625 f.l = t0;
626 f.f = float32_sqrt(f.f, &env->fp_status);
627 return f.l;
cc4ba6a9
AJ
628}
629
630uint64_t helper_fsqrt_DT(uint64_t t0)
631{
9850d1e8
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632 CPU_DoubleU d;
633 d.ll = t0;
634 d.d = float64_sqrt(d.d, &env->fp_status);
635 return d.ll;
cc4ba6a9
AJ
636}
637
638uint32_t helper_fsub_FT(uint32_t t0, uint32_t t1)
639{
9850d1e8
AJ
640 CPU_FloatU f0, f1;
641 f0.l = t0;
642 f1.l = t1;
643 f0.f = float32_sub(f0.f, f1.f, &env->fp_status);
644 return f0.l;
cc4ba6a9
AJ
645}
646
647uint64_t helper_fsub_DT(uint64_t t0, uint64_t t1)
648{
9850d1e8
AJ
649 CPU_DoubleU d0, d1;
650 d0.ll = t0;
651 d1.ll = t1;
652 d0.d = float64_sub(d0.d, d1.d, &env->fp_status);
653 return d0.ll;
cc4ba6a9
AJ
654}
655
656uint32_t helper_ftrc_FT(uint32_t t0)
657{
9850d1e8
AJ
658 CPU_FloatU f;
659 f.l = t0;
660 return float32_to_int32_round_to_zero(f.f, &env->fp_status);
cc4ba6a9
AJ
661}
662
663uint32_t helper_ftrc_DT(uint64_t t0)
664{
9850d1e8
AJ
665 CPU_DoubleU d;
666 d.ll = t0;
667 return float64_to_int32_round_to_zero(d.d, &env->fp_status);
cc4ba6a9 668}