[qemu.git] / target-sh4 / op_helper.c

/*
 *  SH4 emulation
 *
 *  Copyright (c) 2005 Samuel Tardieu
 *
 * This library is free software; you can redistribute it and/or
 * modify it under the terms of the GNU Lesser General Public
 * License as published by the Free Software Foundation; either
 * version 2 of the License, or (at your option) any later version.
 *
 * This library is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * Lesser General Public License for more details.
 *
 * You should have received a copy of the GNU Lesser General Public
 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
 */
#include <assert.h>
#include <stdlib.h>
#include "cpu.h"
#include "dyngen-exec.h"
#include "helper.h"

static void cpu_restore_state_from_retaddr(void *retaddr)
{
    TranslationBlock *tb;
    unsigned long pc;

    if (retaddr) {
        pc = (unsigned long) retaddr;
        tb = tb_find_pc(pc);
        if (tb) {
            /* the PC is inside the translated code. It means that we have
               a virtual CPU fault */
            cpu_restore_state(tb, env, pc);
        }
    }
}

#ifndef CONFIG_USER_ONLY
#include "softmmu_exec.h"

#define MMUSUFFIX _mmu

#define SHIFT 0
#include "softmmu_template.h"

#define SHIFT 1
#include "softmmu_template.h"

#define SHIFT 2
#include "softmmu_template.h"

#define SHIFT 3
#include "softmmu_template.h"

void tlb_fill(target_ulong addr, int is_write, int mmu_idx, void *retaddr)
{
    CPUState *saved_env;
    int ret;

    /* XXX: hack to restore env in all cases, even if not called from
       generated code */
    saved_env = env;
    env = cpu_single_env;
    ret = cpu_sh4_handle_mmu_fault(env, addr, is_write, mmu_idx, 1);
    if (ret) {
        /* now we have a real cpu fault */
        cpu_restore_state_from_retaddr(retaddr);
        cpu_loop_exit(env);
    }
    env = saved_env;
}

#endif

void helper_ldtlb(void)
{
#ifdef CONFIG_USER_ONLY
    /* XXXXX */
    cpu_abort(env, "Unhandled ldtlb");
#else
    cpu_load_tlb(env);
#endif
}

static inline void raise_exception(int index, void *retaddr)
{
    env->exception_index = index;
    cpu_restore_state_from_retaddr(retaddr);
    cpu_loop_exit(env);
}

void helper_raise_illegal_instruction(void)
{
    raise_exception(0x180, GETPC());
}

void helper_raise_slot_illegal_instruction(void)
{
    raise_exception(0x1a0, GETPC());
}

void helper_raise_fpu_disable(void)
{
    raise_exception(0x800, GETPC());
}

void helper_raise_slot_fpu_disable(void)
{
    raise_exception(0x820, GETPC());
}

void helper_debug(void)
{
    env->exception_index = EXCP_DEBUG;
    cpu_loop_exit(env);
}

void helper_sleep(uint32_t next_pc)
{
    env->halted = 1;
    env->in_sleep = 1;
    env->exception_index = EXCP_HLT;
    env->pc = next_pc;
    cpu_loop_exit(env);
}

void helper_trapa(uint32_t tra)
{
    env->tra = tra << 2;
    raise_exception(0x160, GETPC());
}

void helper_movcal(uint32_t address, uint32_t value)
{
    if (cpu_sh4_is_cached (env, address))
    {
	memory_content *r = malloc (sizeof(memory_content));
	r->address = address;
	r->value = value;
	r->next = NULL;

	*(env->movcal_backup_tail) = r;
	env->movcal_backup_tail = &(r->next);
    }
}

void helper_discard_movcal_backup(void)
{
    memory_content *current = env->movcal_backup;

    while(current)
    {
	memory_content *next = current->next;
	free (current);
	env->movcal_backup = current = next;
	if (current == NULL)
	    env->movcal_backup_tail = &(env->movcal_backup);
    } 
}

void helper_ocbi(uint32_t address)
{
    memory_content **current = &(env->movcal_backup);
    while (*current)
    {
	uint32_t a = (*current)->address;
	if ((a & ~0x1F) == (address & ~0x1F))
	{
	    memory_content *next = (*current)->next;
	    stl(a, (*current)->value);
	    
	    if (next == NULL)
	    {
		env->movcal_backup_tail = current;
	    }

	    free (*current);
	    *current = next;
	    break;
	}
    }
}

uint32_t helper_addc(uint32_t arg0, uint32_t arg1)
{
    uint32_t tmp0, tmp1;

    tmp1 = arg0 + arg1;
    tmp0 = arg1;
    arg1 = tmp1 + (env->sr & 1);
    if (tmp0 > tmp1)
	env->sr |= SR_T;
    else
	env->sr &= ~SR_T;
    if (tmp1 > arg1)
	env->sr |= SR_T;
    return arg1;
}

uint32_t helper_addv(uint32_t arg0, uint32_t arg1)
{
    uint32_t dest, src, ans;

    if ((int32_t) arg1 >= 0)
	dest = 0;
    else
	dest = 1;
    if ((int32_t) arg0 >= 0)
	src = 0;
    else
	src = 1;
    src += dest;
    arg1 += arg0;
    if ((int32_t) arg1 >= 0)
	ans = 0;
    else
	ans = 1;
    ans += dest;
    if (src == 0 || src == 2) {
	if (ans == 1)
	    env->sr |= SR_T;
	else
	    env->sr &= ~SR_T;
    } else
	env->sr &= ~SR_T;
    return arg1;
}

#define T (env->sr & SR_T)
#define Q (env->sr & SR_Q ? 1 : 0)
#define M (env->sr & SR_M ? 1 : 0)
#define SETT env->sr |= SR_T
#define CLRT env->sr &= ~SR_T
#define SETQ env->sr |= SR_Q
#define CLRQ env->sr &= ~SR_Q
#define SETM env->sr |= SR_M
#define CLRM env->sr &= ~SR_M

uint32_t helper_div1(uint32_t arg0, uint32_t arg1)
{
    uint32_t tmp0, tmp2;
    uint8_t old_q, tmp1 = 0xff;

    //printf("div1 arg0=0x%08x arg1=0x%08x M=%d Q=%d T=%d\n", arg0, arg1, M, Q, T);
    old_q = Q;
    if ((0x80000000 & arg1) != 0)
	SETQ;
    else
	CLRQ;
    tmp2 = arg0;
    arg1 <<= 1;
    arg1 |= T;
    switch (old_q) {
    case 0:
	switch (M) {
	case 0:
	    tmp0 = arg1;
	    arg1 -= tmp2;
	    tmp1 = arg1 > tmp0;
	    switch (Q) {
	    case 0:
		if (tmp1)
		    SETQ;
		else
		    CLRQ;
		break;
	    case 1:
		if (tmp1 == 0)
		    SETQ;
		else
		    CLRQ;
		break;
	    }
	    break;
	case 1:
	    tmp0 = arg1;
	    arg1 += tmp2;
	    tmp1 = arg1 < tmp0;
	    switch (Q) {
	    case 0:
		if (tmp1 == 0)
		    SETQ;
		else
		    CLRQ;
		break;
	    case 1:
		if (tmp1)
		    SETQ;
		else
		    CLRQ;
		break;
	    }
	    break;
	}
	break;
    case 1:
	switch (M) {
	case 0:
	    tmp0 = arg1;
	    arg1 += tmp2;
	    tmp1 = arg1 < tmp0;
	    switch (Q) {
	    case 0:
		if (tmp1)
		    SETQ;
		else
		    CLRQ;
		break;
	    case 1:
		if (tmp1 == 0)
		    SETQ;
		else
		    CLRQ;
		break;
	    }
	    break;
	case 1:
	    tmp0 = arg1;
	    arg1 -= tmp2;
	    tmp1 = arg1 > tmp0;
	    switch (Q) {
	    case 0:
		if (tmp1 == 0)
		    SETQ;
		else
		    CLRQ;
		break;
	    case 1:
		if (tmp1)
		    SETQ;
		else
		    CLRQ;
		break;
	    }
	    break;
	}
	break;
    }
    if (Q == M)
	SETT;
    else
	CLRT;
    //printf("Output: arg1=0x%08x M=%d Q=%d T=%d\n", arg1, M, Q, T);
    return arg1;
}

void helper_macl(uint32_t arg0, uint32_t arg1)
{
    int64_t res;

    res = ((uint64_t) env->mach << 32) | env->macl;
    res += (int64_t) (int32_t) arg0 *(int64_t) (int32_t) arg1;
    env->mach = (res >> 32) & 0xffffffff;
    env->macl = res & 0xffffffff;
    if (env->sr & SR_S) {
	if (res < 0)
	    env->mach |= 0xffff0000;
	else
	    env->mach &= 0x00007fff;
    }
}

void helper_macw(uint32_t arg0, uint32_t arg1)
{
    int64_t res;

    res = ((uint64_t) env->mach << 32) | env->macl;
    res += (int64_t) (int16_t) arg0 *(int64_t) (int16_t) arg1;
    env->mach = (res >> 32) & 0xffffffff;
    env->macl = res & 0xffffffff;
    if (env->sr & SR_S) {
	if (res < -0x80000000) {
	    env->mach = 1;
	    env->macl = 0x80000000;
	} else if (res > 0x000000007fffffff) {
	    env->mach = 1;
	    env->macl = 0x7fffffff;
	}
    }
}

uint32_t helper_subc(uint32_t arg0, uint32_t arg1)
{
    uint32_t tmp0, tmp1;

    tmp1 = arg1 - arg0;
    tmp0 = arg1;
    arg1 = tmp1 - (env->sr & SR_T);
    if (tmp0 < tmp1)
	env->sr |= SR_T;
    else
	env->sr &= ~SR_T;
    if (tmp1 < arg1)
	env->sr |= SR_T;
    return arg1;
}

uint32_t helper_subv(uint32_t arg0, uint32_t arg1)
{
    int32_t dest, src, ans;

    if ((int32_t) arg1 >= 0)
	dest = 0;
    else
	dest = 1;
    if ((int32_t) arg0 >= 0)
	src = 0;
    else
	src = 1;
    src += dest;
    arg1 -= arg0;
    if ((int32_t) arg1 >= 0)
	ans = 0;
    else
	ans = 1;
    ans += dest;
    if (src == 1) {
	if (ans == 1)
	    env->sr |= SR_T;
	else
	    env->sr &= ~SR_T;
    } else
	env->sr &= ~SR_T;
    return arg1;
}

static inline void set_t(void)
{
    env->sr |= SR_T;
}

static inline void clr_t(void)
{
    env->sr &= ~SR_T;
}

void helper_ld_fpscr(uint32_t val)
{
    env->fpscr = val & FPSCR_MASK;
    if ((val & FPSCR_RM_MASK) == FPSCR_RM_ZERO) {
	set_float_rounding_mode(float_round_to_zero, &env->fp_status);
    } else {
	set_float_rounding_mode(float_round_nearest_even, &env->fp_status);
    }
    set_flush_to_zero((val & FPSCR_DN) != 0, &env->fp_status);
}

static void update_fpscr(void *retaddr)
{
    int xcpt, cause, enable;

    xcpt = get_float_exception_flags(&env->fp_status);

    /* Clear the flag entries */
    env->fpscr &= ~FPSCR_FLAG_MASK;

    if (unlikely(xcpt)) {
        if (xcpt & float_flag_invalid) {
            env->fpscr |= FPSCR_FLAG_V;
        }
        if (xcpt & float_flag_divbyzero) {
            env->fpscr |= FPSCR_FLAG_Z;
        }
        if (xcpt & float_flag_overflow) {
            env->fpscr |= FPSCR_FLAG_O;
        }
        if (xcpt & float_flag_underflow) {
            env->fpscr |= FPSCR_FLAG_U;
        }
        if (xcpt & float_flag_inexact) {
            env->fpscr |= FPSCR_FLAG_I;
        }

        /* Accumulate in cause entries */
        env->fpscr |= (env->fpscr & FPSCR_FLAG_MASK)
                      << (FPSCR_CAUSE_SHIFT - FPSCR_FLAG_SHIFT);

        /* Generate an exception if enabled */
        cause = (env->fpscr & FPSCR_CAUSE_MASK) >> FPSCR_CAUSE_SHIFT;
        enable = (env->fpscr & FPSCR_ENABLE_MASK) >> FPSCR_ENABLE_SHIFT;
        if (cause & enable) {
            cpu_restore_state_from_retaddr(retaddr);
            env->exception_index = 0x120;
            cpu_loop_exit(env);
        }
    }
}

float32 helper_fabs_FT(float32 t0)
{
    return float32_abs(t0);
}

float64 helper_fabs_DT(float64 t0)
{
    return float64_abs(t0);
}

float32 helper_fadd_FT(float32 t0, float32 t1)
{
    set_float_exception_flags(0, &env->fp_status);
    t0 = float32_add(t0, t1, &env->fp_status);
    update_fpscr(GETPC());
    return t0;
}

float64 helper_fadd_DT(float64 t0, float64 t1)
{
    set_float_exception_flags(0, &env->fp_status);
    t0 = float64_add(t0, t1, &env->fp_status);
    update_fpscr(GETPC());
    return t0;
}

void helper_fcmp_eq_FT(float32 t0, float32 t1)
{
    int relation;

    set_float_exception_flags(0, &env->fp_status);
    relation = float32_compare(t0, t1, &env->fp_status);
    if (unlikely(relation == float_relation_unordered)) {
        update_fpscr(GETPC());
    } else if (relation == float_relation_equal) {
	set_t();
    } else {
	clr_t();
    }
}

void helper_fcmp_eq_DT(float64 t0, float64 t1)
{
    int relation;

    set_float_exception_flags(0, &env->fp_status);
    relation = float64_compare(t0, t1, &env->fp_status);
    if (unlikely(relation == float_relation_unordered)) {
        update_fpscr(GETPC());
    } else if (relation == float_relation_equal) {
	set_t();
    } else {
	clr_t();
    }
}

void helper_fcmp_gt_FT(float32 t0, float32 t1)
{
    int relation;

    set_float_exception_flags(0, &env->fp_status);
    relation = float32_compare(t0, t1, &env->fp_status);
    if (unlikely(relation == float_relation_unordered)) {
        update_fpscr(GETPC());
    } else if (relation == float_relation_greater) {
	set_t();
    } else {
	clr_t();
    }
}

void helper_fcmp_gt_DT(float64 t0, float64 t1)
{
    int relation;

    set_float_exception_flags(0, &env->fp_status);
    relation = float64_compare(t0, t1, &env->fp_status);
    if (unlikely(relation == float_relation_unordered)) {
        update_fpscr(GETPC());
    } else if (relation == float_relation_greater) {
	set_t();
    } else {
	clr_t();
    }
}

float64 helper_fcnvsd_FT_DT(float32 t0)
{
    float64 ret;
    set_float_exception_flags(0, &env->fp_status);
    ret = float32_to_float64(t0, &env->fp_status);
    update_fpscr(GETPC());
    return ret;
}

float32 helper_fcnvds_DT_FT(float64 t0)
{
    float32 ret;
    set_float_exception_flags(0, &env->fp_status);
    ret = float64_to_float32(t0, &env->fp_status);
    update_fpscr(GETPC());
    return ret;
}

float32 helper_fdiv_FT(float32 t0, float32 t1)
{
    set_float_exception_flags(0, &env->fp_status);
    t0 = float32_div(t0, t1, &env->fp_status);
    update_fpscr(GETPC());
    return t0;
}

float64 helper_fdiv_DT(float64 t0, float64 t1)
{
    set_float_exception_flags(0, &env->fp_status);
    t0 = float64_div(t0, t1, &env->fp_status);
    update_fpscr(GETPC());
    return t0;
}

float32 helper_float_FT(uint32_t t0)
{
    float32 ret;
    set_float_exception_flags(0, &env->fp_status);
    ret = int32_to_float32(t0, &env->fp_status);
    update_fpscr(GETPC());
    return ret;
}

float64 helper_float_DT(uint32_t t0)
{
    float64 ret;
    set_float_exception_flags(0, &env->fp_status);
    ret = int32_to_float64(t0, &env->fp_status);
    update_fpscr(GETPC());
    return ret;
}

float32 helper_fmac_FT(float32 t0, float32 t1, float32 t2)
{
    set_float_exception_flags(0, &env->fp_status);
    t0 = float32_mul(t0, t1, &env->fp_status);
    t0 = float32_add(t0, t2, &env->fp_status);
    update_fpscr(GETPC());
    return t0;
}

float32 helper_fmul_FT(float32 t0, float32 t1)
{
    set_float_exception_flags(0, &env->fp_status);
    t0 = float32_mul(t0, t1, &env->fp_status);
    update_fpscr(GETPC());
    return t0;
}

float64 helper_fmul_DT(float64 t0, float64 t1)
{
    set_float_exception_flags(0, &env->fp_status);
    t0 = float64_mul(t0, t1, &env->fp_status);
    update_fpscr(GETPC());
    return t0;
}

float32 helper_fneg_T(float32 t0)
{
    return float32_chs(t0);
}

float32 helper_fsqrt_FT(float32 t0)
{
    set_float_exception_flags(0, &env->fp_status);
    t0 = float32_sqrt(t0, &env->fp_status);
    update_fpscr(GETPC());
    return t0;
}

float64 helper_fsqrt_DT(float64 t0)
{
    set_float_exception_flags(0, &env->fp_status);
    t0 = float64_sqrt(t0, &env->fp_status);
    update_fpscr(GETPC());
    return t0;
}

float32 helper_fsub_FT(float32 t0, float32 t1)
{
    set_float_exception_flags(0, &env->fp_status);
    t0 = float32_sub(t0, t1, &env->fp_status);
    update_fpscr(GETPC());
    return t0;
}

float64 helper_fsub_DT(float64 t0, float64 t1)
{
    set_float_exception_flags(0, &env->fp_status);
    t0 = float64_sub(t0, t1, &env->fp_status);
    update_fpscr(GETPC());
    return t0;
}

uint32_t helper_ftrc_FT(float32 t0)
{
    uint32_t ret;
    set_float_exception_flags(0, &env->fp_status);
    ret = float32_to_int32_round_to_zero(t0, &env->fp_status);
    update_fpscr(GETPC());
    return ret;
}

uint32_t helper_ftrc_DT(float64 t0)
{
    uint32_t ret;
    set_float_exception_flags(0, &env->fp_status);
    ret = float64_to_int32_round_to_zero(t0, &env->fp_status);
    update_fpscr(GETPC());
    return ret;
}

void helper_fipr(uint32_t m, uint32_t n)
{
    int bank, i;
    float32 r, p;

    bank = (env->sr & FPSCR_FR) ? 16 : 0;
    r = float32_zero;
    set_float_exception_flags(0, &env->fp_status);

    for (i = 0 ; i < 4 ; i++) {
        p = float32_mul(env->fregs[bank + m + i],
                        env->fregs[bank + n + i],
                        &env->fp_status);
        r = float32_add(r, p, &env->fp_status);
    }
    update_fpscr(GETPC());

    env->fregs[bank + n + 3] = r;
}

void helper_ftrv(uint32_t n)
{
    int bank_matrix, bank_vector;
    int i, j;
    float32 r[4];
    float32 p;

    bank_matrix = (env->sr & FPSCR_FR) ? 0 : 16;
    bank_vector = (env->sr & FPSCR_FR) ? 16 : 0;
    set_float_exception_flags(0, &env->fp_status);
    for (i = 0 ; i < 4 ; i++) {
        r[i] = float32_zero;
        for (j = 0 ; j < 4 ; j++) {
            p = float32_mul(env->fregs[bank_matrix + 4 * j + i],
                            env->fregs[bank_vector + j],
                            &env->fp_status);
            r[i] = float32_add(r[i], p, &env->fp_status);
        }
    }
    update_fpscr(GETPC());

    for (i = 0 ; i < 4 ; i++) {
        env->fregs[bank_vector + i] = r[i];
    }
}
Commit	Line	Data
fdf9b3e8 FB	1	/*
fdf9b3e8 FB	2	* SH4 emulation
5fafdf24	3	*
fdf9b3e8 FB	4	* Copyright (c) 2005 Samuel Tardieu
	5	*
	6	* This library is free software; you can redistribute it and/or
	7	* modify it under the terms of the GNU Lesser General Public
	8	* License as published by the Free Software Foundation; either
	9	* version 2 of the License, or (at your option) any later version.
	10	*
	11	* This library is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	14	* Lesser General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU Lesser General Public
8167ee88	17	* License along with this library; if not, see <http://www.gnu.org/licenses/>.
fdf9b3e8 FB	18	*/
fdf9b3e8 FB	19	#include <assert.h>
852d481f	20	#include <stdlib.h>
3e457172 BS	21	#include "cpu.h"
3e457172 BS	22	#include "dyngen-exec.h"
a7812ae4	23	#include "helper.h"
fdf9b3e8	24
21829e9b AJ	25	static void cpu_restore_state_from_retaddr(void *retaddr)
	26	{
	27	TranslationBlock *tb;
	28	unsigned long pc;
	29
	30	if (retaddr) {
	31	pc = (unsigned long) retaddr;
	32	tb = tb_find_pc(pc);
	33	if (tb) {
	34	/* the PC is inside the translated code. It means that we have
	35	a virtual CPU fault */
618ba8e6	36	cpu_restore_state(tb, env, pc);
21829e9b AJ	37	}
	38	}
	39	}
	40
fdf9b3e8	41	#ifndef CONFIG_USER_ONLY
3e457172	42	#include "softmmu_exec.h"
fdf9b3e8 FB	43
fdf9b3e8 FB	44	#define MMUSUFFIX _mmu
fdf9b3e8 FB	45
	46	#define SHIFT 0
	47	#include "softmmu_template.h"
	48
	49	#define SHIFT 1
	50	#include "softmmu_template.h"
	51
	52	#define SHIFT 2
	53	#include "softmmu_template.h"
	54
	55	#define SHIFT 3
	56	#include "softmmu_template.h"
	57
6ebbf390	58	void tlb_fill(target_ulong addr, int is_write, int mmu_idx, void *retaddr)
fdf9b3e8	59	{
fdf9b3e8	60	CPUState *saved_env;
fdf9b3e8 FB	61	int ret;
	62
	63	/* XXX: hack to restore env in all cases, even if not called from
	64	generated code */
	65	saved_env = env;
	66	env = cpu_single_env;
6ebbf390	67	ret = cpu_sh4_handle_mmu_fault(env, addr, is_write, mmu_idx, 1);
fdf9b3e8	68	if (ret) {
21829e9b AJ	69	/* now we have a real cpu fault */
21829e9b AJ	70	cpu_restore_state_from_retaddr(retaddr);
1162c041	71	cpu_loop_exit(env);
fdf9b3e8 FB	72	}
	73	env = saved_env;
	74	}
	75
	76	#endif
	77
ea2b542a AJ	78	void helper_ldtlb(void)
	79	{
	80	#ifdef CONFIG_USER_ONLY
	81	/* XXXXX */
43dc2a64	82	cpu_abort(env, "Unhandled ldtlb");
ea2b542a AJ	83	#else
	84	cpu_load_tlb(env);
	85	#endif
	86	}
	87
fd4bab10	88	static inline void raise_exception(int index, void *retaddr)
e6afc2f4	89	{
fd4bab10 AJ	90	env->exception_index = index;
fd4bab10 AJ	91	cpu_restore_state_from_retaddr(retaddr);
1162c041	92	cpu_loop_exit(env);
e6afc2f4 AJ	93	}
e6afc2f4 AJ	94
fd4bab10 AJ	95	void helper_raise_illegal_instruction(void)
	96	{
	97	raise_exception(0x180, GETPC());
	98	}
	99
e6afc2f4 AJ	100	void helper_raise_slot_illegal_instruction(void)
e6afc2f4 AJ	101	{
fd4bab10	102	raise_exception(0x1a0, GETPC());
e6afc2f4 AJ	103	}
e6afc2f4 AJ	104
d8299bcc AJ	105	void helper_raise_fpu_disable(void)
d8299bcc AJ	106	{
fd4bab10	107	raise_exception(0x800, GETPC());
d8299bcc AJ	108	}
	109
	110	void helper_raise_slot_fpu_disable(void)
	111	{
fd4bab10	112	raise_exception(0x820, GETPC());
d8299bcc AJ	113	}
d8299bcc AJ	114
e6afc2f4 AJ	115	void helper_debug(void)
	116	{
	117	env->exception_index = EXCP_DEBUG;
1162c041	118	cpu_loop_exit(env);
e6afc2f4 AJ	119	}
e6afc2f4 AJ	120
f24f381b	121	void helper_sleep(uint32_t next_pc)
e6afc2f4 AJ	122	{
e6afc2f4 AJ	123	env->halted = 1;
efac4154	124	env->in_sleep = 1;
e6afc2f4	125	env->exception_index = EXCP_HLT;
f24f381b	126	env->pc = next_pc;
1162c041	127	cpu_loop_exit(env);
e6afc2f4 AJ	128	}
	129
	130	void helper_trapa(uint32_t tra)
	131	{
	132	env->tra = tra << 2;
fd4bab10	133	raise_exception(0x160, GETPC());
e6afc2f4 AJ	134	}
e6afc2f4 AJ	135
852d481f EI	136	void helper_movcal(uint32_t address, uint32_t value)
	137	{
	138	if (cpu_sh4_is_cached (env, address))
	139	{
	140	memory_content *r = malloc (sizeof(memory_content));
	141	r->address = address;
	142	r->value = value;
	143	r->next = NULL;
	144
	145	*(env->movcal_backup_tail) = r;
	146	env->movcal_backup_tail = &(r->next);
	147	}
	148	}
	149
	150	void helper_discard_movcal_backup(void)
	151	{
	152	memory_content *current = env->movcal_backup;
	153
	154	while(current)
	155	{
	156	memory_content *next = current->next;
	157	free (current);
	158	env->movcal_backup = current = next;
b9d38e95	159	if (current == NULL)
852d481f EI	160	env->movcal_backup_tail = &(env->movcal_backup);
	161	}
	162	}
	163
	164	void helper_ocbi(uint32_t address)
	165	{
	166	memory_content **current = &(env->movcal_backup);
	167	while (*current)
	168	{
	169	uint32_t a = (*current)->address;
	170	if ((a & ~0x1F) == (address & ~0x1F))
	171	{
	172	memory_content next = (current)->next;
	173	stl(a, (*current)->value);
	174
b9d38e95	175	if (next == NULL)
852d481f EI	176	{
	177	env->movcal_backup_tail = current;
	178	}
	179
	180	free (*current);
	181	*current = next;
	182	break;
	183	}
	184	}
	185	}
	186
6f06939b	187	uint32_t helper_addc(uint32_t arg0, uint32_t arg1)
fdf9b3e8 FB	188	{
	189	uint32_t tmp0, tmp1;
	190
6f06939b AJ	191	tmp1 = arg0 + arg1;
	192	tmp0 = arg1;
	193	arg1 = tmp1 + (env->sr & 1);
fdf9b3e8 FB	194	if (tmp0 > tmp1)
	195	env->sr \|= SR_T;
	196	else
	197	env->sr &= ~SR_T;
6f06939b	198	if (tmp1 > arg1)
fdf9b3e8	199	env->sr \|= SR_T;
6f06939b	200	return arg1;
fdf9b3e8 FB	201	}
fdf9b3e8 FB	202
6f06939b	203	uint32_t helper_addv(uint32_t arg0, uint32_t arg1)
fdf9b3e8 FB	204	{
	205	uint32_t dest, src, ans;
	206
6f06939b	207	if ((int32_t) arg1 >= 0)
fdf9b3e8 FB	208	dest = 0;
	209	else
	210	dest = 1;
6f06939b	211	if ((int32_t) arg0 >= 0)
fdf9b3e8 FB	212	src = 0;
	213	else
	214	src = 1;
	215	src += dest;
6f06939b AJ	216	arg1 += arg0;
6f06939b AJ	217	if ((int32_t) arg1 >= 0)
fdf9b3e8 FB	218	ans = 0;
	219	else
	220	ans = 1;
	221	ans += dest;
	222	if (src == 0 \|\| src == 2) {
	223	if (ans == 1)
	224	env->sr \|= SR_T;
	225	else
	226	env->sr &= ~SR_T;
	227	} else
	228	env->sr &= ~SR_T;
6f06939b	229	return arg1;
fdf9b3e8 FB	230	}
	231
	232	#define T (env->sr & SR_T)
	233	#define Q (env->sr & SR_Q ? 1 : 0)
	234	#define M (env->sr & SR_M ? 1 : 0)
	235	#define SETT env->sr \|= SR_T
	236	#define CLRT env->sr &= ~SR_T
	237	#define SETQ env->sr \|= SR_Q
	238	#define CLRQ env->sr &= ~SR_Q
	239	#define SETM env->sr \|= SR_M
	240	#define CLRM env->sr &= ~SR_M
	241
69d6275b	242	uint32_t helper_div1(uint32_t arg0, uint32_t arg1)
fdf9b3e8 FB	243	{
	244	uint32_t tmp0, tmp2;
	245	uint8_t old_q, tmp1 = 0xff;
	246
69d6275b	247	//printf("div1 arg0=0x%08x arg1=0x%08x M=%d Q=%d T=%d\n", arg0, arg1, M, Q, T);
fdf9b3e8	248	old_q = Q;
69d6275b	249	if ((0x80000000 & arg1) != 0)
fdf9b3e8 FB	250	SETQ;
	251	else
	252	CLRQ;
69d6275b AJ	253	tmp2 = arg0;
	254	arg1 <<= 1;
	255	arg1 \|= T;
fdf9b3e8 FB	256	switch (old_q) {
	257	case 0:
	258	switch (M) {
	259	case 0:
69d6275b AJ	260	tmp0 = arg1;
	261	arg1 -= tmp2;
	262	tmp1 = arg1 > tmp0;
fdf9b3e8 FB	263	switch (Q) {
	264	case 0:
	265	if (tmp1)
	266	SETQ;
	267	else
	268	CLRQ;
	269	break;
	270	case 1:
	271	if (tmp1 == 0)
	272	SETQ;
	273	else
	274	CLRQ;
	275	break;
	276	}
	277	break;
	278	case 1:
69d6275b AJ	279	tmp0 = arg1;
	280	arg1 += tmp2;
	281	tmp1 = arg1 < tmp0;
fdf9b3e8 FB	282	switch (Q) {
	283	case 0:
	284	if (tmp1 == 0)
	285	SETQ;
	286	else
	287	CLRQ;
	288	break;
	289	case 1:
	290	if (tmp1)
	291	SETQ;
	292	else
	293	CLRQ;
	294	break;
	295	}
	296	break;
	297	}
	298	break;
	299	case 1:
	300	switch (M) {
	301	case 0:
69d6275b AJ	302	tmp0 = arg1;
	303	arg1 += tmp2;
	304	tmp1 = arg1 < tmp0;
fdf9b3e8 FB	305	switch (Q) {
	306	case 0:
	307	if (tmp1)
	308	SETQ;
	309	else
	310	CLRQ;
	311	break;
	312	case 1:
	313	if (tmp1 == 0)
	314	SETQ;
	315	else
	316	CLRQ;
	317	break;
	318	}
	319	break;
	320	case 1:
69d6275b AJ	321	tmp0 = arg1;
	322	arg1 -= tmp2;
	323	tmp1 = arg1 > tmp0;
fdf9b3e8 FB	324	switch (Q) {
	325	case 0:
	326	if (tmp1 == 0)
	327	SETQ;
	328	else
	329	CLRQ;
	330	break;
	331	case 1:
	332	if (tmp1)
	333	SETQ;
	334	else
	335	CLRQ;
	336	break;
	337	}
	338	break;
	339	}
	340	break;
	341	}
	342	if (Q == M)
	343	SETT;
	344	else
	345	CLRT;
69d6275b AJ	346	//printf("Output: arg1=0x%08x M=%d Q=%d T=%d\n", arg1, M, Q, T);
69d6275b AJ	347	return arg1;
fdf9b3e8 FB	348	}
fdf9b3e8 FB	349
6f06939b	350	void helper_macl(uint32_t arg0, uint32_t arg1)
fdf9b3e8 FB	351	{
	352	int64_t res;
	353
	354	res = ((uint64_t) env->mach << 32) \| env->macl;
6f06939b	355	res += (int64_t) (int32_t) arg0 *(int64_t) (int32_t) arg1;
fdf9b3e8 FB	356	env->mach = (res >> 32) & 0xffffffff;
	357	env->macl = res & 0xffffffff;
	358	if (env->sr & SR_S) {
	359	if (res < 0)
	360	env->mach \|= 0xffff0000;
	361	else
	362	env->mach &= 0x00007fff;
	363	}
	364	}
	365
6f06939b	366	void helper_macw(uint32_t arg0, uint32_t arg1)
fdf9b3e8 FB	367	{
	368	int64_t res;
	369
	370	res = ((uint64_t) env->mach << 32) \| env->macl;
6f06939b	371	res += (int64_t) (int16_t) arg0 *(int64_t) (int16_t) arg1;
fdf9b3e8 FB	372	env->mach = (res >> 32) & 0xffffffff;
	373	env->macl = res & 0xffffffff;
	374	if (env->sr & SR_S) {
	375	if (res < -0x80000000) {
	376	env->mach = 1;
	377	env->macl = 0x80000000;
	378	} else if (res > 0x000000007fffffff) {
	379	env->mach = 1;
	380	env->macl = 0x7fffffff;
	381	}
	382	}
	383	}
	384
6f06939b	385	uint32_t helper_subc(uint32_t arg0, uint32_t arg1)
fdf9b3e8 FB	386	{
	387	uint32_t tmp0, tmp1;
	388
6f06939b AJ	389	tmp1 = arg1 - arg0;
	390	tmp0 = arg1;
	391	arg1 = tmp1 - (env->sr & SR_T);
fdf9b3e8 FB	392	if (tmp0 < tmp1)
	393	env->sr \|= SR_T;
	394	else
	395	env->sr &= ~SR_T;
6f06939b	396	if (tmp1 < arg1)
fdf9b3e8	397	env->sr \|= SR_T;
6f06939b	398	return arg1;
fdf9b3e8 FB	399	}
fdf9b3e8 FB	400
6f06939b	401	uint32_t helper_subv(uint32_t arg0, uint32_t arg1)
fdf9b3e8 FB	402	{
	403	int32_t dest, src, ans;
	404
6f06939b	405	if ((int32_t) arg1 >= 0)
fdf9b3e8 FB	406	dest = 0;
	407	else
	408	dest = 1;
6f06939b	409	if ((int32_t) arg0 >= 0)
fdf9b3e8 FB	410	src = 0;
	411	else
	412	src = 1;
	413	src += dest;
6f06939b AJ	414	arg1 -= arg0;
6f06939b AJ	415	if ((int32_t) arg1 >= 0)
fdf9b3e8 FB	416	ans = 0;
	417	else
	418	ans = 1;
	419	ans += dest;
	420	if (src == 1) {
	421	if (ans == 1)
	422	env->sr \|= SR_T;
	423	else
	424	env->sr &= ~SR_T;
	425	} else
	426	env->sr &= ~SR_T;
6f06939b	427	return arg1;
fdf9b3e8 FB	428	}
fdf9b3e8 FB	429
cc4ba6a9 AJ	430	static inline void set_t(void)
	431	{
	432	env->sr \|= SR_T;
	433	}
	434
	435	static inline void clr_t(void)
	436	{
	437	env->sr &= ~SR_T;
	438	}
	439
390af821 AJ	440	void helper_ld_fpscr(uint32_t val)
390af821 AJ	441	{
26ac1ea5 AJ	442	env->fpscr = val & FPSCR_MASK;
26ac1ea5 AJ	443	if ((val & FPSCR_RM_MASK) == FPSCR_RM_ZERO) {
390af821	444	set_float_rounding_mode(float_round_to_zero, &env->fp_status);
26ac1ea5	445	} else {
390af821	446	set_float_rounding_mode(float_round_nearest_even, &env->fp_status);
26ac1ea5	447	}
a0d4ac33	448	set_flush_to_zero((val & FPSCR_DN) != 0, &env->fp_status);
390af821	449	}
cc4ba6a9	450
21829e9b AJ	451	static void update_fpscr(void *retaddr)
	452	{
	453	int xcpt, cause, enable;
	454
	455	xcpt = get_float_exception_flags(&env->fp_status);
	456
	457	/* Clear the flag entries */
	458	env->fpscr &= ~FPSCR_FLAG_MASK;
	459
	460	if (unlikely(xcpt)) {
	461	if (xcpt & float_flag_invalid) {
	462	env->fpscr \|= FPSCR_FLAG_V;
	463	}
	464	if (xcpt & float_flag_divbyzero) {
	465	env->fpscr \|= FPSCR_FLAG_Z;
	466	}
	467	if (xcpt & float_flag_overflow) {
	468	env->fpscr \|= FPSCR_FLAG_O;
	469	}
	470	if (xcpt & float_flag_underflow) {
	471	env->fpscr \|= FPSCR_FLAG_U;
	472	}
	473	if (xcpt & float_flag_inexact) {
	474	env->fpscr \|= FPSCR_FLAG_I;
	475	}
	476
	477	/* Accumulate in cause entries */
	478	env->fpscr \|= (env->fpscr & FPSCR_FLAG_MASK)
	479	<< (FPSCR_CAUSE_SHIFT - FPSCR_FLAG_SHIFT);
	480
	481	/* Generate an exception if enabled */
	482	cause = (env->fpscr & FPSCR_CAUSE_MASK) >> FPSCR_CAUSE_SHIFT;
	483	enable = (env->fpscr & FPSCR_ENABLE_MASK) >> FPSCR_ENABLE_SHIFT;
	484	if (cause & enable) {
	485	cpu_restore_state_from_retaddr(retaddr);
	486	env->exception_index = 0x120;
1162c041	487	cpu_loop_exit(env);
21829e9b AJ	488	}
	489	}
	490	}
	491
d6c424c5	492	float32 helper_fabs_FT(float32 t0)
cc4ba6a9	493	{
d6c424c5	494	return float32_abs(t0);
cc4ba6a9 AJ	495	}
cc4ba6a9 AJ	496
d6c424c5	497	float64 helper_fabs_DT(float64 t0)
cc4ba6a9	498	{
d6c424c5	499	return float64_abs(t0);
cc4ba6a9 AJ	500	}
cc4ba6a9 AJ	501
d6c424c5	502	float32 helper_fadd_FT(float32 t0, float32 t1)
cc4ba6a9	503	{
21829e9b	504	set_float_exception_flags(0, &env->fp_status);
d6c424c5	505	t0 = float32_add(t0, t1, &env->fp_status);
21829e9b	506	update_fpscr(GETPC());
d6c424c5	507	return t0;
cc4ba6a9 AJ	508	}
cc4ba6a9 AJ	509
d6c424c5	510	float64 helper_fadd_DT(float64 t0, float64 t1)
cc4ba6a9	511	{
21829e9b	512	set_float_exception_flags(0, &env->fp_status);
d6c424c5	513	t0 = float64_add(t0, t1, &env->fp_status);
21829e9b	514	update_fpscr(GETPC());
d6c424c5	515	return t0;
cc4ba6a9 AJ	516	}
cc4ba6a9 AJ	517
d6c424c5	518	void helper_fcmp_eq_FT(float32 t0, float32 t1)
cc4ba6a9	519	{
21829e9b	520	int relation;
9850d1e8	521
21829e9b	522	set_float_exception_flags(0, &env->fp_status);
d6c424c5	523	relation = float32_compare(t0, t1, &env->fp_status);
21829e9b AJ	524	if (unlikely(relation == float_relation_unordered)) {
	525	update_fpscr(GETPC());
	526	} else if (relation == float_relation_equal) {
cc4ba6a9	527	set_t();
21829e9b	528	} else {
cc4ba6a9	529	clr_t();
21829e9b	530	}
cc4ba6a9 AJ	531	}
cc4ba6a9 AJ	532
d6c424c5	533	void helper_fcmp_eq_DT(float64 t0, float64 t1)
cc4ba6a9	534	{
21829e9b	535	int relation;
9850d1e8	536
21829e9b	537	set_float_exception_flags(0, &env->fp_status);
d6c424c5	538	relation = float64_compare(t0, t1, &env->fp_status);
21829e9b AJ	539	if (unlikely(relation == float_relation_unordered)) {
	540	update_fpscr(GETPC());
	541	} else if (relation == float_relation_equal) {
cc4ba6a9	542	set_t();
21829e9b	543	} else {
cc4ba6a9	544	clr_t();
21829e9b	545	}
cc4ba6a9 AJ	546	}
cc4ba6a9 AJ	547
d6c424c5	548	void helper_fcmp_gt_FT(float32 t0, float32 t1)
cc4ba6a9	549	{
21829e9b	550	int relation;
9850d1e8	551
21829e9b	552	set_float_exception_flags(0, &env->fp_status);
d6c424c5	553	relation = float32_compare(t0, t1, &env->fp_status);
21829e9b AJ	554	if (unlikely(relation == float_relation_unordered)) {
	555	update_fpscr(GETPC());
	556	} else if (relation == float_relation_greater) {
cc4ba6a9	557	set_t();
21829e9b	558	} else {
cc4ba6a9	559	clr_t();
21829e9b	560	}
cc4ba6a9 AJ	561	}
cc4ba6a9 AJ	562
d6c424c5	563	void helper_fcmp_gt_DT(float64 t0, float64 t1)
cc4ba6a9	564	{
21829e9b	565	int relation;
9850d1e8	566
21829e9b	567	set_float_exception_flags(0, &env->fp_status);
d6c424c5	568	relation = float64_compare(t0, t1, &env->fp_status);
21829e9b AJ	569	if (unlikely(relation == float_relation_unordered)) {
	570	update_fpscr(GETPC());
	571	} else if (relation == float_relation_greater) {
cc4ba6a9	572	set_t();
21829e9b	573	} else {
cc4ba6a9	574	clr_t();
21829e9b	575	}
cc4ba6a9 AJ	576	}
cc4ba6a9 AJ	577
d6c424c5	578	float64 helper_fcnvsd_FT_DT(float32 t0)
cc4ba6a9	579	{
d6c424c5	580	float64 ret;
21829e9b	581	set_float_exception_flags(0, &env->fp_status);
d6c424c5	582	ret = float32_to_float64(t0, &env->fp_status);
21829e9b	583	update_fpscr(GETPC());
d6c424c5	584	return ret;
cc4ba6a9 AJ	585	}
cc4ba6a9 AJ	586
d6c424c5	587	float32 helper_fcnvds_DT_FT(float64 t0)
cc4ba6a9	588	{
d6c424c5	589	float32 ret;
21829e9b	590	set_float_exception_flags(0, &env->fp_status);
d6c424c5	591	ret = float64_to_float32(t0, &env->fp_status);
21829e9b	592	update_fpscr(GETPC());
d6c424c5	593	return ret;
cc4ba6a9 AJ	594	}
cc4ba6a9 AJ	595
d6c424c5	596	float32 helper_fdiv_FT(float32 t0, float32 t1)
cc4ba6a9	597	{
21829e9b	598	set_float_exception_flags(0, &env->fp_status);
d6c424c5	599	t0 = float32_div(t0, t1, &env->fp_status);
21829e9b	600	update_fpscr(GETPC());
d6c424c5	601	return t0;
cc4ba6a9 AJ	602	}
cc4ba6a9 AJ	603
d6c424c5	604	float64 helper_fdiv_DT(float64 t0, float64 t1)
cc4ba6a9	605	{
21829e9b	606	set_float_exception_flags(0, &env->fp_status);
d6c424c5	607	t0 = float64_div(t0, t1, &env->fp_status);
21829e9b	608	update_fpscr(GETPC());
d6c424c5	609	return t0;
cc4ba6a9 AJ	610	}
cc4ba6a9 AJ	611
d6c424c5	612	float32 helper_float_FT(uint32_t t0)
cc4ba6a9	613	{
d6c424c5	614	float32 ret;
21829e9b	615	set_float_exception_flags(0, &env->fp_status);
d6c424c5	616	ret = int32_to_float32(t0, &env->fp_status);
21829e9b	617	update_fpscr(GETPC());
d6c424c5	618	return ret;
cc4ba6a9 AJ	619	}
cc4ba6a9 AJ	620
d6c424c5	621	float64 helper_float_DT(uint32_t t0)
cc4ba6a9	622	{
d6c424c5	623	float64 ret;
21829e9b	624	set_float_exception_flags(0, &env->fp_status);
d6c424c5	625	ret = int32_to_float64(t0, &env->fp_status);
21829e9b	626	update_fpscr(GETPC());
d6c424c5	627	return ret;
cc4ba6a9 AJ	628	}
cc4ba6a9 AJ	629
d6c424c5	630	float32 helper_fmac_FT(float32 t0, float32 t1, float32 t2)
5b7141a1	631	{
21829e9b	632	set_float_exception_flags(0, &env->fp_status);
d6c424c5 AJ	633	t0 = float32_mul(t0, t1, &env->fp_status);
d6c424c5 AJ	634	t0 = float32_add(t0, t2, &env->fp_status);
21829e9b	635	update_fpscr(GETPC());
d6c424c5	636	return t0;
5b7141a1 AJ	637	}
5b7141a1 AJ	638
d6c424c5	639	float32 helper_fmul_FT(float32 t0, float32 t1)
cc4ba6a9	640	{
21829e9b	641	set_float_exception_flags(0, &env->fp_status);
d6c424c5	642	t0 = float32_mul(t0, t1, &env->fp_status);
21829e9b	643	update_fpscr(GETPC());
d6c424c5	644	return t0;
cc4ba6a9 AJ	645	}
cc4ba6a9 AJ	646
d6c424c5	647	float64 helper_fmul_DT(float64 t0, float64 t1)
cc4ba6a9	648	{
21829e9b	649	set_float_exception_flags(0, &env->fp_status);
d6c424c5	650	t0 = float64_mul(t0, t1, &env->fp_status);
21829e9b	651	update_fpscr(GETPC());
d6c424c5	652	return t0;
cc4ba6a9 AJ	653	}
cc4ba6a9 AJ	654
d6c424c5	655	float32 helper_fneg_T(float32 t0)
7fdf924f	656	{
d6c424c5	657	return float32_chs(t0);
7fdf924f AJ	658	}
7fdf924f AJ	659
d6c424c5	660	float32 helper_fsqrt_FT(float32 t0)
cc4ba6a9	661	{
21829e9b	662	set_float_exception_flags(0, &env->fp_status);
d6c424c5	663	t0 = float32_sqrt(t0, &env->fp_status);
21829e9b	664	update_fpscr(GETPC());
d6c424c5	665	return t0;
cc4ba6a9 AJ	666	}
cc4ba6a9 AJ	667
d6c424c5	668	float64 helper_fsqrt_DT(float64 t0)
cc4ba6a9	669	{
21829e9b	670	set_float_exception_flags(0, &env->fp_status);
d6c424c5	671	t0 = float64_sqrt(t0, &env->fp_status);
21829e9b	672	update_fpscr(GETPC());
d6c424c5	673	return t0;
cc4ba6a9 AJ	674	}
cc4ba6a9 AJ	675
d6c424c5	676	float32 helper_fsub_FT(float32 t0, float32 t1)
cc4ba6a9	677	{
21829e9b	678	set_float_exception_flags(0, &env->fp_status);
d6c424c5	679	t0 = float32_sub(t0, t1, &env->fp_status);
21829e9b	680	update_fpscr(GETPC());
d6c424c5	681	return t0;
cc4ba6a9 AJ	682	}
cc4ba6a9 AJ	683
d6c424c5	684	float64 helper_fsub_DT(float64 t0, float64 t1)
cc4ba6a9	685	{
21829e9b	686	set_float_exception_flags(0, &env->fp_status);
d6c424c5	687	t0 = float64_sub(t0, t1, &env->fp_status);
21829e9b	688	update_fpscr(GETPC());
d6c424c5	689	return t0;
cc4ba6a9 AJ	690	}
cc4ba6a9 AJ	691
d6c424c5	692	uint32_t helper_ftrc_FT(float32 t0)
cc4ba6a9	693	{
21829e9b	694	uint32_t ret;
21829e9b	695	set_float_exception_flags(0, &env->fp_status);
d6c424c5	696	ret = float32_to_int32_round_to_zero(t0, &env->fp_status);
21829e9b AJ	697	update_fpscr(GETPC());
21829e9b AJ	698	return ret;
cc4ba6a9 AJ	699	}
cc4ba6a9 AJ	700
d6c424c5	701	uint32_t helper_ftrc_DT(float64 t0)
cc4ba6a9	702	{
21829e9b	703	uint32_t ret;
21829e9b	704	set_float_exception_flags(0, &env->fp_status);
d6c424c5	705	ret = float64_to_int32_round_to_zero(t0, &env->fp_status);
21829e9b AJ	706	update_fpscr(GETPC());
21829e9b AJ	707	return ret;
cc4ba6a9	708	}
af8c2bde AJ	709
	710	void helper_fipr(uint32_t m, uint32_t n)
	711	{
	712	int bank, i;
	713	float32 r, p;
	714
	715	bank = (env->sr & FPSCR_FR) ? 16 : 0;
	716	r = float32_zero;
	717	set_float_exception_flags(0, &env->fp_status);
	718
	719	for (i = 0 ; i < 4 ; i++) {
	720	p = float32_mul(env->fregs[bank + m + i],
	721	env->fregs[bank + n + i],
	722	&env->fp_status);
	723	r = float32_add(r, p, &env->fp_status);
	724	}
	725	update_fpscr(GETPC());
	726
	727	env->fregs[bank + n + 3] = r;
	728	}
17075f10 AJ	729
	730	void helper_ftrv(uint32_t n)
	731	{
	732	int bank_matrix, bank_vector;
	733	int i, j;
	734	float32 r[4];
	735	float32 p;
	736
	737	bank_matrix = (env->sr & FPSCR_FR) ? 0 : 16;
	738	bank_vector = (env->sr & FPSCR_FR) ? 16 : 0;
	739	set_float_exception_flags(0, &env->fp_status);
	740	for (i = 0 ; i < 4 ; i++) {
	741	r[i] = float32_zero;
	742	for (j = 0 ; j < 4 ; j++) {
	743	p = float32_mul(env->fregs[bank_matrix + 4 * j + i],
	744	env->fregs[bank_vector + j],
	745	&env->fp_status);
	746	r[i] = float32_add(r[i], p, &env->fp_status);
	747	}
	748	}
	749	update_fpscr(GETPC());
	750
	751	for (i = 0 ; i < 4 ; i++) {
	752	env->fregs[bank_vector + i] = r[i];
	753	}
	754	}