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Commit | Line | Data |
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fdf9b3e8 FB |
1 | /* |
2 | * SH4 emulation | |
5fafdf24 | 3 | * |
fdf9b3e8 FB |
4 | * Copyright (c) 2005 Samuel Tardieu |
5 | * | |
6 | * This library is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU Lesser General Public | |
8 | * License as published by the Free Software Foundation; either | |
9 | * version 2 of the License, or (at your option) any later version. | |
10 | * | |
11 | * This library is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | * Lesser General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU Lesser General Public | |
8167ee88 | 17 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. |
fdf9b3e8 FB |
18 | */ |
19 | #include <assert.h> | |
852d481f | 20 | #include <stdlib.h> |
fdf9b3e8 | 21 | #include "exec.h" |
a7812ae4 | 22 | #include "helper.h" |
fdf9b3e8 | 23 | |
21829e9b AJ |
24 | static void cpu_restore_state_from_retaddr(void *retaddr) |
25 | { | |
26 | TranslationBlock *tb; | |
27 | unsigned long pc; | |
28 | ||
29 | if (retaddr) { | |
30 | pc = (unsigned long) retaddr; | |
31 | tb = tb_find_pc(pc); | |
32 | if (tb) { | |
33 | /* the PC is inside the translated code. It means that we have | |
34 | a virtual CPU fault */ | |
35 | cpu_restore_state(tb, env, pc, NULL); | |
36 | } | |
37 | } | |
38 | } | |
39 | ||
fdf9b3e8 FB |
40 | #ifndef CONFIG_USER_ONLY |
41 | ||
42 | #define MMUSUFFIX _mmu | |
fdf9b3e8 FB |
43 | |
44 | #define SHIFT 0 | |
45 | #include "softmmu_template.h" | |
46 | ||
47 | #define SHIFT 1 | |
48 | #include "softmmu_template.h" | |
49 | ||
50 | #define SHIFT 2 | |
51 | #include "softmmu_template.h" | |
52 | ||
53 | #define SHIFT 3 | |
54 | #include "softmmu_template.h" | |
55 | ||
6ebbf390 | 56 | void tlb_fill(target_ulong addr, int is_write, int mmu_idx, void *retaddr) |
fdf9b3e8 | 57 | { |
fdf9b3e8 | 58 | CPUState *saved_env; |
fdf9b3e8 FB |
59 | int ret; |
60 | ||
61 | /* XXX: hack to restore env in all cases, even if not called from | |
62 | generated code */ | |
63 | saved_env = env; | |
64 | env = cpu_single_env; | |
6ebbf390 | 65 | ret = cpu_sh4_handle_mmu_fault(env, addr, is_write, mmu_idx, 1); |
fdf9b3e8 | 66 | if (ret) { |
21829e9b AJ |
67 | /* now we have a real cpu fault */ |
68 | cpu_restore_state_from_retaddr(retaddr); | |
e6afc2f4 | 69 | cpu_loop_exit(); |
fdf9b3e8 FB |
70 | } |
71 | env = saved_env; | |
72 | } | |
73 | ||
74 | #endif | |
75 | ||
ea2b542a AJ |
76 | void helper_ldtlb(void) |
77 | { | |
78 | #ifdef CONFIG_USER_ONLY | |
79 | /* XXXXX */ | |
43dc2a64 | 80 | cpu_abort(env, "Unhandled ldtlb"); |
ea2b542a AJ |
81 | #else |
82 | cpu_load_tlb(env); | |
83 | #endif | |
84 | } | |
85 | ||
fd4bab10 | 86 | static inline void raise_exception(int index, void *retaddr) |
e6afc2f4 | 87 | { |
fd4bab10 AJ |
88 | env->exception_index = index; |
89 | cpu_restore_state_from_retaddr(retaddr); | |
e6afc2f4 AJ |
90 | cpu_loop_exit(); |
91 | } | |
92 | ||
fd4bab10 AJ |
93 | void helper_raise_illegal_instruction(void) |
94 | { | |
95 | raise_exception(0x180, GETPC()); | |
96 | } | |
97 | ||
e6afc2f4 AJ |
98 | void helper_raise_slot_illegal_instruction(void) |
99 | { | |
fd4bab10 | 100 | raise_exception(0x1a0, GETPC()); |
e6afc2f4 AJ |
101 | } |
102 | ||
d8299bcc AJ |
103 | void helper_raise_fpu_disable(void) |
104 | { | |
fd4bab10 | 105 | raise_exception(0x800, GETPC()); |
d8299bcc AJ |
106 | } |
107 | ||
108 | void helper_raise_slot_fpu_disable(void) | |
109 | { | |
fd4bab10 | 110 | raise_exception(0x820, GETPC()); |
d8299bcc AJ |
111 | } |
112 | ||
e6afc2f4 AJ |
113 | void helper_debug(void) |
114 | { | |
115 | env->exception_index = EXCP_DEBUG; | |
116 | cpu_loop_exit(); | |
117 | } | |
118 | ||
f24f381b | 119 | void helper_sleep(uint32_t next_pc) |
e6afc2f4 AJ |
120 | { |
121 | env->halted = 1; | |
122 | env->exception_index = EXCP_HLT; | |
f24f381b | 123 | env->pc = next_pc; |
e6afc2f4 AJ |
124 | cpu_loop_exit(); |
125 | } | |
126 | ||
127 | void helper_trapa(uint32_t tra) | |
128 | { | |
129 | env->tra = tra << 2; | |
fd4bab10 | 130 | raise_exception(0x160, GETPC()); |
e6afc2f4 AJ |
131 | } |
132 | ||
852d481f EI |
133 | void helper_movcal(uint32_t address, uint32_t value) |
134 | { | |
135 | if (cpu_sh4_is_cached (env, address)) | |
136 | { | |
137 | memory_content *r = malloc (sizeof(memory_content)); | |
138 | r->address = address; | |
139 | r->value = value; | |
140 | r->next = NULL; | |
141 | ||
142 | *(env->movcal_backup_tail) = r; | |
143 | env->movcal_backup_tail = &(r->next); | |
144 | } | |
145 | } | |
146 | ||
147 | void helper_discard_movcal_backup(void) | |
148 | { | |
149 | memory_content *current = env->movcal_backup; | |
150 | ||
151 | while(current) | |
152 | { | |
153 | memory_content *next = current->next; | |
154 | free (current); | |
155 | env->movcal_backup = current = next; | |
b9d38e95 | 156 | if (current == NULL) |
852d481f EI |
157 | env->movcal_backup_tail = &(env->movcal_backup); |
158 | } | |
159 | } | |
160 | ||
161 | void helper_ocbi(uint32_t address) | |
162 | { | |
163 | memory_content **current = &(env->movcal_backup); | |
164 | while (*current) | |
165 | { | |
166 | uint32_t a = (*current)->address; | |
167 | if ((a & ~0x1F) == (address & ~0x1F)) | |
168 | { | |
169 | memory_content *next = (*current)->next; | |
170 | stl(a, (*current)->value); | |
171 | ||
b9d38e95 | 172 | if (next == NULL) |
852d481f EI |
173 | { |
174 | env->movcal_backup_tail = current; | |
175 | } | |
176 | ||
177 | free (*current); | |
178 | *current = next; | |
179 | break; | |
180 | } | |
181 | } | |
182 | } | |
183 | ||
6f06939b | 184 | uint32_t helper_addc(uint32_t arg0, uint32_t arg1) |
fdf9b3e8 FB |
185 | { |
186 | uint32_t tmp0, tmp1; | |
187 | ||
6f06939b AJ |
188 | tmp1 = arg0 + arg1; |
189 | tmp0 = arg1; | |
190 | arg1 = tmp1 + (env->sr & 1); | |
fdf9b3e8 FB |
191 | if (tmp0 > tmp1) |
192 | env->sr |= SR_T; | |
193 | else | |
194 | env->sr &= ~SR_T; | |
6f06939b | 195 | if (tmp1 > arg1) |
fdf9b3e8 | 196 | env->sr |= SR_T; |
6f06939b | 197 | return arg1; |
fdf9b3e8 FB |
198 | } |
199 | ||
6f06939b | 200 | uint32_t helper_addv(uint32_t arg0, uint32_t arg1) |
fdf9b3e8 FB |
201 | { |
202 | uint32_t dest, src, ans; | |
203 | ||
6f06939b | 204 | if ((int32_t) arg1 >= 0) |
fdf9b3e8 FB |
205 | dest = 0; |
206 | else | |
207 | dest = 1; | |
6f06939b | 208 | if ((int32_t) arg0 >= 0) |
fdf9b3e8 FB |
209 | src = 0; |
210 | else | |
211 | src = 1; | |
212 | src += dest; | |
6f06939b AJ |
213 | arg1 += arg0; |
214 | if ((int32_t) arg1 >= 0) | |
fdf9b3e8 FB |
215 | ans = 0; |
216 | else | |
217 | ans = 1; | |
218 | ans += dest; | |
219 | if (src == 0 || src == 2) { | |
220 | if (ans == 1) | |
221 | env->sr |= SR_T; | |
222 | else | |
223 | env->sr &= ~SR_T; | |
224 | } else | |
225 | env->sr &= ~SR_T; | |
6f06939b | 226 | return arg1; |
fdf9b3e8 FB |
227 | } |
228 | ||
229 | #define T (env->sr & SR_T) | |
230 | #define Q (env->sr & SR_Q ? 1 : 0) | |
231 | #define M (env->sr & SR_M ? 1 : 0) | |
232 | #define SETT env->sr |= SR_T | |
233 | #define CLRT env->sr &= ~SR_T | |
234 | #define SETQ env->sr |= SR_Q | |
235 | #define CLRQ env->sr &= ~SR_Q | |
236 | #define SETM env->sr |= SR_M | |
237 | #define CLRM env->sr &= ~SR_M | |
238 | ||
69d6275b | 239 | uint32_t helper_div1(uint32_t arg0, uint32_t arg1) |
fdf9b3e8 FB |
240 | { |
241 | uint32_t tmp0, tmp2; | |
242 | uint8_t old_q, tmp1 = 0xff; | |
243 | ||
69d6275b | 244 | //printf("div1 arg0=0x%08x arg1=0x%08x M=%d Q=%d T=%d\n", arg0, arg1, M, Q, T); |
fdf9b3e8 | 245 | old_q = Q; |
69d6275b | 246 | if ((0x80000000 & arg1) != 0) |
fdf9b3e8 FB |
247 | SETQ; |
248 | else | |
249 | CLRQ; | |
69d6275b AJ |
250 | tmp2 = arg0; |
251 | arg1 <<= 1; | |
252 | arg1 |= T; | |
fdf9b3e8 FB |
253 | switch (old_q) { |
254 | case 0: | |
255 | switch (M) { | |
256 | case 0: | |
69d6275b AJ |
257 | tmp0 = arg1; |
258 | arg1 -= tmp2; | |
259 | tmp1 = arg1 > tmp0; | |
fdf9b3e8 FB |
260 | switch (Q) { |
261 | case 0: | |
262 | if (tmp1) | |
263 | SETQ; | |
264 | else | |
265 | CLRQ; | |
266 | break; | |
267 | case 1: | |
268 | if (tmp1 == 0) | |
269 | SETQ; | |
270 | else | |
271 | CLRQ; | |
272 | break; | |
273 | } | |
274 | break; | |
275 | case 1: | |
69d6275b AJ |
276 | tmp0 = arg1; |
277 | arg1 += tmp2; | |
278 | tmp1 = arg1 < tmp0; | |
fdf9b3e8 FB |
279 | switch (Q) { |
280 | case 0: | |
281 | if (tmp1 == 0) | |
282 | SETQ; | |
283 | else | |
284 | CLRQ; | |
285 | break; | |
286 | case 1: | |
287 | if (tmp1) | |
288 | SETQ; | |
289 | else | |
290 | CLRQ; | |
291 | break; | |
292 | } | |
293 | break; | |
294 | } | |
295 | break; | |
296 | case 1: | |
297 | switch (M) { | |
298 | case 0: | |
69d6275b AJ |
299 | tmp0 = arg1; |
300 | arg1 += tmp2; | |
301 | tmp1 = arg1 < tmp0; | |
fdf9b3e8 FB |
302 | switch (Q) { |
303 | case 0: | |
304 | if (tmp1) | |
305 | SETQ; | |
306 | else | |
307 | CLRQ; | |
308 | break; | |
309 | case 1: | |
310 | if (tmp1 == 0) | |
311 | SETQ; | |
312 | else | |
313 | CLRQ; | |
314 | break; | |
315 | } | |
316 | break; | |
317 | case 1: | |
69d6275b AJ |
318 | tmp0 = arg1; |
319 | arg1 -= tmp2; | |
320 | tmp1 = arg1 > tmp0; | |
fdf9b3e8 FB |
321 | switch (Q) { |
322 | case 0: | |
323 | if (tmp1 == 0) | |
324 | SETQ; | |
325 | else | |
326 | CLRQ; | |
327 | break; | |
328 | case 1: | |
329 | if (tmp1) | |
330 | SETQ; | |
331 | else | |
332 | CLRQ; | |
333 | break; | |
334 | } | |
335 | break; | |
336 | } | |
337 | break; | |
338 | } | |
339 | if (Q == M) | |
340 | SETT; | |
341 | else | |
342 | CLRT; | |
69d6275b AJ |
343 | //printf("Output: arg1=0x%08x M=%d Q=%d T=%d\n", arg1, M, Q, T); |
344 | return arg1; | |
fdf9b3e8 FB |
345 | } |
346 | ||
6f06939b | 347 | void helper_macl(uint32_t arg0, uint32_t arg1) |
fdf9b3e8 FB |
348 | { |
349 | int64_t res; | |
350 | ||
351 | res = ((uint64_t) env->mach << 32) | env->macl; | |
6f06939b | 352 | res += (int64_t) (int32_t) arg0 *(int64_t) (int32_t) arg1; |
fdf9b3e8 FB |
353 | env->mach = (res >> 32) & 0xffffffff; |
354 | env->macl = res & 0xffffffff; | |
355 | if (env->sr & SR_S) { | |
356 | if (res < 0) | |
357 | env->mach |= 0xffff0000; | |
358 | else | |
359 | env->mach &= 0x00007fff; | |
360 | } | |
361 | } | |
362 | ||
6f06939b | 363 | void helper_macw(uint32_t arg0, uint32_t arg1) |
fdf9b3e8 FB |
364 | { |
365 | int64_t res; | |
366 | ||
367 | res = ((uint64_t) env->mach << 32) | env->macl; | |
6f06939b | 368 | res += (int64_t) (int16_t) arg0 *(int64_t) (int16_t) arg1; |
fdf9b3e8 FB |
369 | env->mach = (res >> 32) & 0xffffffff; |
370 | env->macl = res & 0xffffffff; | |
371 | if (env->sr & SR_S) { | |
372 | if (res < -0x80000000) { | |
373 | env->mach = 1; | |
374 | env->macl = 0x80000000; | |
375 | } else if (res > 0x000000007fffffff) { | |
376 | env->mach = 1; | |
377 | env->macl = 0x7fffffff; | |
378 | } | |
379 | } | |
380 | } | |
381 | ||
6f06939b | 382 | uint32_t helper_negc(uint32_t arg) |
fdf9b3e8 FB |
383 | { |
384 | uint32_t temp; | |
385 | ||
6f06939b AJ |
386 | temp = -arg; |
387 | arg = temp - (env->sr & SR_T); | |
fdf9b3e8 FB |
388 | if (0 < temp) |
389 | env->sr |= SR_T; | |
390 | else | |
391 | env->sr &= ~SR_T; | |
6f06939b | 392 | if (temp < arg) |
fdf9b3e8 | 393 | env->sr |= SR_T; |
6f06939b | 394 | return arg; |
fdf9b3e8 FB |
395 | } |
396 | ||
6f06939b | 397 | uint32_t helper_subc(uint32_t arg0, uint32_t arg1) |
fdf9b3e8 FB |
398 | { |
399 | uint32_t tmp0, tmp1; | |
400 | ||
6f06939b AJ |
401 | tmp1 = arg1 - arg0; |
402 | tmp0 = arg1; | |
403 | arg1 = tmp1 - (env->sr & SR_T); | |
fdf9b3e8 FB |
404 | if (tmp0 < tmp1) |
405 | env->sr |= SR_T; | |
406 | else | |
407 | env->sr &= ~SR_T; | |
6f06939b | 408 | if (tmp1 < arg1) |
fdf9b3e8 | 409 | env->sr |= SR_T; |
6f06939b | 410 | return arg1; |
fdf9b3e8 FB |
411 | } |
412 | ||
6f06939b | 413 | uint32_t helper_subv(uint32_t arg0, uint32_t arg1) |
fdf9b3e8 FB |
414 | { |
415 | int32_t dest, src, ans; | |
416 | ||
6f06939b | 417 | if ((int32_t) arg1 >= 0) |
fdf9b3e8 FB |
418 | dest = 0; |
419 | else | |
420 | dest = 1; | |
6f06939b | 421 | if ((int32_t) arg0 >= 0) |
fdf9b3e8 FB |
422 | src = 0; |
423 | else | |
424 | src = 1; | |
425 | src += dest; | |
6f06939b AJ |
426 | arg1 -= arg0; |
427 | if ((int32_t) arg1 >= 0) | |
fdf9b3e8 FB |
428 | ans = 0; |
429 | else | |
430 | ans = 1; | |
431 | ans += dest; | |
432 | if (src == 1) { | |
433 | if (ans == 1) | |
434 | env->sr |= SR_T; | |
435 | else | |
436 | env->sr &= ~SR_T; | |
437 | } else | |
438 | env->sr &= ~SR_T; | |
6f06939b | 439 | return arg1; |
fdf9b3e8 FB |
440 | } |
441 | ||
cc4ba6a9 AJ |
442 | static inline void set_t(void) |
443 | { | |
444 | env->sr |= SR_T; | |
445 | } | |
446 | ||
447 | static inline void clr_t(void) | |
448 | { | |
449 | env->sr &= ~SR_T; | |
450 | } | |
451 | ||
390af821 AJ |
452 | void helper_ld_fpscr(uint32_t val) |
453 | { | |
26ac1ea5 AJ |
454 | env->fpscr = val & FPSCR_MASK; |
455 | if ((val & FPSCR_RM_MASK) == FPSCR_RM_ZERO) { | |
390af821 | 456 | set_float_rounding_mode(float_round_to_zero, &env->fp_status); |
26ac1ea5 | 457 | } else { |
390af821 | 458 | set_float_rounding_mode(float_round_nearest_even, &env->fp_status); |
26ac1ea5 | 459 | } |
a0d4ac33 | 460 | set_flush_to_zero((val & FPSCR_DN) != 0, &env->fp_status); |
390af821 | 461 | } |
cc4ba6a9 | 462 | |
21829e9b AJ |
463 | static void update_fpscr(void *retaddr) |
464 | { | |
465 | int xcpt, cause, enable; | |
466 | ||
467 | xcpt = get_float_exception_flags(&env->fp_status); | |
468 | ||
469 | /* Clear the flag entries */ | |
470 | env->fpscr &= ~FPSCR_FLAG_MASK; | |
471 | ||
472 | if (unlikely(xcpt)) { | |
473 | if (xcpt & float_flag_invalid) { | |
474 | env->fpscr |= FPSCR_FLAG_V; | |
475 | } | |
476 | if (xcpt & float_flag_divbyzero) { | |
477 | env->fpscr |= FPSCR_FLAG_Z; | |
478 | } | |
479 | if (xcpt & float_flag_overflow) { | |
480 | env->fpscr |= FPSCR_FLAG_O; | |
481 | } | |
482 | if (xcpt & float_flag_underflow) { | |
483 | env->fpscr |= FPSCR_FLAG_U; | |
484 | } | |
485 | if (xcpt & float_flag_inexact) { | |
486 | env->fpscr |= FPSCR_FLAG_I; | |
487 | } | |
488 | ||
489 | /* Accumulate in cause entries */ | |
490 | env->fpscr |= (env->fpscr & FPSCR_FLAG_MASK) | |
491 | << (FPSCR_CAUSE_SHIFT - FPSCR_FLAG_SHIFT); | |
492 | ||
493 | /* Generate an exception if enabled */ | |
494 | cause = (env->fpscr & FPSCR_CAUSE_MASK) >> FPSCR_CAUSE_SHIFT; | |
495 | enable = (env->fpscr & FPSCR_ENABLE_MASK) >> FPSCR_ENABLE_SHIFT; | |
496 | if (cause & enable) { | |
497 | cpu_restore_state_from_retaddr(retaddr); | |
498 | env->exception_index = 0x120; | |
499 | cpu_loop_exit(); | |
500 | } | |
501 | } | |
502 | } | |
503 | ||
cc4ba6a9 AJ |
504 | uint32_t helper_fabs_FT(uint32_t t0) |
505 | { | |
9850d1e8 AJ |
506 | CPU_FloatU f; |
507 | f.l = t0; | |
508 | f.f = float32_abs(f.f); | |
509 | return f.l; | |
cc4ba6a9 AJ |
510 | } |
511 | ||
512 | uint64_t helper_fabs_DT(uint64_t t0) | |
513 | { | |
9850d1e8 AJ |
514 | CPU_DoubleU d; |
515 | d.ll = t0; | |
516 | d.d = float64_abs(d.d); | |
517 | return d.ll; | |
cc4ba6a9 AJ |
518 | } |
519 | ||
520 | uint32_t helper_fadd_FT(uint32_t t0, uint32_t t1) | |
521 | { | |
9850d1e8 AJ |
522 | CPU_FloatU f0, f1; |
523 | f0.l = t0; | |
524 | f1.l = t1; | |
21829e9b | 525 | set_float_exception_flags(0, &env->fp_status); |
9850d1e8 | 526 | f0.f = float32_add(f0.f, f1.f, &env->fp_status); |
21829e9b | 527 | update_fpscr(GETPC()); |
9850d1e8 | 528 | return f0.l; |
cc4ba6a9 AJ |
529 | } |
530 | ||
531 | uint64_t helper_fadd_DT(uint64_t t0, uint64_t t1) | |
532 | { | |
9850d1e8 AJ |
533 | CPU_DoubleU d0, d1; |
534 | d0.ll = t0; | |
535 | d1.ll = t1; | |
21829e9b | 536 | set_float_exception_flags(0, &env->fp_status); |
9850d1e8 | 537 | d0.d = float64_add(d0.d, d1.d, &env->fp_status); |
21829e9b | 538 | update_fpscr(GETPC()); |
9850d1e8 | 539 | return d0.ll; |
cc4ba6a9 AJ |
540 | } |
541 | ||
542 | void helper_fcmp_eq_FT(uint32_t t0, uint32_t t1) | |
543 | { | |
9850d1e8 | 544 | CPU_FloatU f0, f1; |
21829e9b | 545 | int relation; |
9850d1e8 AJ |
546 | f0.l = t0; |
547 | f1.l = t1; | |
548 | ||
21829e9b AJ |
549 | set_float_exception_flags(0, &env->fp_status); |
550 | relation = float32_compare(f0.f, f1.f, &env->fp_status); | |
551 | if (unlikely(relation == float_relation_unordered)) { | |
552 | update_fpscr(GETPC()); | |
553 | } else if (relation == float_relation_equal) { | |
cc4ba6a9 | 554 | set_t(); |
21829e9b | 555 | } else { |
cc4ba6a9 | 556 | clr_t(); |
21829e9b | 557 | } |
cc4ba6a9 AJ |
558 | } |
559 | ||
560 | void helper_fcmp_eq_DT(uint64_t t0, uint64_t t1) | |
561 | { | |
9850d1e8 | 562 | CPU_DoubleU d0, d1; |
21829e9b | 563 | int relation; |
9850d1e8 AJ |
564 | d0.ll = t0; |
565 | d1.ll = t1; | |
566 | ||
21829e9b AJ |
567 | set_float_exception_flags(0, &env->fp_status); |
568 | relation = float64_compare(d0.d, d1.d, &env->fp_status); | |
569 | if (unlikely(relation == float_relation_unordered)) { | |
570 | update_fpscr(GETPC()); | |
571 | } else if (relation == float_relation_equal) { | |
cc4ba6a9 | 572 | set_t(); |
21829e9b | 573 | } else { |
cc4ba6a9 | 574 | clr_t(); |
21829e9b | 575 | } |
cc4ba6a9 AJ |
576 | } |
577 | ||
578 | void helper_fcmp_gt_FT(uint32_t t0, uint32_t t1) | |
579 | { | |
9850d1e8 | 580 | CPU_FloatU f0, f1; |
21829e9b | 581 | int relation; |
9850d1e8 AJ |
582 | f0.l = t0; |
583 | f1.l = t1; | |
584 | ||
21829e9b AJ |
585 | set_float_exception_flags(0, &env->fp_status); |
586 | relation = float32_compare(f0.f, f1.f, &env->fp_status); | |
587 | if (unlikely(relation == float_relation_unordered)) { | |
588 | update_fpscr(GETPC()); | |
589 | } else if (relation == float_relation_greater) { | |
cc4ba6a9 | 590 | set_t(); |
21829e9b | 591 | } else { |
cc4ba6a9 | 592 | clr_t(); |
21829e9b | 593 | } |
cc4ba6a9 AJ |
594 | } |
595 | ||
596 | void helper_fcmp_gt_DT(uint64_t t0, uint64_t t1) | |
597 | { | |
9850d1e8 | 598 | CPU_DoubleU d0, d1; |
21829e9b | 599 | int relation; |
9850d1e8 AJ |
600 | d0.ll = t0; |
601 | d1.ll = t1; | |
602 | ||
21829e9b AJ |
603 | set_float_exception_flags(0, &env->fp_status); |
604 | relation = float64_compare(d0.d, d1.d, &env->fp_status); | |
605 | if (unlikely(relation == float_relation_unordered)) { | |
606 | update_fpscr(GETPC()); | |
607 | } else if (relation == float_relation_greater) { | |
cc4ba6a9 | 608 | set_t(); |
21829e9b | 609 | } else { |
cc4ba6a9 | 610 | clr_t(); |
21829e9b | 611 | } |
cc4ba6a9 AJ |
612 | } |
613 | ||
614 | uint64_t helper_fcnvsd_FT_DT(uint32_t t0) | |
615 | { | |
9850d1e8 AJ |
616 | CPU_DoubleU d; |
617 | CPU_FloatU f; | |
618 | f.l = t0; | |
21829e9b | 619 | set_float_exception_flags(0, &env->fp_status); |
9850d1e8 | 620 | d.d = float32_to_float64(f.f, &env->fp_status); |
21829e9b | 621 | update_fpscr(GETPC()); |
9850d1e8 | 622 | return d.ll; |
cc4ba6a9 AJ |
623 | } |
624 | ||
625 | uint32_t helper_fcnvds_DT_FT(uint64_t t0) | |
626 | { | |
9850d1e8 AJ |
627 | CPU_DoubleU d; |
628 | CPU_FloatU f; | |
629 | d.ll = t0; | |
21829e9b | 630 | set_float_exception_flags(0, &env->fp_status); |
9850d1e8 | 631 | f.f = float64_to_float32(d.d, &env->fp_status); |
21829e9b | 632 | update_fpscr(GETPC()); |
9850d1e8 | 633 | return f.l; |
cc4ba6a9 AJ |
634 | } |
635 | ||
636 | uint32_t helper_fdiv_FT(uint32_t t0, uint32_t t1) | |
637 | { | |
9850d1e8 AJ |
638 | CPU_FloatU f0, f1; |
639 | f0.l = t0; | |
640 | f1.l = t1; | |
21829e9b | 641 | set_float_exception_flags(0, &env->fp_status); |
9850d1e8 | 642 | f0.f = float32_div(f0.f, f1.f, &env->fp_status); |
21829e9b | 643 | update_fpscr(GETPC()); |
9850d1e8 | 644 | return f0.l; |
cc4ba6a9 AJ |
645 | } |
646 | ||
647 | uint64_t helper_fdiv_DT(uint64_t t0, uint64_t t1) | |
648 | { | |
9850d1e8 AJ |
649 | CPU_DoubleU d0, d1; |
650 | d0.ll = t0; | |
651 | d1.ll = t1; | |
21829e9b | 652 | set_float_exception_flags(0, &env->fp_status); |
9850d1e8 | 653 | d0.d = float64_div(d0.d, d1.d, &env->fp_status); |
21829e9b | 654 | update_fpscr(GETPC()); |
9850d1e8 | 655 | return d0.ll; |
cc4ba6a9 AJ |
656 | } |
657 | ||
658 | uint32_t helper_float_FT(uint32_t t0) | |
659 | { | |
9850d1e8 | 660 | CPU_FloatU f; |
21829e9b AJ |
661 | |
662 | set_float_exception_flags(0, &env->fp_status); | |
9850d1e8 | 663 | f.f = int32_to_float32(t0, &env->fp_status); |
21829e9b AJ |
664 | update_fpscr(GETPC()); |
665 | ||
9850d1e8 | 666 | return f.l; |
cc4ba6a9 AJ |
667 | } |
668 | ||
669 | uint64_t helper_float_DT(uint32_t t0) | |
670 | { | |
9850d1e8 | 671 | CPU_DoubleU d; |
21829e9b | 672 | set_float_exception_flags(0, &env->fp_status); |
9850d1e8 | 673 | d.d = int32_to_float64(t0, &env->fp_status); |
21829e9b | 674 | update_fpscr(GETPC()); |
9850d1e8 | 675 | return d.ll; |
cc4ba6a9 AJ |
676 | } |
677 | ||
5b7141a1 AJ |
678 | uint32_t helper_fmac_FT(uint32_t t0, uint32_t t1, uint32_t t2) |
679 | { | |
680 | CPU_FloatU f0, f1, f2; | |
681 | f0.l = t0; | |
682 | f1.l = t1; | |
683 | f2.l = t2; | |
21829e9b | 684 | set_float_exception_flags(0, &env->fp_status); |
5b7141a1 AJ |
685 | f0.f = float32_mul(f0.f, f1.f, &env->fp_status); |
686 | f0.f = float32_add(f0.f, f2.f, &env->fp_status); | |
21829e9b AJ |
687 | update_fpscr(GETPC()); |
688 | ||
5b7141a1 AJ |
689 | return f0.l; |
690 | } | |
691 | ||
cc4ba6a9 AJ |
692 | uint32_t helper_fmul_FT(uint32_t t0, uint32_t t1) |
693 | { | |
9850d1e8 AJ |
694 | CPU_FloatU f0, f1; |
695 | f0.l = t0; | |
696 | f1.l = t1; | |
21829e9b | 697 | set_float_exception_flags(0, &env->fp_status); |
9850d1e8 | 698 | f0.f = float32_mul(f0.f, f1.f, &env->fp_status); |
21829e9b | 699 | update_fpscr(GETPC()); |
9850d1e8 | 700 | return f0.l; |
cc4ba6a9 AJ |
701 | } |
702 | ||
703 | uint64_t helper_fmul_DT(uint64_t t0, uint64_t t1) | |
704 | { | |
9850d1e8 AJ |
705 | CPU_DoubleU d0, d1; |
706 | d0.ll = t0; | |
707 | d1.ll = t1; | |
21829e9b | 708 | set_float_exception_flags(0, &env->fp_status); |
9850d1e8 | 709 | d0.d = float64_mul(d0.d, d1.d, &env->fp_status); |
21829e9b AJ |
710 | update_fpscr(GETPC()); |
711 | ||
9850d1e8 | 712 | return d0.ll; |
cc4ba6a9 AJ |
713 | } |
714 | ||
7fdf924f AJ |
715 | uint32_t helper_fneg_T(uint32_t t0) |
716 | { | |
9850d1e8 AJ |
717 | CPU_FloatU f; |
718 | f.l = t0; | |
719 | f.f = float32_chs(f.f); | |
720 | return f.l; | |
7fdf924f AJ |
721 | } |
722 | ||
cc4ba6a9 AJ |
723 | uint32_t helper_fsqrt_FT(uint32_t t0) |
724 | { | |
9850d1e8 AJ |
725 | CPU_FloatU f; |
726 | f.l = t0; | |
21829e9b | 727 | set_float_exception_flags(0, &env->fp_status); |
9850d1e8 | 728 | f.f = float32_sqrt(f.f, &env->fp_status); |
21829e9b | 729 | update_fpscr(GETPC()); |
9850d1e8 | 730 | return f.l; |
cc4ba6a9 AJ |
731 | } |
732 | ||
733 | uint64_t helper_fsqrt_DT(uint64_t t0) | |
734 | { | |
9850d1e8 AJ |
735 | CPU_DoubleU d; |
736 | d.ll = t0; | |
21829e9b | 737 | set_float_exception_flags(0, &env->fp_status); |
9850d1e8 | 738 | d.d = float64_sqrt(d.d, &env->fp_status); |
21829e9b | 739 | update_fpscr(GETPC()); |
9850d1e8 | 740 | return d.ll; |
cc4ba6a9 AJ |
741 | } |
742 | ||
743 | uint32_t helper_fsub_FT(uint32_t t0, uint32_t t1) | |
744 | { | |
9850d1e8 AJ |
745 | CPU_FloatU f0, f1; |
746 | f0.l = t0; | |
747 | f1.l = t1; | |
21829e9b | 748 | set_float_exception_flags(0, &env->fp_status); |
9850d1e8 | 749 | f0.f = float32_sub(f0.f, f1.f, &env->fp_status); |
21829e9b | 750 | update_fpscr(GETPC()); |
9850d1e8 | 751 | return f0.l; |
cc4ba6a9 AJ |
752 | } |
753 | ||
754 | uint64_t helper_fsub_DT(uint64_t t0, uint64_t t1) | |
755 | { | |
9850d1e8 | 756 | CPU_DoubleU d0, d1; |
21829e9b | 757 | |
9850d1e8 AJ |
758 | d0.ll = t0; |
759 | d1.ll = t1; | |
21829e9b | 760 | set_float_exception_flags(0, &env->fp_status); |
9850d1e8 | 761 | d0.d = float64_sub(d0.d, d1.d, &env->fp_status); |
21829e9b | 762 | update_fpscr(GETPC()); |
9850d1e8 | 763 | return d0.ll; |
cc4ba6a9 AJ |
764 | } |
765 | ||
766 | uint32_t helper_ftrc_FT(uint32_t t0) | |
767 | { | |
9850d1e8 | 768 | CPU_FloatU f; |
21829e9b | 769 | uint32_t ret; |
9850d1e8 | 770 | f.l = t0; |
21829e9b AJ |
771 | set_float_exception_flags(0, &env->fp_status); |
772 | ret = float32_to_int32_round_to_zero(f.f, &env->fp_status); | |
773 | update_fpscr(GETPC()); | |
774 | return ret; | |
cc4ba6a9 AJ |
775 | } |
776 | ||
777 | uint32_t helper_ftrc_DT(uint64_t t0) | |
778 | { | |
9850d1e8 | 779 | CPU_DoubleU d; |
21829e9b | 780 | uint32_t ret; |
9850d1e8 | 781 | d.ll = t0; |
21829e9b AJ |
782 | set_float_exception_flags(0, &env->fp_status); |
783 | ret = float64_to_int32_round_to_zero(d.d, &env->fp_status); | |
784 | update_fpscr(GETPC()); | |
785 | return ret; | |
cc4ba6a9 | 786 | } |
af8c2bde AJ |
787 | |
788 | void helper_fipr(uint32_t m, uint32_t n) | |
789 | { | |
790 | int bank, i; | |
791 | float32 r, p; | |
792 | ||
793 | bank = (env->sr & FPSCR_FR) ? 16 : 0; | |
794 | r = float32_zero; | |
795 | set_float_exception_flags(0, &env->fp_status); | |
796 | ||
797 | for (i = 0 ; i < 4 ; i++) { | |
798 | p = float32_mul(env->fregs[bank + m + i], | |
799 | env->fregs[bank + n + i], | |
800 | &env->fp_status); | |
801 | r = float32_add(r, p, &env->fp_status); | |
802 | } | |
803 | update_fpscr(GETPC()); | |
804 | ||
805 | env->fregs[bank + n + 3] = r; | |
806 | } | |
17075f10 AJ |
807 | |
808 | void helper_ftrv(uint32_t n) | |
809 | { | |
810 | int bank_matrix, bank_vector; | |
811 | int i, j; | |
812 | float32 r[4]; | |
813 | float32 p; | |
814 | ||
815 | bank_matrix = (env->sr & FPSCR_FR) ? 0 : 16; | |
816 | bank_vector = (env->sr & FPSCR_FR) ? 16 : 0; | |
817 | set_float_exception_flags(0, &env->fp_status); | |
818 | for (i = 0 ; i < 4 ; i++) { | |
819 | r[i] = float32_zero; | |
820 | for (j = 0 ; j < 4 ; j++) { | |
821 | p = float32_mul(env->fregs[bank_matrix + 4 * j + i], | |
822 | env->fregs[bank_vector + j], | |
823 | &env->fp_status); | |
824 | r[i] = float32_add(r[i], p, &env->fp_status); | |
825 | } | |
826 | } | |
827 | update_fpscr(GETPC()); | |
828 | ||
829 | for (i = 0 ; i < 4 ; i++) { | |
830 | env->fregs[bank_vector + i] = r[i]; | |
831 | } | |
832 | } |