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target-unicore32: Drop UC32_CPUID macros
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1/*
2 * UniCore32 helper routines
3 *
4f23a1e6 4 * Copyright (C) 2010-2012 Guan Xuetao
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5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
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8 * published by the Free Software Foundation, or (at your option) any
9 * later version. See the COPYING file in the top-level directory.
6e64da3c 10 */
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11#include "cpu.h"
12#include "dyngen-exec.h"
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13#include "helper.h"
14
15#define SIGNBIT (uint32_t)0x80000000
16#define SIGNBIT64 ((uint64_t)1 << 63)
17
18void HELPER(exception)(uint32_t excp)
19{
20 env->exception_index = excp;
1162c041 21 cpu_loop_exit(env);
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22}
23
24static target_ulong asr_read(void)
25{
26 int ZF;
27 ZF = (env->ZF == 0);
28 return env->uncached_asr | (env->NF & 0x80000000) | (ZF << 30) |
29 (env->CF << 29) | ((env->VF & 0x80000000) >> 3);
30}
31
eb23b556 32target_ulong cpu_asr_read(CPUUniCore32State *env1)
6e64da3c 33{
eb23b556 34 CPUUniCore32State *saved_env;
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35 target_ulong ret;
36
37 saved_env = env;
38 env = env1;
39 ret = asr_read();
40 env = saved_env;
41 return ret;
42}
43
44target_ulong HELPER(asr_read)(void)
45{
46 return asr_read();
47}
48
49static void asr_write(target_ulong val, target_ulong mask)
50{
51 if (mask & ASR_NZCV) {
52 env->ZF = (~val) & ASR_Z;
53 env->NF = val;
54 env->CF = (val >> 29) & 1;
55 env->VF = (val << 3) & 0x80000000;
56 }
57
58 if ((env->uncached_asr ^ val) & mask & ASR_M) {
59 switch_mode(env, val & ASR_M);
60 }
61 mask &= ~ASR_NZCV;
62 env->uncached_asr = (env->uncached_asr & ~mask) | (val & mask);
63}
64
eb23b556 65void cpu_asr_write(CPUUniCore32State *env1, target_ulong val, target_ulong mask)
6e64da3c 66{
eb23b556 67 CPUUniCore32State *saved_env;
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68
69 saved_env = env;
70 env = env1;
71 asr_write(val, mask);
72 env = saved_env;
73}
74
75void HELPER(asr_write)(target_ulong val, target_ulong mask)
76{
77 asr_write(val, mask);
78}
79
80/* Access to user mode registers from privileged modes. */
81uint32_t HELPER(get_user_reg)(uint32_t regno)
82{
83 uint32_t val;
84
85 if (regno == 29) {
86 val = env->banked_r29[0];
87 } else if (regno == 30) {
88 val = env->banked_r30[0];
89 } else {
90 val = env->regs[regno];
91 }
92 return val;
93}
94
95void HELPER(set_user_reg)(uint32_t regno, uint32_t val)
96{
97 if (regno == 29) {
98 env->banked_r29[0] = val;
99 } else if (regno == 30) {
100 env->banked_r30[0] = val;
101 } else {
102 env->regs[regno] = val;
103 }
104}
105
106/* ??? Flag setting arithmetic is awkward because we need to do comparisons.
107 The only way to do that in TCG is a conditional branch, which clobbers
108 all our temporaries. For now implement these as helper functions. */
109
110uint32_t HELPER(add_cc)(uint32_t a, uint32_t b)
111{
112 uint32_t result;
113 result = a + b;
114 env->NF = env->ZF = result;
115 env->CF = result < a;
116 env->VF = (a ^ b ^ -1) & (a ^ result);
117 return result;
118}
119
120uint32_t HELPER(adc_cc)(uint32_t a, uint32_t b)
121{
122 uint32_t result;
123 if (!env->CF) {
124 result = a + b;
125 env->CF = result < a;
126 } else {
127 result = a + b + 1;
128 env->CF = result <= a;
129 }
130 env->VF = (a ^ b ^ -1) & (a ^ result);
131 env->NF = env->ZF = result;
132 return result;
133}
134
135uint32_t HELPER(sub_cc)(uint32_t a, uint32_t b)
136{
137 uint32_t result;
138 result = a - b;
139 env->NF = env->ZF = result;
140 env->CF = a >= b;
141 env->VF = (a ^ b) & (a ^ result);
142 return result;
143}
144
145uint32_t HELPER(sbc_cc)(uint32_t a, uint32_t b)
146{
147 uint32_t result;
148 if (!env->CF) {
149 result = a - b - 1;
150 env->CF = a > b;
151 } else {
152 result = a - b;
153 env->CF = a >= b;
154 }
155 env->VF = (a ^ b) & (a ^ result);
156 env->NF = env->ZF = result;
157 return result;
158}
159
160/* Similarly for variable shift instructions. */
161
162uint32_t HELPER(shl)(uint32_t x, uint32_t i)
163{
164 int shift = i & 0xff;
165 if (shift >= 32) {
166 return 0;
167 }
168 return x << shift;
169}
170
171uint32_t HELPER(shr)(uint32_t x, uint32_t i)
172{
173 int shift = i & 0xff;
174 if (shift >= 32) {
175 return 0;
176 }
177 return (uint32_t)x >> shift;
178}
179
180uint32_t HELPER(sar)(uint32_t x, uint32_t i)
181{
182 int shift = i & 0xff;
183 if (shift >= 32) {
184 shift = 31;
185 }
186 return (int32_t)x >> shift;
187}
188
189uint32_t HELPER(shl_cc)(uint32_t x, uint32_t i)
190{
191 int shift = i & 0xff;
192 if (shift >= 32) {
193 if (shift == 32) {
194 env->CF = x & 1;
195 } else {
196 env->CF = 0;
197 }
198 return 0;
199 } else if (shift != 0) {
200 env->CF = (x >> (32 - shift)) & 1;
201 return x << shift;
202 }
203 return x;
204}
205
206uint32_t HELPER(shr_cc)(uint32_t x, uint32_t i)
207{
208 int shift = i & 0xff;
209 if (shift >= 32) {
210 if (shift == 32) {
211 env->CF = (x >> 31) & 1;
212 } else {
213 env->CF = 0;
214 }
215 return 0;
216 } else if (shift != 0) {
217 env->CF = (x >> (shift - 1)) & 1;
218 return x >> shift;
219 }
220 return x;
221}
222
223uint32_t HELPER(sar_cc)(uint32_t x, uint32_t i)
224{
225 int shift = i & 0xff;
226 if (shift >= 32) {
227 env->CF = (x >> 31) & 1;
228 return (int32_t)x >> 31;
229 } else if (shift != 0) {
230 env->CF = (x >> (shift - 1)) & 1;
231 return (int32_t)x >> shift;
232 }
233 return x;
234}
235
236uint32_t HELPER(ror_cc)(uint32_t x, uint32_t i)
237{
238 int shift1, shift;
239 shift1 = i & 0xff;
240 shift = shift1 & 0x1f;
241 if (shift == 0) {
242 if (shift1 != 0) {
243 env->CF = (x >> 31) & 1;
244 }
245 return x;
246 } else {
247 env->CF = (x >> (shift - 1)) & 1;
248 return ((uint32_t)x >> shift) | (x << (32 - shift));
249 }
250}
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251
252#ifndef CONFIG_USER_ONLY
253#define MMUSUFFIX _mmu
254
255#define SHIFT 0
256#include "softmmu_template.h"
257
258#define SHIFT 1
259#include "softmmu_template.h"
260
261#define SHIFT 2
262#include "softmmu_template.h"
263
264#define SHIFT 3
265#include "softmmu_template.h"
266
267void tlb_fill(CPUUniCore32State *env1, target_ulong addr, int is_write,
268 int mmu_idx, uintptr_t retaddr)
269{
270 cpu_abort(env, "%s not supported yet\n", __func__);
271}
272#endif