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811d4cf4 AZ |
1 | /* |
2 | * Tiny Code Generator for QEMU | |
3 | * | |
4 | * Copyright (c) 2008 Fabrice Bellard | |
5 | * Copyright (c) 2008 Andrzej Zaborowski | |
6 | * | |
7 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
8 | * of this software and associated documentation files (the "Software"), to deal | |
9 | * in the Software without restriction, including without limitation the rights | |
10 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
11 | * copies of the Software, and to permit persons to whom the Software is | |
12 | * furnished to do so, subject to the following conditions: | |
13 | * | |
14 | * The above copyright notice and this permission notice shall be included in | |
15 | * all copies or substantial portions of the Software. | |
16 | * | |
17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
19 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
20 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
21 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
22 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
23 | * THE SOFTWARE. | |
24 | */ | |
25 | #define TCG_TARGET_ARM 1 | |
26 | ||
27 | #define TCG_TARGET_REG_BITS 32 | |
28 | #undef TCG_TARGET_WORDS_BIGENDIAN | |
811d4cf4 AZ |
29 | #undef TCG_TARGET_STACK_GROWSUP |
30 | ||
31 | enum { | |
32 | TCG_REG_R0 = 0, | |
33 | TCG_REG_R1, | |
34 | TCG_REG_R2, | |
35 | TCG_REG_R3, | |
36 | TCG_REG_R4, | |
37 | TCG_REG_R5, | |
38 | TCG_REG_R6, | |
39 | TCG_REG_R7, | |
40 | TCG_REG_R8, | |
41 | TCG_REG_R9, | |
42 | TCG_REG_R10, | |
43 | TCG_REG_R11, | |
44 | TCG_REG_R12, | |
45 | TCG_REG_R13, | |
46 | TCG_REG_R14, | |
e4a7d5e8 | 47 | TCG_REG_PC, |
811d4cf4 AZ |
48 | }; |
49 | ||
e4a7d5e8 | 50 | #define TCG_TARGET_NB_REGS 16 |
2d69f359 | 51 | |
cb4e581f LD |
52 | #define TCG_CT_CONST_ARM 0x100 |
53 | ||
811d4cf4 | 54 | /* used for function call generation */ |
bedba0cd AZ |
55 | #define TCG_REG_CALL_STACK TCG_REG_R13 |
56 | #define TCG_TARGET_STACK_ALIGN 8 | |
2488b41b | 57 | #define TCG_TARGET_CALL_ALIGN_ARGS 1 |
bedba0cd | 58 | #define TCG_TARGET_CALL_STACK_OFFSET 0 |
811d4cf4 | 59 | |
36828256 | 60 | /* optional instructions */ |
d3f137e3 AJ |
61 | #define TCG_TARGET_HAS_ext8s_i32 |
62 | #define TCG_TARGET_HAS_ext16s_i32 | |
36828256 RH |
63 | // #define TCG_TARGET_HAS_ext8u_i32 |
64 | // #define TCG_TARGET_HAS_ext16u_i32 | |
65 | // #define TCG_TARGET_HAS_bswap16_i32 | |
66 | // #define TCG_TARGET_HAS_bswap32_i32 | |
d3f137e3 AJ |
67 | #define TCG_TARGET_HAS_not_i32 |
68 | #define TCG_TARGET_HAS_neg_i32 | |
293579e5 | 69 | #define TCG_TARGET_HAS_rot_i32 |
932234f6 | 70 | #define TCG_TARGET_HAS_andc_i32 |
36828256 | 71 | // #define TCG_TARGET_HAS_orc_i32 |
8d625cf1 | 72 | // #define TCG_TARGET_HAS_eqv_i32 |
9940a96b | 73 | // #define TCG_TARGET_HAS_nand_i32 |
32d98fbd | 74 | // #define TCG_TARGET_HAS_nor_i32 |
36828256 | 75 | |
379f6698 PB |
76 | #define TCG_TARGET_HAS_GUEST_BASE |
77 | ||
811d4cf4 AZ |
78 | enum { |
79 | /* Note: must be synced with dyngen-exec.h */ | |
80 | TCG_AREG0 = TCG_REG_R7, | |
811d4cf4 AZ |
81 | }; |
82 | ||
83 | static inline void flush_icache_range(unsigned long start, unsigned long stop) | |
84 | { | |
3233f0d4 | 85 | #if QEMU_GNUC_PREREQ(4, 1) |
2d69f359 | 86 | __builtin___clear_cache((char *) start, (char *) stop); |
3233f0d4 | 87 | #else |
811d4cf4 AZ |
88 | register unsigned long _beg __asm ("a1") = start; |
89 | register unsigned long _end __asm ("a2") = stop; | |
90 | register unsigned long _flg __asm ("a3") = 0; | |
91 | __asm __volatile__ ("swi 0x9f0002" : : "r" (_beg), "r" (_end), "r" (_flg)); | |
3233f0d4 | 92 | #endif |
811d4cf4 | 93 | } |