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c896fe29 FB |
1 | /* |
2 | * Tiny Code Generator for QEMU | |
3 | * | |
4 | * Copyright (c) 2008 Fabrice Bellard | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
7 | * of this software and associated documentation files (the "Software"), to deal | |
8 | * in the Software without restriction, including without limitation the rights | |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 | * copies of the Software, and to permit persons to whom the Software is | |
11 | * furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
22 | * THE SOFTWARE. | |
23 | */ | |
24 | #include "tcg.h" | |
25 | ||
cf2be984 | 26 | #ifndef CONFIG_NO_DYNGEN_OP |
c896fe29 FB |
27 | /* legacy dyngen operations */ |
28 | #include "gen-op.h" | |
cf2be984 | 29 | #endif |
c896fe29 FB |
30 | |
31 | int gen_new_label(void); | |
32 | ||
ac56dd48 | 33 | static inline void tcg_gen_op1(int opc, TCGv arg1) |
c896fe29 FB |
34 | { |
35 | *gen_opc_ptr++ = opc; | |
ac56dd48 | 36 | *gen_opparam_ptr++ = GET_TCGV(arg1); |
c896fe29 FB |
37 | } |
38 | ||
ac56dd48 | 39 | static inline void tcg_gen_op1i(int opc, TCGArg arg1) |
c896fe29 FB |
40 | { |
41 | *gen_opc_ptr++ = opc; | |
42 | *gen_opparam_ptr++ = arg1; | |
c896fe29 FB |
43 | } |
44 | ||
ac56dd48 | 45 | static inline void tcg_gen_op2(int opc, TCGv arg1, TCGv arg2) |
c896fe29 FB |
46 | { |
47 | *gen_opc_ptr++ = opc; | |
ac56dd48 PB |
48 | *gen_opparam_ptr++ = GET_TCGV(arg1); |
49 | *gen_opparam_ptr++ = GET_TCGV(arg2); | |
c896fe29 FB |
50 | } |
51 | ||
ac56dd48 | 52 | static inline void tcg_gen_op2i(int opc, TCGv arg1, TCGArg arg2) |
c896fe29 FB |
53 | { |
54 | *gen_opc_ptr++ = opc; | |
ac56dd48 | 55 | *gen_opparam_ptr++ = GET_TCGV(arg1); |
c896fe29 | 56 | *gen_opparam_ptr++ = arg2; |
ac56dd48 PB |
57 | } |
58 | ||
59 | static inline void tcg_gen_op3(int opc, TCGv arg1, TCGv arg2, TCGv arg3) | |
60 | { | |
61 | *gen_opc_ptr++ = opc; | |
62 | *gen_opparam_ptr++ = GET_TCGV(arg1); | |
63 | *gen_opparam_ptr++ = GET_TCGV(arg2); | |
64 | *gen_opparam_ptr++ = GET_TCGV(arg3); | |
65 | } | |
66 | ||
67 | static inline void tcg_gen_op3i(int opc, TCGv arg1, TCGv arg2, TCGArg arg3) | |
68 | { | |
69 | *gen_opc_ptr++ = opc; | |
70 | *gen_opparam_ptr++ = GET_TCGV(arg1); | |
71 | *gen_opparam_ptr++ = GET_TCGV(arg2); | |
c896fe29 | 72 | *gen_opparam_ptr++ = arg3; |
ac56dd48 PB |
73 | } |
74 | ||
75 | static inline void tcg_gen_op4(int opc, TCGv arg1, TCGv arg2, TCGv arg3, | |
76 | TCGv arg4) | |
77 | { | |
78 | *gen_opc_ptr++ = opc; | |
79 | *gen_opparam_ptr++ = GET_TCGV(arg1); | |
80 | *gen_opparam_ptr++ = GET_TCGV(arg2); | |
81 | *gen_opparam_ptr++ = GET_TCGV(arg3); | |
82 | *gen_opparam_ptr++ = GET_TCGV(arg4); | |
83 | } | |
84 | ||
85 | static inline void tcg_gen_op4i(int opc, TCGv arg1, TCGv arg2, TCGv arg3, | |
86 | TCGArg arg4) | |
87 | { | |
88 | *gen_opc_ptr++ = opc; | |
89 | *gen_opparam_ptr++ = GET_TCGV(arg1); | |
90 | *gen_opparam_ptr++ = GET_TCGV(arg2); | |
91 | *gen_opparam_ptr++ = GET_TCGV(arg3); | |
c896fe29 FB |
92 | *gen_opparam_ptr++ = arg4; |
93 | } | |
94 | ||
ac56dd48 PB |
95 | static inline void tcg_gen_op4ii(int opc, TCGv arg1, TCGv arg2, TCGArg arg3, |
96 | TCGArg arg4) | |
c896fe29 FB |
97 | { |
98 | *gen_opc_ptr++ = opc; | |
ac56dd48 PB |
99 | *gen_opparam_ptr++ = GET_TCGV(arg1); |
100 | *gen_opparam_ptr++ = GET_TCGV(arg2); | |
c896fe29 FB |
101 | *gen_opparam_ptr++ = arg3; |
102 | *gen_opparam_ptr++ = arg4; | |
ac56dd48 PB |
103 | } |
104 | ||
105 | static inline void tcg_gen_op5(int opc, TCGv arg1, TCGv arg2, | |
106 | TCGv arg3, TCGv arg4, | |
107 | TCGv arg5) | |
108 | { | |
109 | *gen_opc_ptr++ = opc; | |
110 | *gen_opparam_ptr++ = GET_TCGV(arg1); | |
111 | *gen_opparam_ptr++ = GET_TCGV(arg2); | |
112 | *gen_opparam_ptr++ = GET_TCGV(arg3); | |
113 | *gen_opparam_ptr++ = GET_TCGV(arg4); | |
114 | *gen_opparam_ptr++ = GET_TCGV(arg5); | |
115 | } | |
116 | ||
117 | static inline void tcg_gen_op5i(int opc, TCGv arg1, TCGv arg2, | |
118 | TCGv arg3, TCGv arg4, | |
119 | TCGArg arg5) | |
120 | { | |
121 | *gen_opc_ptr++ = opc; | |
122 | *gen_opparam_ptr++ = GET_TCGV(arg1); | |
123 | *gen_opparam_ptr++ = GET_TCGV(arg2); | |
124 | *gen_opparam_ptr++ = GET_TCGV(arg3); | |
125 | *gen_opparam_ptr++ = GET_TCGV(arg4); | |
c896fe29 FB |
126 | *gen_opparam_ptr++ = arg5; |
127 | } | |
128 | ||
ac56dd48 PB |
129 | static inline void tcg_gen_op6(int opc, TCGv arg1, TCGv arg2, |
130 | TCGv arg3, TCGv arg4, | |
131 | TCGv arg5, TCGv arg6) | |
c896fe29 FB |
132 | { |
133 | *gen_opc_ptr++ = opc; | |
ac56dd48 PB |
134 | *gen_opparam_ptr++ = GET_TCGV(arg1); |
135 | *gen_opparam_ptr++ = GET_TCGV(arg2); | |
136 | *gen_opparam_ptr++ = GET_TCGV(arg3); | |
137 | *gen_opparam_ptr++ = GET_TCGV(arg4); | |
138 | *gen_opparam_ptr++ = GET_TCGV(arg5); | |
139 | *gen_opparam_ptr++ = GET_TCGV(arg6); | |
140 | } | |
141 | ||
142 | static inline void tcg_gen_op6ii(int opc, TCGv arg1, TCGv arg2, | |
143 | TCGv arg3, TCGv arg4, | |
144 | TCGArg arg5, TCGArg arg6) | |
145 | { | |
146 | *gen_opc_ptr++ = opc; | |
147 | *gen_opparam_ptr++ = GET_TCGV(arg1); | |
148 | *gen_opparam_ptr++ = GET_TCGV(arg2); | |
149 | *gen_opparam_ptr++ = GET_TCGV(arg3); | |
150 | *gen_opparam_ptr++ = GET_TCGV(arg4); | |
c896fe29 FB |
151 | *gen_opparam_ptr++ = arg5; |
152 | *gen_opparam_ptr++ = arg6; | |
153 | } | |
154 | ||
155 | static inline void gen_set_label(int n) | |
156 | { | |
ac56dd48 | 157 | tcg_gen_op1i(INDEX_op_set_label, n); |
c896fe29 FB |
158 | } |
159 | ||
fb50d413 BS |
160 | static inline void tcg_gen_br(int label) |
161 | { | |
162 | tcg_gen_op1i(INDEX_op_br, label); | |
163 | } | |
164 | ||
ac56dd48 | 165 | static inline void tcg_gen_mov_i32(TCGv ret, TCGv arg) |
c896fe29 FB |
166 | { |
167 | tcg_gen_op2(INDEX_op_mov_i32, ret, arg); | |
168 | } | |
169 | ||
ac56dd48 | 170 | static inline void tcg_gen_movi_i32(TCGv ret, int32_t arg) |
c896fe29 | 171 | { |
ac56dd48 | 172 | tcg_gen_op2i(INDEX_op_movi_i32, ret, arg); |
c896fe29 FB |
173 | } |
174 | ||
175 | /* helper calls */ | |
176 | #define TCG_HELPER_CALL_FLAGS 0 | |
177 | ||
178 | static inline void tcg_gen_helper_0_0(void *func) | |
179 | { | |
180 | tcg_gen_call(&tcg_ctx, | |
181 | tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, | |
182 | 0, NULL, 0, NULL); | |
183 | } | |
184 | ||
ac56dd48 | 185 | static inline void tcg_gen_helper_0_1(void *func, TCGv arg) |
c896fe29 FB |
186 | { |
187 | tcg_gen_call(&tcg_ctx, | |
188 | tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, | |
189 | 0, NULL, 1, &arg); | |
190 | } | |
191 | ||
ac56dd48 | 192 | static inline void tcg_gen_helper_0_2(void *func, TCGv arg1, TCGv arg2) |
c896fe29 | 193 | { |
ac56dd48 | 194 | TCGv args[2]; |
c896fe29 FB |
195 | args[0] = arg1; |
196 | args[1] = arg2; | |
197 | tcg_gen_call(&tcg_ctx, | |
198 | tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, | |
199 | 0, NULL, 2, args); | |
200 | } | |
201 | ||
f8422f52 BS |
202 | static inline void tcg_gen_helper_0_4(void *func, TCGv arg1, TCGv arg2, |
203 | TCGv arg3, TCGv arg4) | |
204 | { | |
205 | TCGv args[4]; | |
206 | args[0] = arg1; | |
207 | args[1] = arg2; | |
208 | args[2] = arg3; | |
209 | args[3] = arg4; | |
210 | tcg_gen_call(&tcg_ctx, | |
211 | tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, | |
212 | 0, NULL, 4, args); | |
213 | } | |
214 | ||
215 | static inline void tcg_gen_helper_1_0(void *func, TCGv ret) | |
216 | { | |
217 | tcg_gen_call(&tcg_ctx, | |
218 | tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, | |
219 | 1, &ret, 0, NULL); | |
220 | } | |
221 | ||
222 | static inline void tcg_gen_helper_1_1(void *func, TCGv ret, TCGv arg1) | |
223 | { | |
224 | tcg_gen_call(&tcg_ctx, | |
225 | tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, | |
226 | 1, &ret, 1, &arg1); | |
227 | } | |
228 | ||
ac56dd48 PB |
229 | static inline void tcg_gen_helper_1_2(void *func, TCGv ret, |
230 | TCGv arg1, TCGv arg2) | |
c896fe29 | 231 | { |
ac56dd48 | 232 | TCGv args[2]; |
c896fe29 FB |
233 | args[0] = arg1; |
234 | args[1] = arg2; | |
235 | tcg_gen_call(&tcg_ctx, | |
236 | tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, | |
237 | 1, &ret, 2, args); | |
238 | } | |
239 | ||
f8422f52 BS |
240 | static inline void tcg_gen_helper_1_4(void *func, TCGv ret, |
241 | TCGv arg1, TCGv arg2, TCGv arg3, | |
242 | TCGv arg4) | |
243 | { | |
244 | TCGv args[4]; | |
245 | args[0] = arg1; | |
246 | args[1] = arg2; | |
247 | args[2] = arg3; | |
248 | args[3] = arg4; | |
249 | tcg_gen_call(&tcg_ctx, | |
250 | tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, | |
251 | 1, &ret, 4, args); | |
252 | } | |
253 | ||
c896fe29 FB |
254 | /* 32 bit ops */ |
255 | ||
ac56dd48 | 256 | static inline void tcg_gen_ld8u_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 | 257 | { |
ac56dd48 | 258 | tcg_gen_op3i(INDEX_op_ld8u_i32, ret, arg2, offset); |
c896fe29 FB |
259 | } |
260 | ||
ac56dd48 | 261 | static inline void tcg_gen_ld8s_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 | 262 | { |
ac56dd48 | 263 | tcg_gen_op3i(INDEX_op_ld8s_i32, ret, arg2, offset); |
c896fe29 FB |
264 | } |
265 | ||
ac56dd48 | 266 | static inline void tcg_gen_ld16u_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 | 267 | { |
ac56dd48 | 268 | tcg_gen_op3i(INDEX_op_ld16u_i32, ret, arg2, offset); |
c896fe29 FB |
269 | } |
270 | ||
ac56dd48 | 271 | static inline void tcg_gen_ld16s_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 | 272 | { |
ac56dd48 | 273 | tcg_gen_op3i(INDEX_op_ld16s_i32, ret, arg2, offset); |
c896fe29 FB |
274 | } |
275 | ||
ac56dd48 | 276 | static inline void tcg_gen_ld_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 | 277 | { |
ac56dd48 | 278 | tcg_gen_op3i(INDEX_op_ld_i32, ret, arg2, offset); |
c896fe29 FB |
279 | } |
280 | ||
ac56dd48 | 281 | static inline void tcg_gen_st8_i32(TCGv arg1, TCGv arg2, tcg_target_long offset) |
c896fe29 | 282 | { |
ac56dd48 | 283 | tcg_gen_op3i(INDEX_op_st8_i32, arg1, arg2, offset); |
c896fe29 FB |
284 | } |
285 | ||
ac56dd48 | 286 | static inline void tcg_gen_st16_i32(TCGv arg1, TCGv arg2, tcg_target_long offset) |
c896fe29 | 287 | { |
ac56dd48 | 288 | tcg_gen_op3i(INDEX_op_st16_i32, arg1, arg2, offset); |
c896fe29 FB |
289 | } |
290 | ||
ac56dd48 | 291 | static inline void tcg_gen_st_i32(TCGv arg1, TCGv arg2, tcg_target_long offset) |
c896fe29 | 292 | { |
ac56dd48 | 293 | tcg_gen_op3i(INDEX_op_st_i32, arg1, arg2, offset); |
c896fe29 FB |
294 | } |
295 | ||
ac56dd48 | 296 | static inline void tcg_gen_add_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
297 | { |
298 | tcg_gen_op3(INDEX_op_add_i32, ret, arg1, arg2); | |
299 | } | |
300 | ||
ac56dd48 | 301 | static inline void tcg_gen_addi_i32(TCGv ret, TCGv arg1, int32_t arg2) |
c896fe29 | 302 | { |
7089442c BS |
303 | /* some cases can be optimized here */ |
304 | if (arg2 == 0) { | |
305 | tcg_gen_mov_i32(ret, arg1); | |
306 | } else { | |
307 | tcg_gen_add_i32(ret, arg1, tcg_const_i32(arg2)); | |
308 | } | |
c896fe29 FB |
309 | } |
310 | ||
ac56dd48 | 311 | static inline void tcg_gen_sub_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
312 | { |
313 | tcg_gen_op3(INDEX_op_sub_i32, ret, arg1, arg2); | |
314 | } | |
315 | ||
ac56dd48 | 316 | static inline void tcg_gen_subi_i32(TCGv ret, TCGv arg1, int32_t arg2) |
c896fe29 | 317 | { |
7089442c BS |
318 | /* some cases can be optimized here */ |
319 | if (arg2 == 0) { | |
320 | tcg_gen_mov_i32(ret, arg1); | |
321 | } else { | |
322 | tcg_gen_sub_i32(ret, arg1, tcg_const_i32(arg2)); | |
323 | } | |
c896fe29 FB |
324 | } |
325 | ||
ac56dd48 | 326 | static inline void tcg_gen_and_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
327 | { |
328 | tcg_gen_op3(INDEX_op_and_i32, ret, arg1, arg2); | |
329 | } | |
330 | ||
ac56dd48 | 331 | static inline void tcg_gen_andi_i32(TCGv ret, TCGv arg1, int32_t arg2) |
c896fe29 FB |
332 | { |
333 | /* some cases can be optimized here */ | |
334 | if (arg2 == 0) { | |
335 | tcg_gen_movi_i32(ret, 0); | |
336 | } else if (arg2 == 0xffffffff) { | |
337 | tcg_gen_mov_i32(ret, arg1); | |
338 | } else { | |
339 | tcg_gen_and_i32(ret, arg1, tcg_const_i32(arg2)); | |
340 | } | |
341 | } | |
342 | ||
ac56dd48 | 343 | static inline void tcg_gen_or_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
344 | { |
345 | tcg_gen_op3(INDEX_op_or_i32, ret, arg1, arg2); | |
346 | } | |
347 | ||
ac56dd48 | 348 | static inline void tcg_gen_ori_i32(TCGv ret, TCGv arg1, int32_t arg2) |
c896fe29 FB |
349 | { |
350 | /* some cases can be optimized here */ | |
351 | if (arg2 == 0xffffffff) { | |
7089442c | 352 | tcg_gen_movi_i32(ret, 0xffffffff); |
c896fe29 FB |
353 | } else if (arg2 == 0) { |
354 | tcg_gen_mov_i32(ret, arg1); | |
355 | } else { | |
356 | tcg_gen_or_i32(ret, arg1, tcg_const_i32(arg2)); | |
357 | } | |
358 | } | |
359 | ||
ac56dd48 | 360 | static inline void tcg_gen_xor_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
361 | { |
362 | tcg_gen_op3(INDEX_op_xor_i32, ret, arg1, arg2); | |
363 | } | |
364 | ||
ac56dd48 | 365 | static inline void tcg_gen_xori_i32(TCGv ret, TCGv arg1, int32_t arg2) |
c896fe29 FB |
366 | { |
367 | /* some cases can be optimized here */ | |
368 | if (arg2 == 0) { | |
369 | tcg_gen_mov_i32(ret, arg1); | |
370 | } else { | |
371 | tcg_gen_xor_i32(ret, arg1, tcg_const_i32(arg2)); | |
372 | } | |
373 | } | |
374 | ||
ac56dd48 | 375 | static inline void tcg_gen_shl_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
376 | { |
377 | tcg_gen_op3(INDEX_op_shl_i32, ret, arg1, arg2); | |
378 | } | |
379 | ||
ac56dd48 | 380 | static inline void tcg_gen_shli_i32(TCGv ret, TCGv arg1, int32_t arg2) |
c896fe29 FB |
381 | { |
382 | tcg_gen_shl_i32(ret, arg1, tcg_const_i32(arg2)); | |
383 | } | |
384 | ||
ac56dd48 | 385 | static inline void tcg_gen_shr_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
386 | { |
387 | tcg_gen_op3(INDEX_op_shr_i32, ret, arg1, arg2); | |
388 | } | |
389 | ||
ac56dd48 | 390 | static inline void tcg_gen_shri_i32(TCGv ret, TCGv arg1, int32_t arg2) |
c896fe29 FB |
391 | { |
392 | tcg_gen_shr_i32(ret, arg1, tcg_const_i32(arg2)); | |
393 | } | |
394 | ||
ac56dd48 | 395 | static inline void tcg_gen_sar_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
396 | { |
397 | tcg_gen_op3(INDEX_op_sar_i32, ret, arg1, arg2); | |
398 | } | |
399 | ||
ac56dd48 | 400 | static inline void tcg_gen_sari_i32(TCGv ret, TCGv arg1, int32_t arg2) |
c896fe29 FB |
401 | { |
402 | tcg_gen_sar_i32(ret, arg1, tcg_const_i32(arg2)); | |
403 | } | |
404 | ||
ac56dd48 | 405 | static inline void tcg_gen_brcond_i32(int cond, TCGv arg1, TCGv arg2, |
c896fe29 FB |
406 | int label_index) |
407 | { | |
ac56dd48 | 408 | tcg_gen_op4ii(INDEX_op_brcond_i32, arg1, arg2, cond, label_index); |
c896fe29 FB |
409 | } |
410 | ||
ac56dd48 | 411 | static inline void tcg_gen_mul_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
412 | { |
413 | tcg_gen_op3(INDEX_op_mul_i32, ret, arg1, arg2); | |
414 | } | |
415 | ||
416 | #ifdef TCG_TARGET_HAS_div_i32 | |
ac56dd48 | 417 | static inline void tcg_gen_div_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
418 | { |
419 | tcg_gen_op3(INDEX_op_div_i32, ret, arg1, arg2); | |
420 | } | |
421 | ||
ac56dd48 | 422 | static inline void tcg_gen_rem_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
423 | { |
424 | tcg_gen_op3(INDEX_op_rem_i32, ret, arg1, arg2); | |
425 | } | |
426 | ||
ac56dd48 | 427 | static inline void tcg_gen_divu_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
428 | { |
429 | tcg_gen_op3(INDEX_op_divu_i32, ret, arg1, arg2); | |
430 | } | |
431 | ||
ac56dd48 | 432 | static inline void tcg_gen_remu_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
433 | { |
434 | tcg_gen_op3(INDEX_op_remu_i32, ret, arg1, arg2); | |
435 | } | |
436 | #else | |
ac56dd48 | 437 | static inline void tcg_gen_div_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 | 438 | { |
ac56dd48 | 439 | TCGv t0; |
c896fe29 FB |
440 | t0 = tcg_temp_new(TCG_TYPE_I32); |
441 | tcg_gen_sari_i32(t0, arg1, 31); | |
442 | tcg_gen_op5(INDEX_op_div2_i32, ret, t0, arg1, t0, arg2); | |
443 | } | |
444 | ||
ac56dd48 | 445 | static inline void tcg_gen_rem_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 | 446 | { |
ac56dd48 | 447 | TCGv t0; |
c896fe29 FB |
448 | t0 = tcg_temp_new(TCG_TYPE_I32); |
449 | tcg_gen_sari_i32(t0, arg1, 31); | |
450 | tcg_gen_op5(INDEX_op_div2_i32, t0, ret, arg1, t0, arg2); | |
451 | } | |
452 | ||
ac56dd48 | 453 | static inline void tcg_gen_divu_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 | 454 | { |
ac56dd48 | 455 | TCGv t0; |
c896fe29 FB |
456 | t0 = tcg_temp_new(TCG_TYPE_I32); |
457 | tcg_gen_movi_i32(t0, 0); | |
458 | tcg_gen_op5(INDEX_op_divu2_i32, ret, t0, arg1, t0, arg2); | |
459 | } | |
460 | ||
ac56dd48 | 461 | static inline void tcg_gen_remu_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 | 462 | { |
ac56dd48 | 463 | TCGv t0; |
c896fe29 FB |
464 | t0 = tcg_temp_new(TCG_TYPE_I32); |
465 | tcg_gen_movi_i32(t0, 0); | |
466 | tcg_gen_op5(INDEX_op_divu2_i32, t0, ret, arg1, t0, arg2); | |
467 | } | |
468 | #endif | |
469 | ||
470 | #if TCG_TARGET_REG_BITS == 32 | |
471 | ||
ac56dd48 | 472 | static inline void tcg_gen_mov_i64(TCGv ret, TCGv arg) |
c896fe29 FB |
473 | { |
474 | tcg_gen_mov_i32(ret, arg); | |
ac56dd48 | 475 | tcg_gen_mov_i32(TCGV_HIGH(ret), TCGV_HIGH(arg)); |
c896fe29 FB |
476 | } |
477 | ||
ac56dd48 | 478 | static inline void tcg_gen_movi_i64(TCGv ret, int64_t arg) |
c896fe29 FB |
479 | { |
480 | tcg_gen_movi_i32(ret, arg); | |
ac56dd48 | 481 | tcg_gen_movi_i32(TCGV_HIGH(ret), arg >> 32); |
c896fe29 FB |
482 | } |
483 | ||
ac56dd48 | 484 | static inline void tcg_gen_ld8u_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 FB |
485 | { |
486 | tcg_gen_ld8u_i32(ret, arg2, offset); | |
ac56dd48 | 487 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); |
c896fe29 FB |
488 | } |
489 | ||
ac56dd48 | 490 | static inline void tcg_gen_ld8s_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 FB |
491 | { |
492 | tcg_gen_ld8s_i32(ret, arg2, offset); | |
ac56dd48 | 493 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
c896fe29 FB |
494 | } |
495 | ||
ac56dd48 | 496 | static inline void tcg_gen_ld16u_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 FB |
497 | { |
498 | tcg_gen_ld16u_i32(ret, arg2, offset); | |
ac56dd48 | 499 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); |
c896fe29 FB |
500 | } |
501 | ||
ac56dd48 | 502 | static inline void tcg_gen_ld16s_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 FB |
503 | { |
504 | tcg_gen_ld16s_i32(ret, arg2, offset); | |
ac56dd48 | 505 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
c896fe29 FB |
506 | } |
507 | ||
ac56dd48 | 508 | static inline void tcg_gen_ld32u_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 FB |
509 | { |
510 | tcg_gen_ld_i32(ret, arg2, offset); | |
ac56dd48 | 511 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); |
c896fe29 FB |
512 | } |
513 | ||
ac56dd48 | 514 | static inline void tcg_gen_ld32s_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 FB |
515 | { |
516 | tcg_gen_ld_i32(ret, arg2, offset); | |
ac56dd48 | 517 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
c896fe29 FB |
518 | } |
519 | ||
ac56dd48 | 520 | static inline void tcg_gen_ld_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 FB |
521 | { |
522 | /* since arg2 and ret have different types, they cannot be the | |
523 | same temporary */ | |
524 | #ifdef TCG_TARGET_WORDS_BIGENDIAN | |
ac56dd48 | 525 | tcg_gen_ld_i32(TCGV_HIGH(ret), arg2, offset); |
c896fe29 FB |
526 | tcg_gen_ld_i32(ret, arg2, offset + 4); |
527 | #else | |
528 | tcg_gen_ld_i32(ret, arg2, offset); | |
ac56dd48 | 529 | tcg_gen_ld_i32(TCGV_HIGH(ret), arg2, offset + 4); |
c896fe29 FB |
530 | #endif |
531 | } | |
532 | ||
ac56dd48 | 533 | static inline void tcg_gen_st8_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
c896fe29 FB |
534 | { |
535 | tcg_gen_st8_i32(arg1, arg2, offset); | |
536 | } | |
537 | ||
ac56dd48 | 538 | static inline void tcg_gen_st16_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
c896fe29 FB |
539 | { |
540 | tcg_gen_st16_i32(arg1, arg2, offset); | |
541 | } | |
542 | ||
ac56dd48 | 543 | static inline void tcg_gen_st32_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
c896fe29 FB |
544 | { |
545 | tcg_gen_st_i32(arg1, arg2, offset); | |
546 | } | |
547 | ||
ac56dd48 | 548 | static inline void tcg_gen_st_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
c896fe29 FB |
549 | { |
550 | #ifdef TCG_TARGET_WORDS_BIGENDIAN | |
ac56dd48 | 551 | tcg_gen_st_i32(TCGV_HIGH(arg1), arg2, offset); |
c896fe29 FB |
552 | tcg_gen_st_i32(arg1, arg2, offset + 4); |
553 | #else | |
554 | tcg_gen_st_i32(arg1, arg2, offset); | |
ac56dd48 | 555 | tcg_gen_st_i32(TCGV_HIGH(arg1), arg2, offset + 4); |
c896fe29 FB |
556 | #endif |
557 | } | |
558 | ||
ac56dd48 | 559 | static inline void tcg_gen_add_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 | 560 | { |
ac56dd48 PB |
561 | tcg_gen_op6(INDEX_op_add2_i32, ret, TCGV_HIGH(ret), |
562 | arg1, TCGV_HIGH(arg1), arg2, TCGV_HIGH(arg2)); | |
c896fe29 FB |
563 | } |
564 | ||
ac56dd48 | 565 | static inline void tcg_gen_addi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 FB |
566 | { |
567 | tcg_gen_add_i64(ret, arg1, tcg_const_i64(arg2)); | |
568 | } | |
569 | ||
ac56dd48 | 570 | static inline void tcg_gen_sub_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 | 571 | { |
ac56dd48 PB |
572 | tcg_gen_op6(INDEX_op_sub2_i32, ret, TCGV_HIGH(ret), |
573 | arg1, TCGV_HIGH(arg1), arg2, TCGV_HIGH(arg2)); | |
c896fe29 FB |
574 | } |
575 | ||
ac56dd48 | 576 | static inline void tcg_gen_subi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 FB |
577 | { |
578 | tcg_gen_sub_i64(ret, arg1, tcg_const_i64(arg2)); | |
579 | } | |
580 | ||
ac56dd48 | 581 | static inline void tcg_gen_and_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
582 | { |
583 | tcg_gen_and_i32(ret, arg1, arg2); | |
ac56dd48 | 584 | tcg_gen_and_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2)); |
c896fe29 FB |
585 | } |
586 | ||
ac56dd48 | 587 | static inline void tcg_gen_andi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 FB |
588 | { |
589 | tcg_gen_andi_i32(ret, arg1, arg2); | |
ac56dd48 | 590 | tcg_gen_andi_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32); |
c896fe29 FB |
591 | } |
592 | ||
ac56dd48 | 593 | static inline void tcg_gen_or_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
594 | { |
595 | tcg_gen_or_i32(ret, arg1, arg2); | |
ac56dd48 | 596 | tcg_gen_or_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2)); |
c896fe29 FB |
597 | } |
598 | ||
ac56dd48 | 599 | static inline void tcg_gen_ori_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 FB |
600 | { |
601 | tcg_gen_ori_i32(ret, arg1, arg2); | |
ac56dd48 | 602 | tcg_gen_ori_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32); |
c896fe29 FB |
603 | } |
604 | ||
ac56dd48 | 605 | static inline void tcg_gen_xor_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
606 | { |
607 | tcg_gen_xor_i32(ret, arg1, arg2); | |
ac56dd48 | 608 | tcg_gen_xor_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2)); |
c896fe29 FB |
609 | } |
610 | ||
ac56dd48 | 611 | static inline void tcg_gen_xori_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 FB |
612 | { |
613 | tcg_gen_xori_i32(ret, arg1, arg2); | |
ac56dd48 | 614 | tcg_gen_xori_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32); |
c896fe29 FB |
615 | } |
616 | ||
617 | /* XXX: use generic code when basic block handling is OK or CPU | |
618 | specific code (x86) */ | |
ac56dd48 | 619 | static inline void tcg_gen_shl_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
620 | { |
621 | tcg_gen_helper_1_2(tcg_helper_shl_i64, ret, arg1, arg2); | |
622 | } | |
623 | ||
ac56dd48 | 624 | static inline void tcg_gen_shli_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 FB |
625 | { |
626 | tcg_gen_shifti_i64(ret, arg1, arg2, 0, 0); | |
627 | } | |
628 | ||
ac56dd48 | 629 | static inline void tcg_gen_shr_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
630 | { |
631 | tcg_gen_helper_1_2(tcg_helper_shr_i64, ret, arg1, arg2); | |
632 | } | |
633 | ||
ac56dd48 | 634 | static inline void tcg_gen_shri_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 FB |
635 | { |
636 | tcg_gen_shifti_i64(ret, arg1, arg2, 1, 0); | |
637 | } | |
638 | ||
ac56dd48 | 639 | static inline void tcg_gen_sar_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
640 | { |
641 | tcg_gen_helper_1_2(tcg_helper_sar_i64, ret, arg1, arg2); | |
642 | } | |
643 | ||
ac56dd48 | 644 | static inline void tcg_gen_sari_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 FB |
645 | { |
646 | tcg_gen_shifti_i64(ret, arg1, arg2, 1, 1); | |
647 | } | |
648 | ||
ac56dd48 | 649 | static inline void tcg_gen_brcond_i64(int cond, TCGv arg1, TCGv arg2, |
c896fe29 FB |
650 | int label_index) |
651 | { | |
ac56dd48 PB |
652 | tcg_gen_op6ii(INDEX_op_brcond2_i32, |
653 | arg1, TCGV_HIGH(arg1), arg2, TCGV_HIGH(arg2), | |
654 | cond, label_index); | |
c896fe29 FB |
655 | } |
656 | ||
ac56dd48 | 657 | static inline void tcg_gen_mul_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 | 658 | { |
ac56dd48 | 659 | TCGv t0, t1; |
c896fe29 FB |
660 | |
661 | t0 = tcg_temp_new(TCG_TYPE_I64); | |
662 | t1 = tcg_temp_new(TCG_TYPE_I32); | |
663 | ||
ac56dd48 | 664 | tcg_gen_op4(INDEX_op_mulu2_i32, t0, TCGV_HIGH(t0), arg1, arg2); |
c896fe29 | 665 | |
ac56dd48 PB |
666 | tcg_gen_mul_i32(t1, arg1, TCGV_HIGH(arg2)); |
667 | tcg_gen_add_i32(TCGV_HIGH(t0), TCGV_HIGH(t0), t1); | |
668 | tcg_gen_mul_i32(t1, TCGV_HIGH(arg1), arg2); | |
669 | tcg_gen_add_i32(TCGV_HIGH(t0), TCGV_HIGH(t0), t1); | |
c896fe29 FB |
670 | |
671 | tcg_gen_mov_i64(ret, t0); | |
672 | } | |
673 | ||
ac56dd48 | 674 | static inline void tcg_gen_div_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
675 | { |
676 | tcg_gen_helper_1_2(tcg_helper_div_i64, ret, arg1, arg2); | |
677 | } | |
678 | ||
ac56dd48 | 679 | static inline void tcg_gen_rem_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
680 | { |
681 | tcg_gen_helper_1_2(tcg_helper_rem_i64, ret, arg1, arg2); | |
682 | } | |
683 | ||
ac56dd48 | 684 | static inline void tcg_gen_divu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
685 | { |
686 | tcg_gen_helper_1_2(tcg_helper_divu_i64, ret, arg1, arg2); | |
687 | } | |
688 | ||
ac56dd48 | 689 | static inline void tcg_gen_remu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
690 | { |
691 | tcg_gen_helper_1_2(tcg_helper_remu_i64, ret, arg1, arg2); | |
692 | } | |
693 | ||
694 | #else | |
695 | ||
ac56dd48 | 696 | static inline void tcg_gen_mov_i64(TCGv ret, TCGv arg) |
c896fe29 FB |
697 | { |
698 | tcg_gen_op2(INDEX_op_mov_i64, ret, arg); | |
699 | } | |
700 | ||
ac56dd48 | 701 | static inline void tcg_gen_movi_i64(TCGv ret, int64_t arg) |
c896fe29 | 702 | { |
ac56dd48 | 703 | tcg_gen_op2i(INDEX_op_movi_i64, ret, arg); |
c896fe29 FB |
704 | } |
705 | ||
ac56dd48 PB |
706 | static inline void tcg_gen_ld8u_i64(TCGv ret, TCGv arg2, |
707 | tcg_target_long offset) | |
c896fe29 | 708 | { |
ac56dd48 | 709 | tcg_gen_op3i(INDEX_op_ld8u_i64, ret, arg2, offset); |
c896fe29 FB |
710 | } |
711 | ||
ac56dd48 PB |
712 | static inline void tcg_gen_ld8s_i64(TCGv ret, TCGv arg2, |
713 | tcg_target_long offset) | |
c896fe29 | 714 | { |
ac56dd48 | 715 | tcg_gen_op3i(INDEX_op_ld8s_i64, ret, arg2, offset); |
c896fe29 FB |
716 | } |
717 | ||
ac56dd48 PB |
718 | static inline void tcg_gen_ld16u_i64(TCGv ret, TCGv arg2, |
719 | tcg_target_long offset) | |
c896fe29 | 720 | { |
ac56dd48 | 721 | tcg_gen_op3i(INDEX_op_ld16u_i64, ret, arg2, offset); |
c896fe29 FB |
722 | } |
723 | ||
ac56dd48 PB |
724 | static inline void tcg_gen_ld16s_i64(TCGv ret, TCGv arg2, |
725 | tcg_target_long offset) | |
c896fe29 | 726 | { |
ac56dd48 | 727 | tcg_gen_op3i(INDEX_op_ld16s_i64, ret, arg2, offset); |
c896fe29 FB |
728 | } |
729 | ||
ac56dd48 PB |
730 | static inline void tcg_gen_ld32u_i64(TCGv ret, TCGv arg2, |
731 | tcg_target_long offset) | |
c896fe29 | 732 | { |
ac56dd48 | 733 | tcg_gen_op3i(INDEX_op_ld32u_i64, ret, arg2, offset); |
c896fe29 FB |
734 | } |
735 | ||
ac56dd48 PB |
736 | static inline void tcg_gen_ld32s_i64(TCGv ret, TCGv arg2, |
737 | tcg_target_long offset) | |
c896fe29 | 738 | { |
ac56dd48 | 739 | tcg_gen_op3i(INDEX_op_ld32s_i64, ret, arg2, offset); |
c896fe29 FB |
740 | } |
741 | ||
ac56dd48 | 742 | static inline void tcg_gen_ld_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 | 743 | { |
ac56dd48 | 744 | tcg_gen_op3i(INDEX_op_ld_i64, ret, arg2, offset); |
c896fe29 FB |
745 | } |
746 | ||
ac56dd48 PB |
747 | static inline void tcg_gen_st8_i64(TCGv arg1, TCGv arg2, |
748 | tcg_target_long offset) | |
c896fe29 | 749 | { |
ac56dd48 | 750 | tcg_gen_op3i(INDEX_op_st8_i64, arg1, arg2, offset); |
c896fe29 FB |
751 | } |
752 | ||
ac56dd48 PB |
753 | static inline void tcg_gen_st16_i64(TCGv arg1, TCGv arg2, |
754 | tcg_target_long offset) | |
c896fe29 | 755 | { |
ac56dd48 | 756 | tcg_gen_op3i(INDEX_op_st16_i64, arg1, arg2, offset); |
c896fe29 FB |
757 | } |
758 | ||
ac56dd48 PB |
759 | static inline void tcg_gen_st32_i64(TCGv arg1, TCGv arg2, |
760 | tcg_target_long offset) | |
c896fe29 | 761 | { |
ac56dd48 | 762 | tcg_gen_op3i(INDEX_op_st32_i64, arg1, arg2, offset); |
c896fe29 FB |
763 | } |
764 | ||
ac56dd48 | 765 | static inline void tcg_gen_st_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
c896fe29 | 766 | { |
ac56dd48 | 767 | tcg_gen_op3i(INDEX_op_st_i64, arg1, arg2, offset); |
c896fe29 FB |
768 | } |
769 | ||
ac56dd48 | 770 | static inline void tcg_gen_add_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
771 | { |
772 | tcg_gen_op3(INDEX_op_add_i64, ret, arg1, arg2); | |
773 | } | |
774 | ||
ac56dd48 | 775 | static inline void tcg_gen_addi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 FB |
776 | { |
777 | tcg_gen_add_i64(ret, arg1, tcg_const_i64(arg2)); | |
778 | } | |
779 | ||
ac56dd48 | 780 | static inline void tcg_gen_sub_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
781 | { |
782 | tcg_gen_op3(INDEX_op_sub_i64, ret, arg1, arg2); | |
783 | } | |
784 | ||
ac56dd48 | 785 | static inline void tcg_gen_subi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 FB |
786 | { |
787 | tcg_gen_sub_i64(ret, arg1, tcg_const_i64(arg2)); | |
788 | } | |
789 | ||
ac56dd48 | 790 | static inline void tcg_gen_and_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
791 | { |
792 | tcg_gen_op3(INDEX_op_and_i64, ret, arg1, arg2); | |
793 | } | |
794 | ||
ac56dd48 | 795 | static inline void tcg_gen_andi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 FB |
796 | { |
797 | tcg_gen_and_i64(ret, arg1, tcg_const_i64(arg2)); | |
798 | } | |
799 | ||
ac56dd48 | 800 | static inline void tcg_gen_or_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
801 | { |
802 | tcg_gen_op3(INDEX_op_or_i64, ret, arg1, arg2); | |
803 | } | |
804 | ||
ac56dd48 | 805 | static inline void tcg_gen_ori_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 FB |
806 | { |
807 | tcg_gen_or_i64(ret, arg1, tcg_const_i64(arg2)); | |
808 | } | |
809 | ||
ac56dd48 | 810 | static inline void tcg_gen_xor_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
811 | { |
812 | tcg_gen_op3(INDEX_op_xor_i64, ret, arg1, arg2); | |
813 | } | |
814 | ||
ac56dd48 | 815 | static inline void tcg_gen_xori_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 FB |
816 | { |
817 | tcg_gen_xor_i64(ret, arg1, tcg_const_i64(arg2)); | |
818 | } | |
819 | ||
ac56dd48 | 820 | static inline void tcg_gen_shl_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
821 | { |
822 | tcg_gen_op3(INDEX_op_shl_i64, ret, arg1, arg2); | |
823 | } | |
824 | ||
ac56dd48 | 825 | static inline void tcg_gen_shli_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 FB |
826 | { |
827 | tcg_gen_shl_i64(ret, arg1, tcg_const_i64(arg2)); | |
828 | } | |
829 | ||
ac56dd48 | 830 | static inline void tcg_gen_shr_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
831 | { |
832 | tcg_gen_op3(INDEX_op_shr_i64, ret, arg1, arg2); | |
833 | } | |
834 | ||
ac56dd48 | 835 | static inline void tcg_gen_shri_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 FB |
836 | { |
837 | tcg_gen_shr_i64(ret, arg1, tcg_const_i64(arg2)); | |
838 | } | |
839 | ||
ac56dd48 | 840 | static inline void tcg_gen_sar_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
841 | { |
842 | tcg_gen_op3(INDEX_op_sar_i64, ret, arg1, arg2); | |
843 | } | |
844 | ||
ac56dd48 | 845 | static inline void tcg_gen_sari_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 FB |
846 | { |
847 | tcg_gen_sar_i64(ret, arg1, tcg_const_i64(arg2)); | |
848 | } | |
849 | ||
ac56dd48 | 850 | static inline void tcg_gen_brcond_i64(int cond, TCGv arg1, TCGv arg2, |
c896fe29 FB |
851 | int label_index) |
852 | { | |
ac56dd48 | 853 | tcg_gen_op4ii(INDEX_op_brcond_i64, arg1, arg2, cond, label_index); |
c896fe29 FB |
854 | } |
855 | ||
ac56dd48 | 856 | static inline void tcg_gen_mul_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
857 | { |
858 | tcg_gen_op3(INDEX_op_mul_i64, ret, arg1, arg2); | |
859 | } | |
860 | ||
861 | #ifdef TCG_TARGET_HAS_div_i64 | |
ac56dd48 | 862 | static inline void tcg_gen_div_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
863 | { |
864 | tcg_gen_op3(INDEX_op_div_i64, ret, arg1, arg2); | |
865 | } | |
866 | ||
ac56dd48 | 867 | static inline void tcg_gen_rem_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
868 | { |
869 | tcg_gen_op3(INDEX_op_rem_i64, ret, arg1, arg2); | |
870 | } | |
871 | ||
ac56dd48 | 872 | static inline void tcg_gen_divu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
873 | { |
874 | tcg_gen_op3(INDEX_op_divu_i64, ret, arg1, arg2); | |
875 | } | |
876 | ||
ac56dd48 | 877 | static inline void tcg_gen_remu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
878 | { |
879 | tcg_gen_op3(INDEX_op_remu_i64, ret, arg1, arg2); | |
880 | } | |
881 | #else | |
ac56dd48 | 882 | static inline void tcg_gen_div_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 | 883 | { |
ac56dd48 | 884 | TCGv t0; |
c896fe29 FB |
885 | t0 = tcg_temp_new(TCG_TYPE_I64); |
886 | tcg_gen_sari_i64(t0, arg1, 63); | |
887 | tcg_gen_op5(INDEX_op_div2_i64, ret, t0, arg1, t0, arg2); | |
888 | } | |
889 | ||
ac56dd48 | 890 | static inline void tcg_gen_rem_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 | 891 | { |
ac56dd48 | 892 | TCGv t0; |
c896fe29 FB |
893 | t0 = tcg_temp_new(TCG_TYPE_I64); |
894 | tcg_gen_sari_i64(t0, arg1, 63); | |
895 | tcg_gen_op5(INDEX_op_div2_i64, t0, ret, arg1, t0, arg2); | |
896 | } | |
897 | ||
ac56dd48 | 898 | static inline void tcg_gen_divu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 | 899 | { |
ac56dd48 | 900 | TCGv t0; |
c896fe29 FB |
901 | t0 = tcg_temp_new(TCG_TYPE_I64); |
902 | tcg_gen_movi_i64(t0, 0); | |
903 | tcg_gen_op5(INDEX_op_divu2_i64, ret, t0, arg1, t0, arg2); | |
904 | } | |
905 | ||
ac56dd48 | 906 | static inline void tcg_gen_remu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 | 907 | { |
ac56dd48 | 908 | TCGv t0; |
c896fe29 FB |
909 | t0 = tcg_temp_new(TCG_TYPE_I64); |
910 | tcg_gen_movi_i64(t0, 0); | |
911 | tcg_gen_op5(INDEX_op_divu2_i64, t0, ret, arg1, t0, arg2); | |
912 | } | |
913 | #endif | |
914 | ||
915 | #endif | |
916 | ||
917 | /***************************************/ | |
918 | /* optional operations */ | |
919 | ||
ac56dd48 | 920 | static inline void tcg_gen_ext8s_i32(TCGv ret, TCGv arg) |
c896fe29 FB |
921 | { |
922 | #ifdef TCG_TARGET_HAS_ext8s_i32 | |
923 | tcg_gen_op2(INDEX_op_ext8s_i32, ret, arg); | |
924 | #else | |
925 | tcg_gen_shli_i32(ret, arg, 24); | |
5ff9d6a4 | 926 | tcg_gen_sari_i32(ret, ret, 24); |
c896fe29 FB |
927 | #endif |
928 | } | |
929 | ||
ac56dd48 | 930 | static inline void tcg_gen_ext16s_i32(TCGv ret, TCGv arg) |
c896fe29 FB |
931 | { |
932 | #ifdef TCG_TARGET_HAS_ext16s_i32 | |
933 | tcg_gen_op2(INDEX_op_ext16s_i32, ret, arg); | |
934 | #else | |
935 | tcg_gen_shli_i32(ret, arg, 16); | |
5ff9d6a4 | 936 | tcg_gen_sari_i32(ret, ret, 16); |
c896fe29 FB |
937 | #endif |
938 | } | |
939 | ||
940 | /* Note: we assume the two high bytes are set to zero */ | |
ac56dd48 | 941 | static inline void tcg_gen_bswap16_i32(TCGv ret, TCGv arg) |
c896fe29 FB |
942 | { |
943 | #ifdef TCG_TARGET_HAS_bswap16_i32 | |
944 | tcg_gen_op2(INDEX_op_bswap16_i32, ret, arg); | |
945 | #else | |
ac56dd48 | 946 | TCGv t0, t1; |
c896fe29 FB |
947 | t0 = tcg_temp_new(TCG_TYPE_I32); |
948 | t1 = tcg_temp_new(TCG_TYPE_I32); | |
949 | ||
950 | tcg_gen_shri_i32(t0, arg, 8); | |
951 | tcg_gen_andi_i32(t1, arg, 0x000000ff); | |
952 | tcg_gen_shli_i32(t1, t1, 8); | |
953 | tcg_gen_or_i32(ret, t0, t1); | |
954 | #endif | |
955 | } | |
956 | ||
ac56dd48 | 957 | static inline void tcg_gen_bswap_i32(TCGv ret, TCGv arg) |
c896fe29 FB |
958 | { |
959 | #ifdef TCG_TARGET_HAS_bswap_i32 | |
960 | tcg_gen_op2(INDEX_op_bswap_i32, ret, arg); | |
961 | #else | |
ac56dd48 | 962 | TCGv t0, t1; |
c896fe29 FB |
963 | t0 = tcg_temp_new(TCG_TYPE_I32); |
964 | t1 = tcg_temp_new(TCG_TYPE_I32); | |
965 | ||
966 | tcg_gen_shli_i32(t0, arg, 24); | |
967 | ||
968 | tcg_gen_andi_i32(t1, arg, 0x0000ff00); | |
969 | tcg_gen_shli_i32(t1, t1, 8); | |
970 | tcg_gen_or_i32(t0, t0, t1); | |
971 | ||
972 | tcg_gen_shri_i32(t1, arg, 8); | |
973 | tcg_gen_andi_i32(t1, t1, 0x0000ff00); | |
974 | tcg_gen_or_i32(t0, t0, t1); | |
975 | ||
976 | tcg_gen_shri_i32(t1, arg, 24); | |
977 | tcg_gen_or_i32(ret, t0, t1); | |
978 | #endif | |
979 | } | |
980 | ||
981 | #if TCG_TARGET_REG_BITS == 32 | |
ac56dd48 | 982 | static inline void tcg_gen_ext8s_i64(TCGv ret, TCGv arg) |
c896fe29 FB |
983 | { |
984 | tcg_gen_ext8s_i32(ret, arg); | |
ac56dd48 | 985 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
c896fe29 FB |
986 | } |
987 | ||
ac56dd48 | 988 | static inline void tcg_gen_ext16s_i64(TCGv ret, TCGv arg) |
c896fe29 FB |
989 | { |
990 | tcg_gen_ext16s_i32(ret, arg); | |
ac56dd48 | 991 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
c896fe29 FB |
992 | } |
993 | ||
ac56dd48 | 994 | static inline void tcg_gen_ext32s_i64(TCGv ret, TCGv arg) |
c896fe29 FB |
995 | { |
996 | tcg_gen_mov_i32(ret, arg); | |
ac56dd48 | 997 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
c896fe29 FB |
998 | } |
999 | ||
ac56dd48 | 1000 | static inline void tcg_gen_trunc_i64_i32(TCGv ret, TCGv arg) |
c896fe29 FB |
1001 | { |
1002 | tcg_gen_mov_i32(ret, arg); | |
1003 | } | |
1004 | ||
ac56dd48 | 1005 | static inline void tcg_gen_extu_i32_i64(TCGv ret, TCGv arg) |
c896fe29 FB |
1006 | { |
1007 | tcg_gen_mov_i32(ret, arg); | |
ac56dd48 | 1008 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); |
c896fe29 FB |
1009 | } |
1010 | ||
ac56dd48 | 1011 | static inline void tcg_gen_ext_i32_i64(TCGv ret, TCGv arg) |
c896fe29 FB |
1012 | { |
1013 | tcg_gen_mov_i32(ret, arg); | |
ac56dd48 | 1014 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
c896fe29 FB |
1015 | } |
1016 | ||
ac56dd48 | 1017 | static inline void tcg_gen_bswap_i64(TCGv ret, TCGv arg) |
c896fe29 | 1018 | { |
ac56dd48 | 1019 | TCGv t0, t1; |
c896fe29 FB |
1020 | t0 = tcg_temp_new(TCG_TYPE_I32); |
1021 | t1 = tcg_temp_new(TCG_TYPE_I32); | |
1022 | ||
1023 | tcg_gen_bswap_i32(t0, arg); | |
ac56dd48 | 1024 | tcg_gen_bswap_i32(t1, TCGV_HIGH(arg)); |
c896fe29 | 1025 | tcg_gen_mov_i32(ret, t1); |
ac56dd48 | 1026 | tcg_gen_mov_i32(TCGV_HIGH(ret), t0); |
c896fe29 FB |
1027 | } |
1028 | #else | |
1029 | ||
ac56dd48 | 1030 | static inline void tcg_gen_ext8s_i64(TCGv ret, TCGv arg) |
c896fe29 FB |
1031 | { |
1032 | #ifdef TCG_TARGET_HAS_ext8s_i64 | |
1033 | tcg_gen_op2(INDEX_op_ext8s_i64, ret, arg); | |
1034 | #else | |
1035 | tcg_gen_shli_i64(ret, arg, 56); | |
5ff9d6a4 | 1036 | tcg_gen_sari_i64(ret, ret, 56); |
c896fe29 FB |
1037 | #endif |
1038 | } | |
1039 | ||
ac56dd48 | 1040 | static inline void tcg_gen_ext16s_i64(TCGv ret, TCGv arg) |
c896fe29 FB |
1041 | { |
1042 | #ifdef TCG_TARGET_HAS_ext16s_i64 | |
1043 | tcg_gen_op2(INDEX_op_ext16s_i64, ret, arg); | |
1044 | #else | |
1045 | tcg_gen_shli_i64(ret, arg, 48); | |
5ff9d6a4 | 1046 | tcg_gen_sari_i64(ret, ret, 48); |
c896fe29 FB |
1047 | #endif |
1048 | } | |
1049 | ||
ac56dd48 | 1050 | static inline void tcg_gen_ext32s_i64(TCGv ret, TCGv arg) |
c896fe29 FB |
1051 | { |
1052 | #ifdef TCG_TARGET_HAS_ext32s_i64 | |
1053 | tcg_gen_op2(INDEX_op_ext32s_i64, ret, arg); | |
1054 | #else | |
1055 | tcg_gen_shli_i64(ret, arg, 32); | |
5ff9d6a4 | 1056 | tcg_gen_sari_i64(ret, ret, 32); |
c896fe29 FB |
1057 | #endif |
1058 | } | |
1059 | ||
1060 | /* Note: we assume the target supports move between 32 and 64 bit | |
ac56dd48 PB |
1061 | registers. This will probably break MIPS64 targets. */ |
1062 | static inline void tcg_gen_trunc_i64_i32(TCGv ret, TCGv arg) | |
c896fe29 FB |
1063 | { |
1064 | tcg_gen_mov_i32(ret, arg); | |
1065 | } | |
1066 | ||
1067 | /* Note: we assume the target supports move between 32 and 64 bit | |
1068 | registers */ | |
ac56dd48 | 1069 | static inline void tcg_gen_extu_i32_i64(TCGv ret, TCGv arg) |
c896fe29 FB |
1070 | { |
1071 | tcg_gen_andi_i64(ret, arg, 0xffffffff); | |
1072 | } | |
1073 | ||
1074 | /* Note: we assume the target supports move between 32 and 64 bit | |
1075 | registers */ | |
ac56dd48 | 1076 | static inline void tcg_gen_ext_i32_i64(TCGv ret, TCGv arg) |
c896fe29 FB |
1077 | { |
1078 | tcg_gen_ext32s_i64(ret, arg); | |
1079 | } | |
1080 | ||
ac56dd48 | 1081 | static inline void tcg_gen_bswap_i64(TCGv ret, TCGv arg) |
c896fe29 FB |
1082 | { |
1083 | #ifdef TCG_TARGET_HAS_bswap_i64 | |
1084 | tcg_gen_op2(INDEX_op_bswap_i64, ret, arg); | |
1085 | #else | |
ac56dd48 | 1086 | TCGv t0, t1; |
c896fe29 FB |
1087 | t0 = tcg_temp_new(TCG_TYPE_I32); |
1088 | t1 = tcg_temp_new(TCG_TYPE_I32); | |
1089 | ||
1090 | tcg_gen_shli_i64(t0, arg, 56); | |
1091 | ||
1092 | tcg_gen_andi_i64(t1, arg, 0x0000ff00); | |
1093 | tcg_gen_shli_i64(t1, t1, 40); | |
1094 | tcg_gen_or_i64(t0, t0, t1); | |
1095 | ||
1096 | tcg_gen_andi_i64(t1, arg, 0x00ff0000); | |
1097 | tcg_gen_shli_i64(t1, t1, 24); | |
1098 | tcg_gen_or_i64(t0, t0, t1); | |
1099 | ||
1100 | tcg_gen_andi_i64(t1, arg, 0xff000000); | |
1101 | tcg_gen_shli_i64(t1, t1, 8); | |
1102 | tcg_gen_or_i64(t0, t0, t1); | |
1103 | ||
1104 | tcg_gen_shri_i64(t1, arg, 8); | |
1105 | tcg_gen_andi_i64(t1, t1, 0xff000000); | |
1106 | tcg_gen_or_i64(t0, t0, t1); | |
1107 | ||
1108 | tcg_gen_shri_i64(t1, arg, 24); | |
1109 | tcg_gen_andi_i64(t1, t1, 0x00ff0000); | |
1110 | tcg_gen_or_i64(t0, t0, t1); | |
1111 | ||
1112 | tcg_gen_shri_i64(t1, arg, 40); | |
1113 | tcg_gen_andi_i64(t1, t1, 0x0000ff00); | |
1114 | tcg_gen_or_i64(t0, t0, t1); | |
1115 | ||
1116 | tcg_gen_shri_i64(t1, arg, 56); | |
1117 | tcg_gen_or_i64(ret, t0, t1); | |
1118 | #endif | |
1119 | } | |
1120 | ||
1121 | #endif | |
1122 | ||
5ff9d6a4 FB |
1123 | |
1124 | static inline void tcg_gen_discard_i32(TCGv arg) | |
1125 | { | |
1126 | tcg_gen_op1(INDEX_op_discard, arg); | |
1127 | } | |
1128 | ||
1129 | #if TCG_TARGET_REG_BITS == 32 | |
1130 | static inline void tcg_gen_discard_i64(TCGv arg) | |
1131 | { | |
1132 | tcg_gen_discard_i32(arg); | |
1133 | tcg_gen_discard_i32(TCGV_HIGH(arg)); | |
1134 | } | |
1135 | #else | |
1136 | static inline void tcg_gen_discard_i64(TCGv arg) | |
1137 | { | |
1138 | tcg_gen_op1(INDEX_op_discard, arg); | |
1139 | } | |
1140 | #endif | |
1141 | ||
c896fe29 | 1142 | /***************************************/ |
ac56dd48 | 1143 | static inline void tcg_gen_macro_2(TCGv ret0, TCGv ret1, int macro_id) |
c896fe29 | 1144 | { |
ac56dd48 | 1145 | tcg_gen_op3i(INDEX_op_macro_2, ret0, ret1, macro_id); |
c896fe29 FB |
1146 | } |
1147 | ||
1148 | /***************************************/ | |
1149 | /* QEMU specific operations. Their type depend on the QEMU CPU | |
1150 | type. */ | |
1151 | #ifndef TARGET_LONG_BITS | |
1152 | #error must include QEMU headers | |
1153 | #endif | |
1154 | ||
1155 | static inline void tcg_gen_exit_tb(tcg_target_long val) | |
1156 | { | |
ac56dd48 | 1157 | tcg_gen_op1i(INDEX_op_exit_tb, val); |
c896fe29 FB |
1158 | } |
1159 | ||
1160 | static inline void tcg_gen_goto_tb(int idx) | |
1161 | { | |
ac56dd48 | 1162 | tcg_gen_op1i(INDEX_op_goto_tb, idx); |
c896fe29 FB |
1163 | } |
1164 | ||
1165 | #if TCG_TARGET_REG_BITS == 32 | |
ac56dd48 | 1166 | static inline void tcg_gen_qemu_ld8u(TCGv ret, TCGv addr, int mem_index) |
c896fe29 FB |
1167 | { |
1168 | #if TARGET_LONG_BITS == 32 | |
ac56dd48 | 1169 | tcg_gen_op3i(INDEX_op_qemu_ld8u, ret, addr, mem_index); |
c896fe29 | 1170 | #else |
ac56dd48 PB |
1171 | tcg_gen_op4i(INDEX_op_qemu_ld8u, ret, addr, TCGV_HIGH(addr), mem_index); |
1172 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); | |
c896fe29 FB |
1173 | #endif |
1174 | } | |
1175 | ||
ac56dd48 | 1176 | static inline void tcg_gen_qemu_ld8s(TCGv ret, TCGv addr, int mem_index) |
c896fe29 FB |
1177 | { |
1178 | #if TARGET_LONG_BITS == 32 | |
ac56dd48 | 1179 | tcg_gen_op3i(INDEX_op_qemu_ld8s, ret, addr, mem_index); |
c896fe29 | 1180 | #else |
ac56dd48 | 1181 | tcg_gen_op4i(INDEX_op_qemu_ld8s, ret, addr, TCGV_HIGH(addr), mem_index); |
21fc3cfc | 1182 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
c896fe29 FB |
1183 | #endif |
1184 | } | |
1185 | ||
ac56dd48 | 1186 | static inline void tcg_gen_qemu_ld16u(TCGv ret, TCGv addr, int mem_index) |
c896fe29 FB |
1187 | { |
1188 | #if TARGET_LONG_BITS == 32 | |
ac56dd48 | 1189 | tcg_gen_op3i(INDEX_op_qemu_ld16u, ret, addr, mem_index); |
c896fe29 | 1190 | #else |
ac56dd48 PB |
1191 | tcg_gen_op4i(INDEX_op_qemu_ld16u, ret, addr, TCGV_HIGH(addr), mem_index); |
1192 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); | |
c896fe29 FB |
1193 | #endif |
1194 | } | |
1195 | ||
ac56dd48 | 1196 | static inline void tcg_gen_qemu_ld16s(TCGv ret, TCGv addr, int mem_index) |
c896fe29 FB |
1197 | { |
1198 | #if TARGET_LONG_BITS == 32 | |
ac56dd48 | 1199 | tcg_gen_op3i(INDEX_op_qemu_ld16s, ret, addr, mem_index); |
c896fe29 | 1200 | #else |
ac56dd48 | 1201 | tcg_gen_op4i(INDEX_op_qemu_ld16s, ret, addr, TCGV_HIGH(addr), mem_index); |
21fc3cfc | 1202 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
c896fe29 FB |
1203 | #endif |
1204 | } | |
1205 | ||
ac56dd48 | 1206 | static inline void tcg_gen_qemu_ld32u(TCGv ret, TCGv addr, int mem_index) |
c896fe29 FB |
1207 | { |
1208 | #if TARGET_LONG_BITS == 32 | |
ac56dd48 | 1209 | tcg_gen_op3i(INDEX_op_qemu_ld32u, ret, addr, mem_index); |
c896fe29 | 1210 | #else |
ac56dd48 PB |
1211 | tcg_gen_op4i(INDEX_op_qemu_ld32u, ret, addr, TCGV_HIGH(addr), mem_index); |
1212 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); | |
c896fe29 FB |
1213 | #endif |
1214 | } | |
1215 | ||
ac56dd48 | 1216 | static inline void tcg_gen_qemu_ld32s(TCGv ret, TCGv addr, int mem_index) |
c896fe29 FB |
1217 | { |
1218 | #if TARGET_LONG_BITS == 32 | |
ac56dd48 | 1219 | tcg_gen_op3i(INDEX_op_qemu_ld32u, ret, addr, mem_index); |
c896fe29 | 1220 | #else |
ac56dd48 PB |
1221 | tcg_gen_op4i(INDEX_op_qemu_ld32u, ret, addr, TCGV_HIGH(addr), mem_index); |
1222 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); | |
c896fe29 FB |
1223 | #endif |
1224 | } | |
1225 | ||
ac56dd48 | 1226 | static inline void tcg_gen_qemu_ld64(TCGv ret, TCGv addr, int mem_index) |
c896fe29 FB |
1227 | { |
1228 | #if TARGET_LONG_BITS == 32 | |
ac56dd48 | 1229 | tcg_gen_op4i(INDEX_op_qemu_ld64, ret, TCGV_HIGH(ret), addr, mem_index); |
c896fe29 | 1230 | #else |
ac56dd48 PB |
1231 | tcg_gen_op5i(INDEX_op_qemu_ld64, ret, TCGV_HIGH(ret), |
1232 | addr, TCGV_HIGH(addr), mem_index); | |
c896fe29 FB |
1233 | #endif |
1234 | } | |
1235 | ||
ac56dd48 | 1236 | static inline void tcg_gen_qemu_st8(TCGv arg, TCGv addr, int mem_index) |
c896fe29 FB |
1237 | { |
1238 | #if TARGET_LONG_BITS == 32 | |
ac56dd48 | 1239 | tcg_gen_op3i(INDEX_op_qemu_st8, arg, addr, mem_index); |
c896fe29 | 1240 | #else |
ac56dd48 | 1241 | tcg_gen_op4i(INDEX_op_qemu_st8, arg, addr, TCGV_HIGH(addr), mem_index); |
c896fe29 FB |
1242 | #endif |
1243 | } | |
1244 | ||
ac56dd48 | 1245 | static inline void tcg_gen_qemu_st16(TCGv arg, TCGv addr, int mem_index) |
c896fe29 FB |
1246 | { |
1247 | #if TARGET_LONG_BITS == 32 | |
ac56dd48 | 1248 | tcg_gen_op3i(INDEX_op_qemu_st16, arg, addr, mem_index); |
c896fe29 | 1249 | #else |
ac56dd48 | 1250 | tcg_gen_op4i(INDEX_op_qemu_st16, arg, addr, TCGV_HIGH(addr), mem_index); |
c896fe29 FB |
1251 | #endif |
1252 | } | |
1253 | ||
ac56dd48 | 1254 | static inline void tcg_gen_qemu_st32(TCGv arg, TCGv addr, int mem_index) |
c896fe29 FB |
1255 | { |
1256 | #if TARGET_LONG_BITS == 32 | |
ac56dd48 | 1257 | tcg_gen_op3i(INDEX_op_qemu_st32, arg, addr, mem_index); |
c896fe29 | 1258 | #else |
ac56dd48 | 1259 | tcg_gen_op4i(INDEX_op_qemu_st32, arg, addr, TCGV_HIGH(addr), mem_index); |
c896fe29 FB |
1260 | #endif |
1261 | } | |
1262 | ||
ac56dd48 | 1263 | static inline void tcg_gen_qemu_st64(TCGv arg, TCGv addr, int mem_index) |
c896fe29 FB |
1264 | { |
1265 | #if TARGET_LONG_BITS == 32 | |
ac56dd48 | 1266 | tcg_gen_op4i(INDEX_op_qemu_st64, arg, TCGV_HIGH(arg), addr, mem_index); |
c896fe29 | 1267 | #else |
ac56dd48 PB |
1268 | tcg_gen_op5i(INDEX_op_qemu_st64, arg, TCGV_HIGH(arg), |
1269 | addr, TCGV_HIGH(addr), mem_index); | |
c896fe29 FB |
1270 | #endif |
1271 | } | |
1272 | ||
56b8f567 | 1273 | #define tcg_gen_ld_ptr tcg_gen_ld_i32 |
a768e4b2 | 1274 | #define tcg_gen_discard_ptr tcg_gen_discard_i32 |
f8422f52 | 1275 | |
c896fe29 FB |
1276 | #else /* TCG_TARGET_REG_BITS == 32 */ |
1277 | ||
ac56dd48 | 1278 | static inline void tcg_gen_qemu_ld8u(TCGv ret, TCGv addr, int mem_index) |
c896fe29 | 1279 | { |
ac56dd48 | 1280 | tcg_gen_op3i(INDEX_op_qemu_ld8u, ret, addr, mem_index); |
c896fe29 FB |
1281 | } |
1282 | ||
ac56dd48 | 1283 | static inline void tcg_gen_qemu_ld8s(TCGv ret, TCGv addr, int mem_index) |
c896fe29 | 1284 | { |
ac56dd48 | 1285 | tcg_gen_op3i(INDEX_op_qemu_ld8s, ret, addr, mem_index); |
c896fe29 FB |
1286 | } |
1287 | ||
ac56dd48 | 1288 | static inline void tcg_gen_qemu_ld16u(TCGv ret, TCGv addr, int mem_index) |
c896fe29 | 1289 | { |
ac56dd48 | 1290 | tcg_gen_op3i(INDEX_op_qemu_ld16u, ret, addr, mem_index); |
c896fe29 FB |
1291 | } |
1292 | ||
ac56dd48 | 1293 | static inline void tcg_gen_qemu_ld16s(TCGv ret, TCGv addr, int mem_index) |
c896fe29 | 1294 | { |
ac56dd48 | 1295 | tcg_gen_op3i(INDEX_op_qemu_ld16s, ret, addr, mem_index); |
c896fe29 FB |
1296 | } |
1297 | ||
ac56dd48 | 1298 | static inline void tcg_gen_qemu_ld32u(TCGv ret, TCGv addr, int mem_index) |
c896fe29 | 1299 | { |
ac56dd48 | 1300 | tcg_gen_op3i(INDEX_op_qemu_ld32u, ret, addr, mem_index); |
c896fe29 FB |
1301 | } |
1302 | ||
ac56dd48 | 1303 | static inline void tcg_gen_qemu_ld32s(TCGv ret, TCGv addr, int mem_index) |
c896fe29 | 1304 | { |
ac56dd48 | 1305 | tcg_gen_op3i(INDEX_op_qemu_ld32s, ret, addr, mem_index); |
c896fe29 FB |
1306 | } |
1307 | ||
ac56dd48 | 1308 | static inline void tcg_gen_qemu_ld64(TCGv ret, TCGv addr, int mem_index) |
c896fe29 | 1309 | { |
ac56dd48 | 1310 | tcg_gen_op3i(INDEX_op_qemu_ld64, ret, addr, mem_index); |
c896fe29 FB |
1311 | } |
1312 | ||
ac56dd48 | 1313 | static inline void tcg_gen_qemu_st8(TCGv arg, TCGv addr, int mem_index) |
c896fe29 | 1314 | { |
ac56dd48 | 1315 | tcg_gen_op3i(INDEX_op_qemu_st8, arg, addr, mem_index); |
c896fe29 FB |
1316 | } |
1317 | ||
ac56dd48 | 1318 | static inline void tcg_gen_qemu_st16(TCGv arg, TCGv addr, int mem_index) |
c896fe29 | 1319 | { |
ac56dd48 | 1320 | tcg_gen_op3i(INDEX_op_qemu_st16, arg, addr, mem_index); |
c896fe29 FB |
1321 | } |
1322 | ||
ac56dd48 | 1323 | static inline void tcg_gen_qemu_st32(TCGv arg, TCGv addr, int mem_index) |
c896fe29 | 1324 | { |
ac56dd48 | 1325 | tcg_gen_op3i(INDEX_op_qemu_st32, arg, addr, mem_index); |
c896fe29 FB |
1326 | } |
1327 | ||
ac56dd48 | 1328 | static inline void tcg_gen_qemu_st64(TCGv arg, TCGv addr, int mem_index) |
c896fe29 | 1329 | { |
ac56dd48 | 1330 | tcg_gen_op3i(INDEX_op_qemu_st64, arg, addr, mem_index); |
c896fe29 FB |
1331 | } |
1332 | ||
56b8f567 | 1333 | #define tcg_gen_ld_ptr tcg_gen_ld_i64 |
a768e4b2 | 1334 | #define tcg_gen_discard_ptr tcg_gen_discard_i64 |
f8422f52 | 1335 | |
c896fe29 | 1336 | #endif /* TCG_TARGET_REG_BITS != 32 */ |
f8422f52 BS |
1337 | |
1338 | #if TARGET_LONG_BITS == 64 | |
1339 | #define TCG_TYPE_TL TCG_TYPE_I64 | |
1340 | #define tcg_gen_movi_tl tcg_gen_movi_i64 | |
1341 | #define tcg_gen_mov_tl tcg_gen_mov_i64 | |
1342 | #define tcg_gen_ld8u_tl tcg_gen_ld8u_i64 | |
1343 | #define tcg_gen_ld8s_tl tcg_gen_ld8s_i64 | |
1344 | #define tcg_gen_ld16u_tl tcg_gen_ld16u_i64 | |
1345 | #define tcg_gen_ld16s_tl tcg_gen_ld16s_i64 | |
1346 | #define tcg_gen_ld32u_tl tcg_gen_ld32u_i64 | |
1347 | #define tcg_gen_ld32s_tl tcg_gen_ld32s_i64 | |
1348 | #define tcg_gen_ld_tl tcg_gen_ld_i64 | |
1349 | #define tcg_gen_st8_tl tcg_gen_st8_i64 | |
1350 | #define tcg_gen_st16_tl tcg_gen_st16_i64 | |
1351 | #define tcg_gen_st32_tl tcg_gen_st32_i64 | |
1352 | #define tcg_gen_st_tl tcg_gen_st_i64 | |
1353 | #define tcg_gen_add_tl tcg_gen_add_i64 | |
1354 | #define tcg_gen_addi_tl tcg_gen_addi_i64 | |
1355 | #define tcg_gen_sub_tl tcg_gen_sub_i64 | |
1356 | #define tcg_gen_subi_tl tcg_gen_subi_i64 | |
1357 | #define tcg_gen_and_tl tcg_gen_and_i64 | |
1358 | #define tcg_gen_andi_tl tcg_gen_andi_i64 | |
1359 | #define tcg_gen_or_tl tcg_gen_or_i64 | |
1360 | #define tcg_gen_ori_tl tcg_gen_ori_i64 | |
1361 | #define tcg_gen_xor_tl tcg_gen_xor_i64 | |
1362 | #define tcg_gen_xori_tl tcg_gen_xori_i64 | |
1363 | #define tcg_gen_shl_tl tcg_gen_shl_i64 | |
1364 | #define tcg_gen_shli_tl tcg_gen_shli_i64 | |
1365 | #define tcg_gen_shr_tl tcg_gen_shr_i64 | |
1366 | #define tcg_gen_shri_tl tcg_gen_shri_i64 | |
1367 | #define tcg_gen_sar_tl tcg_gen_sar_i64 | |
1368 | #define tcg_gen_sari_tl tcg_gen_sari_i64 | |
0cf767d6 | 1369 | #define tcg_gen_brcond_tl tcg_gen_brcond_i64 |
a768e4b2 | 1370 | #define tcg_gen_discard_tl tcg_gen_discard_i64 |
e429073d BS |
1371 | #define tcg_gen_trunc_tl_i32 tcg_gen_trunc_i64_i32 |
1372 | #define tcg_gen_trunc_i64_tl tcg_gen_mov_i64 | |
1373 | #define tcg_gen_extu_i32_tl tcg_gen_extu_i32_i64 | |
1374 | #define tcg_gen_ext_i32_tl tcg_gen_ext_i32_i64 | |
1375 | #define tcg_gen_extu_tl_i64 tcg_gen_mov_i64 | |
1376 | #define tcg_gen_ext_tl_i64 tcg_gen_mov_i64 | |
a98824ac | 1377 | #define tcg_const_tl tcg_const_i64 |
f8422f52 BS |
1378 | #else |
1379 | #define TCG_TYPE_TL TCG_TYPE_I32 | |
1380 | #define tcg_gen_movi_tl tcg_gen_movi_i32 | |
1381 | #define tcg_gen_mov_tl tcg_gen_mov_i32 | |
1382 | #define tcg_gen_ld8u_tl tcg_gen_ld8u_i32 | |
1383 | #define tcg_gen_ld8s_tl tcg_gen_ld8s_i32 | |
1384 | #define tcg_gen_ld16u_tl tcg_gen_ld16u_i32 | |
1385 | #define tcg_gen_ld16s_tl tcg_gen_ld16s_i32 | |
1386 | #define tcg_gen_ld32u_tl tcg_gen_ld_i32 | |
1387 | #define tcg_gen_ld32s_tl tcg_gen_ld_i32 | |
1388 | #define tcg_gen_ld_tl tcg_gen_ld_i32 | |
1389 | #define tcg_gen_st8_tl tcg_gen_st8_i32 | |
1390 | #define tcg_gen_st16_tl tcg_gen_st16_i32 | |
1391 | #define tcg_gen_st32_tl tcg_gen_st_i32 | |
1392 | #define tcg_gen_st_tl tcg_gen_st_i32 | |
1393 | #define tcg_gen_add_tl tcg_gen_add_i32 | |
1394 | #define tcg_gen_addi_tl tcg_gen_addi_i32 | |
1395 | #define tcg_gen_sub_tl tcg_gen_sub_i32 | |
1396 | #define tcg_gen_subi_tl tcg_gen_subi_i32 | |
1397 | #define tcg_gen_and_tl tcg_gen_and_i32 | |
1398 | #define tcg_gen_andi_tl tcg_gen_andi_i32 | |
1399 | #define tcg_gen_or_tl tcg_gen_or_i32 | |
1400 | #define tcg_gen_ori_tl tcg_gen_ori_i32 | |
1401 | #define tcg_gen_xor_tl tcg_gen_xor_i32 | |
1402 | #define tcg_gen_xori_tl tcg_gen_xori_i32 | |
1403 | #define tcg_gen_shl_tl tcg_gen_shl_i32 | |
1404 | #define tcg_gen_shli_tl tcg_gen_shli_i32 | |
1405 | #define tcg_gen_shr_tl tcg_gen_shr_i32 | |
1406 | #define tcg_gen_shri_tl tcg_gen_shri_i32 | |
1407 | #define tcg_gen_sar_tl tcg_gen_sar_i32 | |
1408 | #define tcg_gen_sari_tl tcg_gen_sari_i32 | |
0cf767d6 | 1409 | #define tcg_gen_brcond_tl tcg_gen_brcond_i32 |
a768e4b2 | 1410 | #define tcg_gen_discard_tl tcg_gen_discard_i32 |
e429073d BS |
1411 | #define tcg_gen_trunc_tl_i32 tcg_gen_mov_i32 |
1412 | #define tcg_gen_trunc_i64_tl tcg_gen_trunc_i64_i32 | |
1413 | #define tcg_gen_extu_i32_tl tcg_gen_mov_i32 | |
1414 | #define tcg_gen_ext_i32_tl tcg_gen_mov_i32 | |
1415 | #define tcg_gen_extu_tl_i64 tcg_gen_extu_i32_i64 | |
1416 | #define tcg_gen_ext_tl_i64 tcg_gen_ext_i32_i64 | |
a98824ac | 1417 | #define tcg_const_tl tcg_const_i32 |
f8422f52 | 1418 | #endif |