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c896fe29 FB |
1 | /* |
2 | * Tiny Code Generator for QEMU | |
3 | * | |
4 | * Copyright (c) 2008 Fabrice Bellard | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
7 | * of this software and associated documentation files (the "Software"), to deal | |
8 | * in the Software without restriction, including without limitation the rights | |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 | * copies of the Software, and to permit persons to whom the Software is | |
11 | * furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
22 | * THE SOFTWARE. | |
23 | */ | |
24 | #include "tcg.h" | |
25 | ||
bf6247fb | 26 | #ifdef CONFIG_DYNGEN_OP |
c896fe29 FB |
27 | /* legacy dyngen operations */ |
28 | #include "gen-op.h" | |
cf2be984 | 29 | #endif |
c896fe29 FB |
30 | |
31 | int gen_new_label(void); | |
32 | ||
ac56dd48 | 33 | static inline void tcg_gen_op1(int opc, TCGv arg1) |
c896fe29 FB |
34 | { |
35 | *gen_opc_ptr++ = opc; | |
ac56dd48 | 36 | *gen_opparam_ptr++ = GET_TCGV(arg1); |
c896fe29 FB |
37 | } |
38 | ||
ac56dd48 | 39 | static inline void tcg_gen_op1i(int opc, TCGArg arg1) |
c896fe29 FB |
40 | { |
41 | *gen_opc_ptr++ = opc; | |
42 | *gen_opparam_ptr++ = arg1; | |
c896fe29 FB |
43 | } |
44 | ||
ac56dd48 | 45 | static inline void tcg_gen_op2(int opc, TCGv arg1, TCGv arg2) |
c896fe29 FB |
46 | { |
47 | *gen_opc_ptr++ = opc; | |
ac56dd48 PB |
48 | *gen_opparam_ptr++ = GET_TCGV(arg1); |
49 | *gen_opparam_ptr++ = GET_TCGV(arg2); | |
c896fe29 FB |
50 | } |
51 | ||
ac56dd48 | 52 | static inline void tcg_gen_op2i(int opc, TCGv arg1, TCGArg arg2) |
c896fe29 FB |
53 | { |
54 | *gen_opc_ptr++ = opc; | |
ac56dd48 | 55 | *gen_opparam_ptr++ = GET_TCGV(arg1); |
c896fe29 | 56 | *gen_opparam_ptr++ = arg2; |
ac56dd48 PB |
57 | } |
58 | ||
59 | static inline void tcg_gen_op3(int opc, TCGv arg1, TCGv arg2, TCGv arg3) | |
60 | { | |
61 | *gen_opc_ptr++ = opc; | |
62 | *gen_opparam_ptr++ = GET_TCGV(arg1); | |
63 | *gen_opparam_ptr++ = GET_TCGV(arg2); | |
64 | *gen_opparam_ptr++ = GET_TCGV(arg3); | |
65 | } | |
66 | ||
67 | static inline void tcg_gen_op3i(int opc, TCGv arg1, TCGv arg2, TCGArg arg3) | |
68 | { | |
69 | *gen_opc_ptr++ = opc; | |
70 | *gen_opparam_ptr++ = GET_TCGV(arg1); | |
71 | *gen_opparam_ptr++ = GET_TCGV(arg2); | |
c896fe29 | 72 | *gen_opparam_ptr++ = arg3; |
ac56dd48 PB |
73 | } |
74 | ||
75 | static inline void tcg_gen_op4(int opc, TCGv arg1, TCGv arg2, TCGv arg3, | |
76 | TCGv arg4) | |
77 | { | |
78 | *gen_opc_ptr++ = opc; | |
79 | *gen_opparam_ptr++ = GET_TCGV(arg1); | |
80 | *gen_opparam_ptr++ = GET_TCGV(arg2); | |
81 | *gen_opparam_ptr++ = GET_TCGV(arg3); | |
82 | *gen_opparam_ptr++ = GET_TCGV(arg4); | |
83 | } | |
84 | ||
85 | static inline void tcg_gen_op4i(int opc, TCGv arg1, TCGv arg2, TCGv arg3, | |
86 | TCGArg arg4) | |
87 | { | |
88 | *gen_opc_ptr++ = opc; | |
89 | *gen_opparam_ptr++ = GET_TCGV(arg1); | |
90 | *gen_opparam_ptr++ = GET_TCGV(arg2); | |
91 | *gen_opparam_ptr++ = GET_TCGV(arg3); | |
c896fe29 FB |
92 | *gen_opparam_ptr++ = arg4; |
93 | } | |
94 | ||
ac56dd48 PB |
95 | static inline void tcg_gen_op4ii(int opc, TCGv arg1, TCGv arg2, TCGArg arg3, |
96 | TCGArg arg4) | |
c896fe29 FB |
97 | { |
98 | *gen_opc_ptr++ = opc; | |
ac56dd48 PB |
99 | *gen_opparam_ptr++ = GET_TCGV(arg1); |
100 | *gen_opparam_ptr++ = GET_TCGV(arg2); | |
c896fe29 FB |
101 | *gen_opparam_ptr++ = arg3; |
102 | *gen_opparam_ptr++ = arg4; | |
ac56dd48 PB |
103 | } |
104 | ||
105 | static inline void tcg_gen_op5(int opc, TCGv arg1, TCGv arg2, | |
106 | TCGv arg3, TCGv arg4, | |
107 | TCGv arg5) | |
108 | { | |
109 | *gen_opc_ptr++ = opc; | |
110 | *gen_opparam_ptr++ = GET_TCGV(arg1); | |
111 | *gen_opparam_ptr++ = GET_TCGV(arg2); | |
112 | *gen_opparam_ptr++ = GET_TCGV(arg3); | |
113 | *gen_opparam_ptr++ = GET_TCGV(arg4); | |
114 | *gen_opparam_ptr++ = GET_TCGV(arg5); | |
115 | } | |
116 | ||
117 | static inline void tcg_gen_op5i(int opc, TCGv arg1, TCGv arg2, | |
118 | TCGv arg3, TCGv arg4, | |
119 | TCGArg arg5) | |
120 | { | |
121 | *gen_opc_ptr++ = opc; | |
122 | *gen_opparam_ptr++ = GET_TCGV(arg1); | |
123 | *gen_opparam_ptr++ = GET_TCGV(arg2); | |
124 | *gen_opparam_ptr++ = GET_TCGV(arg3); | |
125 | *gen_opparam_ptr++ = GET_TCGV(arg4); | |
c896fe29 FB |
126 | *gen_opparam_ptr++ = arg5; |
127 | } | |
128 | ||
ac56dd48 PB |
129 | static inline void tcg_gen_op6(int opc, TCGv arg1, TCGv arg2, |
130 | TCGv arg3, TCGv arg4, | |
131 | TCGv arg5, TCGv arg6) | |
c896fe29 FB |
132 | { |
133 | *gen_opc_ptr++ = opc; | |
ac56dd48 PB |
134 | *gen_opparam_ptr++ = GET_TCGV(arg1); |
135 | *gen_opparam_ptr++ = GET_TCGV(arg2); | |
136 | *gen_opparam_ptr++ = GET_TCGV(arg3); | |
137 | *gen_opparam_ptr++ = GET_TCGV(arg4); | |
138 | *gen_opparam_ptr++ = GET_TCGV(arg5); | |
139 | *gen_opparam_ptr++ = GET_TCGV(arg6); | |
140 | } | |
141 | ||
142 | static inline void tcg_gen_op6ii(int opc, TCGv arg1, TCGv arg2, | |
143 | TCGv arg3, TCGv arg4, | |
144 | TCGArg arg5, TCGArg arg6) | |
145 | { | |
146 | *gen_opc_ptr++ = opc; | |
147 | *gen_opparam_ptr++ = GET_TCGV(arg1); | |
148 | *gen_opparam_ptr++ = GET_TCGV(arg2); | |
149 | *gen_opparam_ptr++ = GET_TCGV(arg3); | |
150 | *gen_opparam_ptr++ = GET_TCGV(arg4); | |
c896fe29 FB |
151 | *gen_opparam_ptr++ = arg5; |
152 | *gen_opparam_ptr++ = arg6; | |
153 | } | |
154 | ||
155 | static inline void gen_set_label(int n) | |
156 | { | |
ac56dd48 | 157 | tcg_gen_op1i(INDEX_op_set_label, n); |
c896fe29 FB |
158 | } |
159 | ||
fb50d413 BS |
160 | static inline void tcg_gen_br(int label) |
161 | { | |
162 | tcg_gen_op1i(INDEX_op_br, label); | |
163 | } | |
164 | ||
ac56dd48 | 165 | static inline void tcg_gen_mov_i32(TCGv ret, TCGv arg) |
c896fe29 | 166 | { |
98156423 | 167 | if (GET_TCGV(ret) != GET_TCGV(arg)) |
4d07272d | 168 | tcg_gen_op2(INDEX_op_mov_i32, ret, arg); |
c896fe29 FB |
169 | } |
170 | ||
ac56dd48 | 171 | static inline void tcg_gen_movi_i32(TCGv ret, int32_t arg) |
c896fe29 | 172 | { |
ac56dd48 | 173 | tcg_gen_op2i(INDEX_op_movi_i32, ret, arg); |
c896fe29 FB |
174 | } |
175 | ||
176 | /* helper calls */ | |
177 | #define TCG_HELPER_CALL_FLAGS 0 | |
178 | ||
179 | static inline void tcg_gen_helper_0_0(void *func) | |
180 | { | |
181 | tcg_gen_call(&tcg_ctx, | |
182 | tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, | |
183 | 0, NULL, 0, NULL); | |
184 | } | |
185 | ||
ac56dd48 | 186 | static inline void tcg_gen_helper_0_1(void *func, TCGv arg) |
c896fe29 FB |
187 | { |
188 | tcg_gen_call(&tcg_ctx, | |
189 | tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, | |
190 | 0, NULL, 1, &arg); | |
191 | } | |
192 | ||
ac56dd48 | 193 | static inline void tcg_gen_helper_0_2(void *func, TCGv arg1, TCGv arg2) |
c896fe29 | 194 | { |
ac56dd48 | 195 | TCGv args[2]; |
c896fe29 FB |
196 | args[0] = arg1; |
197 | args[1] = arg2; | |
198 | tcg_gen_call(&tcg_ctx, | |
199 | tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, | |
200 | 0, NULL, 2, args); | |
201 | } | |
202 | ||
b0109805 PB |
203 | static inline void tcg_gen_helper_0_3(void *func, |
204 | TCGv arg1, TCGv arg2, TCGv arg3) | |
205 | { | |
206 | TCGv args[3]; | |
207 | args[0] = arg1; | |
208 | args[1] = arg2; | |
209 | args[2] = arg3; | |
210 | tcg_gen_call(&tcg_ctx, | |
211 | tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, | |
212 | 0, NULL, 3, args); | |
213 | } | |
214 | ||
f8422f52 BS |
215 | static inline void tcg_gen_helper_0_4(void *func, TCGv arg1, TCGv arg2, |
216 | TCGv arg3, TCGv arg4) | |
217 | { | |
218 | TCGv args[4]; | |
219 | args[0] = arg1; | |
220 | args[1] = arg2; | |
221 | args[2] = arg3; | |
222 | args[3] = arg4; | |
223 | tcg_gen_call(&tcg_ctx, | |
224 | tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, | |
225 | 0, NULL, 4, args); | |
226 | } | |
227 | ||
228 | static inline void tcg_gen_helper_1_0(void *func, TCGv ret) | |
229 | { | |
230 | tcg_gen_call(&tcg_ctx, | |
231 | tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, | |
232 | 1, &ret, 0, NULL); | |
233 | } | |
234 | ||
235 | static inline void tcg_gen_helper_1_1(void *func, TCGv ret, TCGv arg1) | |
236 | { | |
237 | tcg_gen_call(&tcg_ctx, | |
238 | tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, | |
239 | 1, &ret, 1, &arg1); | |
240 | } | |
241 | ||
ac56dd48 PB |
242 | static inline void tcg_gen_helper_1_2(void *func, TCGv ret, |
243 | TCGv arg1, TCGv arg2) | |
c896fe29 | 244 | { |
ac56dd48 | 245 | TCGv args[2]; |
c896fe29 FB |
246 | args[0] = arg1; |
247 | args[1] = arg2; | |
248 | tcg_gen_call(&tcg_ctx, | |
249 | tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, | |
250 | 1, &ret, 2, args); | |
251 | } | |
252 | ||
6ddbc6e4 PB |
253 | static inline void tcg_gen_helper_1_3(void *func, TCGv ret, |
254 | TCGv arg1, TCGv arg2, TCGv arg3) | |
255 | { | |
256 | TCGv args[3]; | |
257 | args[0] = arg1; | |
258 | args[1] = arg2; | |
259 | args[2] = arg3; | |
260 | tcg_gen_call(&tcg_ctx, | |
261 | tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, | |
262 | 1, &ret, 3, args); | |
263 | } | |
264 | ||
f8422f52 BS |
265 | static inline void tcg_gen_helper_1_4(void *func, TCGv ret, |
266 | TCGv arg1, TCGv arg2, TCGv arg3, | |
267 | TCGv arg4) | |
268 | { | |
269 | TCGv args[4]; | |
270 | args[0] = arg1; | |
271 | args[1] = arg2; | |
272 | args[2] = arg3; | |
273 | args[3] = arg4; | |
274 | tcg_gen_call(&tcg_ctx, | |
275 | tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, | |
276 | 1, &ret, 4, args); | |
277 | } | |
278 | ||
c896fe29 FB |
279 | /* 32 bit ops */ |
280 | ||
ac56dd48 | 281 | static inline void tcg_gen_ld8u_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 | 282 | { |
ac56dd48 | 283 | tcg_gen_op3i(INDEX_op_ld8u_i32, ret, arg2, offset); |
c896fe29 FB |
284 | } |
285 | ||
ac56dd48 | 286 | static inline void tcg_gen_ld8s_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 | 287 | { |
ac56dd48 | 288 | tcg_gen_op3i(INDEX_op_ld8s_i32, ret, arg2, offset); |
c896fe29 FB |
289 | } |
290 | ||
ac56dd48 | 291 | static inline void tcg_gen_ld16u_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 | 292 | { |
ac56dd48 | 293 | tcg_gen_op3i(INDEX_op_ld16u_i32, ret, arg2, offset); |
c896fe29 FB |
294 | } |
295 | ||
ac56dd48 | 296 | static inline void tcg_gen_ld16s_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 | 297 | { |
ac56dd48 | 298 | tcg_gen_op3i(INDEX_op_ld16s_i32, ret, arg2, offset); |
c896fe29 FB |
299 | } |
300 | ||
ac56dd48 | 301 | static inline void tcg_gen_ld_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 | 302 | { |
ac56dd48 | 303 | tcg_gen_op3i(INDEX_op_ld_i32, ret, arg2, offset); |
c896fe29 FB |
304 | } |
305 | ||
ac56dd48 | 306 | static inline void tcg_gen_st8_i32(TCGv arg1, TCGv arg2, tcg_target_long offset) |
c896fe29 | 307 | { |
ac56dd48 | 308 | tcg_gen_op3i(INDEX_op_st8_i32, arg1, arg2, offset); |
c896fe29 FB |
309 | } |
310 | ||
ac56dd48 | 311 | static inline void tcg_gen_st16_i32(TCGv arg1, TCGv arg2, tcg_target_long offset) |
c896fe29 | 312 | { |
ac56dd48 | 313 | tcg_gen_op3i(INDEX_op_st16_i32, arg1, arg2, offset); |
c896fe29 FB |
314 | } |
315 | ||
ac56dd48 | 316 | static inline void tcg_gen_st_i32(TCGv arg1, TCGv arg2, tcg_target_long offset) |
c896fe29 | 317 | { |
ac56dd48 | 318 | tcg_gen_op3i(INDEX_op_st_i32, arg1, arg2, offset); |
c896fe29 FB |
319 | } |
320 | ||
ac56dd48 | 321 | static inline void tcg_gen_add_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
322 | { |
323 | tcg_gen_op3(INDEX_op_add_i32, ret, arg1, arg2); | |
324 | } | |
325 | ||
ac56dd48 | 326 | static inline void tcg_gen_addi_i32(TCGv ret, TCGv arg1, int32_t arg2) |
c896fe29 | 327 | { |
7089442c BS |
328 | /* some cases can be optimized here */ |
329 | if (arg2 == 0) { | |
330 | tcg_gen_mov_i32(ret, arg1); | |
331 | } else { | |
332 | tcg_gen_add_i32(ret, arg1, tcg_const_i32(arg2)); | |
333 | } | |
c896fe29 FB |
334 | } |
335 | ||
ac56dd48 | 336 | static inline void tcg_gen_sub_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
337 | { |
338 | tcg_gen_op3(INDEX_op_sub_i32, ret, arg1, arg2); | |
339 | } | |
340 | ||
ac56dd48 | 341 | static inline void tcg_gen_subi_i32(TCGv ret, TCGv arg1, int32_t arg2) |
c896fe29 | 342 | { |
7089442c BS |
343 | /* some cases can be optimized here */ |
344 | if (arg2 == 0) { | |
345 | tcg_gen_mov_i32(ret, arg1); | |
346 | } else { | |
347 | tcg_gen_sub_i32(ret, arg1, tcg_const_i32(arg2)); | |
348 | } | |
c896fe29 FB |
349 | } |
350 | ||
ac56dd48 | 351 | static inline void tcg_gen_and_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
352 | { |
353 | tcg_gen_op3(INDEX_op_and_i32, ret, arg1, arg2); | |
354 | } | |
355 | ||
ac56dd48 | 356 | static inline void tcg_gen_andi_i32(TCGv ret, TCGv arg1, int32_t arg2) |
c896fe29 FB |
357 | { |
358 | /* some cases can be optimized here */ | |
359 | if (arg2 == 0) { | |
360 | tcg_gen_movi_i32(ret, 0); | |
361 | } else if (arg2 == 0xffffffff) { | |
362 | tcg_gen_mov_i32(ret, arg1); | |
363 | } else { | |
364 | tcg_gen_and_i32(ret, arg1, tcg_const_i32(arg2)); | |
365 | } | |
366 | } | |
367 | ||
ac56dd48 | 368 | static inline void tcg_gen_or_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
369 | { |
370 | tcg_gen_op3(INDEX_op_or_i32, ret, arg1, arg2); | |
371 | } | |
372 | ||
ac56dd48 | 373 | static inline void tcg_gen_ori_i32(TCGv ret, TCGv arg1, int32_t arg2) |
c896fe29 FB |
374 | { |
375 | /* some cases can be optimized here */ | |
376 | if (arg2 == 0xffffffff) { | |
7089442c | 377 | tcg_gen_movi_i32(ret, 0xffffffff); |
c896fe29 FB |
378 | } else if (arg2 == 0) { |
379 | tcg_gen_mov_i32(ret, arg1); | |
380 | } else { | |
381 | tcg_gen_or_i32(ret, arg1, tcg_const_i32(arg2)); | |
382 | } | |
383 | } | |
384 | ||
ac56dd48 | 385 | static inline void tcg_gen_xor_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
386 | { |
387 | tcg_gen_op3(INDEX_op_xor_i32, ret, arg1, arg2); | |
388 | } | |
389 | ||
ac56dd48 | 390 | static inline void tcg_gen_xori_i32(TCGv ret, TCGv arg1, int32_t arg2) |
c896fe29 FB |
391 | { |
392 | /* some cases can be optimized here */ | |
393 | if (arg2 == 0) { | |
394 | tcg_gen_mov_i32(ret, arg1); | |
395 | } else { | |
396 | tcg_gen_xor_i32(ret, arg1, tcg_const_i32(arg2)); | |
397 | } | |
398 | } | |
399 | ||
ac56dd48 | 400 | static inline void tcg_gen_shl_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
401 | { |
402 | tcg_gen_op3(INDEX_op_shl_i32, ret, arg1, arg2); | |
403 | } | |
404 | ||
ac56dd48 | 405 | static inline void tcg_gen_shli_i32(TCGv ret, TCGv arg1, int32_t arg2) |
c896fe29 | 406 | { |
34151a20 FB |
407 | if (arg2 == 0) { |
408 | tcg_gen_mov_i32(ret, arg1); | |
409 | } else { | |
410 | tcg_gen_shl_i32(ret, arg1, tcg_const_i32(arg2)); | |
411 | } | |
c896fe29 FB |
412 | } |
413 | ||
ac56dd48 | 414 | static inline void tcg_gen_shr_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
415 | { |
416 | tcg_gen_op3(INDEX_op_shr_i32, ret, arg1, arg2); | |
417 | } | |
418 | ||
ac56dd48 | 419 | static inline void tcg_gen_shri_i32(TCGv ret, TCGv arg1, int32_t arg2) |
c896fe29 | 420 | { |
34151a20 FB |
421 | if (arg2 == 0) { |
422 | tcg_gen_mov_i32(ret, arg1); | |
423 | } else { | |
424 | tcg_gen_shr_i32(ret, arg1, tcg_const_i32(arg2)); | |
425 | } | |
c896fe29 FB |
426 | } |
427 | ||
ac56dd48 | 428 | static inline void tcg_gen_sar_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
429 | { |
430 | tcg_gen_op3(INDEX_op_sar_i32, ret, arg1, arg2); | |
431 | } | |
432 | ||
ac56dd48 | 433 | static inline void tcg_gen_sari_i32(TCGv ret, TCGv arg1, int32_t arg2) |
c896fe29 | 434 | { |
34151a20 FB |
435 | if (arg2 == 0) { |
436 | tcg_gen_mov_i32(ret, arg1); | |
437 | } else { | |
438 | tcg_gen_sar_i32(ret, arg1, tcg_const_i32(arg2)); | |
439 | } | |
c896fe29 FB |
440 | } |
441 | ||
ac56dd48 | 442 | static inline void tcg_gen_brcond_i32(int cond, TCGv arg1, TCGv arg2, |
c896fe29 FB |
443 | int label_index) |
444 | { | |
ac56dd48 | 445 | tcg_gen_op4ii(INDEX_op_brcond_i32, arg1, arg2, cond, label_index); |
c896fe29 FB |
446 | } |
447 | ||
ac56dd48 | 448 | static inline void tcg_gen_mul_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
449 | { |
450 | tcg_gen_op3(INDEX_op_mul_i32, ret, arg1, arg2); | |
451 | } | |
452 | ||
f730fd27 TS |
453 | static inline void tcg_gen_muli_i32(TCGv ret, TCGv arg1, int32_t arg2) |
454 | { | |
455 | tcg_gen_mul_i32(ret, arg1, tcg_const_i32(arg2)); | |
456 | } | |
457 | ||
c896fe29 | 458 | #ifdef TCG_TARGET_HAS_div_i32 |
ac56dd48 | 459 | static inline void tcg_gen_div_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
460 | { |
461 | tcg_gen_op3(INDEX_op_div_i32, ret, arg1, arg2); | |
462 | } | |
463 | ||
ac56dd48 | 464 | static inline void tcg_gen_rem_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
465 | { |
466 | tcg_gen_op3(INDEX_op_rem_i32, ret, arg1, arg2); | |
467 | } | |
468 | ||
ac56dd48 | 469 | static inline void tcg_gen_divu_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
470 | { |
471 | tcg_gen_op3(INDEX_op_divu_i32, ret, arg1, arg2); | |
472 | } | |
473 | ||
ac56dd48 | 474 | static inline void tcg_gen_remu_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
475 | { |
476 | tcg_gen_op3(INDEX_op_remu_i32, ret, arg1, arg2); | |
477 | } | |
478 | #else | |
ac56dd48 | 479 | static inline void tcg_gen_div_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 | 480 | { |
ac56dd48 | 481 | TCGv t0; |
c896fe29 FB |
482 | t0 = tcg_temp_new(TCG_TYPE_I32); |
483 | tcg_gen_sari_i32(t0, arg1, 31); | |
484 | tcg_gen_op5(INDEX_op_div2_i32, ret, t0, arg1, t0, arg2); | |
485 | } | |
486 | ||
ac56dd48 | 487 | static inline void tcg_gen_rem_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 | 488 | { |
ac56dd48 | 489 | TCGv t0; |
c896fe29 FB |
490 | t0 = tcg_temp_new(TCG_TYPE_I32); |
491 | tcg_gen_sari_i32(t0, arg1, 31); | |
492 | tcg_gen_op5(INDEX_op_div2_i32, t0, ret, arg1, t0, arg2); | |
493 | } | |
494 | ||
ac56dd48 | 495 | static inline void tcg_gen_divu_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 | 496 | { |
ac56dd48 | 497 | TCGv t0; |
c896fe29 FB |
498 | t0 = tcg_temp_new(TCG_TYPE_I32); |
499 | tcg_gen_movi_i32(t0, 0); | |
500 | tcg_gen_op5(INDEX_op_divu2_i32, ret, t0, arg1, t0, arg2); | |
501 | } | |
502 | ||
ac56dd48 | 503 | static inline void tcg_gen_remu_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 | 504 | { |
ac56dd48 | 505 | TCGv t0; |
c896fe29 FB |
506 | t0 = tcg_temp_new(TCG_TYPE_I32); |
507 | tcg_gen_movi_i32(t0, 0); | |
508 | tcg_gen_op5(INDEX_op_divu2_i32, t0, ret, arg1, t0, arg2); | |
509 | } | |
510 | #endif | |
511 | ||
512 | #if TCG_TARGET_REG_BITS == 32 | |
513 | ||
ac56dd48 | 514 | static inline void tcg_gen_mov_i64(TCGv ret, TCGv arg) |
c896fe29 | 515 | { |
98156423 | 516 | if (GET_TCGV(ret) != GET_TCGV(arg)) { |
4d07272d BS |
517 | tcg_gen_mov_i32(ret, arg); |
518 | tcg_gen_mov_i32(TCGV_HIGH(ret), TCGV_HIGH(arg)); | |
519 | } | |
c896fe29 FB |
520 | } |
521 | ||
ac56dd48 | 522 | static inline void tcg_gen_movi_i64(TCGv ret, int64_t arg) |
c896fe29 FB |
523 | { |
524 | tcg_gen_movi_i32(ret, arg); | |
ac56dd48 | 525 | tcg_gen_movi_i32(TCGV_HIGH(ret), arg >> 32); |
c896fe29 FB |
526 | } |
527 | ||
ac56dd48 | 528 | static inline void tcg_gen_ld8u_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 FB |
529 | { |
530 | tcg_gen_ld8u_i32(ret, arg2, offset); | |
ac56dd48 | 531 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); |
c896fe29 FB |
532 | } |
533 | ||
ac56dd48 | 534 | static inline void tcg_gen_ld8s_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 FB |
535 | { |
536 | tcg_gen_ld8s_i32(ret, arg2, offset); | |
ac56dd48 | 537 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
c896fe29 FB |
538 | } |
539 | ||
ac56dd48 | 540 | static inline void tcg_gen_ld16u_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 FB |
541 | { |
542 | tcg_gen_ld16u_i32(ret, arg2, offset); | |
ac56dd48 | 543 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); |
c896fe29 FB |
544 | } |
545 | ||
ac56dd48 | 546 | static inline void tcg_gen_ld16s_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 FB |
547 | { |
548 | tcg_gen_ld16s_i32(ret, arg2, offset); | |
ac56dd48 | 549 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
c896fe29 FB |
550 | } |
551 | ||
ac56dd48 | 552 | static inline void tcg_gen_ld32u_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 FB |
553 | { |
554 | tcg_gen_ld_i32(ret, arg2, offset); | |
ac56dd48 | 555 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); |
c896fe29 FB |
556 | } |
557 | ||
ac56dd48 | 558 | static inline void tcg_gen_ld32s_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 FB |
559 | { |
560 | tcg_gen_ld_i32(ret, arg2, offset); | |
ac56dd48 | 561 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
c896fe29 FB |
562 | } |
563 | ||
ac56dd48 | 564 | static inline void tcg_gen_ld_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 FB |
565 | { |
566 | /* since arg2 and ret have different types, they cannot be the | |
567 | same temporary */ | |
568 | #ifdef TCG_TARGET_WORDS_BIGENDIAN | |
ac56dd48 | 569 | tcg_gen_ld_i32(TCGV_HIGH(ret), arg2, offset); |
c896fe29 FB |
570 | tcg_gen_ld_i32(ret, arg2, offset + 4); |
571 | #else | |
572 | tcg_gen_ld_i32(ret, arg2, offset); | |
ac56dd48 | 573 | tcg_gen_ld_i32(TCGV_HIGH(ret), arg2, offset + 4); |
c896fe29 FB |
574 | #endif |
575 | } | |
576 | ||
ac56dd48 | 577 | static inline void tcg_gen_st8_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
c896fe29 FB |
578 | { |
579 | tcg_gen_st8_i32(arg1, arg2, offset); | |
580 | } | |
581 | ||
ac56dd48 | 582 | static inline void tcg_gen_st16_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
c896fe29 FB |
583 | { |
584 | tcg_gen_st16_i32(arg1, arg2, offset); | |
585 | } | |
586 | ||
ac56dd48 | 587 | static inline void tcg_gen_st32_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
c896fe29 FB |
588 | { |
589 | tcg_gen_st_i32(arg1, arg2, offset); | |
590 | } | |
591 | ||
ac56dd48 | 592 | static inline void tcg_gen_st_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
c896fe29 FB |
593 | { |
594 | #ifdef TCG_TARGET_WORDS_BIGENDIAN | |
ac56dd48 | 595 | tcg_gen_st_i32(TCGV_HIGH(arg1), arg2, offset); |
c896fe29 FB |
596 | tcg_gen_st_i32(arg1, arg2, offset + 4); |
597 | #else | |
598 | tcg_gen_st_i32(arg1, arg2, offset); | |
ac56dd48 | 599 | tcg_gen_st_i32(TCGV_HIGH(arg1), arg2, offset + 4); |
c896fe29 FB |
600 | #endif |
601 | } | |
602 | ||
ac56dd48 | 603 | static inline void tcg_gen_add_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 | 604 | { |
ac56dd48 PB |
605 | tcg_gen_op6(INDEX_op_add2_i32, ret, TCGV_HIGH(ret), |
606 | arg1, TCGV_HIGH(arg1), arg2, TCGV_HIGH(arg2)); | |
c896fe29 FB |
607 | } |
608 | ||
ac56dd48 | 609 | static inline void tcg_gen_addi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 FB |
610 | { |
611 | tcg_gen_add_i64(ret, arg1, tcg_const_i64(arg2)); | |
612 | } | |
613 | ||
ac56dd48 | 614 | static inline void tcg_gen_sub_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 | 615 | { |
ac56dd48 PB |
616 | tcg_gen_op6(INDEX_op_sub2_i32, ret, TCGV_HIGH(ret), |
617 | arg1, TCGV_HIGH(arg1), arg2, TCGV_HIGH(arg2)); | |
c896fe29 FB |
618 | } |
619 | ||
ac56dd48 | 620 | static inline void tcg_gen_subi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 FB |
621 | { |
622 | tcg_gen_sub_i64(ret, arg1, tcg_const_i64(arg2)); | |
623 | } | |
624 | ||
ac56dd48 | 625 | static inline void tcg_gen_and_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
626 | { |
627 | tcg_gen_and_i32(ret, arg1, arg2); | |
ac56dd48 | 628 | tcg_gen_and_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2)); |
c896fe29 FB |
629 | } |
630 | ||
ac56dd48 | 631 | static inline void tcg_gen_andi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 FB |
632 | { |
633 | tcg_gen_andi_i32(ret, arg1, arg2); | |
ac56dd48 | 634 | tcg_gen_andi_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32); |
c896fe29 FB |
635 | } |
636 | ||
ac56dd48 | 637 | static inline void tcg_gen_or_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
638 | { |
639 | tcg_gen_or_i32(ret, arg1, arg2); | |
ac56dd48 | 640 | tcg_gen_or_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2)); |
c896fe29 FB |
641 | } |
642 | ||
ac56dd48 | 643 | static inline void tcg_gen_ori_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 FB |
644 | { |
645 | tcg_gen_ori_i32(ret, arg1, arg2); | |
ac56dd48 | 646 | tcg_gen_ori_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32); |
c896fe29 FB |
647 | } |
648 | ||
ac56dd48 | 649 | static inline void tcg_gen_xor_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
650 | { |
651 | tcg_gen_xor_i32(ret, arg1, arg2); | |
ac56dd48 | 652 | tcg_gen_xor_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2)); |
c896fe29 FB |
653 | } |
654 | ||
ac56dd48 | 655 | static inline void tcg_gen_xori_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 FB |
656 | { |
657 | tcg_gen_xori_i32(ret, arg1, arg2); | |
ac56dd48 | 658 | tcg_gen_xori_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32); |
c896fe29 FB |
659 | } |
660 | ||
661 | /* XXX: use generic code when basic block handling is OK or CPU | |
662 | specific code (x86) */ | |
ac56dd48 | 663 | static inline void tcg_gen_shl_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
664 | { |
665 | tcg_gen_helper_1_2(tcg_helper_shl_i64, ret, arg1, arg2); | |
666 | } | |
667 | ||
ac56dd48 | 668 | static inline void tcg_gen_shli_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 FB |
669 | { |
670 | tcg_gen_shifti_i64(ret, arg1, arg2, 0, 0); | |
671 | } | |
672 | ||
ac56dd48 | 673 | static inline void tcg_gen_shr_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
674 | { |
675 | tcg_gen_helper_1_2(tcg_helper_shr_i64, ret, arg1, arg2); | |
676 | } | |
677 | ||
ac56dd48 | 678 | static inline void tcg_gen_shri_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 FB |
679 | { |
680 | tcg_gen_shifti_i64(ret, arg1, arg2, 1, 0); | |
681 | } | |
682 | ||
ac56dd48 | 683 | static inline void tcg_gen_sar_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
684 | { |
685 | tcg_gen_helper_1_2(tcg_helper_sar_i64, ret, arg1, arg2); | |
686 | } | |
687 | ||
ac56dd48 | 688 | static inline void tcg_gen_sari_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 FB |
689 | { |
690 | tcg_gen_shifti_i64(ret, arg1, arg2, 1, 1); | |
691 | } | |
692 | ||
ac56dd48 | 693 | static inline void tcg_gen_brcond_i64(int cond, TCGv arg1, TCGv arg2, |
c896fe29 FB |
694 | int label_index) |
695 | { | |
ac56dd48 PB |
696 | tcg_gen_op6ii(INDEX_op_brcond2_i32, |
697 | arg1, TCGV_HIGH(arg1), arg2, TCGV_HIGH(arg2), | |
698 | cond, label_index); | |
c896fe29 FB |
699 | } |
700 | ||
ac56dd48 | 701 | static inline void tcg_gen_mul_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 | 702 | { |
ac56dd48 | 703 | TCGv t0, t1; |
c896fe29 FB |
704 | |
705 | t0 = tcg_temp_new(TCG_TYPE_I64); | |
706 | t1 = tcg_temp_new(TCG_TYPE_I32); | |
707 | ||
ac56dd48 | 708 | tcg_gen_op4(INDEX_op_mulu2_i32, t0, TCGV_HIGH(t0), arg1, arg2); |
c896fe29 | 709 | |
ac56dd48 PB |
710 | tcg_gen_mul_i32(t1, arg1, TCGV_HIGH(arg2)); |
711 | tcg_gen_add_i32(TCGV_HIGH(t0), TCGV_HIGH(t0), t1); | |
712 | tcg_gen_mul_i32(t1, TCGV_HIGH(arg1), arg2); | |
713 | tcg_gen_add_i32(TCGV_HIGH(t0), TCGV_HIGH(t0), t1); | |
c896fe29 FB |
714 | |
715 | tcg_gen_mov_i64(ret, t0); | |
716 | } | |
717 | ||
f730fd27 TS |
718 | static inline void tcg_gen_muli_i64(TCGv ret, TCGv arg1, int64_t arg2) |
719 | { | |
720 | tcg_gen_mul_i64(ret, arg1, tcg_const_i64(arg2)); | |
721 | } | |
722 | ||
ac56dd48 | 723 | static inline void tcg_gen_div_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
724 | { |
725 | tcg_gen_helper_1_2(tcg_helper_div_i64, ret, arg1, arg2); | |
726 | } | |
727 | ||
ac56dd48 | 728 | static inline void tcg_gen_rem_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
729 | { |
730 | tcg_gen_helper_1_2(tcg_helper_rem_i64, ret, arg1, arg2); | |
731 | } | |
732 | ||
ac56dd48 | 733 | static inline void tcg_gen_divu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
734 | { |
735 | tcg_gen_helper_1_2(tcg_helper_divu_i64, ret, arg1, arg2); | |
736 | } | |
737 | ||
ac56dd48 | 738 | static inline void tcg_gen_remu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
739 | { |
740 | tcg_gen_helper_1_2(tcg_helper_remu_i64, ret, arg1, arg2); | |
741 | } | |
742 | ||
743 | #else | |
744 | ||
ac56dd48 | 745 | static inline void tcg_gen_mov_i64(TCGv ret, TCGv arg) |
c896fe29 | 746 | { |
98156423 | 747 | if (GET_TCGV(ret) != GET_TCGV(arg)) |
4d07272d | 748 | tcg_gen_op2(INDEX_op_mov_i64, ret, arg); |
c896fe29 FB |
749 | } |
750 | ||
ac56dd48 | 751 | static inline void tcg_gen_movi_i64(TCGv ret, int64_t arg) |
c896fe29 | 752 | { |
ac56dd48 | 753 | tcg_gen_op2i(INDEX_op_movi_i64, ret, arg); |
c896fe29 FB |
754 | } |
755 | ||
ac56dd48 PB |
756 | static inline void tcg_gen_ld8u_i64(TCGv ret, TCGv arg2, |
757 | tcg_target_long offset) | |
c896fe29 | 758 | { |
ac56dd48 | 759 | tcg_gen_op3i(INDEX_op_ld8u_i64, ret, arg2, offset); |
c896fe29 FB |
760 | } |
761 | ||
ac56dd48 PB |
762 | static inline void tcg_gen_ld8s_i64(TCGv ret, TCGv arg2, |
763 | tcg_target_long offset) | |
c896fe29 | 764 | { |
ac56dd48 | 765 | tcg_gen_op3i(INDEX_op_ld8s_i64, ret, arg2, offset); |
c896fe29 FB |
766 | } |
767 | ||
ac56dd48 PB |
768 | static inline void tcg_gen_ld16u_i64(TCGv ret, TCGv arg2, |
769 | tcg_target_long offset) | |
c896fe29 | 770 | { |
ac56dd48 | 771 | tcg_gen_op3i(INDEX_op_ld16u_i64, ret, arg2, offset); |
c896fe29 FB |
772 | } |
773 | ||
ac56dd48 PB |
774 | static inline void tcg_gen_ld16s_i64(TCGv ret, TCGv arg2, |
775 | tcg_target_long offset) | |
c896fe29 | 776 | { |
ac56dd48 | 777 | tcg_gen_op3i(INDEX_op_ld16s_i64, ret, arg2, offset); |
c896fe29 FB |
778 | } |
779 | ||
ac56dd48 PB |
780 | static inline void tcg_gen_ld32u_i64(TCGv ret, TCGv arg2, |
781 | tcg_target_long offset) | |
c896fe29 | 782 | { |
ac56dd48 | 783 | tcg_gen_op3i(INDEX_op_ld32u_i64, ret, arg2, offset); |
c896fe29 FB |
784 | } |
785 | ||
ac56dd48 PB |
786 | static inline void tcg_gen_ld32s_i64(TCGv ret, TCGv arg2, |
787 | tcg_target_long offset) | |
c896fe29 | 788 | { |
ac56dd48 | 789 | tcg_gen_op3i(INDEX_op_ld32s_i64, ret, arg2, offset); |
c896fe29 FB |
790 | } |
791 | ||
ac56dd48 | 792 | static inline void tcg_gen_ld_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 | 793 | { |
ac56dd48 | 794 | tcg_gen_op3i(INDEX_op_ld_i64, ret, arg2, offset); |
c896fe29 FB |
795 | } |
796 | ||
ac56dd48 PB |
797 | static inline void tcg_gen_st8_i64(TCGv arg1, TCGv arg2, |
798 | tcg_target_long offset) | |
c896fe29 | 799 | { |
ac56dd48 | 800 | tcg_gen_op3i(INDEX_op_st8_i64, arg1, arg2, offset); |
c896fe29 FB |
801 | } |
802 | ||
ac56dd48 PB |
803 | static inline void tcg_gen_st16_i64(TCGv arg1, TCGv arg2, |
804 | tcg_target_long offset) | |
c896fe29 | 805 | { |
ac56dd48 | 806 | tcg_gen_op3i(INDEX_op_st16_i64, arg1, arg2, offset); |
c896fe29 FB |
807 | } |
808 | ||
ac56dd48 PB |
809 | static inline void tcg_gen_st32_i64(TCGv arg1, TCGv arg2, |
810 | tcg_target_long offset) | |
c896fe29 | 811 | { |
ac56dd48 | 812 | tcg_gen_op3i(INDEX_op_st32_i64, arg1, arg2, offset); |
c896fe29 FB |
813 | } |
814 | ||
ac56dd48 | 815 | static inline void tcg_gen_st_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
c896fe29 | 816 | { |
ac56dd48 | 817 | tcg_gen_op3i(INDEX_op_st_i64, arg1, arg2, offset); |
c896fe29 FB |
818 | } |
819 | ||
ac56dd48 | 820 | static inline void tcg_gen_add_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
821 | { |
822 | tcg_gen_op3(INDEX_op_add_i64, ret, arg1, arg2); | |
823 | } | |
824 | ||
ac56dd48 | 825 | static inline void tcg_gen_addi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 FB |
826 | { |
827 | tcg_gen_add_i64(ret, arg1, tcg_const_i64(arg2)); | |
828 | } | |
829 | ||
ac56dd48 | 830 | static inline void tcg_gen_sub_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
831 | { |
832 | tcg_gen_op3(INDEX_op_sub_i64, ret, arg1, arg2); | |
833 | } | |
834 | ||
ac56dd48 | 835 | static inline void tcg_gen_subi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 FB |
836 | { |
837 | tcg_gen_sub_i64(ret, arg1, tcg_const_i64(arg2)); | |
838 | } | |
839 | ||
ac56dd48 | 840 | static inline void tcg_gen_and_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
841 | { |
842 | tcg_gen_op3(INDEX_op_and_i64, ret, arg1, arg2); | |
843 | } | |
844 | ||
ac56dd48 | 845 | static inline void tcg_gen_andi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 FB |
846 | { |
847 | tcg_gen_and_i64(ret, arg1, tcg_const_i64(arg2)); | |
848 | } | |
849 | ||
ac56dd48 | 850 | static inline void tcg_gen_or_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
851 | { |
852 | tcg_gen_op3(INDEX_op_or_i64, ret, arg1, arg2); | |
853 | } | |
854 | ||
ac56dd48 | 855 | static inline void tcg_gen_ori_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 FB |
856 | { |
857 | tcg_gen_or_i64(ret, arg1, tcg_const_i64(arg2)); | |
858 | } | |
859 | ||
ac56dd48 | 860 | static inline void tcg_gen_xor_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
861 | { |
862 | tcg_gen_op3(INDEX_op_xor_i64, ret, arg1, arg2); | |
863 | } | |
864 | ||
ac56dd48 | 865 | static inline void tcg_gen_xori_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 FB |
866 | { |
867 | tcg_gen_xor_i64(ret, arg1, tcg_const_i64(arg2)); | |
868 | } | |
869 | ||
ac56dd48 | 870 | static inline void tcg_gen_shl_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
871 | { |
872 | tcg_gen_op3(INDEX_op_shl_i64, ret, arg1, arg2); | |
873 | } | |
874 | ||
ac56dd48 | 875 | static inline void tcg_gen_shli_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 | 876 | { |
34151a20 FB |
877 | if (arg2 == 0) { |
878 | tcg_gen_mov_i64(ret, arg1); | |
879 | } else { | |
880 | tcg_gen_shl_i64(ret, arg1, tcg_const_i64(arg2)); | |
881 | } | |
c896fe29 FB |
882 | } |
883 | ||
ac56dd48 | 884 | static inline void tcg_gen_shr_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
885 | { |
886 | tcg_gen_op3(INDEX_op_shr_i64, ret, arg1, arg2); | |
887 | } | |
888 | ||
ac56dd48 | 889 | static inline void tcg_gen_shri_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 | 890 | { |
34151a20 FB |
891 | if (arg2 == 0) { |
892 | tcg_gen_mov_i64(ret, arg1); | |
893 | } else { | |
894 | tcg_gen_shr_i64(ret, arg1, tcg_const_i64(arg2)); | |
895 | } | |
c896fe29 FB |
896 | } |
897 | ||
ac56dd48 | 898 | static inline void tcg_gen_sar_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
899 | { |
900 | tcg_gen_op3(INDEX_op_sar_i64, ret, arg1, arg2); | |
901 | } | |
902 | ||
ac56dd48 | 903 | static inline void tcg_gen_sari_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 | 904 | { |
34151a20 FB |
905 | if (arg2 == 0) { |
906 | tcg_gen_mov_i64(ret, arg1); | |
907 | } else { | |
908 | tcg_gen_sar_i64(ret, arg1, tcg_const_i64(arg2)); | |
909 | } | |
c896fe29 FB |
910 | } |
911 | ||
ac56dd48 | 912 | static inline void tcg_gen_brcond_i64(int cond, TCGv arg1, TCGv arg2, |
c896fe29 FB |
913 | int label_index) |
914 | { | |
ac56dd48 | 915 | tcg_gen_op4ii(INDEX_op_brcond_i64, arg1, arg2, cond, label_index); |
c896fe29 FB |
916 | } |
917 | ||
ac56dd48 | 918 | static inline void tcg_gen_mul_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
919 | { |
920 | tcg_gen_op3(INDEX_op_mul_i64, ret, arg1, arg2); | |
921 | } | |
922 | ||
f730fd27 TS |
923 | static inline void tcg_gen_muli_i64(TCGv ret, TCGv arg1, int64_t arg2) |
924 | { | |
925 | tcg_gen_mul_i64(ret, arg1, tcg_const_i64(arg2)); | |
926 | } | |
927 | ||
c896fe29 | 928 | #ifdef TCG_TARGET_HAS_div_i64 |
ac56dd48 | 929 | static inline void tcg_gen_div_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
930 | { |
931 | tcg_gen_op3(INDEX_op_div_i64, ret, arg1, arg2); | |
932 | } | |
933 | ||
ac56dd48 | 934 | static inline void tcg_gen_rem_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
935 | { |
936 | tcg_gen_op3(INDEX_op_rem_i64, ret, arg1, arg2); | |
937 | } | |
938 | ||
ac56dd48 | 939 | static inline void tcg_gen_divu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
940 | { |
941 | tcg_gen_op3(INDEX_op_divu_i64, ret, arg1, arg2); | |
942 | } | |
943 | ||
ac56dd48 | 944 | static inline void tcg_gen_remu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
945 | { |
946 | tcg_gen_op3(INDEX_op_remu_i64, ret, arg1, arg2); | |
947 | } | |
948 | #else | |
ac56dd48 | 949 | static inline void tcg_gen_div_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 | 950 | { |
ac56dd48 | 951 | TCGv t0; |
c896fe29 FB |
952 | t0 = tcg_temp_new(TCG_TYPE_I64); |
953 | tcg_gen_sari_i64(t0, arg1, 63); | |
954 | tcg_gen_op5(INDEX_op_div2_i64, ret, t0, arg1, t0, arg2); | |
955 | } | |
956 | ||
ac56dd48 | 957 | static inline void tcg_gen_rem_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 | 958 | { |
ac56dd48 | 959 | TCGv t0; |
c896fe29 FB |
960 | t0 = tcg_temp_new(TCG_TYPE_I64); |
961 | tcg_gen_sari_i64(t0, arg1, 63); | |
962 | tcg_gen_op5(INDEX_op_div2_i64, t0, ret, arg1, t0, arg2); | |
963 | } | |
964 | ||
ac56dd48 | 965 | static inline void tcg_gen_divu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 | 966 | { |
ac56dd48 | 967 | TCGv t0; |
c896fe29 FB |
968 | t0 = tcg_temp_new(TCG_TYPE_I64); |
969 | tcg_gen_movi_i64(t0, 0); | |
970 | tcg_gen_op5(INDEX_op_divu2_i64, ret, t0, arg1, t0, arg2); | |
971 | } | |
972 | ||
ac56dd48 | 973 | static inline void tcg_gen_remu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 | 974 | { |
ac56dd48 | 975 | TCGv t0; |
c896fe29 FB |
976 | t0 = tcg_temp_new(TCG_TYPE_I64); |
977 | tcg_gen_movi_i64(t0, 0); | |
978 | tcg_gen_op5(INDEX_op_divu2_i64, t0, ret, arg1, t0, arg2); | |
979 | } | |
980 | #endif | |
981 | ||
982 | #endif | |
983 | ||
984 | /***************************************/ | |
985 | /* optional operations */ | |
986 | ||
ac56dd48 | 987 | static inline void tcg_gen_ext8s_i32(TCGv ret, TCGv arg) |
c896fe29 FB |
988 | { |
989 | #ifdef TCG_TARGET_HAS_ext8s_i32 | |
990 | tcg_gen_op2(INDEX_op_ext8s_i32, ret, arg); | |
991 | #else | |
992 | tcg_gen_shli_i32(ret, arg, 24); | |
5ff9d6a4 | 993 | tcg_gen_sari_i32(ret, ret, 24); |
c896fe29 FB |
994 | #endif |
995 | } | |
996 | ||
ac56dd48 | 997 | static inline void tcg_gen_ext16s_i32(TCGv ret, TCGv arg) |
c896fe29 FB |
998 | { |
999 | #ifdef TCG_TARGET_HAS_ext16s_i32 | |
1000 | tcg_gen_op2(INDEX_op_ext16s_i32, ret, arg); | |
1001 | #else | |
1002 | tcg_gen_shli_i32(ret, arg, 16); | |
5ff9d6a4 | 1003 | tcg_gen_sari_i32(ret, ret, 16); |
c896fe29 FB |
1004 | #endif |
1005 | } | |
1006 | ||
86831435 PB |
1007 | /* These are currently just for convenience. |
1008 | We assume a target will recognise these automatically . */ | |
1009 | static inline void tcg_gen_ext8u_i32(TCGv ret, TCGv arg) | |
1010 | { | |
1011 | tcg_gen_andi_i32(ret, arg, 0xffu); | |
1012 | } | |
1013 | ||
1014 | static inline void tcg_gen_ext16u_i32(TCGv ret, TCGv arg) | |
1015 | { | |
1016 | tcg_gen_andi_i32(ret, arg, 0xffffu); | |
1017 | } | |
1018 | ||
c896fe29 | 1019 | /* Note: we assume the two high bytes are set to zero */ |
ac56dd48 | 1020 | static inline void tcg_gen_bswap16_i32(TCGv ret, TCGv arg) |
c896fe29 FB |
1021 | { |
1022 | #ifdef TCG_TARGET_HAS_bswap16_i32 | |
1023 | tcg_gen_op2(INDEX_op_bswap16_i32, ret, arg); | |
1024 | #else | |
ac56dd48 | 1025 | TCGv t0, t1; |
c896fe29 FB |
1026 | t0 = tcg_temp_new(TCG_TYPE_I32); |
1027 | t1 = tcg_temp_new(TCG_TYPE_I32); | |
1028 | ||
1029 | tcg_gen_shri_i32(t0, arg, 8); | |
1030 | tcg_gen_andi_i32(t1, arg, 0x000000ff); | |
1031 | tcg_gen_shli_i32(t1, t1, 8); | |
1032 | tcg_gen_or_i32(ret, t0, t1); | |
1033 | #endif | |
1034 | } | |
1035 | ||
ac56dd48 | 1036 | static inline void tcg_gen_bswap_i32(TCGv ret, TCGv arg) |
c896fe29 FB |
1037 | { |
1038 | #ifdef TCG_TARGET_HAS_bswap_i32 | |
1039 | tcg_gen_op2(INDEX_op_bswap_i32, ret, arg); | |
1040 | #else | |
ac56dd48 | 1041 | TCGv t0, t1; |
c896fe29 FB |
1042 | t0 = tcg_temp_new(TCG_TYPE_I32); |
1043 | t1 = tcg_temp_new(TCG_TYPE_I32); | |
1044 | ||
1045 | tcg_gen_shli_i32(t0, arg, 24); | |
1046 | ||
1047 | tcg_gen_andi_i32(t1, arg, 0x0000ff00); | |
1048 | tcg_gen_shli_i32(t1, t1, 8); | |
1049 | tcg_gen_or_i32(t0, t0, t1); | |
1050 | ||
1051 | tcg_gen_shri_i32(t1, arg, 8); | |
1052 | tcg_gen_andi_i32(t1, t1, 0x0000ff00); | |
1053 | tcg_gen_or_i32(t0, t0, t1); | |
1054 | ||
1055 | tcg_gen_shri_i32(t1, arg, 24); | |
1056 | tcg_gen_or_i32(ret, t0, t1); | |
1057 | #endif | |
1058 | } | |
1059 | ||
1060 | #if TCG_TARGET_REG_BITS == 32 | |
ac56dd48 | 1061 | static inline void tcg_gen_ext8s_i64(TCGv ret, TCGv arg) |
c896fe29 FB |
1062 | { |
1063 | tcg_gen_ext8s_i32(ret, arg); | |
ac56dd48 | 1064 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
c896fe29 FB |
1065 | } |
1066 | ||
ac56dd48 | 1067 | static inline void tcg_gen_ext16s_i64(TCGv ret, TCGv arg) |
c896fe29 FB |
1068 | { |
1069 | tcg_gen_ext16s_i32(ret, arg); | |
ac56dd48 | 1070 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
c896fe29 FB |
1071 | } |
1072 | ||
ac56dd48 | 1073 | static inline void tcg_gen_ext32s_i64(TCGv ret, TCGv arg) |
c896fe29 FB |
1074 | { |
1075 | tcg_gen_mov_i32(ret, arg); | |
ac56dd48 | 1076 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
c896fe29 FB |
1077 | } |
1078 | ||
86831435 PB |
1079 | static inline void tcg_gen_ext8u_i64(TCGv ret, TCGv arg) |
1080 | { | |
1081 | tcg_gen_ext8u_i32(ret, arg); | |
1082 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); | |
1083 | } | |
1084 | ||
1085 | static inline void tcg_gen_ext16u_i64(TCGv ret, TCGv arg) | |
1086 | { | |
1087 | tcg_gen_ext16u_i32(ret, arg); | |
1088 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); | |
1089 | } | |
1090 | ||
1091 | static inline void tcg_gen_ext32u_i64(TCGv ret, TCGv arg) | |
1092 | { | |
1093 | tcg_gen_mov_i32(ret, arg); | |
1094 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); | |
1095 | } | |
1096 | ||
ac56dd48 | 1097 | static inline void tcg_gen_trunc_i64_i32(TCGv ret, TCGv arg) |
c896fe29 FB |
1098 | { |
1099 | tcg_gen_mov_i32(ret, arg); | |
1100 | } | |
1101 | ||
ac56dd48 | 1102 | static inline void tcg_gen_extu_i32_i64(TCGv ret, TCGv arg) |
c896fe29 FB |
1103 | { |
1104 | tcg_gen_mov_i32(ret, arg); | |
ac56dd48 | 1105 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); |
c896fe29 FB |
1106 | } |
1107 | ||
ac56dd48 | 1108 | static inline void tcg_gen_ext_i32_i64(TCGv ret, TCGv arg) |
c896fe29 FB |
1109 | { |
1110 | tcg_gen_mov_i32(ret, arg); | |
ac56dd48 | 1111 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
c896fe29 FB |
1112 | } |
1113 | ||
ac56dd48 | 1114 | static inline void tcg_gen_bswap_i64(TCGv ret, TCGv arg) |
c896fe29 | 1115 | { |
ac56dd48 | 1116 | TCGv t0, t1; |
c896fe29 FB |
1117 | t0 = tcg_temp_new(TCG_TYPE_I32); |
1118 | t1 = tcg_temp_new(TCG_TYPE_I32); | |
1119 | ||
1120 | tcg_gen_bswap_i32(t0, arg); | |
ac56dd48 | 1121 | tcg_gen_bswap_i32(t1, TCGV_HIGH(arg)); |
c896fe29 | 1122 | tcg_gen_mov_i32(ret, t1); |
ac56dd48 | 1123 | tcg_gen_mov_i32(TCGV_HIGH(ret), t0); |
c896fe29 FB |
1124 | } |
1125 | #else | |
1126 | ||
ac56dd48 | 1127 | static inline void tcg_gen_ext8s_i64(TCGv ret, TCGv arg) |
c896fe29 FB |
1128 | { |
1129 | #ifdef TCG_TARGET_HAS_ext8s_i64 | |
1130 | tcg_gen_op2(INDEX_op_ext8s_i64, ret, arg); | |
1131 | #else | |
1132 | tcg_gen_shli_i64(ret, arg, 56); | |
5ff9d6a4 | 1133 | tcg_gen_sari_i64(ret, ret, 56); |
c896fe29 FB |
1134 | #endif |
1135 | } | |
1136 | ||
ac56dd48 | 1137 | static inline void tcg_gen_ext16s_i64(TCGv ret, TCGv arg) |
c896fe29 FB |
1138 | { |
1139 | #ifdef TCG_TARGET_HAS_ext16s_i64 | |
1140 | tcg_gen_op2(INDEX_op_ext16s_i64, ret, arg); | |
1141 | #else | |
1142 | tcg_gen_shli_i64(ret, arg, 48); | |
5ff9d6a4 | 1143 | tcg_gen_sari_i64(ret, ret, 48); |
c896fe29 FB |
1144 | #endif |
1145 | } | |
1146 | ||
ac56dd48 | 1147 | static inline void tcg_gen_ext32s_i64(TCGv ret, TCGv arg) |
c896fe29 FB |
1148 | { |
1149 | #ifdef TCG_TARGET_HAS_ext32s_i64 | |
1150 | tcg_gen_op2(INDEX_op_ext32s_i64, ret, arg); | |
1151 | #else | |
1152 | tcg_gen_shli_i64(ret, arg, 32); | |
5ff9d6a4 | 1153 | tcg_gen_sari_i64(ret, ret, 32); |
c896fe29 FB |
1154 | #endif |
1155 | } | |
1156 | ||
86831435 PB |
1157 | static inline void tcg_gen_ext8u_i64(TCGv ret, TCGv arg) |
1158 | { | |
1159 | tcg_gen_andi_i64(ret, arg, 0xffu); | |
1160 | } | |
1161 | ||
1162 | static inline void tcg_gen_ext16u_i64(TCGv ret, TCGv arg) | |
1163 | { | |
1164 | tcg_gen_andi_i64(ret, arg, 0xffffu); | |
1165 | } | |
1166 | ||
1167 | static inline void tcg_gen_ext32u_i64(TCGv ret, TCGv arg) | |
1168 | { | |
1169 | tcg_gen_andi_i64(ret, arg, 0xffffffffu); | |
1170 | } | |
1171 | ||
c896fe29 | 1172 | /* Note: we assume the target supports move between 32 and 64 bit |
ac56dd48 PB |
1173 | registers. This will probably break MIPS64 targets. */ |
1174 | static inline void tcg_gen_trunc_i64_i32(TCGv ret, TCGv arg) | |
c896fe29 FB |
1175 | { |
1176 | tcg_gen_mov_i32(ret, arg); | |
1177 | } | |
1178 | ||
1179 | /* Note: we assume the target supports move between 32 and 64 bit | |
1180 | registers */ | |
ac56dd48 | 1181 | static inline void tcg_gen_extu_i32_i64(TCGv ret, TCGv arg) |
c896fe29 | 1182 | { |
86831435 | 1183 | tcg_gen_andi_i64(ret, arg, 0xffffffffu); |
c896fe29 FB |
1184 | } |
1185 | ||
1186 | /* Note: we assume the target supports move between 32 and 64 bit | |
1187 | registers */ | |
ac56dd48 | 1188 | static inline void tcg_gen_ext_i32_i64(TCGv ret, TCGv arg) |
c896fe29 FB |
1189 | { |
1190 | tcg_gen_ext32s_i64(ret, arg); | |
1191 | } | |
1192 | ||
ac56dd48 | 1193 | static inline void tcg_gen_bswap_i64(TCGv ret, TCGv arg) |
c896fe29 FB |
1194 | { |
1195 | #ifdef TCG_TARGET_HAS_bswap_i64 | |
1196 | tcg_gen_op2(INDEX_op_bswap_i64, ret, arg); | |
1197 | #else | |
ac56dd48 | 1198 | TCGv t0, t1; |
c896fe29 FB |
1199 | t0 = tcg_temp_new(TCG_TYPE_I32); |
1200 | t1 = tcg_temp_new(TCG_TYPE_I32); | |
1201 | ||
1202 | tcg_gen_shli_i64(t0, arg, 56); | |
1203 | ||
1204 | tcg_gen_andi_i64(t1, arg, 0x0000ff00); | |
1205 | tcg_gen_shli_i64(t1, t1, 40); | |
1206 | tcg_gen_or_i64(t0, t0, t1); | |
1207 | ||
1208 | tcg_gen_andi_i64(t1, arg, 0x00ff0000); | |
1209 | tcg_gen_shli_i64(t1, t1, 24); | |
1210 | tcg_gen_or_i64(t0, t0, t1); | |
1211 | ||
1212 | tcg_gen_andi_i64(t1, arg, 0xff000000); | |
1213 | tcg_gen_shli_i64(t1, t1, 8); | |
1214 | tcg_gen_or_i64(t0, t0, t1); | |
1215 | ||
1216 | tcg_gen_shri_i64(t1, arg, 8); | |
1217 | tcg_gen_andi_i64(t1, t1, 0xff000000); | |
1218 | tcg_gen_or_i64(t0, t0, t1); | |
1219 | ||
1220 | tcg_gen_shri_i64(t1, arg, 24); | |
1221 | tcg_gen_andi_i64(t1, t1, 0x00ff0000); | |
1222 | tcg_gen_or_i64(t0, t0, t1); | |
1223 | ||
1224 | tcg_gen_shri_i64(t1, arg, 40); | |
1225 | tcg_gen_andi_i64(t1, t1, 0x0000ff00); | |
1226 | tcg_gen_or_i64(t0, t0, t1); | |
1227 | ||
1228 | tcg_gen_shri_i64(t1, arg, 56); | |
1229 | tcg_gen_or_i64(ret, t0, t1); | |
1230 | #endif | |
1231 | } | |
1232 | ||
1233 | #endif | |
1234 | ||
390efc54 PB |
1235 | static inline void tcg_gen_neg_i32(TCGv ret, TCGv arg) |
1236 | { | |
1237 | #ifdef TCG_TARGET_HAS_neg_i32 | |
1238 | tcg_gen_op2(INDEX_op_neg_i32, ret, arg); | |
1239 | #else | |
1240 | tcg_gen_sub_i32(ret, tcg_const_i32(0), arg); | |
1241 | #endif | |
1242 | } | |
1243 | ||
1244 | static inline void tcg_gen_neg_i64(TCGv ret, TCGv arg) | |
1245 | { | |
1246 | #ifdef TCG_TARGET_HAS_neg_i64 | |
1247 | tcg_gen_op2(INDEX_op_neg_i64, ret, arg); | |
1248 | #else | |
1249 | tcg_gen_sub_i64(ret, tcg_const_i64(0), arg); | |
1250 | #endif | |
1251 | } | |
1252 | ||
0b6ce4cf FB |
1253 | static inline void tcg_gen_not_i32(TCGv ret, TCGv arg) |
1254 | { | |
1255 | tcg_gen_xor_i32(ret, arg, tcg_const_i32(-1)); | |
1256 | } | |
1257 | ||
1258 | static inline void tcg_gen_not_i64(TCGv ret, TCGv arg) | |
1259 | { | |
1260 | tcg_gen_xor_i64(ret, arg, tcg_const_i64(-1)); | |
1261 | } | |
5ff9d6a4 FB |
1262 | |
1263 | static inline void tcg_gen_discard_i32(TCGv arg) | |
1264 | { | |
1265 | tcg_gen_op1(INDEX_op_discard, arg); | |
1266 | } | |
1267 | ||
1268 | #if TCG_TARGET_REG_BITS == 32 | |
1269 | static inline void tcg_gen_discard_i64(TCGv arg) | |
1270 | { | |
1271 | tcg_gen_discard_i32(arg); | |
1272 | tcg_gen_discard_i32(TCGV_HIGH(arg)); | |
1273 | } | |
1274 | #else | |
1275 | static inline void tcg_gen_discard_i64(TCGv arg) | |
1276 | { | |
1277 | tcg_gen_op1(INDEX_op_discard, arg); | |
1278 | } | |
1279 | #endif | |
1280 | ||
c896fe29 | 1281 | /***************************************/ |
ac56dd48 | 1282 | static inline void tcg_gen_macro_2(TCGv ret0, TCGv ret1, int macro_id) |
c896fe29 | 1283 | { |
ac56dd48 | 1284 | tcg_gen_op3i(INDEX_op_macro_2, ret0, ret1, macro_id); |
c896fe29 FB |
1285 | } |
1286 | ||
1287 | /***************************************/ | |
1288 | /* QEMU specific operations. Their type depend on the QEMU CPU | |
1289 | type. */ | |
1290 | #ifndef TARGET_LONG_BITS | |
1291 | #error must include QEMU headers | |
1292 | #endif | |
1293 | ||
7e4597d7 FB |
1294 | /* debug info: write the PC of the corresponding QEMU CPU instruction */ |
1295 | static inline void tcg_gen_debug_insn_start(uint64_t pc) | |
1296 | { | |
1297 | /* XXX: must really use a 32 bit size for TCGArg in all cases */ | |
1298 | #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS | |
1299 | tcg_gen_op2i(INDEX_op_debug_insn_start, | |
1300 | (uint32_t)(pc), (uint32_t)(pc >> 32)); | |
1301 | #else | |
1302 | tcg_gen_op1i(INDEX_op_debug_insn_start, pc); | |
1303 | #endif | |
1304 | } | |
1305 | ||
c896fe29 FB |
1306 | static inline void tcg_gen_exit_tb(tcg_target_long val) |
1307 | { | |
ac56dd48 | 1308 | tcg_gen_op1i(INDEX_op_exit_tb, val); |
c896fe29 FB |
1309 | } |
1310 | ||
1311 | static inline void tcg_gen_goto_tb(int idx) | |
1312 | { | |
ac56dd48 | 1313 | tcg_gen_op1i(INDEX_op_goto_tb, idx); |
c896fe29 FB |
1314 | } |
1315 | ||
1316 | #if TCG_TARGET_REG_BITS == 32 | |
ac56dd48 | 1317 | static inline void tcg_gen_qemu_ld8u(TCGv ret, TCGv addr, int mem_index) |
c896fe29 FB |
1318 | { |
1319 | #if TARGET_LONG_BITS == 32 | |
ac56dd48 | 1320 | tcg_gen_op3i(INDEX_op_qemu_ld8u, ret, addr, mem_index); |
c896fe29 | 1321 | #else |
ac56dd48 PB |
1322 | tcg_gen_op4i(INDEX_op_qemu_ld8u, ret, addr, TCGV_HIGH(addr), mem_index); |
1323 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); | |
c896fe29 FB |
1324 | #endif |
1325 | } | |
1326 | ||
ac56dd48 | 1327 | static inline void tcg_gen_qemu_ld8s(TCGv ret, TCGv addr, int mem_index) |
c896fe29 FB |
1328 | { |
1329 | #if TARGET_LONG_BITS == 32 | |
ac56dd48 | 1330 | tcg_gen_op3i(INDEX_op_qemu_ld8s, ret, addr, mem_index); |
c896fe29 | 1331 | #else |
ac56dd48 | 1332 | tcg_gen_op4i(INDEX_op_qemu_ld8s, ret, addr, TCGV_HIGH(addr), mem_index); |
21fc3cfc | 1333 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
c896fe29 FB |
1334 | #endif |
1335 | } | |
1336 | ||
ac56dd48 | 1337 | static inline void tcg_gen_qemu_ld16u(TCGv ret, TCGv addr, int mem_index) |
c896fe29 FB |
1338 | { |
1339 | #if TARGET_LONG_BITS == 32 | |
ac56dd48 | 1340 | tcg_gen_op3i(INDEX_op_qemu_ld16u, ret, addr, mem_index); |
c896fe29 | 1341 | #else |
ac56dd48 PB |
1342 | tcg_gen_op4i(INDEX_op_qemu_ld16u, ret, addr, TCGV_HIGH(addr), mem_index); |
1343 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); | |
c896fe29 FB |
1344 | #endif |
1345 | } | |
1346 | ||
ac56dd48 | 1347 | static inline void tcg_gen_qemu_ld16s(TCGv ret, TCGv addr, int mem_index) |
c896fe29 FB |
1348 | { |
1349 | #if TARGET_LONG_BITS == 32 | |
ac56dd48 | 1350 | tcg_gen_op3i(INDEX_op_qemu_ld16s, ret, addr, mem_index); |
c896fe29 | 1351 | #else |
ac56dd48 | 1352 | tcg_gen_op4i(INDEX_op_qemu_ld16s, ret, addr, TCGV_HIGH(addr), mem_index); |
21fc3cfc | 1353 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
c896fe29 FB |
1354 | #endif |
1355 | } | |
1356 | ||
ac56dd48 | 1357 | static inline void tcg_gen_qemu_ld32u(TCGv ret, TCGv addr, int mem_index) |
c896fe29 FB |
1358 | { |
1359 | #if TARGET_LONG_BITS == 32 | |
ac56dd48 | 1360 | tcg_gen_op3i(INDEX_op_qemu_ld32u, ret, addr, mem_index); |
c896fe29 | 1361 | #else |
ac56dd48 PB |
1362 | tcg_gen_op4i(INDEX_op_qemu_ld32u, ret, addr, TCGV_HIGH(addr), mem_index); |
1363 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); | |
c896fe29 FB |
1364 | #endif |
1365 | } | |
1366 | ||
ac56dd48 | 1367 | static inline void tcg_gen_qemu_ld32s(TCGv ret, TCGv addr, int mem_index) |
c896fe29 FB |
1368 | { |
1369 | #if TARGET_LONG_BITS == 32 | |
ac56dd48 | 1370 | tcg_gen_op3i(INDEX_op_qemu_ld32u, ret, addr, mem_index); |
c896fe29 | 1371 | #else |
ac56dd48 PB |
1372 | tcg_gen_op4i(INDEX_op_qemu_ld32u, ret, addr, TCGV_HIGH(addr), mem_index); |
1373 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); | |
c896fe29 FB |
1374 | #endif |
1375 | } | |
1376 | ||
ac56dd48 | 1377 | static inline void tcg_gen_qemu_ld64(TCGv ret, TCGv addr, int mem_index) |
c896fe29 FB |
1378 | { |
1379 | #if TARGET_LONG_BITS == 32 | |
ac56dd48 | 1380 | tcg_gen_op4i(INDEX_op_qemu_ld64, ret, TCGV_HIGH(ret), addr, mem_index); |
c896fe29 | 1381 | #else |
ac56dd48 PB |
1382 | tcg_gen_op5i(INDEX_op_qemu_ld64, ret, TCGV_HIGH(ret), |
1383 | addr, TCGV_HIGH(addr), mem_index); | |
c896fe29 FB |
1384 | #endif |
1385 | } | |
1386 | ||
ac56dd48 | 1387 | static inline void tcg_gen_qemu_st8(TCGv arg, TCGv addr, int mem_index) |
c896fe29 FB |
1388 | { |
1389 | #if TARGET_LONG_BITS == 32 | |
ac56dd48 | 1390 | tcg_gen_op3i(INDEX_op_qemu_st8, arg, addr, mem_index); |
c896fe29 | 1391 | #else |
ac56dd48 | 1392 | tcg_gen_op4i(INDEX_op_qemu_st8, arg, addr, TCGV_HIGH(addr), mem_index); |
c896fe29 FB |
1393 | #endif |
1394 | } | |
1395 | ||
ac56dd48 | 1396 | static inline void tcg_gen_qemu_st16(TCGv arg, TCGv addr, int mem_index) |
c896fe29 FB |
1397 | { |
1398 | #if TARGET_LONG_BITS == 32 | |
ac56dd48 | 1399 | tcg_gen_op3i(INDEX_op_qemu_st16, arg, addr, mem_index); |
c896fe29 | 1400 | #else |
ac56dd48 | 1401 | tcg_gen_op4i(INDEX_op_qemu_st16, arg, addr, TCGV_HIGH(addr), mem_index); |
c896fe29 FB |
1402 | #endif |
1403 | } | |
1404 | ||
ac56dd48 | 1405 | static inline void tcg_gen_qemu_st32(TCGv arg, TCGv addr, int mem_index) |
c896fe29 FB |
1406 | { |
1407 | #if TARGET_LONG_BITS == 32 | |
ac56dd48 | 1408 | tcg_gen_op3i(INDEX_op_qemu_st32, arg, addr, mem_index); |
c896fe29 | 1409 | #else |
ac56dd48 | 1410 | tcg_gen_op4i(INDEX_op_qemu_st32, arg, addr, TCGV_HIGH(addr), mem_index); |
c896fe29 FB |
1411 | #endif |
1412 | } | |
1413 | ||
ac56dd48 | 1414 | static inline void tcg_gen_qemu_st64(TCGv arg, TCGv addr, int mem_index) |
c896fe29 FB |
1415 | { |
1416 | #if TARGET_LONG_BITS == 32 | |
ac56dd48 | 1417 | tcg_gen_op4i(INDEX_op_qemu_st64, arg, TCGV_HIGH(arg), addr, mem_index); |
c896fe29 | 1418 | #else |
ac56dd48 PB |
1419 | tcg_gen_op5i(INDEX_op_qemu_st64, arg, TCGV_HIGH(arg), |
1420 | addr, TCGV_HIGH(addr), mem_index); | |
c896fe29 FB |
1421 | #endif |
1422 | } | |
1423 | ||
56b8f567 | 1424 | #define tcg_gen_ld_ptr tcg_gen_ld_i32 |
a768e4b2 | 1425 | #define tcg_gen_discard_ptr tcg_gen_discard_i32 |
f8422f52 | 1426 | |
c896fe29 FB |
1427 | #else /* TCG_TARGET_REG_BITS == 32 */ |
1428 | ||
ac56dd48 | 1429 | static inline void tcg_gen_qemu_ld8u(TCGv ret, TCGv addr, int mem_index) |
c896fe29 | 1430 | { |
ac56dd48 | 1431 | tcg_gen_op3i(INDEX_op_qemu_ld8u, ret, addr, mem_index); |
c896fe29 FB |
1432 | } |
1433 | ||
ac56dd48 | 1434 | static inline void tcg_gen_qemu_ld8s(TCGv ret, TCGv addr, int mem_index) |
c896fe29 | 1435 | { |
ac56dd48 | 1436 | tcg_gen_op3i(INDEX_op_qemu_ld8s, ret, addr, mem_index); |
c896fe29 FB |
1437 | } |
1438 | ||
ac56dd48 | 1439 | static inline void tcg_gen_qemu_ld16u(TCGv ret, TCGv addr, int mem_index) |
c896fe29 | 1440 | { |
ac56dd48 | 1441 | tcg_gen_op3i(INDEX_op_qemu_ld16u, ret, addr, mem_index); |
c896fe29 FB |
1442 | } |
1443 | ||
ac56dd48 | 1444 | static inline void tcg_gen_qemu_ld16s(TCGv ret, TCGv addr, int mem_index) |
c896fe29 | 1445 | { |
ac56dd48 | 1446 | tcg_gen_op3i(INDEX_op_qemu_ld16s, ret, addr, mem_index); |
c896fe29 FB |
1447 | } |
1448 | ||
ac56dd48 | 1449 | static inline void tcg_gen_qemu_ld32u(TCGv ret, TCGv addr, int mem_index) |
c896fe29 | 1450 | { |
ac56dd48 | 1451 | tcg_gen_op3i(INDEX_op_qemu_ld32u, ret, addr, mem_index); |
c896fe29 FB |
1452 | } |
1453 | ||
ac56dd48 | 1454 | static inline void tcg_gen_qemu_ld32s(TCGv ret, TCGv addr, int mem_index) |
c896fe29 | 1455 | { |
ac56dd48 | 1456 | tcg_gen_op3i(INDEX_op_qemu_ld32s, ret, addr, mem_index); |
c896fe29 FB |
1457 | } |
1458 | ||
ac56dd48 | 1459 | static inline void tcg_gen_qemu_ld64(TCGv ret, TCGv addr, int mem_index) |
c896fe29 | 1460 | { |
ac56dd48 | 1461 | tcg_gen_op3i(INDEX_op_qemu_ld64, ret, addr, mem_index); |
c896fe29 FB |
1462 | } |
1463 | ||
ac56dd48 | 1464 | static inline void tcg_gen_qemu_st8(TCGv arg, TCGv addr, int mem_index) |
c896fe29 | 1465 | { |
ac56dd48 | 1466 | tcg_gen_op3i(INDEX_op_qemu_st8, arg, addr, mem_index); |
c896fe29 FB |
1467 | } |
1468 | ||
ac56dd48 | 1469 | static inline void tcg_gen_qemu_st16(TCGv arg, TCGv addr, int mem_index) |
c896fe29 | 1470 | { |
ac56dd48 | 1471 | tcg_gen_op3i(INDEX_op_qemu_st16, arg, addr, mem_index); |
c896fe29 FB |
1472 | } |
1473 | ||
ac56dd48 | 1474 | static inline void tcg_gen_qemu_st32(TCGv arg, TCGv addr, int mem_index) |
c896fe29 | 1475 | { |
ac56dd48 | 1476 | tcg_gen_op3i(INDEX_op_qemu_st32, arg, addr, mem_index); |
c896fe29 FB |
1477 | } |
1478 | ||
ac56dd48 | 1479 | static inline void tcg_gen_qemu_st64(TCGv arg, TCGv addr, int mem_index) |
c896fe29 | 1480 | { |
ac56dd48 | 1481 | tcg_gen_op3i(INDEX_op_qemu_st64, arg, addr, mem_index); |
c896fe29 FB |
1482 | } |
1483 | ||
56b8f567 | 1484 | #define tcg_gen_ld_ptr tcg_gen_ld_i64 |
a768e4b2 | 1485 | #define tcg_gen_discard_ptr tcg_gen_discard_i64 |
f8422f52 | 1486 | |
c896fe29 | 1487 | #endif /* TCG_TARGET_REG_BITS != 32 */ |
f8422f52 BS |
1488 | |
1489 | #if TARGET_LONG_BITS == 64 | |
1490 | #define TCG_TYPE_TL TCG_TYPE_I64 | |
1491 | #define tcg_gen_movi_tl tcg_gen_movi_i64 | |
1492 | #define tcg_gen_mov_tl tcg_gen_mov_i64 | |
1493 | #define tcg_gen_ld8u_tl tcg_gen_ld8u_i64 | |
1494 | #define tcg_gen_ld8s_tl tcg_gen_ld8s_i64 | |
1495 | #define tcg_gen_ld16u_tl tcg_gen_ld16u_i64 | |
1496 | #define tcg_gen_ld16s_tl tcg_gen_ld16s_i64 | |
1497 | #define tcg_gen_ld32u_tl tcg_gen_ld32u_i64 | |
1498 | #define tcg_gen_ld32s_tl tcg_gen_ld32s_i64 | |
1499 | #define tcg_gen_ld_tl tcg_gen_ld_i64 | |
1500 | #define tcg_gen_st8_tl tcg_gen_st8_i64 | |
1501 | #define tcg_gen_st16_tl tcg_gen_st16_i64 | |
1502 | #define tcg_gen_st32_tl tcg_gen_st32_i64 | |
1503 | #define tcg_gen_st_tl tcg_gen_st_i64 | |
1504 | #define tcg_gen_add_tl tcg_gen_add_i64 | |
1505 | #define tcg_gen_addi_tl tcg_gen_addi_i64 | |
1506 | #define tcg_gen_sub_tl tcg_gen_sub_i64 | |
390efc54 | 1507 | #define tcg_gen_neg_tl tcg_gen_neg_i64 |
f8422f52 BS |
1508 | #define tcg_gen_subi_tl tcg_gen_subi_i64 |
1509 | #define tcg_gen_and_tl tcg_gen_and_i64 | |
1510 | #define tcg_gen_andi_tl tcg_gen_andi_i64 | |
1511 | #define tcg_gen_or_tl tcg_gen_or_i64 | |
1512 | #define tcg_gen_ori_tl tcg_gen_ori_i64 | |
1513 | #define tcg_gen_xor_tl tcg_gen_xor_i64 | |
1514 | #define tcg_gen_xori_tl tcg_gen_xori_i64 | |
0b6ce4cf | 1515 | #define tcg_gen_not_tl tcg_gen_not_i64 |
f8422f52 BS |
1516 | #define tcg_gen_shl_tl tcg_gen_shl_i64 |
1517 | #define tcg_gen_shli_tl tcg_gen_shli_i64 | |
1518 | #define tcg_gen_shr_tl tcg_gen_shr_i64 | |
1519 | #define tcg_gen_shri_tl tcg_gen_shri_i64 | |
1520 | #define tcg_gen_sar_tl tcg_gen_sar_i64 | |
1521 | #define tcg_gen_sari_tl tcg_gen_sari_i64 | |
0cf767d6 | 1522 | #define tcg_gen_brcond_tl tcg_gen_brcond_i64 |
f730fd27 TS |
1523 | #define tcg_gen_mul_tl tcg_gen_mul_i64 |
1524 | #define tcg_gen_muli_tl tcg_gen_muli_i64 | |
a768e4b2 | 1525 | #define tcg_gen_discard_tl tcg_gen_discard_i64 |
e429073d BS |
1526 | #define tcg_gen_trunc_tl_i32 tcg_gen_trunc_i64_i32 |
1527 | #define tcg_gen_trunc_i64_tl tcg_gen_mov_i64 | |
1528 | #define tcg_gen_extu_i32_tl tcg_gen_extu_i32_i64 | |
1529 | #define tcg_gen_ext_i32_tl tcg_gen_ext_i32_i64 | |
1530 | #define tcg_gen_extu_tl_i64 tcg_gen_mov_i64 | |
1531 | #define tcg_gen_ext_tl_i64 tcg_gen_mov_i64 | |
0b6ce4cf FB |
1532 | #define tcg_gen_ext8u_tl tcg_gen_ext8u_i64 |
1533 | #define tcg_gen_ext8s_tl tcg_gen_ext8s_i64 | |
1534 | #define tcg_gen_ext16u_tl tcg_gen_ext16u_i64 | |
1535 | #define tcg_gen_ext16s_tl tcg_gen_ext16s_i64 | |
1536 | #define tcg_gen_ext32u_tl tcg_gen_ext32u_i64 | |
1537 | #define tcg_gen_ext32s_tl tcg_gen_ext32s_i64 | |
a98824ac | 1538 | #define tcg_const_tl tcg_const_i64 |
f8422f52 BS |
1539 | #else |
1540 | #define TCG_TYPE_TL TCG_TYPE_I32 | |
1541 | #define tcg_gen_movi_tl tcg_gen_movi_i32 | |
1542 | #define tcg_gen_mov_tl tcg_gen_mov_i32 | |
1543 | #define tcg_gen_ld8u_tl tcg_gen_ld8u_i32 | |
1544 | #define tcg_gen_ld8s_tl tcg_gen_ld8s_i32 | |
1545 | #define tcg_gen_ld16u_tl tcg_gen_ld16u_i32 | |
1546 | #define tcg_gen_ld16s_tl tcg_gen_ld16s_i32 | |
1547 | #define tcg_gen_ld32u_tl tcg_gen_ld_i32 | |
1548 | #define tcg_gen_ld32s_tl tcg_gen_ld_i32 | |
1549 | #define tcg_gen_ld_tl tcg_gen_ld_i32 | |
1550 | #define tcg_gen_st8_tl tcg_gen_st8_i32 | |
1551 | #define tcg_gen_st16_tl tcg_gen_st16_i32 | |
1552 | #define tcg_gen_st32_tl tcg_gen_st_i32 | |
1553 | #define tcg_gen_st_tl tcg_gen_st_i32 | |
1554 | #define tcg_gen_add_tl tcg_gen_add_i32 | |
1555 | #define tcg_gen_addi_tl tcg_gen_addi_i32 | |
1556 | #define tcg_gen_sub_tl tcg_gen_sub_i32 | |
390efc54 | 1557 | #define tcg_gen_neg_tl tcg_gen_neg_i32 |
f8422f52 BS |
1558 | #define tcg_gen_subi_tl tcg_gen_subi_i32 |
1559 | #define tcg_gen_and_tl tcg_gen_and_i32 | |
1560 | #define tcg_gen_andi_tl tcg_gen_andi_i32 | |
1561 | #define tcg_gen_or_tl tcg_gen_or_i32 | |
1562 | #define tcg_gen_ori_tl tcg_gen_ori_i32 | |
1563 | #define tcg_gen_xor_tl tcg_gen_xor_i32 | |
1564 | #define tcg_gen_xori_tl tcg_gen_xori_i32 | |
0b6ce4cf | 1565 | #define tcg_gen_not_tl tcg_gen_not_i32 |
f8422f52 BS |
1566 | #define tcg_gen_shl_tl tcg_gen_shl_i32 |
1567 | #define tcg_gen_shli_tl tcg_gen_shli_i32 | |
1568 | #define tcg_gen_shr_tl tcg_gen_shr_i32 | |
1569 | #define tcg_gen_shri_tl tcg_gen_shri_i32 | |
1570 | #define tcg_gen_sar_tl tcg_gen_sar_i32 | |
1571 | #define tcg_gen_sari_tl tcg_gen_sari_i32 | |
0cf767d6 | 1572 | #define tcg_gen_brcond_tl tcg_gen_brcond_i32 |
f730fd27 TS |
1573 | #define tcg_gen_mul_tl tcg_gen_mul_i32 |
1574 | #define tcg_gen_muli_tl tcg_gen_muli_i32 | |
a768e4b2 | 1575 | #define tcg_gen_discard_tl tcg_gen_discard_i32 |
e429073d BS |
1576 | #define tcg_gen_trunc_tl_i32 tcg_gen_mov_i32 |
1577 | #define tcg_gen_trunc_i64_tl tcg_gen_trunc_i64_i32 | |
1578 | #define tcg_gen_extu_i32_tl tcg_gen_mov_i32 | |
1579 | #define tcg_gen_ext_i32_tl tcg_gen_mov_i32 | |
1580 | #define tcg_gen_extu_tl_i64 tcg_gen_extu_i32_i64 | |
1581 | #define tcg_gen_ext_tl_i64 tcg_gen_ext_i32_i64 | |
0b6ce4cf FB |
1582 | #define tcg_gen_ext8u_tl tcg_gen_ext8u_i32 |
1583 | #define tcg_gen_ext8s_tl tcg_gen_ext8s_i32 | |
1584 | #define tcg_gen_ext16u_tl tcg_gen_ext16u_i32 | |
1585 | #define tcg_gen_ext16s_tl tcg_gen_ext16s_i32 | |
1586 | #define tcg_gen_ext32u_tl tcg_gen_mov_i32 | |
1587 | #define tcg_gen_ext32s_tl tcg_gen_mov_i32 | |
a98824ac | 1588 | #define tcg_const_tl tcg_const_i32 |
f8422f52 | 1589 | #endif |
6ddbc6e4 PB |
1590 | |
1591 | #if TCG_TARGET_REG_BITS == 32 | |
48d38ca5 | 1592 | #define tcg_gen_add_ptr tcg_gen_add_i32 |
6ddbc6e4 | 1593 | #define tcg_gen_addi_ptr tcg_gen_addi_i32 |
48d38ca5 | 1594 | #define tcg_gen_ext_i32_ptr tcg_gen_mov_i32 |
6ddbc6e4 | 1595 | #else /* TCG_TARGET_REG_BITS == 32 */ |
48d38ca5 | 1596 | #define tcg_gen_add_ptr tcg_gen_add_i64 |
6ddbc6e4 | 1597 | #define tcg_gen_addi_ptr tcg_gen_addi_i64 |
48d38ca5 | 1598 | #define tcg_gen_ext_i32_ptr tcg_gen_ext_i32_i64 |
6ddbc6e4 PB |
1599 | #endif /* TCG_TARGET_REG_BITS != 32 */ |
1600 |