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c896fe29 FB |
1 | /* |
2 | * Tiny Code Generator for QEMU | |
3 | * | |
4 | * Copyright (c) 2008 Fabrice Bellard | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
7 | * of this software and associated documentation files (the "Software"), to deal | |
8 | * in the Software without restriction, including without limitation the rights | |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 | * copies of the Software, and to permit persons to whom the Software is | |
11 | * furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
22 | * THE SOFTWARE. | |
23 | */ | |
24 | #include "tcg.h" | |
25 | ||
26 | /* legacy dyngen operations */ | |
27 | #include "gen-op.h" | |
28 | ||
29 | int gen_new_label(void); | |
30 | ||
ac56dd48 | 31 | static inline void tcg_gen_op1(int opc, TCGv arg1) |
c896fe29 FB |
32 | { |
33 | *gen_opc_ptr++ = opc; | |
ac56dd48 | 34 | *gen_opparam_ptr++ = GET_TCGV(arg1); |
c896fe29 FB |
35 | } |
36 | ||
ac56dd48 | 37 | static inline void tcg_gen_op1i(int opc, TCGArg arg1) |
c896fe29 FB |
38 | { |
39 | *gen_opc_ptr++ = opc; | |
40 | *gen_opparam_ptr++ = arg1; | |
c896fe29 FB |
41 | } |
42 | ||
ac56dd48 | 43 | static inline void tcg_gen_op2(int opc, TCGv arg1, TCGv arg2) |
c896fe29 FB |
44 | { |
45 | *gen_opc_ptr++ = opc; | |
ac56dd48 PB |
46 | *gen_opparam_ptr++ = GET_TCGV(arg1); |
47 | *gen_opparam_ptr++ = GET_TCGV(arg2); | |
c896fe29 FB |
48 | } |
49 | ||
ac56dd48 | 50 | static inline void tcg_gen_op2i(int opc, TCGv arg1, TCGArg arg2) |
c896fe29 FB |
51 | { |
52 | *gen_opc_ptr++ = opc; | |
ac56dd48 | 53 | *gen_opparam_ptr++ = GET_TCGV(arg1); |
c896fe29 | 54 | *gen_opparam_ptr++ = arg2; |
ac56dd48 PB |
55 | } |
56 | ||
57 | static inline void tcg_gen_op3(int opc, TCGv arg1, TCGv arg2, TCGv arg3) | |
58 | { | |
59 | *gen_opc_ptr++ = opc; | |
60 | *gen_opparam_ptr++ = GET_TCGV(arg1); | |
61 | *gen_opparam_ptr++ = GET_TCGV(arg2); | |
62 | *gen_opparam_ptr++ = GET_TCGV(arg3); | |
63 | } | |
64 | ||
65 | static inline void tcg_gen_op3i(int opc, TCGv arg1, TCGv arg2, TCGArg arg3) | |
66 | { | |
67 | *gen_opc_ptr++ = opc; | |
68 | *gen_opparam_ptr++ = GET_TCGV(arg1); | |
69 | *gen_opparam_ptr++ = GET_TCGV(arg2); | |
c896fe29 | 70 | *gen_opparam_ptr++ = arg3; |
ac56dd48 PB |
71 | } |
72 | ||
73 | static inline void tcg_gen_op4(int opc, TCGv arg1, TCGv arg2, TCGv arg3, | |
74 | TCGv arg4) | |
75 | { | |
76 | *gen_opc_ptr++ = opc; | |
77 | *gen_opparam_ptr++ = GET_TCGV(arg1); | |
78 | *gen_opparam_ptr++ = GET_TCGV(arg2); | |
79 | *gen_opparam_ptr++ = GET_TCGV(arg3); | |
80 | *gen_opparam_ptr++ = GET_TCGV(arg4); | |
81 | } | |
82 | ||
83 | static inline void tcg_gen_op4i(int opc, TCGv arg1, TCGv arg2, TCGv arg3, | |
84 | TCGArg arg4) | |
85 | { | |
86 | *gen_opc_ptr++ = opc; | |
87 | *gen_opparam_ptr++ = GET_TCGV(arg1); | |
88 | *gen_opparam_ptr++ = GET_TCGV(arg2); | |
89 | *gen_opparam_ptr++ = GET_TCGV(arg3); | |
c896fe29 FB |
90 | *gen_opparam_ptr++ = arg4; |
91 | } | |
92 | ||
ac56dd48 PB |
93 | static inline void tcg_gen_op4ii(int opc, TCGv arg1, TCGv arg2, TCGArg arg3, |
94 | TCGArg arg4) | |
c896fe29 FB |
95 | { |
96 | *gen_opc_ptr++ = opc; | |
ac56dd48 PB |
97 | *gen_opparam_ptr++ = GET_TCGV(arg1); |
98 | *gen_opparam_ptr++ = GET_TCGV(arg2); | |
c896fe29 FB |
99 | *gen_opparam_ptr++ = arg3; |
100 | *gen_opparam_ptr++ = arg4; | |
ac56dd48 PB |
101 | } |
102 | ||
103 | static inline void tcg_gen_op5(int opc, TCGv arg1, TCGv arg2, | |
104 | TCGv arg3, TCGv arg4, | |
105 | TCGv arg5) | |
106 | { | |
107 | *gen_opc_ptr++ = opc; | |
108 | *gen_opparam_ptr++ = GET_TCGV(arg1); | |
109 | *gen_opparam_ptr++ = GET_TCGV(arg2); | |
110 | *gen_opparam_ptr++ = GET_TCGV(arg3); | |
111 | *gen_opparam_ptr++ = GET_TCGV(arg4); | |
112 | *gen_opparam_ptr++ = GET_TCGV(arg5); | |
113 | } | |
114 | ||
115 | static inline void tcg_gen_op5i(int opc, TCGv arg1, TCGv arg2, | |
116 | TCGv arg3, TCGv arg4, | |
117 | TCGArg arg5) | |
118 | { | |
119 | *gen_opc_ptr++ = opc; | |
120 | *gen_opparam_ptr++ = GET_TCGV(arg1); | |
121 | *gen_opparam_ptr++ = GET_TCGV(arg2); | |
122 | *gen_opparam_ptr++ = GET_TCGV(arg3); | |
123 | *gen_opparam_ptr++ = GET_TCGV(arg4); | |
c896fe29 FB |
124 | *gen_opparam_ptr++ = arg5; |
125 | } | |
126 | ||
ac56dd48 PB |
127 | static inline void tcg_gen_op6(int opc, TCGv arg1, TCGv arg2, |
128 | TCGv arg3, TCGv arg4, | |
129 | TCGv arg5, TCGv arg6) | |
c896fe29 FB |
130 | { |
131 | *gen_opc_ptr++ = opc; | |
ac56dd48 PB |
132 | *gen_opparam_ptr++ = GET_TCGV(arg1); |
133 | *gen_opparam_ptr++ = GET_TCGV(arg2); | |
134 | *gen_opparam_ptr++ = GET_TCGV(arg3); | |
135 | *gen_opparam_ptr++ = GET_TCGV(arg4); | |
136 | *gen_opparam_ptr++ = GET_TCGV(arg5); | |
137 | *gen_opparam_ptr++ = GET_TCGV(arg6); | |
138 | } | |
139 | ||
140 | static inline void tcg_gen_op6ii(int opc, TCGv arg1, TCGv arg2, | |
141 | TCGv arg3, TCGv arg4, | |
142 | TCGArg arg5, TCGArg arg6) | |
143 | { | |
144 | *gen_opc_ptr++ = opc; | |
145 | *gen_opparam_ptr++ = GET_TCGV(arg1); | |
146 | *gen_opparam_ptr++ = GET_TCGV(arg2); | |
147 | *gen_opparam_ptr++ = GET_TCGV(arg3); | |
148 | *gen_opparam_ptr++ = GET_TCGV(arg4); | |
c896fe29 FB |
149 | *gen_opparam_ptr++ = arg5; |
150 | *gen_opparam_ptr++ = arg6; | |
151 | } | |
152 | ||
153 | static inline void gen_set_label(int n) | |
154 | { | |
ac56dd48 | 155 | tcg_gen_op1i(INDEX_op_set_label, n); |
c896fe29 FB |
156 | } |
157 | ||
ac56dd48 | 158 | static inline void tcg_gen_mov_i32(TCGv ret, TCGv arg) |
c896fe29 FB |
159 | { |
160 | tcg_gen_op2(INDEX_op_mov_i32, ret, arg); | |
161 | } | |
162 | ||
ac56dd48 | 163 | static inline void tcg_gen_movi_i32(TCGv ret, int32_t arg) |
c896fe29 | 164 | { |
ac56dd48 | 165 | tcg_gen_op2i(INDEX_op_movi_i32, ret, arg); |
c896fe29 FB |
166 | } |
167 | ||
168 | /* helper calls */ | |
169 | #define TCG_HELPER_CALL_FLAGS 0 | |
170 | ||
171 | static inline void tcg_gen_helper_0_0(void *func) | |
172 | { | |
173 | tcg_gen_call(&tcg_ctx, | |
174 | tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, | |
175 | 0, NULL, 0, NULL); | |
176 | } | |
177 | ||
ac56dd48 | 178 | static inline void tcg_gen_helper_0_1(void *func, TCGv arg) |
c896fe29 FB |
179 | { |
180 | tcg_gen_call(&tcg_ctx, | |
181 | tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, | |
182 | 0, NULL, 1, &arg); | |
183 | } | |
184 | ||
ac56dd48 | 185 | static inline void tcg_gen_helper_0_2(void *func, TCGv arg1, TCGv arg2) |
c896fe29 | 186 | { |
ac56dd48 | 187 | TCGv args[2]; |
c896fe29 FB |
188 | args[0] = arg1; |
189 | args[1] = arg2; | |
190 | tcg_gen_call(&tcg_ctx, | |
191 | tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, | |
192 | 0, NULL, 2, args); | |
193 | } | |
194 | ||
f8422f52 BS |
195 | static inline void tcg_gen_helper_0_4(void *func, TCGv arg1, TCGv arg2, |
196 | TCGv arg3, TCGv arg4) | |
197 | { | |
198 | TCGv args[4]; | |
199 | args[0] = arg1; | |
200 | args[1] = arg2; | |
201 | args[2] = arg3; | |
202 | args[3] = arg4; | |
203 | tcg_gen_call(&tcg_ctx, | |
204 | tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, | |
205 | 0, NULL, 4, args); | |
206 | } | |
207 | ||
208 | static inline void tcg_gen_helper_1_0(void *func, TCGv ret) | |
209 | { | |
210 | tcg_gen_call(&tcg_ctx, | |
211 | tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, | |
212 | 1, &ret, 0, NULL); | |
213 | } | |
214 | ||
215 | static inline void tcg_gen_helper_1_1(void *func, TCGv ret, TCGv arg1) | |
216 | { | |
217 | tcg_gen_call(&tcg_ctx, | |
218 | tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, | |
219 | 1, &ret, 1, &arg1); | |
220 | } | |
221 | ||
ac56dd48 PB |
222 | static inline void tcg_gen_helper_1_2(void *func, TCGv ret, |
223 | TCGv arg1, TCGv arg2) | |
c896fe29 | 224 | { |
ac56dd48 | 225 | TCGv args[2]; |
c896fe29 FB |
226 | args[0] = arg1; |
227 | args[1] = arg2; | |
228 | tcg_gen_call(&tcg_ctx, | |
229 | tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, | |
230 | 1, &ret, 2, args); | |
231 | } | |
232 | ||
f8422f52 BS |
233 | static inline void tcg_gen_helper_1_4(void *func, TCGv ret, |
234 | TCGv arg1, TCGv arg2, TCGv arg3, | |
235 | TCGv arg4) | |
236 | { | |
237 | TCGv args[4]; | |
238 | args[0] = arg1; | |
239 | args[1] = arg2; | |
240 | args[2] = arg3; | |
241 | args[3] = arg4; | |
242 | tcg_gen_call(&tcg_ctx, | |
243 | tcg_const_ptr((tcg_target_long)func), TCG_HELPER_CALL_FLAGS, | |
244 | 1, &ret, 4, args); | |
245 | } | |
246 | ||
c896fe29 FB |
247 | /* 32 bit ops */ |
248 | ||
ac56dd48 | 249 | static inline void tcg_gen_ld8u_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 | 250 | { |
ac56dd48 | 251 | tcg_gen_op3i(INDEX_op_ld8u_i32, ret, arg2, offset); |
c896fe29 FB |
252 | } |
253 | ||
ac56dd48 | 254 | static inline void tcg_gen_ld8s_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 | 255 | { |
ac56dd48 | 256 | tcg_gen_op3i(INDEX_op_ld8s_i32, ret, arg2, offset); |
c896fe29 FB |
257 | } |
258 | ||
ac56dd48 | 259 | static inline void tcg_gen_ld16u_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 | 260 | { |
ac56dd48 | 261 | tcg_gen_op3i(INDEX_op_ld16u_i32, ret, arg2, offset); |
c896fe29 FB |
262 | } |
263 | ||
ac56dd48 | 264 | static inline void tcg_gen_ld16s_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 | 265 | { |
ac56dd48 | 266 | tcg_gen_op3i(INDEX_op_ld16s_i32, ret, arg2, offset); |
c896fe29 FB |
267 | } |
268 | ||
ac56dd48 | 269 | static inline void tcg_gen_ld_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 | 270 | { |
ac56dd48 | 271 | tcg_gen_op3i(INDEX_op_ld_i32, ret, arg2, offset); |
c896fe29 FB |
272 | } |
273 | ||
ac56dd48 | 274 | static inline void tcg_gen_st8_i32(TCGv arg1, TCGv arg2, tcg_target_long offset) |
c896fe29 | 275 | { |
ac56dd48 | 276 | tcg_gen_op3i(INDEX_op_st8_i32, arg1, arg2, offset); |
c896fe29 FB |
277 | } |
278 | ||
ac56dd48 | 279 | static inline void tcg_gen_st16_i32(TCGv arg1, TCGv arg2, tcg_target_long offset) |
c896fe29 | 280 | { |
ac56dd48 | 281 | tcg_gen_op3i(INDEX_op_st16_i32, arg1, arg2, offset); |
c896fe29 FB |
282 | } |
283 | ||
ac56dd48 | 284 | static inline void tcg_gen_st_i32(TCGv arg1, TCGv arg2, tcg_target_long offset) |
c896fe29 | 285 | { |
ac56dd48 | 286 | tcg_gen_op3i(INDEX_op_st_i32, arg1, arg2, offset); |
c896fe29 FB |
287 | } |
288 | ||
ac56dd48 | 289 | static inline void tcg_gen_add_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
290 | { |
291 | tcg_gen_op3(INDEX_op_add_i32, ret, arg1, arg2); | |
292 | } | |
293 | ||
ac56dd48 | 294 | static inline void tcg_gen_addi_i32(TCGv ret, TCGv arg1, int32_t arg2) |
c896fe29 | 295 | { |
7089442c BS |
296 | /* some cases can be optimized here */ |
297 | if (arg2 == 0) { | |
298 | tcg_gen_mov_i32(ret, arg1); | |
299 | } else { | |
300 | tcg_gen_add_i32(ret, arg1, tcg_const_i32(arg2)); | |
301 | } | |
c896fe29 FB |
302 | } |
303 | ||
ac56dd48 | 304 | static inline void tcg_gen_sub_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
305 | { |
306 | tcg_gen_op3(INDEX_op_sub_i32, ret, arg1, arg2); | |
307 | } | |
308 | ||
ac56dd48 | 309 | static inline void tcg_gen_subi_i32(TCGv ret, TCGv arg1, int32_t arg2) |
c896fe29 | 310 | { |
7089442c BS |
311 | /* some cases can be optimized here */ |
312 | if (arg2 == 0) { | |
313 | tcg_gen_mov_i32(ret, arg1); | |
314 | } else { | |
315 | tcg_gen_sub_i32(ret, arg1, tcg_const_i32(arg2)); | |
316 | } | |
c896fe29 FB |
317 | } |
318 | ||
ac56dd48 | 319 | static inline void tcg_gen_and_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
320 | { |
321 | tcg_gen_op3(INDEX_op_and_i32, ret, arg1, arg2); | |
322 | } | |
323 | ||
ac56dd48 | 324 | static inline void tcg_gen_andi_i32(TCGv ret, TCGv arg1, int32_t arg2) |
c896fe29 FB |
325 | { |
326 | /* some cases can be optimized here */ | |
327 | if (arg2 == 0) { | |
328 | tcg_gen_movi_i32(ret, 0); | |
329 | } else if (arg2 == 0xffffffff) { | |
330 | tcg_gen_mov_i32(ret, arg1); | |
331 | } else { | |
332 | tcg_gen_and_i32(ret, arg1, tcg_const_i32(arg2)); | |
333 | } | |
334 | } | |
335 | ||
ac56dd48 | 336 | static inline void tcg_gen_or_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
337 | { |
338 | tcg_gen_op3(INDEX_op_or_i32, ret, arg1, arg2); | |
339 | } | |
340 | ||
ac56dd48 | 341 | static inline void tcg_gen_ori_i32(TCGv ret, TCGv arg1, int32_t arg2) |
c896fe29 FB |
342 | { |
343 | /* some cases can be optimized here */ | |
344 | if (arg2 == 0xffffffff) { | |
7089442c | 345 | tcg_gen_movi_i32(ret, 0xffffffff); |
c896fe29 FB |
346 | } else if (arg2 == 0) { |
347 | tcg_gen_mov_i32(ret, arg1); | |
348 | } else { | |
349 | tcg_gen_or_i32(ret, arg1, tcg_const_i32(arg2)); | |
350 | } | |
351 | } | |
352 | ||
ac56dd48 | 353 | static inline void tcg_gen_xor_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
354 | { |
355 | tcg_gen_op3(INDEX_op_xor_i32, ret, arg1, arg2); | |
356 | } | |
357 | ||
ac56dd48 | 358 | static inline void tcg_gen_xori_i32(TCGv ret, TCGv arg1, int32_t arg2) |
c896fe29 FB |
359 | { |
360 | /* some cases can be optimized here */ | |
361 | if (arg2 == 0) { | |
362 | tcg_gen_mov_i32(ret, arg1); | |
363 | } else { | |
364 | tcg_gen_xor_i32(ret, arg1, tcg_const_i32(arg2)); | |
365 | } | |
366 | } | |
367 | ||
ac56dd48 | 368 | static inline void tcg_gen_shl_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
369 | { |
370 | tcg_gen_op3(INDEX_op_shl_i32, ret, arg1, arg2); | |
371 | } | |
372 | ||
ac56dd48 | 373 | static inline void tcg_gen_shli_i32(TCGv ret, TCGv arg1, int32_t arg2) |
c896fe29 FB |
374 | { |
375 | tcg_gen_shl_i32(ret, arg1, tcg_const_i32(arg2)); | |
376 | } | |
377 | ||
ac56dd48 | 378 | static inline void tcg_gen_shr_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
379 | { |
380 | tcg_gen_op3(INDEX_op_shr_i32, ret, arg1, arg2); | |
381 | } | |
382 | ||
ac56dd48 | 383 | static inline void tcg_gen_shri_i32(TCGv ret, TCGv arg1, int32_t arg2) |
c896fe29 FB |
384 | { |
385 | tcg_gen_shr_i32(ret, arg1, tcg_const_i32(arg2)); | |
386 | } | |
387 | ||
ac56dd48 | 388 | static inline void tcg_gen_sar_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
389 | { |
390 | tcg_gen_op3(INDEX_op_sar_i32, ret, arg1, arg2); | |
391 | } | |
392 | ||
ac56dd48 | 393 | static inline void tcg_gen_sari_i32(TCGv ret, TCGv arg1, int32_t arg2) |
c896fe29 FB |
394 | { |
395 | tcg_gen_sar_i32(ret, arg1, tcg_const_i32(arg2)); | |
396 | } | |
397 | ||
ac56dd48 | 398 | static inline void tcg_gen_brcond_i32(int cond, TCGv arg1, TCGv arg2, |
c896fe29 FB |
399 | int label_index) |
400 | { | |
ac56dd48 | 401 | tcg_gen_op4ii(INDEX_op_brcond_i32, arg1, arg2, cond, label_index); |
c896fe29 FB |
402 | } |
403 | ||
ac56dd48 | 404 | static inline void tcg_gen_mul_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
405 | { |
406 | tcg_gen_op3(INDEX_op_mul_i32, ret, arg1, arg2); | |
407 | } | |
408 | ||
409 | #ifdef TCG_TARGET_HAS_div_i32 | |
ac56dd48 | 410 | static inline void tcg_gen_div_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
411 | { |
412 | tcg_gen_op3(INDEX_op_div_i32, ret, arg1, arg2); | |
413 | } | |
414 | ||
ac56dd48 | 415 | static inline void tcg_gen_rem_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
416 | { |
417 | tcg_gen_op3(INDEX_op_rem_i32, ret, arg1, arg2); | |
418 | } | |
419 | ||
ac56dd48 | 420 | static inline void tcg_gen_divu_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
421 | { |
422 | tcg_gen_op3(INDEX_op_divu_i32, ret, arg1, arg2); | |
423 | } | |
424 | ||
ac56dd48 | 425 | static inline void tcg_gen_remu_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
426 | { |
427 | tcg_gen_op3(INDEX_op_remu_i32, ret, arg1, arg2); | |
428 | } | |
429 | #else | |
ac56dd48 | 430 | static inline void tcg_gen_div_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 | 431 | { |
ac56dd48 | 432 | TCGv t0; |
c896fe29 FB |
433 | t0 = tcg_temp_new(TCG_TYPE_I32); |
434 | tcg_gen_sari_i32(t0, arg1, 31); | |
435 | tcg_gen_op5(INDEX_op_div2_i32, ret, t0, arg1, t0, arg2); | |
436 | } | |
437 | ||
ac56dd48 | 438 | static inline void tcg_gen_rem_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 | 439 | { |
ac56dd48 | 440 | TCGv t0; |
c896fe29 FB |
441 | t0 = tcg_temp_new(TCG_TYPE_I32); |
442 | tcg_gen_sari_i32(t0, arg1, 31); | |
443 | tcg_gen_op5(INDEX_op_div2_i32, t0, ret, arg1, t0, arg2); | |
444 | } | |
445 | ||
ac56dd48 | 446 | static inline void tcg_gen_divu_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 | 447 | { |
ac56dd48 | 448 | TCGv t0; |
c896fe29 FB |
449 | t0 = tcg_temp_new(TCG_TYPE_I32); |
450 | tcg_gen_movi_i32(t0, 0); | |
451 | tcg_gen_op5(INDEX_op_divu2_i32, ret, t0, arg1, t0, arg2); | |
452 | } | |
453 | ||
ac56dd48 | 454 | static inline void tcg_gen_remu_i32(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 | 455 | { |
ac56dd48 | 456 | TCGv t0; |
c896fe29 FB |
457 | t0 = tcg_temp_new(TCG_TYPE_I32); |
458 | tcg_gen_movi_i32(t0, 0); | |
459 | tcg_gen_op5(INDEX_op_divu2_i32, t0, ret, arg1, t0, arg2); | |
460 | } | |
461 | #endif | |
462 | ||
463 | #if TCG_TARGET_REG_BITS == 32 | |
464 | ||
ac56dd48 | 465 | static inline void tcg_gen_mov_i64(TCGv ret, TCGv arg) |
c896fe29 FB |
466 | { |
467 | tcg_gen_mov_i32(ret, arg); | |
ac56dd48 | 468 | tcg_gen_mov_i32(TCGV_HIGH(ret), TCGV_HIGH(arg)); |
c896fe29 FB |
469 | } |
470 | ||
ac56dd48 | 471 | static inline void tcg_gen_movi_i64(TCGv ret, int64_t arg) |
c896fe29 FB |
472 | { |
473 | tcg_gen_movi_i32(ret, arg); | |
ac56dd48 | 474 | tcg_gen_movi_i32(TCGV_HIGH(ret), arg >> 32); |
c896fe29 FB |
475 | } |
476 | ||
ac56dd48 | 477 | static inline void tcg_gen_ld8u_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 FB |
478 | { |
479 | tcg_gen_ld8u_i32(ret, arg2, offset); | |
ac56dd48 | 480 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); |
c896fe29 FB |
481 | } |
482 | ||
ac56dd48 | 483 | static inline void tcg_gen_ld8s_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 FB |
484 | { |
485 | tcg_gen_ld8s_i32(ret, arg2, offset); | |
ac56dd48 | 486 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
c896fe29 FB |
487 | } |
488 | ||
ac56dd48 | 489 | static inline void tcg_gen_ld16u_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 FB |
490 | { |
491 | tcg_gen_ld16u_i32(ret, arg2, offset); | |
ac56dd48 | 492 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); |
c896fe29 FB |
493 | } |
494 | ||
ac56dd48 | 495 | static inline void tcg_gen_ld16s_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 FB |
496 | { |
497 | tcg_gen_ld16s_i32(ret, arg2, offset); | |
ac56dd48 | 498 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
c896fe29 FB |
499 | } |
500 | ||
ac56dd48 | 501 | static inline void tcg_gen_ld32u_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 FB |
502 | { |
503 | tcg_gen_ld_i32(ret, arg2, offset); | |
ac56dd48 | 504 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); |
c896fe29 FB |
505 | } |
506 | ||
ac56dd48 | 507 | static inline void tcg_gen_ld32s_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 FB |
508 | { |
509 | tcg_gen_ld_i32(ret, arg2, offset); | |
ac56dd48 | 510 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
c896fe29 FB |
511 | } |
512 | ||
ac56dd48 | 513 | static inline void tcg_gen_ld_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 FB |
514 | { |
515 | /* since arg2 and ret have different types, they cannot be the | |
516 | same temporary */ | |
517 | #ifdef TCG_TARGET_WORDS_BIGENDIAN | |
ac56dd48 | 518 | tcg_gen_ld_i32(TCGV_HIGH(ret), arg2, offset); |
c896fe29 FB |
519 | tcg_gen_ld_i32(ret, arg2, offset + 4); |
520 | #else | |
521 | tcg_gen_ld_i32(ret, arg2, offset); | |
ac56dd48 | 522 | tcg_gen_ld_i32(TCGV_HIGH(ret), arg2, offset + 4); |
c896fe29 FB |
523 | #endif |
524 | } | |
525 | ||
ac56dd48 | 526 | static inline void tcg_gen_st8_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
c896fe29 FB |
527 | { |
528 | tcg_gen_st8_i32(arg1, arg2, offset); | |
529 | } | |
530 | ||
ac56dd48 | 531 | static inline void tcg_gen_st16_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
c896fe29 FB |
532 | { |
533 | tcg_gen_st16_i32(arg1, arg2, offset); | |
534 | } | |
535 | ||
ac56dd48 | 536 | static inline void tcg_gen_st32_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
c896fe29 FB |
537 | { |
538 | tcg_gen_st_i32(arg1, arg2, offset); | |
539 | } | |
540 | ||
ac56dd48 | 541 | static inline void tcg_gen_st_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
c896fe29 FB |
542 | { |
543 | #ifdef TCG_TARGET_WORDS_BIGENDIAN | |
ac56dd48 | 544 | tcg_gen_st_i32(TCGV_HIGH(arg1), arg2, offset); |
c896fe29 FB |
545 | tcg_gen_st_i32(arg1, arg2, offset + 4); |
546 | #else | |
547 | tcg_gen_st_i32(arg1, arg2, offset); | |
ac56dd48 | 548 | tcg_gen_st_i32(TCGV_HIGH(arg1), arg2, offset + 4); |
c896fe29 FB |
549 | #endif |
550 | } | |
551 | ||
ac56dd48 | 552 | static inline void tcg_gen_add_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 | 553 | { |
ac56dd48 PB |
554 | tcg_gen_op6(INDEX_op_add2_i32, ret, TCGV_HIGH(ret), |
555 | arg1, TCGV_HIGH(arg1), arg2, TCGV_HIGH(arg2)); | |
c896fe29 FB |
556 | } |
557 | ||
ac56dd48 | 558 | static inline void tcg_gen_addi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 FB |
559 | { |
560 | tcg_gen_add_i64(ret, arg1, tcg_const_i64(arg2)); | |
561 | } | |
562 | ||
ac56dd48 | 563 | static inline void tcg_gen_sub_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 | 564 | { |
ac56dd48 PB |
565 | tcg_gen_op6(INDEX_op_sub2_i32, ret, TCGV_HIGH(ret), |
566 | arg1, TCGV_HIGH(arg1), arg2, TCGV_HIGH(arg2)); | |
c896fe29 FB |
567 | } |
568 | ||
ac56dd48 | 569 | static inline void tcg_gen_subi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 FB |
570 | { |
571 | tcg_gen_sub_i64(ret, arg1, tcg_const_i64(arg2)); | |
572 | } | |
573 | ||
ac56dd48 | 574 | static inline void tcg_gen_and_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
575 | { |
576 | tcg_gen_and_i32(ret, arg1, arg2); | |
ac56dd48 | 577 | tcg_gen_and_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2)); |
c896fe29 FB |
578 | } |
579 | ||
ac56dd48 | 580 | static inline void tcg_gen_andi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 FB |
581 | { |
582 | tcg_gen_andi_i32(ret, arg1, arg2); | |
ac56dd48 | 583 | tcg_gen_andi_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32); |
c896fe29 FB |
584 | } |
585 | ||
ac56dd48 | 586 | static inline void tcg_gen_or_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
587 | { |
588 | tcg_gen_or_i32(ret, arg1, arg2); | |
ac56dd48 | 589 | tcg_gen_or_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2)); |
c896fe29 FB |
590 | } |
591 | ||
ac56dd48 | 592 | static inline void tcg_gen_ori_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 FB |
593 | { |
594 | tcg_gen_ori_i32(ret, arg1, arg2); | |
ac56dd48 | 595 | tcg_gen_ori_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32); |
c896fe29 FB |
596 | } |
597 | ||
ac56dd48 | 598 | static inline void tcg_gen_xor_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
599 | { |
600 | tcg_gen_xor_i32(ret, arg1, arg2); | |
ac56dd48 | 601 | tcg_gen_xor_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2)); |
c896fe29 FB |
602 | } |
603 | ||
ac56dd48 | 604 | static inline void tcg_gen_xori_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 FB |
605 | { |
606 | tcg_gen_xori_i32(ret, arg1, arg2); | |
ac56dd48 | 607 | tcg_gen_xori_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32); |
c896fe29 FB |
608 | } |
609 | ||
610 | /* XXX: use generic code when basic block handling is OK or CPU | |
611 | specific code (x86) */ | |
ac56dd48 | 612 | static inline void tcg_gen_shl_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
613 | { |
614 | tcg_gen_helper_1_2(tcg_helper_shl_i64, ret, arg1, arg2); | |
615 | } | |
616 | ||
ac56dd48 | 617 | static inline void tcg_gen_shli_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 FB |
618 | { |
619 | tcg_gen_shifti_i64(ret, arg1, arg2, 0, 0); | |
620 | } | |
621 | ||
ac56dd48 | 622 | static inline void tcg_gen_shr_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
623 | { |
624 | tcg_gen_helper_1_2(tcg_helper_shr_i64, ret, arg1, arg2); | |
625 | } | |
626 | ||
ac56dd48 | 627 | static inline void tcg_gen_shri_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 FB |
628 | { |
629 | tcg_gen_shifti_i64(ret, arg1, arg2, 1, 0); | |
630 | } | |
631 | ||
ac56dd48 | 632 | static inline void tcg_gen_sar_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
633 | { |
634 | tcg_gen_helper_1_2(tcg_helper_sar_i64, ret, arg1, arg2); | |
635 | } | |
636 | ||
ac56dd48 | 637 | static inline void tcg_gen_sari_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 FB |
638 | { |
639 | tcg_gen_shifti_i64(ret, arg1, arg2, 1, 1); | |
640 | } | |
641 | ||
ac56dd48 | 642 | static inline void tcg_gen_brcond_i64(int cond, TCGv arg1, TCGv arg2, |
c896fe29 FB |
643 | int label_index) |
644 | { | |
ac56dd48 PB |
645 | tcg_gen_op6ii(INDEX_op_brcond2_i32, |
646 | arg1, TCGV_HIGH(arg1), arg2, TCGV_HIGH(arg2), | |
647 | cond, label_index); | |
c896fe29 FB |
648 | } |
649 | ||
ac56dd48 | 650 | static inline void tcg_gen_mul_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 | 651 | { |
ac56dd48 | 652 | TCGv t0, t1; |
c896fe29 FB |
653 | |
654 | t0 = tcg_temp_new(TCG_TYPE_I64); | |
655 | t1 = tcg_temp_new(TCG_TYPE_I32); | |
656 | ||
ac56dd48 | 657 | tcg_gen_op4(INDEX_op_mulu2_i32, t0, TCGV_HIGH(t0), arg1, arg2); |
c896fe29 | 658 | |
ac56dd48 PB |
659 | tcg_gen_mul_i32(t1, arg1, TCGV_HIGH(arg2)); |
660 | tcg_gen_add_i32(TCGV_HIGH(t0), TCGV_HIGH(t0), t1); | |
661 | tcg_gen_mul_i32(t1, TCGV_HIGH(arg1), arg2); | |
662 | tcg_gen_add_i32(TCGV_HIGH(t0), TCGV_HIGH(t0), t1); | |
c896fe29 FB |
663 | |
664 | tcg_gen_mov_i64(ret, t0); | |
665 | } | |
666 | ||
ac56dd48 | 667 | static inline void tcg_gen_div_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
668 | { |
669 | tcg_gen_helper_1_2(tcg_helper_div_i64, ret, arg1, arg2); | |
670 | } | |
671 | ||
ac56dd48 | 672 | static inline void tcg_gen_rem_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
673 | { |
674 | tcg_gen_helper_1_2(tcg_helper_rem_i64, ret, arg1, arg2); | |
675 | } | |
676 | ||
ac56dd48 | 677 | static inline void tcg_gen_divu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
678 | { |
679 | tcg_gen_helper_1_2(tcg_helper_divu_i64, ret, arg1, arg2); | |
680 | } | |
681 | ||
ac56dd48 | 682 | static inline void tcg_gen_remu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
683 | { |
684 | tcg_gen_helper_1_2(tcg_helper_remu_i64, ret, arg1, arg2); | |
685 | } | |
686 | ||
687 | #else | |
688 | ||
ac56dd48 | 689 | static inline void tcg_gen_mov_i64(TCGv ret, TCGv arg) |
c896fe29 FB |
690 | { |
691 | tcg_gen_op2(INDEX_op_mov_i64, ret, arg); | |
692 | } | |
693 | ||
ac56dd48 | 694 | static inline void tcg_gen_movi_i64(TCGv ret, int64_t arg) |
c896fe29 | 695 | { |
ac56dd48 | 696 | tcg_gen_op2i(INDEX_op_movi_i64, ret, arg); |
c896fe29 FB |
697 | } |
698 | ||
ac56dd48 PB |
699 | static inline void tcg_gen_ld8u_i64(TCGv ret, TCGv arg2, |
700 | tcg_target_long offset) | |
c896fe29 | 701 | { |
ac56dd48 | 702 | tcg_gen_op3i(INDEX_op_ld8u_i64, ret, arg2, offset); |
c896fe29 FB |
703 | } |
704 | ||
ac56dd48 PB |
705 | static inline void tcg_gen_ld8s_i64(TCGv ret, TCGv arg2, |
706 | tcg_target_long offset) | |
c896fe29 | 707 | { |
ac56dd48 | 708 | tcg_gen_op3i(INDEX_op_ld8s_i64, ret, arg2, offset); |
c896fe29 FB |
709 | } |
710 | ||
ac56dd48 PB |
711 | static inline void tcg_gen_ld16u_i64(TCGv ret, TCGv arg2, |
712 | tcg_target_long offset) | |
c896fe29 | 713 | { |
ac56dd48 | 714 | tcg_gen_op3i(INDEX_op_ld16u_i64, ret, arg2, offset); |
c896fe29 FB |
715 | } |
716 | ||
ac56dd48 PB |
717 | static inline void tcg_gen_ld16s_i64(TCGv ret, TCGv arg2, |
718 | tcg_target_long offset) | |
c896fe29 | 719 | { |
ac56dd48 | 720 | tcg_gen_op3i(INDEX_op_ld16s_i64, ret, arg2, offset); |
c896fe29 FB |
721 | } |
722 | ||
ac56dd48 PB |
723 | static inline void tcg_gen_ld32u_i64(TCGv ret, TCGv arg2, |
724 | tcg_target_long offset) | |
c896fe29 | 725 | { |
ac56dd48 | 726 | tcg_gen_op3i(INDEX_op_ld32u_i64, ret, arg2, offset); |
c896fe29 FB |
727 | } |
728 | ||
ac56dd48 PB |
729 | static inline void tcg_gen_ld32s_i64(TCGv ret, TCGv arg2, |
730 | tcg_target_long offset) | |
c896fe29 | 731 | { |
ac56dd48 | 732 | tcg_gen_op3i(INDEX_op_ld32s_i64, ret, arg2, offset); |
c896fe29 FB |
733 | } |
734 | ||
ac56dd48 | 735 | static inline void tcg_gen_ld_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
c896fe29 | 736 | { |
ac56dd48 | 737 | tcg_gen_op3i(INDEX_op_ld_i64, ret, arg2, offset); |
c896fe29 FB |
738 | } |
739 | ||
ac56dd48 PB |
740 | static inline void tcg_gen_st8_i64(TCGv arg1, TCGv arg2, |
741 | tcg_target_long offset) | |
c896fe29 | 742 | { |
ac56dd48 | 743 | tcg_gen_op3i(INDEX_op_st8_i64, arg1, arg2, offset); |
c896fe29 FB |
744 | } |
745 | ||
ac56dd48 PB |
746 | static inline void tcg_gen_st16_i64(TCGv arg1, TCGv arg2, |
747 | tcg_target_long offset) | |
c896fe29 | 748 | { |
ac56dd48 | 749 | tcg_gen_op3i(INDEX_op_st16_i64, arg1, arg2, offset); |
c896fe29 FB |
750 | } |
751 | ||
ac56dd48 PB |
752 | static inline void tcg_gen_st32_i64(TCGv arg1, TCGv arg2, |
753 | tcg_target_long offset) | |
c896fe29 | 754 | { |
ac56dd48 | 755 | tcg_gen_op3i(INDEX_op_st32_i64, arg1, arg2, offset); |
c896fe29 FB |
756 | } |
757 | ||
ac56dd48 | 758 | static inline void tcg_gen_st_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
c896fe29 | 759 | { |
ac56dd48 | 760 | tcg_gen_op3i(INDEX_op_st_i64, arg1, arg2, offset); |
c896fe29 FB |
761 | } |
762 | ||
ac56dd48 | 763 | static inline void tcg_gen_add_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
764 | { |
765 | tcg_gen_op3(INDEX_op_add_i64, ret, arg1, arg2); | |
766 | } | |
767 | ||
ac56dd48 | 768 | static inline void tcg_gen_addi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 FB |
769 | { |
770 | tcg_gen_add_i64(ret, arg1, tcg_const_i64(arg2)); | |
771 | } | |
772 | ||
ac56dd48 | 773 | static inline void tcg_gen_sub_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
774 | { |
775 | tcg_gen_op3(INDEX_op_sub_i64, ret, arg1, arg2); | |
776 | } | |
777 | ||
ac56dd48 | 778 | static inline void tcg_gen_subi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 FB |
779 | { |
780 | tcg_gen_sub_i64(ret, arg1, tcg_const_i64(arg2)); | |
781 | } | |
782 | ||
ac56dd48 | 783 | static inline void tcg_gen_and_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
784 | { |
785 | tcg_gen_op3(INDEX_op_and_i64, ret, arg1, arg2); | |
786 | } | |
787 | ||
ac56dd48 | 788 | static inline void tcg_gen_andi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 FB |
789 | { |
790 | tcg_gen_and_i64(ret, arg1, tcg_const_i64(arg2)); | |
791 | } | |
792 | ||
ac56dd48 | 793 | static inline void tcg_gen_or_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
794 | { |
795 | tcg_gen_op3(INDEX_op_or_i64, ret, arg1, arg2); | |
796 | } | |
797 | ||
ac56dd48 | 798 | static inline void tcg_gen_ori_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 FB |
799 | { |
800 | tcg_gen_or_i64(ret, arg1, tcg_const_i64(arg2)); | |
801 | } | |
802 | ||
ac56dd48 | 803 | static inline void tcg_gen_xor_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
804 | { |
805 | tcg_gen_op3(INDEX_op_xor_i64, ret, arg1, arg2); | |
806 | } | |
807 | ||
ac56dd48 | 808 | static inline void tcg_gen_xori_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 FB |
809 | { |
810 | tcg_gen_xor_i64(ret, arg1, tcg_const_i64(arg2)); | |
811 | } | |
812 | ||
ac56dd48 | 813 | static inline void tcg_gen_shl_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
814 | { |
815 | tcg_gen_op3(INDEX_op_shl_i64, ret, arg1, arg2); | |
816 | } | |
817 | ||
ac56dd48 | 818 | static inline void tcg_gen_shli_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 FB |
819 | { |
820 | tcg_gen_shl_i64(ret, arg1, tcg_const_i64(arg2)); | |
821 | } | |
822 | ||
ac56dd48 | 823 | static inline void tcg_gen_shr_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
824 | { |
825 | tcg_gen_op3(INDEX_op_shr_i64, ret, arg1, arg2); | |
826 | } | |
827 | ||
ac56dd48 | 828 | static inline void tcg_gen_shri_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 FB |
829 | { |
830 | tcg_gen_shr_i64(ret, arg1, tcg_const_i64(arg2)); | |
831 | } | |
832 | ||
ac56dd48 | 833 | static inline void tcg_gen_sar_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
834 | { |
835 | tcg_gen_op3(INDEX_op_sar_i64, ret, arg1, arg2); | |
836 | } | |
837 | ||
ac56dd48 | 838 | static inline void tcg_gen_sari_i64(TCGv ret, TCGv arg1, int64_t arg2) |
c896fe29 FB |
839 | { |
840 | tcg_gen_sar_i64(ret, arg1, tcg_const_i64(arg2)); | |
841 | } | |
842 | ||
ac56dd48 | 843 | static inline void tcg_gen_brcond_i64(int cond, TCGv arg1, TCGv arg2, |
c896fe29 FB |
844 | int label_index) |
845 | { | |
ac56dd48 | 846 | tcg_gen_op4ii(INDEX_op_brcond_i64, arg1, arg2, cond, label_index); |
c896fe29 FB |
847 | } |
848 | ||
ac56dd48 | 849 | static inline void tcg_gen_mul_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
850 | { |
851 | tcg_gen_op3(INDEX_op_mul_i64, ret, arg1, arg2); | |
852 | } | |
853 | ||
854 | #ifdef TCG_TARGET_HAS_div_i64 | |
ac56dd48 | 855 | static inline void tcg_gen_div_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
856 | { |
857 | tcg_gen_op3(INDEX_op_div_i64, ret, arg1, arg2); | |
858 | } | |
859 | ||
ac56dd48 | 860 | static inline void tcg_gen_rem_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
861 | { |
862 | tcg_gen_op3(INDEX_op_rem_i64, ret, arg1, arg2); | |
863 | } | |
864 | ||
ac56dd48 | 865 | static inline void tcg_gen_divu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
866 | { |
867 | tcg_gen_op3(INDEX_op_divu_i64, ret, arg1, arg2); | |
868 | } | |
869 | ||
ac56dd48 | 870 | static inline void tcg_gen_remu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 FB |
871 | { |
872 | tcg_gen_op3(INDEX_op_remu_i64, ret, arg1, arg2); | |
873 | } | |
874 | #else | |
ac56dd48 | 875 | static inline void tcg_gen_div_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 | 876 | { |
ac56dd48 | 877 | TCGv t0; |
c896fe29 FB |
878 | t0 = tcg_temp_new(TCG_TYPE_I64); |
879 | tcg_gen_sari_i64(t0, arg1, 63); | |
880 | tcg_gen_op5(INDEX_op_div2_i64, ret, t0, arg1, t0, arg2); | |
881 | } | |
882 | ||
ac56dd48 | 883 | static inline void tcg_gen_rem_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 | 884 | { |
ac56dd48 | 885 | TCGv t0; |
c896fe29 FB |
886 | t0 = tcg_temp_new(TCG_TYPE_I64); |
887 | tcg_gen_sari_i64(t0, arg1, 63); | |
888 | tcg_gen_op5(INDEX_op_div2_i64, t0, ret, arg1, t0, arg2); | |
889 | } | |
890 | ||
ac56dd48 | 891 | static inline void tcg_gen_divu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 | 892 | { |
ac56dd48 | 893 | TCGv t0; |
c896fe29 FB |
894 | t0 = tcg_temp_new(TCG_TYPE_I64); |
895 | tcg_gen_movi_i64(t0, 0); | |
896 | tcg_gen_op5(INDEX_op_divu2_i64, ret, t0, arg1, t0, arg2); | |
897 | } | |
898 | ||
ac56dd48 | 899 | static inline void tcg_gen_remu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
c896fe29 | 900 | { |
ac56dd48 | 901 | TCGv t0; |
c896fe29 FB |
902 | t0 = tcg_temp_new(TCG_TYPE_I64); |
903 | tcg_gen_movi_i64(t0, 0); | |
904 | tcg_gen_op5(INDEX_op_divu2_i64, t0, ret, arg1, t0, arg2); | |
905 | } | |
906 | #endif | |
907 | ||
908 | #endif | |
909 | ||
910 | /***************************************/ | |
911 | /* optional operations */ | |
912 | ||
ac56dd48 | 913 | static inline void tcg_gen_ext8s_i32(TCGv ret, TCGv arg) |
c896fe29 FB |
914 | { |
915 | #ifdef TCG_TARGET_HAS_ext8s_i32 | |
916 | tcg_gen_op2(INDEX_op_ext8s_i32, ret, arg); | |
917 | #else | |
918 | tcg_gen_shli_i32(ret, arg, 24); | |
5ff9d6a4 | 919 | tcg_gen_sari_i32(ret, ret, 24); |
c896fe29 FB |
920 | #endif |
921 | } | |
922 | ||
ac56dd48 | 923 | static inline void tcg_gen_ext16s_i32(TCGv ret, TCGv arg) |
c896fe29 FB |
924 | { |
925 | #ifdef TCG_TARGET_HAS_ext16s_i32 | |
926 | tcg_gen_op2(INDEX_op_ext16s_i32, ret, arg); | |
927 | #else | |
928 | tcg_gen_shli_i32(ret, arg, 16); | |
5ff9d6a4 | 929 | tcg_gen_sari_i32(ret, ret, 16); |
c896fe29 FB |
930 | #endif |
931 | } | |
932 | ||
933 | /* Note: we assume the two high bytes are set to zero */ | |
ac56dd48 | 934 | static inline void tcg_gen_bswap16_i32(TCGv ret, TCGv arg) |
c896fe29 FB |
935 | { |
936 | #ifdef TCG_TARGET_HAS_bswap16_i32 | |
937 | tcg_gen_op2(INDEX_op_bswap16_i32, ret, arg); | |
938 | #else | |
ac56dd48 | 939 | TCGv t0, t1; |
c896fe29 FB |
940 | t0 = tcg_temp_new(TCG_TYPE_I32); |
941 | t1 = tcg_temp_new(TCG_TYPE_I32); | |
942 | ||
943 | tcg_gen_shri_i32(t0, arg, 8); | |
944 | tcg_gen_andi_i32(t1, arg, 0x000000ff); | |
945 | tcg_gen_shli_i32(t1, t1, 8); | |
946 | tcg_gen_or_i32(ret, t0, t1); | |
947 | #endif | |
948 | } | |
949 | ||
ac56dd48 | 950 | static inline void tcg_gen_bswap_i32(TCGv ret, TCGv arg) |
c896fe29 FB |
951 | { |
952 | #ifdef TCG_TARGET_HAS_bswap_i32 | |
953 | tcg_gen_op2(INDEX_op_bswap_i32, ret, arg); | |
954 | #else | |
ac56dd48 | 955 | TCGv t0, t1; |
c896fe29 FB |
956 | t0 = tcg_temp_new(TCG_TYPE_I32); |
957 | t1 = tcg_temp_new(TCG_TYPE_I32); | |
958 | ||
959 | tcg_gen_shli_i32(t0, arg, 24); | |
960 | ||
961 | tcg_gen_andi_i32(t1, arg, 0x0000ff00); | |
962 | tcg_gen_shli_i32(t1, t1, 8); | |
963 | tcg_gen_or_i32(t0, t0, t1); | |
964 | ||
965 | tcg_gen_shri_i32(t1, arg, 8); | |
966 | tcg_gen_andi_i32(t1, t1, 0x0000ff00); | |
967 | tcg_gen_or_i32(t0, t0, t1); | |
968 | ||
969 | tcg_gen_shri_i32(t1, arg, 24); | |
970 | tcg_gen_or_i32(ret, t0, t1); | |
971 | #endif | |
972 | } | |
973 | ||
974 | #if TCG_TARGET_REG_BITS == 32 | |
ac56dd48 | 975 | static inline void tcg_gen_ext8s_i64(TCGv ret, TCGv arg) |
c896fe29 FB |
976 | { |
977 | tcg_gen_ext8s_i32(ret, arg); | |
ac56dd48 | 978 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
c896fe29 FB |
979 | } |
980 | ||
ac56dd48 | 981 | static inline void tcg_gen_ext16s_i64(TCGv ret, TCGv arg) |
c896fe29 FB |
982 | { |
983 | tcg_gen_ext16s_i32(ret, arg); | |
ac56dd48 | 984 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
c896fe29 FB |
985 | } |
986 | ||
ac56dd48 | 987 | static inline void tcg_gen_ext32s_i64(TCGv ret, TCGv arg) |
c896fe29 FB |
988 | { |
989 | tcg_gen_mov_i32(ret, arg); | |
ac56dd48 | 990 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
c896fe29 FB |
991 | } |
992 | ||
ac56dd48 | 993 | static inline void tcg_gen_trunc_i64_i32(TCGv ret, TCGv arg) |
c896fe29 FB |
994 | { |
995 | tcg_gen_mov_i32(ret, arg); | |
996 | } | |
997 | ||
ac56dd48 | 998 | static inline void tcg_gen_extu_i32_i64(TCGv ret, TCGv arg) |
c896fe29 FB |
999 | { |
1000 | tcg_gen_mov_i32(ret, arg); | |
ac56dd48 | 1001 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); |
c896fe29 FB |
1002 | } |
1003 | ||
ac56dd48 | 1004 | static inline void tcg_gen_ext_i32_i64(TCGv ret, TCGv arg) |
c896fe29 FB |
1005 | { |
1006 | tcg_gen_mov_i32(ret, arg); | |
ac56dd48 | 1007 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
c896fe29 FB |
1008 | } |
1009 | ||
ac56dd48 | 1010 | static inline void tcg_gen_bswap_i64(TCGv ret, TCGv arg) |
c896fe29 | 1011 | { |
ac56dd48 | 1012 | TCGv t0, t1; |
c896fe29 FB |
1013 | t0 = tcg_temp_new(TCG_TYPE_I32); |
1014 | t1 = tcg_temp_new(TCG_TYPE_I32); | |
1015 | ||
1016 | tcg_gen_bswap_i32(t0, arg); | |
ac56dd48 | 1017 | tcg_gen_bswap_i32(t1, TCGV_HIGH(arg)); |
c896fe29 | 1018 | tcg_gen_mov_i32(ret, t1); |
ac56dd48 | 1019 | tcg_gen_mov_i32(TCGV_HIGH(ret), t0); |
c896fe29 FB |
1020 | } |
1021 | #else | |
1022 | ||
ac56dd48 | 1023 | static inline void tcg_gen_ext8s_i64(TCGv ret, TCGv arg) |
c896fe29 FB |
1024 | { |
1025 | #ifdef TCG_TARGET_HAS_ext8s_i64 | |
1026 | tcg_gen_op2(INDEX_op_ext8s_i64, ret, arg); | |
1027 | #else | |
1028 | tcg_gen_shli_i64(ret, arg, 56); | |
5ff9d6a4 | 1029 | tcg_gen_sari_i64(ret, ret, 56); |
c896fe29 FB |
1030 | #endif |
1031 | } | |
1032 | ||
ac56dd48 | 1033 | static inline void tcg_gen_ext16s_i64(TCGv ret, TCGv arg) |
c896fe29 FB |
1034 | { |
1035 | #ifdef TCG_TARGET_HAS_ext16s_i64 | |
1036 | tcg_gen_op2(INDEX_op_ext16s_i64, ret, arg); | |
1037 | #else | |
1038 | tcg_gen_shli_i64(ret, arg, 48); | |
5ff9d6a4 | 1039 | tcg_gen_sari_i64(ret, ret, 48); |
c896fe29 FB |
1040 | #endif |
1041 | } | |
1042 | ||
ac56dd48 | 1043 | static inline void tcg_gen_ext32s_i64(TCGv ret, TCGv arg) |
c896fe29 FB |
1044 | { |
1045 | #ifdef TCG_TARGET_HAS_ext32s_i64 | |
1046 | tcg_gen_op2(INDEX_op_ext32s_i64, ret, arg); | |
1047 | #else | |
1048 | tcg_gen_shli_i64(ret, arg, 32); | |
5ff9d6a4 | 1049 | tcg_gen_sari_i64(ret, ret, 32); |
c896fe29 FB |
1050 | #endif |
1051 | } | |
1052 | ||
1053 | /* Note: we assume the target supports move between 32 and 64 bit | |
ac56dd48 PB |
1054 | registers. This will probably break MIPS64 targets. */ |
1055 | static inline void tcg_gen_trunc_i64_i32(TCGv ret, TCGv arg) | |
c896fe29 FB |
1056 | { |
1057 | tcg_gen_mov_i32(ret, arg); | |
1058 | } | |
1059 | ||
1060 | /* Note: we assume the target supports move between 32 and 64 bit | |
1061 | registers */ | |
ac56dd48 | 1062 | static inline void tcg_gen_extu_i32_i64(TCGv ret, TCGv arg) |
c896fe29 FB |
1063 | { |
1064 | tcg_gen_andi_i64(ret, arg, 0xffffffff); | |
1065 | } | |
1066 | ||
1067 | /* Note: we assume the target supports move between 32 and 64 bit | |
1068 | registers */ | |
ac56dd48 | 1069 | static inline void tcg_gen_ext_i32_i64(TCGv ret, TCGv arg) |
c896fe29 FB |
1070 | { |
1071 | tcg_gen_ext32s_i64(ret, arg); | |
1072 | } | |
1073 | ||
ac56dd48 | 1074 | static inline void tcg_gen_bswap_i64(TCGv ret, TCGv arg) |
c896fe29 FB |
1075 | { |
1076 | #ifdef TCG_TARGET_HAS_bswap_i64 | |
1077 | tcg_gen_op2(INDEX_op_bswap_i64, ret, arg); | |
1078 | #else | |
ac56dd48 | 1079 | TCGv t0, t1; |
c896fe29 FB |
1080 | t0 = tcg_temp_new(TCG_TYPE_I32); |
1081 | t1 = tcg_temp_new(TCG_TYPE_I32); | |
1082 | ||
1083 | tcg_gen_shli_i64(t0, arg, 56); | |
1084 | ||
1085 | tcg_gen_andi_i64(t1, arg, 0x0000ff00); | |
1086 | tcg_gen_shli_i64(t1, t1, 40); | |
1087 | tcg_gen_or_i64(t0, t0, t1); | |
1088 | ||
1089 | tcg_gen_andi_i64(t1, arg, 0x00ff0000); | |
1090 | tcg_gen_shli_i64(t1, t1, 24); | |
1091 | tcg_gen_or_i64(t0, t0, t1); | |
1092 | ||
1093 | tcg_gen_andi_i64(t1, arg, 0xff000000); | |
1094 | tcg_gen_shli_i64(t1, t1, 8); | |
1095 | tcg_gen_or_i64(t0, t0, t1); | |
1096 | ||
1097 | tcg_gen_shri_i64(t1, arg, 8); | |
1098 | tcg_gen_andi_i64(t1, t1, 0xff000000); | |
1099 | tcg_gen_or_i64(t0, t0, t1); | |
1100 | ||
1101 | tcg_gen_shri_i64(t1, arg, 24); | |
1102 | tcg_gen_andi_i64(t1, t1, 0x00ff0000); | |
1103 | tcg_gen_or_i64(t0, t0, t1); | |
1104 | ||
1105 | tcg_gen_shri_i64(t1, arg, 40); | |
1106 | tcg_gen_andi_i64(t1, t1, 0x0000ff00); | |
1107 | tcg_gen_or_i64(t0, t0, t1); | |
1108 | ||
1109 | tcg_gen_shri_i64(t1, arg, 56); | |
1110 | tcg_gen_or_i64(ret, t0, t1); | |
1111 | #endif | |
1112 | } | |
1113 | ||
1114 | #endif | |
1115 | ||
5ff9d6a4 FB |
1116 | |
1117 | static inline void tcg_gen_discard_i32(TCGv arg) | |
1118 | { | |
1119 | tcg_gen_op1(INDEX_op_discard, arg); | |
1120 | } | |
1121 | ||
1122 | #if TCG_TARGET_REG_BITS == 32 | |
1123 | static inline void tcg_gen_discard_i64(TCGv arg) | |
1124 | { | |
1125 | tcg_gen_discard_i32(arg); | |
1126 | tcg_gen_discard_i32(TCGV_HIGH(arg)); | |
1127 | } | |
1128 | #else | |
1129 | static inline void tcg_gen_discard_i64(TCGv arg) | |
1130 | { | |
1131 | tcg_gen_op1(INDEX_op_discard, arg); | |
1132 | } | |
1133 | #endif | |
1134 | ||
c896fe29 | 1135 | /***************************************/ |
ac56dd48 | 1136 | static inline void tcg_gen_macro_2(TCGv ret0, TCGv ret1, int macro_id) |
c896fe29 | 1137 | { |
ac56dd48 | 1138 | tcg_gen_op3i(INDEX_op_macro_2, ret0, ret1, macro_id); |
c896fe29 FB |
1139 | } |
1140 | ||
1141 | /***************************************/ | |
1142 | /* QEMU specific operations. Their type depend on the QEMU CPU | |
1143 | type. */ | |
1144 | #ifndef TARGET_LONG_BITS | |
1145 | #error must include QEMU headers | |
1146 | #endif | |
1147 | ||
1148 | static inline void tcg_gen_exit_tb(tcg_target_long val) | |
1149 | { | |
ac56dd48 | 1150 | tcg_gen_op1i(INDEX_op_exit_tb, val); |
c896fe29 FB |
1151 | } |
1152 | ||
1153 | static inline void tcg_gen_goto_tb(int idx) | |
1154 | { | |
ac56dd48 | 1155 | tcg_gen_op1i(INDEX_op_goto_tb, idx); |
c896fe29 FB |
1156 | } |
1157 | ||
1158 | #if TCG_TARGET_REG_BITS == 32 | |
ac56dd48 | 1159 | static inline void tcg_gen_qemu_ld8u(TCGv ret, TCGv addr, int mem_index) |
c896fe29 FB |
1160 | { |
1161 | #if TARGET_LONG_BITS == 32 | |
ac56dd48 | 1162 | tcg_gen_op3i(INDEX_op_qemu_ld8u, ret, addr, mem_index); |
c896fe29 | 1163 | #else |
ac56dd48 PB |
1164 | tcg_gen_op4i(INDEX_op_qemu_ld8u, ret, addr, TCGV_HIGH(addr), mem_index); |
1165 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); | |
c896fe29 FB |
1166 | #endif |
1167 | } | |
1168 | ||
ac56dd48 | 1169 | static inline void tcg_gen_qemu_ld8s(TCGv ret, TCGv addr, int mem_index) |
c896fe29 FB |
1170 | { |
1171 | #if TARGET_LONG_BITS == 32 | |
ac56dd48 | 1172 | tcg_gen_op3i(INDEX_op_qemu_ld8s, ret, addr, mem_index); |
c896fe29 | 1173 | #else |
ac56dd48 | 1174 | tcg_gen_op4i(INDEX_op_qemu_ld8s, ret, addr, TCGV_HIGH(addr), mem_index); |
21fc3cfc | 1175 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
c896fe29 FB |
1176 | #endif |
1177 | } | |
1178 | ||
ac56dd48 | 1179 | static inline void tcg_gen_qemu_ld16u(TCGv ret, TCGv addr, int mem_index) |
c896fe29 FB |
1180 | { |
1181 | #if TARGET_LONG_BITS == 32 | |
ac56dd48 | 1182 | tcg_gen_op3i(INDEX_op_qemu_ld16u, ret, addr, mem_index); |
c896fe29 | 1183 | #else |
ac56dd48 PB |
1184 | tcg_gen_op4i(INDEX_op_qemu_ld16u, ret, addr, TCGV_HIGH(addr), mem_index); |
1185 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); | |
c896fe29 FB |
1186 | #endif |
1187 | } | |
1188 | ||
ac56dd48 | 1189 | static inline void tcg_gen_qemu_ld16s(TCGv ret, TCGv addr, int mem_index) |
c896fe29 FB |
1190 | { |
1191 | #if TARGET_LONG_BITS == 32 | |
ac56dd48 | 1192 | tcg_gen_op3i(INDEX_op_qemu_ld16s, ret, addr, mem_index); |
c896fe29 | 1193 | #else |
ac56dd48 | 1194 | tcg_gen_op4i(INDEX_op_qemu_ld16s, ret, addr, TCGV_HIGH(addr), mem_index); |
21fc3cfc | 1195 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
c896fe29 FB |
1196 | #endif |
1197 | } | |
1198 | ||
ac56dd48 | 1199 | static inline void tcg_gen_qemu_ld32u(TCGv ret, TCGv addr, int mem_index) |
c896fe29 FB |
1200 | { |
1201 | #if TARGET_LONG_BITS == 32 | |
ac56dd48 | 1202 | tcg_gen_op3i(INDEX_op_qemu_ld32u, ret, addr, mem_index); |
c896fe29 | 1203 | #else |
ac56dd48 PB |
1204 | tcg_gen_op4i(INDEX_op_qemu_ld32u, ret, addr, TCGV_HIGH(addr), mem_index); |
1205 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); | |
c896fe29 FB |
1206 | #endif |
1207 | } | |
1208 | ||
ac56dd48 | 1209 | static inline void tcg_gen_qemu_ld32s(TCGv ret, TCGv addr, int mem_index) |
c896fe29 FB |
1210 | { |
1211 | #if TARGET_LONG_BITS == 32 | |
ac56dd48 | 1212 | tcg_gen_op3i(INDEX_op_qemu_ld32u, ret, addr, mem_index); |
c896fe29 | 1213 | #else |
ac56dd48 PB |
1214 | tcg_gen_op4i(INDEX_op_qemu_ld32u, ret, addr, TCGV_HIGH(addr), mem_index); |
1215 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); | |
c896fe29 FB |
1216 | #endif |
1217 | } | |
1218 | ||
ac56dd48 | 1219 | static inline void tcg_gen_qemu_ld64(TCGv ret, TCGv addr, int mem_index) |
c896fe29 FB |
1220 | { |
1221 | #if TARGET_LONG_BITS == 32 | |
ac56dd48 | 1222 | tcg_gen_op4i(INDEX_op_qemu_ld64, ret, TCGV_HIGH(ret), addr, mem_index); |
c896fe29 | 1223 | #else |
ac56dd48 PB |
1224 | tcg_gen_op5i(INDEX_op_qemu_ld64, ret, TCGV_HIGH(ret), |
1225 | addr, TCGV_HIGH(addr), mem_index); | |
c896fe29 FB |
1226 | #endif |
1227 | } | |
1228 | ||
ac56dd48 | 1229 | static inline void tcg_gen_qemu_st8(TCGv arg, TCGv addr, int mem_index) |
c896fe29 FB |
1230 | { |
1231 | #if TARGET_LONG_BITS == 32 | |
ac56dd48 | 1232 | tcg_gen_op3i(INDEX_op_qemu_st8, arg, addr, mem_index); |
c896fe29 | 1233 | #else |
ac56dd48 | 1234 | tcg_gen_op4i(INDEX_op_qemu_st8, arg, addr, TCGV_HIGH(addr), mem_index); |
c896fe29 FB |
1235 | #endif |
1236 | } | |
1237 | ||
ac56dd48 | 1238 | static inline void tcg_gen_qemu_st16(TCGv arg, TCGv addr, int mem_index) |
c896fe29 FB |
1239 | { |
1240 | #if TARGET_LONG_BITS == 32 | |
ac56dd48 | 1241 | tcg_gen_op3i(INDEX_op_qemu_st16, arg, addr, mem_index); |
c896fe29 | 1242 | #else |
ac56dd48 | 1243 | tcg_gen_op4i(INDEX_op_qemu_st16, arg, addr, TCGV_HIGH(addr), mem_index); |
c896fe29 FB |
1244 | #endif |
1245 | } | |
1246 | ||
ac56dd48 | 1247 | static inline void tcg_gen_qemu_st32(TCGv arg, TCGv addr, int mem_index) |
c896fe29 FB |
1248 | { |
1249 | #if TARGET_LONG_BITS == 32 | |
ac56dd48 | 1250 | tcg_gen_op3i(INDEX_op_qemu_st32, arg, addr, mem_index); |
c896fe29 | 1251 | #else |
ac56dd48 | 1252 | tcg_gen_op4i(INDEX_op_qemu_st32, arg, addr, TCGV_HIGH(addr), mem_index); |
c896fe29 FB |
1253 | #endif |
1254 | } | |
1255 | ||
ac56dd48 | 1256 | static inline void tcg_gen_qemu_st64(TCGv arg, TCGv addr, int mem_index) |
c896fe29 FB |
1257 | { |
1258 | #if TARGET_LONG_BITS == 32 | |
ac56dd48 | 1259 | tcg_gen_op4i(INDEX_op_qemu_st64, arg, TCGV_HIGH(arg), addr, mem_index); |
c896fe29 | 1260 | #else |
ac56dd48 PB |
1261 | tcg_gen_op5i(INDEX_op_qemu_st64, arg, TCGV_HIGH(arg), |
1262 | addr, TCGV_HIGH(addr), mem_index); | |
c896fe29 FB |
1263 | #endif |
1264 | } | |
1265 | ||
56b8f567 | 1266 | #define tcg_gen_ld_ptr tcg_gen_ld_i32 |
f8422f52 | 1267 | |
c896fe29 FB |
1268 | #else /* TCG_TARGET_REG_BITS == 32 */ |
1269 | ||
ac56dd48 | 1270 | static inline void tcg_gen_qemu_ld8u(TCGv ret, TCGv addr, int mem_index) |
c896fe29 | 1271 | { |
ac56dd48 | 1272 | tcg_gen_op3i(INDEX_op_qemu_ld8u, ret, addr, mem_index); |
c896fe29 FB |
1273 | } |
1274 | ||
ac56dd48 | 1275 | static inline void tcg_gen_qemu_ld8s(TCGv ret, TCGv addr, int mem_index) |
c896fe29 | 1276 | { |
ac56dd48 | 1277 | tcg_gen_op3i(INDEX_op_qemu_ld8s, ret, addr, mem_index); |
c896fe29 FB |
1278 | } |
1279 | ||
ac56dd48 | 1280 | static inline void tcg_gen_qemu_ld16u(TCGv ret, TCGv addr, int mem_index) |
c896fe29 | 1281 | { |
ac56dd48 | 1282 | tcg_gen_op3i(INDEX_op_qemu_ld16u, ret, addr, mem_index); |
c896fe29 FB |
1283 | } |
1284 | ||
ac56dd48 | 1285 | static inline void tcg_gen_qemu_ld16s(TCGv ret, TCGv addr, int mem_index) |
c896fe29 | 1286 | { |
ac56dd48 | 1287 | tcg_gen_op3i(INDEX_op_qemu_ld16s, ret, addr, mem_index); |
c896fe29 FB |
1288 | } |
1289 | ||
ac56dd48 | 1290 | static inline void tcg_gen_qemu_ld32u(TCGv ret, TCGv addr, int mem_index) |
c896fe29 | 1291 | { |
ac56dd48 | 1292 | tcg_gen_op3i(INDEX_op_qemu_ld32u, ret, addr, mem_index); |
c896fe29 FB |
1293 | } |
1294 | ||
ac56dd48 | 1295 | static inline void tcg_gen_qemu_ld32s(TCGv ret, TCGv addr, int mem_index) |
c896fe29 | 1296 | { |
ac56dd48 | 1297 | tcg_gen_op3i(INDEX_op_qemu_ld32s, ret, addr, mem_index); |
c896fe29 FB |
1298 | } |
1299 | ||
ac56dd48 | 1300 | static inline void tcg_gen_qemu_ld64(TCGv ret, TCGv addr, int mem_index) |
c896fe29 | 1301 | { |
ac56dd48 | 1302 | tcg_gen_op3i(INDEX_op_qemu_ld64, ret, addr, mem_index); |
c896fe29 FB |
1303 | } |
1304 | ||
ac56dd48 | 1305 | static inline void tcg_gen_qemu_st8(TCGv arg, TCGv addr, int mem_index) |
c896fe29 | 1306 | { |
ac56dd48 | 1307 | tcg_gen_op3i(INDEX_op_qemu_st8, arg, addr, mem_index); |
c896fe29 FB |
1308 | } |
1309 | ||
ac56dd48 | 1310 | static inline void tcg_gen_qemu_st16(TCGv arg, TCGv addr, int mem_index) |
c896fe29 | 1311 | { |
ac56dd48 | 1312 | tcg_gen_op3i(INDEX_op_qemu_st16, arg, addr, mem_index); |
c896fe29 FB |
1313 | } |
1314 | ||
ac56dd48 | 1315 | static inline void tcg_gen_qemu_st32(TCGv arg, TCGv addr, int mem_index) |
c896fe29 | 1316 | { |
ac56dd48 | 1317 | tcg_gen_op3i(INDEX_op_qemu_st32, arg, addr, mem_index); |
c896fe29 FB |
1318 | } |
1319 | ||
ac56dd48 | 1320 | static inline void tcg_gen_qemu_st64(TCGv arg, TCGv addr, int mem_index) |
c896fe29 | 1321 | { |
ac56dd48 | 1322 | tcg_gen_op3i(INDEX_op_qemu_st64, arg, addr, mem_index); |
c896fe29 FB |
1323 | } |
1324 | ||
56b8f567 | 1325 | #define tcg_gen_ld_ptr tcg_gen_ld_i64 |
f8422f52 | 1326 | |
c896fe29 | 1327 | #endif /* TCG_TARGET_REG_BITS != 32 */ |
f8422f52 BS |
1328 | |
1329 | #if TARGET_LONG_BITS == 64 | |
1330 | #define TCG_TYPE_TL TCG_TYPE_I64 | |
1331 | #define tcg_gen_movi_tl tcg_gen_movi_i64 | |
1332 | #define tcg_gen_mov_tl tcg_gen_mov_i64 | |
1333 | #define tcg_gen_ld8u_tl tcg_gen_ld8u_i64 | |
1334 | #define tcg_gen_ld8s_tl tcg_gen_ld8s_i64 | |
1335 | #define tcg_gen_ld16u_tl tcg_gen_ld16u_i64 | |
1336 | #define tcg_gen_ld16s_tl tcg_gen_ld16s_i64 | |
1337 | #define tcg_gen_ld32u_tl tcg_gen_ld32u_i64 | |
1338 | #define tcg_gen_ld32s_tl tcg_gen_ld32s_i64 | |
1339 | #define tcg_gen_ld_tl tcg_gen_ld_i64 | |
1340 | #define tcg_gen_st8_tl tcg_gen_st8_i64 | |
1341 | #define tcg_gen_st16_tl tcg_gen_st16_i64 | |
1342 | #define tcg_gen_st32_tl tcg_gen_st32_i64 | |
1343 | #define tcg_gen_st_tl tcg_gen_st_i64 | |
1344 | #define tcg_gen_add_tl tcg_gen_add_i64 | |
1345 | #define tcg_gen_addi_tl tcg_gen_addi_i64 | |
1346 | #define tcg_gen_sub_tl tcg_gen_sub_i64 | |
1347 | #define tcg_gen_subi_tl tcg_gen_subi_i64 | |
1348 | #define tcg_gen_and_tl tcg_gen_and_i64 | |
1349 | #define tcg_gen_andi_tl tcg_gen_andi_i64 | |
1350 | #define tcg_gen_or_tl tcg_gen_or_i64 | |
1351 | #define tcg_gen_ori_tl tcg_gen_ori_i64 | |
1352 | #define tcg_gen_xor_tl tcg_gen_xor_i64 | |
1353 | #define tcg_gen_xori_tl tcg_gen_xori_i64 | |
1354 | #define tcg_gen_shl_tl tcg_gen_shl_i64 | |
1355 | #define tcg_gen_shli_tl tcg_gen_shli_i64 | |
1356 | #define tcg_gen_shr_tl tcg_gen_shr_i64 | |
1357 | #define tcg_gen_shri_tl tcg_gen_shri_i64 | |
1358 | #define tcg_gen_sar_tl tcg_gen_sar_i64 | |
1359 | #define tcg_gen_sari_tl tcg_gen_sari_i64 | |
0cf767d6 | 1360 | #define tcg_gen_brcond_tl tcg_gen_brcond_i64 |
f8422f52 BS |
1361 | #else |
1362 | #define TCG_TYPE_TL TCG_TYPE_I32 | |
1363 | #define tcg_gen_movi_tl tcg_gen_movi_i32 | |
1364 | #define tcg_gen_mov_tl tcg_gen_mov_i32 | |
1365 | #define tcg_gen_ld8u_tl tcg_gen_ld8u_i32 | |
1366 | #define tcg_gen_ld8s_tl tcg_gen_ld8s_i32 | |
1367 | #define tcg_gen_ld16u_tl tcg_gen_ld16u_i32 | |
1368 | #define tcg_gen_ld16s_tl tcg_gen_ld16s_i32 | |
1369 | #define tcg_gen_ld32u_tl tcg_gen_ld_i32 | |
1370 | #define tcg_gen_ld32s_tl tcg_gen_ld_i32 | |
1371 | #define tcg_gen_ld_tl tcg_gen_ld_i32 | |
1372 | #define tcg_gen_st8_tl tcg_gen_st8_i32 | |
1373 | #define tcg_gen_st16_tl tcg_gen_st16_i32 | |
1374 | #define tcg_gen_st32_tl tcg_gen_st_i32 | |
1375 | #define tcg_gen_st_tl tcg_gen_st_i32 | |
1376 | #define tcg_gen_add_tl tcg_gen_add_i32 | |
1377 | #define tcg_gen_addi_tl tcg_gen_addi_i32 | |
1378 | #define tcg_gen_sub_tl tcg_gen_sub_i32 | |
1379 | #define tcg_gen_subi_tl tcg_gen_subi_i32 | |
1380 | #define tcg_gen_and_tl tcg_gen_and_i32 | |
1381 | #define tcg_gen_andi_tl tcg_gen_andi_i32 | |
1382 | #define tcg_gen_or_tl tcg_gen_or_i32 | |
1383 | #define tcg_gen_ori_tl tcg_gen_ori_i32 | |
1384 | #define tcg_gen_xor_tl tcg_gen_xor_i32 | |
1385 | #define tcg_gen_xori_tl tcg_gen_xori_i32 | |
1386 | #define tcg_gen_shl_tl tcg_gen_shl_i32 | |
1387 | #define tcg_gen_shli_tl tcg_gen_shli_i32 | |
1388 | #define tcg_gen_shr_tl tcg_gen_shr_i32 | |
1389 | #define tcg_gen_shri_tl tcg_gen_shri_i32 | |
1390 | #define tcg_gen_sar_tl tcg_gen_sar_i32 | |
1391 | #define tcg_gen_sari_tl tcg_gen_sari_i32 | |
0cf767d6 | 1392 | #define tcg_gen_brcond_tl tcg_gen_brcond_i32 |
f8422f52 | 1393 | #endif |