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tcg: improve tcg_reg_alloc_movi()
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CommitLineData
c896fe29
FB
1/*
2 * Tiny Code Generator for QEMU
3 *
4 * Copyright (c) 2008 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24
c896fe29
FB
25/* define it to use liveness analysis (better code) */
26#define USE_LIVENESS_ANALYSIS
8f2e8c07 27#define USE_TCG_OPTIMIZATIONS
c896fe29 28
cca82982
AJ
29#include "config.h"
30
813da627
RH
31/* Define to jump the ELF file used to communicate with GDB. */
32#undef DEBUG_JIT
33
a6c6f76c 34#if !defined(CONFIG_DEBUG_TCG) && !defined(NDEBUG)
cca82982
AJ
35/* define it to suppress various consistency checks (faster) */
36#define NDEBUG
37#endif
38
ca10f867 39#include "qemu-common.h"
902b3d5c 40#include "cache-utils.h"
379f6698 41#include "host-utils.h"
2d8ebcf9 42#include "qemu-timer.h"
c896fe29
FB
43
44/* Note: the long term plan is to reduce the dependancies on the QEMU
45 CPU definitions. Currently they are used for qemu_ld/st
46 instructions */
47#define NO_CPU_IO_DEFS
48#include "cpu.h"
c896fe29
FB
49
50#include "tcg-op.h"
813da627
RH
51
52#if TCG_TARGET_REG_BITS == 64
53# define ELF_CLASS ELFCLASS64
54#else
55# define ELF_CLASS ELFCLASS32
56#endif
57#ifdef HOST_WORDS_BIGENDIAN
58# define ELF_DATA ELFDATA2MSB
59#else
60# define ELF_DATA ELFDATA2LSB
61#endif
62
c896fe29
FB
63#include "elf.h"
64
c0ad3001 65/* Forward declarations for functions declared in tcg-target.c and used here. */
e4d58b41
RH
66static void tcg_target_init(TCGContext *s);
67static void tcg_target_qemu_prologue(TCGContext *s);
c896fe29 68static void patch_reloc(uint8_t *code_ptr, int type,
f54b3f92 69 tcg_target_long value, tcg_target_long addend);
c896fe29 70
813da627
RH
71static void tcg_register_jit_int(void *buf, size_t size,
72 void *debug_frame, size_t debug_frame_size)
73 __attribute__((unused));
74
c0ad3001
SW
75/* Forward declarations for functions declared and used in tcg-target.c. */
76static int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str);
2a534aff 77static void tcg_out_ld(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg1,
c0ad3001 78 tcg_target_long arg2);
2a534aff 79static void tcg_out_mov(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg);
c0ad3001 80static void tcg_out_movi(TCGContext *s, TCGType type,
2a534aff 81 TCGReg ret, tcg_target_long arg);
c0ad3001
SW
82static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
83 const int *const_args);
2a534aff 84static void tcg_out_st(TCGContext *s, TCGType type, TCGReg arg, TCGReg arg1,
c0ad3001
SW
85 tcg_target_long arg2);
86static int tcg_target_const_match(tcg_target_long val,
87 const TCGArgConstraint *arg_ct);
c0ad3001 88
8399ad59 89TCGOpDef tcg_op_defs[] = {
0e2029a0 90#define DEF(s, oargs, iargs, cargs, flags) { #s, oargs, iargs, cargs, iargs + oargs + cargs, flags },
c896fe29
FB
91#include "tcg-opc.h"
92#undef DEF
c896fe29 93};
2a24374a 94const size_t tcg_op_defs_max = ARRAY_SIZE(tcg_op_defs);
c896fe29 95
b1d8e52e
BS
96static TCGRegSet tcg_target_available_regs[2];
97static TCGRegSet tcg_target_call_clobber_regs;
c896fe29
FB
98
99/* XXX: move that inside the context */
100uint16_t *gen_opc_ptr;
101TCGArg *gen_opparam_ptr;
102
103static inline void tcg_out8(TCGContext *s, uint8_t v)
104{
105 *s->code_ptr++ = v;
106}
107
108static inline void tcg_out16(TCGContext *s, uint16_t v)
109{
110 *(uint16_t *)s->code_ptr = v;
111 s->code_ptr += 2;
112}
113
114static inline void tcg_out32(TCGContext *s, uint32_t v)
115{
116 *(uint32_t *)s->code_ptr = v;
117 s->code_ptr += 4;
118}
119
120/* label relocation processing */
121
a5ad5916
SW
122static void tcg_out_reloc(TCGContext *s, uint8_t *code_ptr, int type,
123 int label_index, long addend)
c896fe29
FB
124{
125 TCGLabel *l;
126 TCGRelocation *r;
127
128 l = &s->labels[label_index];
129 if (l->has_value) {
623e265c
PB
130 /* FIXME: This may break relocations on RISC targets that
131 modify instruction fields in place. The caller may not have
132 written the initial value. */
f54b3f92 133 patch_reloc(code_ptr, type, l->u.value, addend);
c896fe29
FB
134 } else {
135 /* add a new relocation entry */
136 r = tcg_malloc(sizeof(TCGRelocation));
137 r->type = type;
138 r->ptr = code_ptr;
139 r->addend = addend;
140 r->next = l->u.first_reloc;
141 l->u.first_reloc = r;
142 }
143}
144
9d6fca70 145static void tcg_out_label(TCGContext *s, int label_index, void *ptr)
c896fe29
FB
146{
147 TCGLabel *l;
148 TCGRelocation *r;
9d6fca70 149 tcg_target_long value = (tcg_target_long)ptr;
c896fe29
FB
150
151 l = &s->labels[label_index];
152 if (l->has_value)
153 tcg_abort();
154 r = l->u.first_reloc;
155 while (r != NULL) {
f54b3f92 156 patch_reloc(r->ptr, r->type, value, r->addend);
c896fe29
FB
157 r = r->next;
158 }
159 l->has_value = 1;
160 l->u.value = value;
161}
162
163int gen_new_label(void)
164{
165 TCGContext *s = &tcg_ctx;
166 int idx;
167 TCGLabel *l;
168
169 if (s->nb_labels >= TCG_MAX_LABELS)
170 tcg_abort();
171 idx = s->nb_labels++;
172 l = &s->labels[idx];
173 l->has_value = 0;
174 l->u.first_reloc = NULL;
175 return idx;
176}
177
178#include "tcg-target.c"
179
c896fe29
FB
180/* pool based memory allocation */
181void *tcg_malloc_internal(TCGContext *s, int size)
182{
183 TCGPool *p;
184 int pool_size;
185
186 if (size > TCG_POOL_CHUNK_SIZE) {
187 /* big malloc: insert a new pool (XXX: could optimize) */
7267c094 188 p = g_malloc(sizeof(TCGPool) + size);
c896fe29 189 p->size = size;
4055299e
KB
190 p->next = s->pool_first_large;
191 s->pool_first_large = p;
192 return p->data;
c896fe29
FB
193 } else {
194 p = s->pool_current;
195 if (!p) {
196 p = s->pool_first;
197 if (!p)
198 goto new_pool;
199 } else {
200 if (!p->next) {
201 new_pool:
202 pool_size = TCG_POOL_CHUNK_SIZE;
7267c094 203 p = g_malloc(sizeof(TCGPool) + pool_size);
c896fe29
FB
204 p->size = pool_size;
205 p->next = NULL;
206 if (s->pool_current)
207 s->pool_current->next = p;
208 else
209 s->pool_first = p;
210 } else {
211 p = p->next;
212 }
213 }
214 }
215 s->pool_current = p;
216 s->pool_cur = p->data + size;
217 s->pool_end = p->data + p->size;
218 return p->data;
219}
220
221void tcg_pool_reset(TCGContext *s)
222{
4055299e
KB
223 TCGPool *p, *t;
224 for (p = s->pool_first_large; p; p = t) {
225 t = p->next;
226 g_free(p);
227 }
228 s->pool_first_large = NULL;
c896fe29
FB
229 s->pool_cur = s->pool_end = NULL;
230 s->pool_current = NULL;
231}
232
c896fe29
FB
233void tcg_context_init(TCGContext *s)
234{
235 int op, total_args, n;
236 TCGOpDef *def;
237 TCGArgConstraint *args_ct;
238 int *sorted_args;
239
240 memset(s, 0, sizeof(*s));
c896fe29
FB
241 s->nb_globals = 0;
242
243 /* Count total number of arguments and allocate the corresponding
244 space */
245 total_args = 0;
246 for(op = 0; op < NB_OPS; op++) {
247 def = &tcg_op_defs[op];
248 n = def->nb_iargs + def->nb_oargs;
249 total_args += n;
250 }
251
7267c094
AL
252 args_ct = g_malloc(sizeof(TCGArgConstraint) * total_args);
253 sorted_args = g_malloc(sizeof(int) * total_args);
c896fe29
FB
254
255 for(op = 0; op < NB_OPS; op++) {
256 def = &tcg_op_defs[op];
257 def->args_ct = args_ct;
258 def->sorted_args = sorted_args;
259 n = def->nb_iargs + def->nb_oargs;
260 sorted_args += n;
261 args_ct += n;
262 }
263
264 tcg_target_init(s);
9002ec79 265}
b03cce8e 266
9002ec79
RH
267void tcg_prologue_init(TCGContext *s)
268{
b03cce8e
FB
269 /* init global prologue and epilogue */
270 s->code_buf = code_gen_prologue;
271 s->code_ptr = s->code_buf;
272 tcg_target_qemu_prologue(s);
2aeabc08
SW
273 flush_icache_range((tcg_target_ulong)s->code_buf,
274 (tcg_target_ulong)s->code_ptr);
c896fe29
FB
275}
276
277void tcg_set_frame(TCGContext *s, int reg,
278 tcg_target_long start, tcg_target_long size)
279{
280 s->frame_start = start;
281 s->frame_end = start + size;
282 s->frame_reg = reg;
283}
284
c896fe29
FB
285void tcg_func_start(TCGContext *s)
286{
e8996ee0 287 int i;
c896fe29
FB
288 tcg_pool_reset(s);
289 s->nb_temps = s->nb_globals;
641d5fbe 290 for(i = 0; i < (TCG_TYPE_COUNT * 2); i++)
e8996ee0 291 s->first_free_temp[i] = -1;
c896fe29
FB
292 s->labels = tcg_malloc(sizeof(TCGLabel) * TCG_MAX_LABELS);
293 s->nb_labels = 0;
294 s->current_frame_offset = s->frame_start;
295
0a209d4b
RH
296#ifdef CONFIG_DEBUG_TCG
297 s->goto_tb_issue_mask = 0;
298#endif
299
c896fe29
FB
300 gen_opc_ptr = gen_opc_buf;
301 gen_opparam_ptr = gen_opparam_buf;
302}
303
304static inline void tcg_temp_alloc(TCGContext *s, int n)
305{
306 if (n > TCG_MAX_TEMPS)
307 tcg_abort();
308}
309
a7812ae4
PB
310static inline int tcg_global_reg_new_internal(TCGType type, int reg,
311 const char *name)
c896fe29
FB
312{
313 TCGContext *s = &tcg_ctx;
314 TCGTemp *ts;
315 int idx;
316
317#if TCG_TARGET_REG_BITS == 32
318 if (type != TCG_TYPE_I32)
319 tcg_abort();
320#endif
321 if (tcg_regset_test_reg(s->reserved_regs, reg))
322 tcg_abort();
323 idx = s->nb_globals;
324 tcg_temp_alloc(s, s->nb_globals + 1);
325 ts = &s->temps[s->nb_globals];
326 ts->base_type = type;
327 ts->type = type;
328 ts->fixed_reg = 1;
329 ts->reg = reg;
c896fe29
FB
330 ts->name = name;
331 s->nb_globals++;
332 tcg_regset_set_reg(s->reserved_regs, reg);
a7812ae4
PB
333 return idx;
334}
335
336TCGv_i32 tcg_global_reg_new_i32(int reg, const char *name)
337{
338 int idx;
339
340 idx = tcg_global_reg_new_internal(TCG_TYPE_I32, reg, name);
341 return MAKE_TCGV_I32(idx);
342}
343
344TCGv_i64 tcg_global_reg_new_i64(int reg, const char *name)
345{
346 int idx;
347
348 idx = tcg_global_reg_new_internal(TCG_TYPE_I64, reg, name);
349 return MAKE_TCGV_I64(idx);
c896fe29
FB
350}
351
a7812ae4
PB
352static inline int tcg_global_mem_new_internal(TCGType type, int reg,
353 tcg_target_long offset,
354 const char *name)
c896fe29
FB
355{
356 TCGContext *s = &tcg_ctx;
357 TCGTemp *ts;
358 int idx;
359
360 idx = s->nb_globals;
361#if TCG_TARGET_REG_BITS == 32
362 if (type == TCG_TYPE_I64) {
363 char buf[64];
c588979b 364 tcg_temp_alloc(s, s->nb_globals + 2);
c896fe29
FB
365 ts = &s->temps[s->nb_globals];
366 ts->base_type = type;
367 ts->type = TCG_TYPE_I32;
368 ts->fixed_reg = 0;
369 ts->mem_allocated = 1;
370 ts->mem_reg = reg;
371#ifdef TCG_TARGET_WORDS_BIGENDIAN
372 ts->mem_offset = offset + 4;
373#else
374 ts->mem_offset = offset;
375#endif
c896fe29
FB
376 pstrcpy(buf, sizeof(buf), name);
377 pstrcat(buf, sizeof(buf), "_0");
378 ts->name = strdup(buf);
379 ts++;
380
381 ts->base_type = type;
382 ts->type = TCG_TYPE_I32;
383 ts->fixed_reg = 0;
384 ts->mem_allocated = 1;
385 ts->mem_reg = reg;
386#ifdef TCG_TARGET_WORDS_BIGENDIAN
387 ts->mem_offset = offset;
388#else
389 ts->mem_offset = offset + 4;
390#endif
c896fe29
FB
391 pstrcpy(buf, sizeof(buf), name);
392 pstrcat(buf, sizeof(buf), "_1");
393 ts->name = strdup(buf);
394
395 s->nb_globals += 2;
396 } else
397#endif
398 {
399 tcg_temp_alloc(s, s->nb_globals + 1);
400 ts = &s->temps[s->nb_globals];
401 ts->base_type = type;
402 ts->type = type;
403 ts->fixed_reg = 0;
404 ts->mem_allocated = 1;
405 ts->mem_reg = reg;
406 ts->mem_offset = offset;
c896fe29
FB
407 ts->name = name;
408 s->nb_globals++;
409 }
a7812ae4
PB
410 return idx;
411}
412
413TCGv_i32 tcg_global_mem_new_i32(int reg, tcg_target_long offset,
414 const char *name)
415{
416 int idx;
417
418 idx = tcg_global_mem_new_internal(TCG_TYPE_I32, reg, offset, name);
419 return MAKE_TCGV_I32(idx);
420}
421
422TCGv_i64 tcg_global_mem_new_i64(int reg, tcg_target_long offset,
423 const char *name)
424{
425 int idx;
426
427 idx = tcg_global_mem_new_internal(TCG_TYPE_I64, reg, offset, name);
428 return MAKE_TCGV_I64(idx);
c896fe29
FB
429}
430
a7812ae4 431static inline int tcg_temp_new_internal(TCGType type, int temp_local)
c896fe29
FB
432{
433 TCGContext *s = &tcg_ctx;
434 TCGTemp *ts;
641d5fbe 435 int idx, k;
c896fe29 436
641d5fbe
FB
437 k = type;
438 if (temp_local)
439 k += TCG_TYPE_COUNT;
440 idx = s->first_free_temp[k];
e8996ee0
FB
441 if (idx != -1) {
442 /* There is already an available temp with the
443 right type */
444 ts = &s->temps[idx];
641d5fbe 445 s->first_free_temp[k] = ts->next_free_temp;
e8996ee0 446 ts->temp_allocated = 1;
641d5fbe 447 assert(ts->temp_local == temp_local);
e8996ee0
FB
448 } else {
449 idx = s->nb_temps;
c896fe29 450#if TCG_TARGET_REG_BITS == 32
e8996ee0 451 if (type == TCG_TYPE_I64) {
8df1ca4b 452 tcg_temp_alloc(s, s->nb_temps + 2);
e8996ee0
FB
453 ts = &s->temps[s->nb_temps];
454 ts->base_type = type;
455 ts->type = TCG_TYPE_I32;
456 ts->temp_allocated = 1;
641d5fbe 457 ts->temp_local = temp_local;
e8996ee0
FB
458 ts->name = NULL;
459 ts++;
460 ts->base_type = TCG_TYPE_I32;
461 ts->type = TCG_TYPE_I32;
462 ts->temp_allocated = 1;
641d5fbe 463 ts->temp_local = temp_local;
e8996ee0
FB
464 ts->name = NULL;
465 s->nb_temps += 2;
466 } else
c896fe29 467#endif
e8996ee0
FB
468 {
469 tcg_temp_alloc(s, s->nb_temps + 1);
470 ts = &s->temps[s->nb_temps];
471 ts->base_type = type;
472 ts->type = type;
473 ts->temp_allocated = 1;
641d5fbe 474 ts->temp_local = temp_local;
e8996ee0
FB
475 ts->name = NULL;
476 s->nb_temps++;
477 }
c896fe29 478 }
27bfd83c
PM
479
480#if defined(CONFIG_DEBUG_TCG)
481 s->temps_in_use++;
482#endif
a7812ae4 483 return idx;
c896fe29
FB
484}
485
a7812ae4
PB
486TCGv_i32 tcg_temp_new_internal_i32(int temp_local)
487{
488 int idx;
489
490 idx = tcg_temp_new_internal(TCG_TYPE_I32, temp_local);
491 return MAKE_TCGV_I32(idx);
492}
493
494TCGv_i64 tcg_temp_new_internal_i64(int temp_local)
495{
496 int idx;
497
498 idx = tcg_temp_new_internal(TCG_TYPE_I64, temp_local);
499 return MAKE_TCGV_I64(idx);
500}
501
502static inline void tcg_temp_free_internal(int idx)
c896fe29
FB
503{
504 TCGContext *s = &tcg_ctx;
505 TCGTemp *ts;
641d5fbe 506 int k;
c896fe29 507
27bfd83c
PM
508#if defined(CONFIG_DEBUG_TCG)
509 s->temps_in_use--;
510 if (s->temps_in_use < 0) {
511 fprintf(stderr, "More temporaries freed than allocated!\n");
512 }
513#endif
514
e8996ee0 515 assert(idx >= s->nb_globals && idx < s->nb_temps);
c896fe29 516 ts = &s->temps[idx];
e8996ee0
FB
517 assert(ts->temp_allocated != 0);
518 ts->temp_allocated = 0;
641d5fbe
FB
519 k = ts->base_type;
520 if (ts->temp_local)
521 k += TCG_TYPE_COUNT;
522 ts->next_free_temp = s->first_free_temp[k];
523 s->first_free_temp[k] = idx;
c896fe29
FB
524}
525
a7812ae4
PB
526void tcg_temp_free_i32(TCGv_i32 arg)
527{
528 tcg_temp_free_internal(GET_TCGV_I32(arg));
529}
530
531void tcg_temp_free_i64(TCGv_i64 arg)
532{
533 tcg_temp_free_internal(GET_TCGV_I64(arg));
534}
e8996ee0 535
a7812ae4 536TCGv_i32 tcg_const_i32(int32_t val)
c896fe29 537{
a7812ae4
PB
538 TCGv_i32 t0;
539 t0 = tcg_temp_new_i32();
e8996ee0
FB
540 tcg_gen_movi_i32(t0, val);
541 return t0;
542}
c896fe29 543
a7812ae4 544TCGv_i64 tcg_const_i64(int64_t val)
e8996ee0 545{
a7812ae4
PB
546 TCGv_i64 t0;
547 t0 = tcg_temp_new_i64();
e8996ee0
FB
548 tcg_gen_movi_i64(t0, val);
549 return t0;
c896fe29
FB
550}
551
a7812ae4 552TCGv_i32 tcg_const_local_i32(int32_t val)
bdffd4a9 553{
a7812ae4
PB
554 TCGv_i32 t0;
555 t0 = tcg_temp_local_new_i32();
bdffd4a9
AJ
556 tcg_gen_movi_i32(t0, val);
557 return t0;
558}
559
a7812ae4 560TCGv_i64 tcg_const_local_i64(int64_t val)
bdffd4a9 561{
a7812ae4
PB
562 TCGv_i64 t0;
563 t0 = tcg_temp_local_new_i64();
bdffd4a9
AJ
564 tcg_gen_movi_i64(t0, val);
565 return t0;
566}
567
27bfd83c
PM
568#if defined(CONFIG_DEBUG_TCG)
569void tcg_clear_temp_count(void)
570{
571 TCGContext *s = &tcg_ctx;
572 s->temps_in_use = 0;
573}
574
575int tcg_check_temp_count(void)
576{
577 TCGContext *s = &tcg_ctx;
578 if (s->temps_in_use) {
579 /* Clear the count so that we don't give another
580 * warning immediately next time around.
581 */
582 s->temps_in_use = 0;
583 return 1;
584 }
585 return 0;
586}
587#endif
588
c896fe29
FB
589void tcg_register_helper(void *func, const char *name)
590{
591 TCGContext *s = &tcg_ctx;
592 int n;
593 if ((s->nb_helpers + 1) > s->allocated_helpers) {
594 n = s->allocated_helpers;
595 if (n == 0) {
596 n = 4;
597 } else {
598 n *= 2;
599 }
600 s->helpers = realloc(s->helpers, n * sizeof(TCGHelperInfo));
601 s->allocated_helpers = n;
602 }
4dc81f28 603 s->helpers[s->nb_helpers].func = (tcg_target_ulong)func;
c896fe29
FB
604 s->helpers[s->nb_helpers].name = name;
605 s->nb_helpers++;
606}
607
39cf05d3
FB
608/* Note: we convert the 64 bit args to 32 bit and do some alignment
609 and endian swap. Maybe it would be better to do the alignment
610 and endian swap in tcg_reg_alloc_call(). */
a7812ae4
PB
611void tcg_gen_callN(TCGContext *s, TCGv_ptr func, unsigned int flags,
612 int sizemask, TCGArg ret, int nargs, TCGArg *args)
c896fe29 613{
a7812ae4
PB
614 int i;
615 int real_args;
616 int nb_rets;
617 TCGArg *nparam;
2bece2c8
RH
618
619#if defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64
620 for (i = 0; i < nargs; ++i) {
621 int is_64bit = sizemask & (1 << (i+1)*2);
622 int is_signed = sizemask & (2 << (i+1)*2);
623 if (!is_64bit) {
624 TCGv_i64 temp = tcg_temp_new_i64();
625 TCGv_i64 orig = MAKE_TCGV_I64(args[i]);
626 if (is_signed) {
627 tcg_gen_ext32s_i64(temp, orig);
628 } else {
629 tcg_gen_ext32u_i64(temp, orig);
630 }
631 args[i] = GET_TCGV_I64(temp);
632 }
633 }
634#endif /* TCG_TARGET_EXTEND_ARGS */
635
a7812ae4
PB
636 *gen_opc_ptr++ = INDEX_op_call;
637 nparam = gen_opparam_ptr++;
a7812ae4
PB
638 if (ret != TCG_CALL_DUMMY_ARG) {
639#if TCG_TARGET_REG_BITS < 64
640 if (sizemask & 1) {
39cf05d3 641#ifdef TCG_TARGET_WORDS_BIGENDIAN
a7812ae4
PB
642 *gen_opparam_ptr++ = ret + 1;
643 *gen_opparam_ptr++ = ret;
39cf05d3 644#else
a7812ae4
PB
645 *gen_opparam_ptr++ = ret;
646 *gen_opparam_ptr++ = ret + 1;
39cf05d3 647#endif
a7812ae4
PB
648 nb_rets = 2;
649 } else
650#endif
651 {
652 *gen_opparam_ptr++ = ret;
653 nb_rets = 1;
c896fe29 654 }
a7812ae4
PB
655 } else {
656 nb_rets = 0;
c896fe29 657 }
a7812ae4
PB
658 real_args = 0;
659 for (i = 0; i < nargs; i++) {
660#if TCG_TARGET_REG_BITS < 64
2bece2c8
RH
661 int is_64bit = sizemask & (1 << (i+1)*2);
662 if (is_64bit) {
39cf05d3
FB
663#ifdef TCG_TARGET_CALL_ALIGN_ARGS
664 /* some targets want aligned 64 bit args */
ebd486d5 665 if (real_args & 1) {
a7812ae4 666 *gen_opparam_ptr++ = TCG_CALL_DUMMY_ARG;
ebd486d5 667 real_args++;
39cf05d3
FB
668 }
669#endif
3f90f252
RH
670 /* If stack grows up, then we will be placing successive
671 arguments at lower addresses, which means we need to
672 reverse the order compared to how we would normally
673 treat either big or little-endian. For those arguments
674 that will wind up in registers, this still works for
675 HPPA (the only current STACK_GROWSUP target) since the
676 argument registers are *also* allocated in decreasing
677 order. If another such target is added, this logic may
678 have to get more complicated to differentiate between
679 stack arguments and register arguments. */
680#if defined(TCG_TARGET_WORDS_BIGENDIAN) != defined(TCG_TARGET_STACK_GROWSUP)
a7812ae4
PB
681 *gen_opparam_ptr++ = args[i] + 1;
682 *gen_opparam_ptr++ = args[i];
c896fe29 683#else
a7812ae4
PB
684 *gen_opparam_ptr++ = args[i];
685 *gen_opparam_ptr++ = args[i] + 1;
c896fe29 686#endif
a7812ae4 687 real_args += 2;
2bece2c8 688 continue;
c896fe29 689 }
2bece2c8
RH
690#endif /* TCG_TARGET_REG_BITS < 64 */
691
692 *gen_opparam_ptr++ = args[i];
693 real_args++;
c896fe29 694 }
a7812ae4
PB
695 *gen_opparam_ptr++ = GET_TCGV_PTR(func);
696
697 *gen_opparam_ptr++ = flags;
698
699 *nparam = (nb_rets << 16) | (real_args + 1);
700
701 /* total parameters, needed to go backward in the instruction stream */
702 *gen_opparam_ptr++ = 1 + nb_rets + real_args + 3;
2bece2c8
RH
703
704#if defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64
705 for (i = 0; i < nargs; ++i) {
706 int is_64bit = sizemask & (1 << (i+1)*2);
707 if (!is_64bit) {
708 TCGv_i64 temp = MAKE_TCGV_I64(args[i]);
709 tcg_temp_free_i64(temp);
710 }
711 }
712#endif /* TCG_TARGET_EXTEND_ARGS */
c896fe29 713}
c896fe29 714
ac56dd48 715#if TCG_TARGET_REG_BITS == 32
a7812ae4 716void tcg_gen_shifti_i64(TCGv_i64 ret, TCGv_i64 arg1,
c896fe29
FB
717 int c, int right, int arith)
718{
cf60bce4 719 if (c == 0) {
a7812ae4 720 tcg_gen_mov_i32(TCGV_LOW(ret), TCGV_LOW(arg1));
cf60bce4
FB
721 tcg_gen_mov_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1));
722 } else if (c >= 32) {
c896fe29
FB
723 c -= 32;
724 if (right) {
725 if (arith) {
a7812ae4 726 tcg_gen_sari_i32(TCGV_LOW(ret), TCGV_HIGH(arg1), c);
ac56dd48 727 tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), 31);
c896fe29 728 } else {
a7812ae4 729 tcg_gen_shri_i32(TCGV_LOW(ret), TCGV_HIGH(arg1), c);
ac56dd48 730 tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
c896fe29
FB
731 }
732 } else {
a7812ae4
PB
733 tcg_gen_shli_i32(TCGV_HIGH(ret), TCGV_LOW(arg1), c);
734 tcg_gen_movi_i32(TCGV_LOW(ret), 0);
c896fe29
FB
735 }
736 } else {
a7812ae4 737 TCGv_i32 t0, t1;
c896fe29 738
a7812ae4
PB
739 t0 = tcg_temp_new_i32();
740 t1 = tcg_temp_new_i32();
c896fe29 741 if (right) {
ac56dd48 742 tcg_gen_shli_i32(t0, TCGV_HIGH(arg1), 32 - c);
c896fe29 743 if (arith)
ac56dd48 744 tcg_gen_sari_i32(t1, TCGV_HIGH(arg1), c);
a7812ae4 745 else
ac56dd48 746 tcg_gen_shri_i32(t1, TCGV_HIGH(arg1), c);
a7812ae4
PB
747 tcg_gen_shri_i32(TCGV_LOW(ret), TCGV_LOW(arg1), c);
748 tcg_gen_or_i32(TCGV_LOW(ret), TCGV_LOW(ret), t0);
ac56dd48 749 tcg_gen_mov_i32(TCGV_HIGH(ret), t1);
c896fe29 750 } else {
a7812ae4 751 tcg_gen_shri_i32(t0, TCGV_LOW(arg1), 32 - c);
c896fe29 752 /* Note: ret can be the same as arg1, so we use t1 */
a7812ae4 753 tcg_gen_shli_i32(t1, TCGV_LOW(arg1), c);
ac56dd48
PB
754 tcg_gen_shli_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), c);
755 tcg_gen_or_i32(TCGV_HIGH(ret), TCGV_HIGH(ret), t0);
a7812ae4 756 tcg_gen_mov_i32(TCGV_LOW(ret), t1);
c896fe29 757 }
a7812ae4
PB
758 tcg_temp_free_i32(t0);
759 tcg_temp_free_i32(t1);
c896fe29
FB
760 }
761}
ac56dd48 762#endif
c896fe29 763
be210acb 764
8fcd3692 765static void tcg_reg_alloc_start(TCGContext *s)
c896fe29
FB
766{
767 int i;
768 TCGTemp *ts;
769 for(i = 0; i < s->nb_globals; i++) {
770 ts = &s->temps[i];
771 if (ts->fixed_reg) {
772 ts->val_type = TEMP_VAL_REG;
773 } else {
774 ts->val_type = TEMP_VAL_MEM;
775 }
776 }
e8996ee0
FB
777 for(i = s->nb_globals; i < s->nb_temps; i++) {
778 ts = &s->temps[i];
779 ts->val_type = TEMP_VAL_DEAD;
780 ts->mem_allocated = 0;
781 ts->fixed_reg = 0;
782 }
c896fe29
FB
783 for(i = 0; i < TCG_TARGET_NB_REGS; i++) {
784 s->reg_to_temp[i] = -1;
785 }
786}
787
ac56dd48
PB
788static char *tcg_get_arg_str_idx(TCGContext *s, char *buf, int buf_size,
789 int idx)
c896fe29
FB
790{
791 TCGTemp *ts;
ac56dd48 792
7f6f0ae5 793 assert(idx >= 0 && idx < s->nb_temps);
ac56dd48 794 ts = &s->temps[idx];
7f6f0ae5 795 assert(ts);
ac56dd48
PB
796 if (idx < s->nb_globals) {
797 pstrcpy(buf, buf_size, ts->name);
c896fe29 798 } else {
641d5fbe
FB
799 if (ts->temp_local)
800 snprintf(buf, buf_size, "loc%d", idx - s->nb_globals);
801 else
802 snprintf(buf, buf_size, "tmp%d", idx - s->nb_globals);
c896fe29
FB
803 }
804 return buf;
805}
806
a7812ae4
PB
807char *tcg_get_arg_str_i32(TCGContext *s, char *buf, int buf_size, TCGv_i32 arg)
808{
809 return tcg_get_arg_str_idx(s, buf, buf_size, GET_TCGV_I32(arg));
810}
811
812char *tcg_get_arg_str_i64(TCGContext *s, char *buf, int buf_size, TCGv_i64 arg)
ac56dd48 813{
a810a2de 814 return tcg_get_arg_str_idx(s, buf, buf_size, GET_TCGV_I64(arg));
ac56dd48
PB
815}
816
e8996ee0 817static int helper_cmp(const void *p1, const void *p2)
4dc81f28 818{
e8996ee0
FB
819 const TCGHelperInfo *th1 = p1;
820 const TCGHelperInfo *th2 = p2;
821 if (th1->func < th2->func)
822 return -1;
823 else if (th1->func == th2->func)
824 return 0;
825 else
826 return 1;
4dc81f28
FB
827}
828
e8996ee0
FB
829/* find helper definition (Note: A hash table would be better) */
830static TCGHelperInfo *tcg_find_helper(TCGContext *s, tcg_target_ulong val)
4dc81f28 831{
e8996ee0 832 int m, m_min, m_max;
4dc81f28 833 TCGHelperInfo *th;
e8996ee0 834 tcg_target_ulong v;
4dc81f28 835
e8996ee0
FB
836 if (unlikely(!s->helpers_sorted)) {
837 qsort(s->helpers, s->nb_helpers, sizeof(TCGHelperInfo),
838 helper_cmp);
839 s->helpers_sorted = 1;
840 }
841
842 /* binary search */
843 m_min = 0;
844 m_max = s->nb_helpers - 1;
845 while (m_min <= m_max) {
846 m = (m_min + m_max) >> 1;
847 th = &s->helpers[m];
848 v = th->func;
849 if (v == val)
850 return th;
851 else if (val < v) {
852 m_max = m - 1;
853 } else {
854 m_min = m + 1;
4dc81f28
FB
855 }
856 }
e8996ee0 857 return NULL;
4dc81f28
FB
858}
859
f48f3ede
BS
860static const char * const cond_name[] =
861{
0aed257f
RH
862 [TCG_COND_NEVER] = "never",
863 [TCG_COND_ALWAYS] = "always",
f48f3ede
BS
864 [TCG_COND_EQ] = "eq",
865 [TCG_COND_NE] = "ne",
866 [TCG_COND_LT] = "lt",
867 [TCG_COND_GE] = "ge",
868 [TCG_COND_LE] = "le",
869 [TCG_COND_GT] = "gt",
870 [TCG_COND_LTU] = "ltu",
871 [TCG_COND_GEU] = "geu",
872 [TCG_COND_LEU] = "leu",
873 [TCG_COND_GTU] = "gtu"
874};
875
eeacee4d 876void tcg_dump_ops(TCGContext *s)
c896fe29
FB
877{
878 const uint16_t *opc_ptr;
879 const TCGArg *args;
880 TCGArg arg;
a9751609
RH
881 TCGOpcode c;
882 int i, k, nb_oargs, nb_iargs, nb_cargs, first_insn;
c896fe29
FB
883 const TCGOpDef *def;
884 char buf[128];
885
7e4597d7 886 first_insn = 1;
c896fe29
FB
887 opc_ptr = gen_opc_buf;
888 args = gen_opparam_buf;
889 while (opc_ptr < gen_opc_ptr) {
890 c = *opc_ptr++;
891 def = &tcg_op_defs[c];
7e4597d7
FB
892 if (c == INDEX_op_debug_insn_start) {
893 uint64_t pc;
894#if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
895 pc = ((uint64_t)args[1] << 32) | args[0];
896#else
897 pc = args[0];
898#endif
eeacee4d
BS
899 if (!first_insn) {
900 qemu_log("\n");
901 }
902 qemu_log(" ---- 0x%" PRIx64, pc);
7e4597d7
FB
903 first_insn = 0;
904 nb_oargs = def->nb_oargs;
905 nb_iargs = def->nb_iargs;
906 nb_cargs = def->nb_cargs;
907 } else if (c == INDEX_op_call) {
c896fe29 908 TCGArg arg;
4dc81f28 909
c896fe29
FB
910 /* variable number of arguments */
911 arg = *args++;
912 nb_oargs = arg >> 16;
913 nb_iargs = arg & 0xffff;
914 nb_cargs = def->nb_cargs;
c896fe29 915
eeacee4d 916 qemu_log(" %s ", def->name);
7e4597d7 917
b03cce8e 918 /* function name */
eeacee4d
BS
919 qemu_log("%s",
920 tcg_get_arg_str_idx(s, buf, sizeof(buf),
921 args[nb_oargs + nb_iargs - 1]));
b03cce8e 922 /* flags */
eeacee4d 923 qemu_log(",$0x%" TCG_PRIlx, args[nb_oargs + nb_iargs]);
b03cce8e 924 /* nb out args */
eeacee4d 925 qemu_log(",$%d", nb_oargs);
b03cce8e 926 for(i = 0; i < nb_oargs; i++) {
eeacee4d
BS
927 qemu_log(",");
928 qemu_log("%s", tcg_get_arg_str_idx(s, buf, sizeof(buf),
929 args[i]));
b03cce8e
FB
930 }
931 for(i = 0; i < (nb_iargs - 1); i++) {
eeacee4d 932 qemu_log(",");
39cf05d3 933 if (args[nb_oargs + i] == TCG_CALL_DUMMY_ARG) {
eeacee4d 934 qemu_log("<dummy>");
39cf05d3 935 } else {
eeacee4d
BS
936 qemu_log("%s", tcg_get_arg_str_idx(s, buf, sizeof(buf),
937 args[nb_oargs + i]));
39cf05d3 938 }
b03cce8e 939 }
fba3161f 940 } else if (c == INDEX_op_movi_i32 || c == INDEX_op_movi_i64) {
e8996ee0
FB
941 tcg_target_ulong val;
942 TCGHelperInfo *th;
943
944 nb_oargs = def->nb_oargs;
945 nb_iargs = def->nb_iargs;
946 nb_cargs = def->nb_cargs;
eeacee4d
BS
947 qemu_log(" %s %s,$", def->name,
948 tcg_get_arg_str_idx(s, buf, sizeof(buf), args[0]));
e8996ee0
FB
949 val = args[1];
950 th = tcg_find_helper(s, val);
951 if (th) {
eeacee4d 952 qemu_log("%s", th->name);
e8996ee0 953 } else {
eeacee4d
BS
954 if (c == INDEX_op_movi_i32) {
955 qemu_log("0x%x", (uint32_t)val);
956 } else {
957 qemu_log("0x%" PRIx64 , (uint64_t)val);
958 }
e8996ee0 959 }
b03cce8e 960 } else {
eeacee4d 961 qemu_log(" %s ", def->name);
b03cce8e
FB
962 if (c == INDEX_op_nopn) {
963 /* variable number of arguments */
964 nb_cargs = *args;
965 nb_oargs = 0;
966 nb_iargs = 0;
967 } else {
968 nb_oargs = def->nb_oargs;
969 nb_iargs = def->nb_iargs;
970 nb_cargs = def->nb_cargs;
971 }
972
973 k = 0;
974 for(i = 0; i < nb_oargs; i++) {
eeacee4d
BS
975 if (k != 0) {
976 qemu_log(",");
977 }
978 qemu_log("%s", tcg_get_arg_str_idx(s, buf, sizeof(buf),
979 args[k++]));
b03cce8e
FB
980 }
981 for(i = 0; i < nb_iargs; i++) {
eeacee4d
BS
982 if (k != 0) {
983 qemu_log(",");
984 }
985 qemu_log("%s", tcg_get_arg_str_idx(s, buf, sizeof(buf),
986 args[k++]));
b03cce8e 987 }
be210acb
RH
988 switch (c) {
989 case INDEX_op_brcond_i32:
be210acb 990 case INDEX_op_setcond_i32:
ffc5ea09 991 case INDEX_op_movcond_i32:
ffc5ea09 992 case INDEX_op_brcond2_i32:
be210acb 993 case INDEX_op_setcond2_i32:
ffc5ea09 994 case INDEX_op_brcond_i64:
be210acb 995 case INDEX_op_setcond_i64:
ffc5ea09 996 case INDEX_op_movcond_i64:
eeacee4d
BS
997 if (args[k] < ARRAY_SIZE(cond_name) && cond_name[args[k]]) {
998 qemu_log(",%s", cond_name[args[k++]]);
999 } else {
1000 qemu_log(",$0x%" TCG_PRIlx, args[k++]);
1001 }
f48f3ede 1002 i = 1;
be210acb
RH
1003 break;
1004 default:
f48f3ede 1005 i = 0;
be210acb
RH
1006 break;
1007 }
f48f3ede 1008 for(; i < nb_cargs; i++) {
eeacee4d
BS
1009 if (k != 0) {
1010 qemu_log(",");
1011 }
b03cce8e 1012 arg = args[k++];
eeacee4d 1013 qemu_log("$0x%" TCG_PRIlx, arg);
b03cce8e 1014 }
c896fe29 1015 }
eeacee4d 1016 qemu_log("\n");
c896fe29
FB
1017 args += nb_iargs + nb_oargs + nb_cargs;
1018 }
1019}
1020
1021/* we give more priority to constraints with less registers */
1022static int get_constraint_priority(const TCGOpDef *def, int k)
1023{
1024 const TCGArgConstraint *arg_ct;
1025
1026 int i, n;
1027 arg_ct = &def->args_ct[k];
1028 if (arg_ct->ct & TCG_CT_ALIAS) {
1029 /* an alias is equivalent to a single register */
1030 n = 1;
1031 } else {
1032 if (!(arg_ct->ct & TCG_CT_REG))
1033 return 0;
1034 n = 0;
1035 for(i = 0; i < TCG_TARGET_NB_REGS; i++) {
1036 if (tcg_regset_test_reg(arg_ct->u.regs, i))
1037 n++;
1038 }
1039 }
1040 return TCG_TARGET_NB_REGS - n + 1;
1041}
1042
1043/* sort from highest priority to lowest */
1044static void sort_constraints(TCGOpDef *def, int start, int n)
1045{
1046 int i, j, p1, p2, tmp;
1047
1048 for(i = 0; i < n; i++)
1049 def->sorted_args[start + i] = start + i;
1050 if (n <= 1)
1051 return;
1052 for(i = 0; i < n - 1; i++) {
1053 for(j = i + 1; j < n; j++) {
1054 p1 = get_constraint_priority(def, def->sorted_args[start + i]);
1055 p2 = get_constraint_priority(def, def->sorted_args[start + j]);
1056 if (p1 < p2) {
1057 tmp = def->sorted_args[start + i];
1058 def->sorted_args[start + i] = def->sorted_args[start + j];
1059 def->sorted_args[start + j] = tmp;
1060 }
1061 }
1062 }
1063}
1064
1065void tcg_add_target_add_op_defs(const TCGTargetOpDef *tdefs)
1066{
a9751609 1067 TCGOpcode op;
c896fe29
FB
1068 TCGOpDef *def;
1069 const char *ct_str;
1070 int i, nb_args;
1071
1072 for(;;) {
a9751609 1073 if (tdefs->op == (TCGOpcode)-1)
c896fe29
FB
1074 break;
1075 op = tdefs->op;
c3b08d0e 1076 assert((unsigned)op < NB_OPS);
c896fe29 1077 def = &tcg_op_defs[op];
c68aaa18
SW
1078#if defined(CONFIG_DEBUG_TCG)
1079 /* Duplicate entry in op definitions? */
1080 assert(!def->used);
1081 def->used = 1;
1082#endif
c896fe29
FB
1083 nb_args = def->nb_iargs + def->nb_oargs;
1084 for(i = 0; i < nb_args; i++) {
1085 ct_str = tdefs->args_ct_str[i];
c68aaa18
SW
1086 /* Incomplete TCGTargetOpDef entry? */
1087 assert(ct_str != NULL);
c896fe29
FB
1088 tcg_regset_clear(def->args_ct[i].u.regs);
1089 def->args_ct[i].ct = 0;
1090 if (ct_str[0] >= '0' && ct_str[0] <= '9') {
1091 int oarg;
1092 oarg = ct_str[0] - '0';
1093 assert(oarg < def->nb_oargs);
1094 assert(def->args_ct[oarg].ct & TCG_CT_REG);
1095 /* TCG_CT_ALIAS is for the output arguments. The input
5ff9d6a4 1096 argument is tagged with TCG_CT_IALIAS. */
c896fe29 1097 def->args_ct[i] = def->args_ct[oarg];
5ff9d6a4
FB
1098 def->args_ct[oarg].ct = TCG_CT_ALIAS;
1099 def->args_ct[oarg].alias_index = i;
c896fe29 1100 def->args_ct[i].ct |= TCG_CT_IALIAS;
5ff9d6a4 1101 def->args_ct[i].alias_index = oarg;
c896fe29
FB
1102 } else {
1103 for(;;) {
1104 if (*ct_str == '\0')
1105 break;
1106 switch(*ct_str) {
1107 case 'i':
1108 def->args_ct[i].ct |= TCG_CT_CONST;
1109 ct_str++;
1110 break;
1111 default:
1112 if (target_parse_constraint(&def->args_ct[i], &ct_str) < 0) {
1113 fprintf(stderr, "Invalid constraint '%s' for arg %d of operation '%s'\n",
1114 ct_str, i, def->name);
1115 exit(1);
1116 }
1117 }
1118 }
1119 }
1120 }
1121
c68aaa18
SW
1122 /* TCGTargetOpDef entry with too much information? */
1123 assert(i == TCG_MAX_OP_ARGS || tdefs->args_ct_str[i] == NULL);
1124
c896fe29
FB
1125 /* sort the constraints (XXX: this is just an heuristic) */
1126 sort_constraints(def, 0, def->nb_oargs);
1127 sort_constraints(def, def->nb_oargs, def->nb_iargs);
1128
1129#if 0
1130 {
1131 int i;
1132
1133 printf("%s: sorted=", def->name);
1134 for(i = 0; i < def->nb_oargs + def->nb_iargs; i++)
1135 printf(" %d", def->sorted_args[i]);
1136 printf("\n");
1137 }
1138#endif
1139 tdefs++;
1140 }
1141
c68aaa18 1142#if defined(CONFIG_DEBUG_TCG)
a9751609 1143 i = 0;
c68aaa18 1144 for (op = 0; op < ARRAY_SIZE(tcg_op_defs); op++) {
f412c762
RH
1145 const TCGOpDef *def = &tcg_op_defs[op];
1146 if (op < INDEX_op_call
1147 || op == INDEX_op_debug_insn_start
1148 || (def->flags & TCG_OPF_NOT_PRESENT)) {
c68aaa18 1149 /* Wrong entry in op definitions? */
f412c762
RH
1150 if (def->used) {
1151 fprintf(stderr, "Invalid op definition for %s\n", def->name);
a9751609
RH
1152 i = 1;
1153 }
c68aaa18
SW
1154 } else {
1155 /* Missing entry in op definitions? */
f412c762
RH
1156 if (!def->used) {
1157 fprintf(stderr, "Missing op definition for %s\n", def->name);
a9751609
RH
1158 i = 1;
1159 }
c68aaa18
SW
1160 }
1161 }
a9751609
RH
1162 if (i == 1) {
1163 tcg_abort();
1164 }
c68aaa18 1165#endif
c896fe29
FB
1166}
1167
1168#ifdef USE_LIVENESS_ANALYSIS
1169
1170/* set a nop for an operation using 'nb_args' */
1171static inline void tcg_set_nop(TCGContext *s, uint16_t *opc_ptr,
1172 TCGArg *args, int nb_args)
1173{
1174 if (nb_args == 0) {
1175 *opc_ptr = INDEX_op_nop;
1176 } else {
1177 *opc_ptr = INDEX_op_nopn;
1178 args[0] = nb_args;
1179 args[nb_args - 1] = nb_args;
1180 }
1181}
1182
9c43b68d
AJ
1183/* liveness analysis: end of function: all temps are dead, and globals
1184 should be in memory. */
1185static inline void tcg_la_func_end(TCGContext *s, uint8_t *dead_temps,
1186 uint8_t *mem_temps)
c896fe29 1187{
9c43b68d
AJ
1188 memset(dead_temps, 1, s->nb_temps);
1189 memset(mem_temps, 1, s->nb_globals);
1190 memset(mem_temps + s->nb_globals, 0, s->nb_temps - s->nb_globals);
c896fe29
FB
1191}
1192
9c43b68d
AJ
1193/* liveness analysis: end of basic block: all temps are dead, globals
1194 and local temps should be in memory. */
1195static inline void tcg_la_bb_end(TCGContext *s, uint8_t *dead_temps,
1196 uint8_t *mem_temps)
641d5fbe
FB
1197{
1198 int i;
641d5fbe 1199
9c43b68d
AJ
1200 memset(dead_temps, 1, s->nb_temps);
1201 memset(mem_temps, 1, s->nb_globals);
641d5fbe 1202 for(i = s->nb_globals; i < s->nb_temps; i++) {
9c43b68d 1203 mem_temps[i] = s->temps[i].temp_local;
641d5fbe
FB
1204 }
1205}
1206
866cb6cb 1207/* Liveness analysis : update the opc_dead_args array to tell if a
c896fe29
FB
1208 given input arguments is dead. Instructions updating dead
1209 temporaries are removed. */
8fcd3692 1210static void tcg_liveness_analysis(TCGContext *s)
c896fe29 1211{
a9751609
RH
1212 int i, op_index, nb_args, nb_iargs, nb_oargs, arg, nb_ops;
1213 TCGOpcode op;
c896fe29
FB
1214 TCGArg *args;
1215 const TCGOpDef *def;
9c43b68d 1216 uint8_t *dead_temps, *mem_temps;
ec7a869d
AJ
1217 uint16_t dead_args;
1218 uint8_t sync_args;
c896fe29
FB
1219
1220 gen_opc_ptr++; /* skip end */
1221
1222 nb_ops = gen_opc_ptr - gen_opc_buf;
1223
866cb6cb 1224 s->op_dead_args = tcg_malloc(nb_ops * sizeof(uint16_t));
ec7a869d 1225 s->op_sync_args = tcg_malloc(nb_ops * sizeof(uint8_t));
c896fe29
FB
1226
1227 dead_temps = tcg_malloc(s->nb_temps);
9c43b68d
AJ
1228 mem_temps = tcg_malloc(s->nb_temps);
1229 tcg_la_func_end(s, dead_temps, mem_temps);
c896fe29
FB
1230
1231 args = gen_opparam_ptr;
1232 op_index = nb_ops - 1;
1233 while (op_index >= 0) {
1234 op = gen_opc_buf[op_index];
1235 def = &tcg_op_defs[op];
1236 switch(op) {
1237 case INDEX_op_call:
c6e113f5
FB
1238 {
1239 int call_flags;
c896fe29 1240
c6e113f5
FB
1241 nb_args = args[-1];
1242 args -= nb_args;
1243 nb_iargs = args[0] & 0xffff;
1244 nb_oargs = args[0] >> 16;
1245 args++;
1246 call_flags = args[nb_oargs + nb_iargs];
1247
1248 /* pure functions can be removed if their result is not
1249 used */
1250 if (call_flags & TCG_CALL_PURE) {
1251 for(i = 0; i < nb_oargs; i++) {
1252 arg = args[i];
9c43b68d 1253 if (!dead_temps[arg] || mem_temps[arg]) {
c6e113f5 1254 goto do_not_remove_call;
9c43b68d 1255 }
c6e113f5
FB
1256 }
1257 tcg_set_nop(s, gen_opc_buf + op_index,
1258 args - 1, nb_args);
1259 } else {
1260 do_not_remove_call:
c896fe29 1261
c6e113f5 1262 /* output args are dead */
6b64b624 1263 dead_args = 0;
ec7a869d 1264 sync_args = 0;
c6e113f5
FB
1265 for(i = 0; i < nb_oargs; i++) {
1266 arg = args[i];
6b64b624
AJ
1267 if (dead_temps[arg]) {
1268 dead_args |= (1 << i);
1269 }
9c43b68d
AJ
1270 if (mem_temps[arg]) {
1271 sync_args |= (1 << i);
1272 }
c6e113f5 1273 dead_temps[arg] = 1;
9c43b68d 1274 mem_temps[arg] = 0;
c6e113f5
FB
1275 }
1276
b9c18f56 1277 if (!(call_flags & TCG_CALL_CONST)) {
9c43b68d
AJ
1278 /* globals should go back to memory */
1279 memset(dead_temps, 1, s->nb_globals);
1280 memset(mem_temps, 1, s->nb_globals);
b9c18f56
AJ
1281 }
1282
c6e113f5 1283 /* input args are live */
866cb6cb
AJ
1284 for(i = nb_oargs; i < nb_iargs + nb_oargs; i++) {
1285 arg = args[i];
39cf05d3
FB
1286 if (arg != TCG_CALL_DUMMY_ARG) {
1287 if (dead_temps[arg]) {
866cb6cb 1288 dead_args |= (1 << i);
39cf05d3
FB
1289 }
1290 dead_temps[arg] = 0;
c6e113f5 1291 }
c6e113f5 1292 }
866cb6cb 1293 s->op_dead_args[op_index] = dead_args;
ec7a869d 1294 s->op_sync_args[op_index] = sync_args;
c896fe29 1295 }
c6e113f5 1296 args--;
c896fe29 1297 }
c896fe29 1298 break;
7e4597d7
FB
1299 case INDEX_op_debug_insn_start:
1300 args -= def->nb_args;
1301 break;
c896fe29
FB
1302 case INDEX_op_nopn:
1303 nb_args = args[-1];
1304 args -= nb_args;
1305 break;
5ff9d6a4
FB
1306 case INDEX_op_discard:
1307 args--;
1308 /* mark the temporary as dead */
1309 dead_temps[args[0]] = 1;
9c43b68d 1310 mem_temps[args[0]] = 0;
5ff9d6a4 1311 break;
c896fe29
FB
1312 case INDEX_op_end:
1313 break;
1305c451
RH
1314
1315 case INDEX_op_add2_i32:
1316 case INDEX_op_sub2_i32:
1317 args -= 6;
1318 nb_iargs = 4;
1319 nb_oargs = 2;
1320 /* Test if the high part of the operation is dead, but not
1321 the low part. The result can be optimized to a simple
1322 add or sub. This happens often for x86_64 guest when the
1323 cpu mode is set to 32 bit. */
1324 if (dead_temps[args[1]]) {
1325 if (dead_temps[args[0]]) {
1326 goto do_remove;
1327 }
1328 /* Create the single operation plus nop. */
1329 if (op == INDEX_op_add2_i32) {
1330 op = INDEX_op_add_i32;
1331 } else {
1332 op = INDEX_op_sub_i32;
1333 }
1334 gen_opc_buf[op_index] = op;
1335 args[1] = args[2];
1336 args[2] = args[4];
1337 assert(gen_opc_buf[op_index + 1] == INDEX_op_nop);
1338 tcg_set_nop(s, gen_opc_buf + op_index + 1, args + 3, 3);
1339 /* Fall through and mark the single-word operation live. */
1340 nb_iargs = 2;
1341 nb_oargs = 1;
1342 }
1343 goto do_not_remove;
1344
1414968a
RH
1345 case INDEX_op_mulu2_i32:
1346 args -= 4;
1347 nb_iargs = 2;
1348 nb_oargs = 2;
1349 /* Likewise, test for the high part of the operation dead. */
1350 if (dead_temps[args[1]]) {
1351 if (dead_temps[args[0]]) {
1352 goto do_remove;
1353 }
1354 gen_opc_buf[op_index] = op = INDEX_op_mul_i32;
1355 args[1] = args[2];
1356 args[2] = args[3];
1357 assert(gen_opc_buf[op_index + 1] == INDEX_op_nop);
1358 tcg_set_nop(s, gen_opc_buf + op_index + 1, args + 3, 1);
1359 /* Fall through and mark the single-word operation live. */
1360 nb_oargs = 1;
1361 }
1362 goto do_not_remove;
1363
c896fe29 1364 default:
1305c451 1365 /* XXX: optimize by hardcoding common cases (e.g. triadic ops) */
49516bc0
AJ
1366 args -= def->nb_args;
1367 nb_iargs = def->nb_iargs;
1368 nb_oargs = def->nb_oargs;
c896fe29 1369
49516bc0
AJ
1370 /* Test if the operation can be removed because all
1371 its outputs are dead. We assume that nb_oargs == 0
1372 implies side effects */
1373 if (!(def->flags & TCG_OPF_SIDE_EFFECTS) && nb_oargs != 0) {
1374 for(i = 0; i < nb_oargs; i++) {
1375 arg = args[i];
9c43b68d 1376 if (!dead_temps[arg] || mem_temps[arg]) {
49516bc0 1377 goto do_not_remove;
9c43b68d 1378 }
49516bc0 1379 }
1305c451 1380 do_remove:
49516bc0 1381 tcg_set_nop(s, gen_opc_buf + op_index, args, def->nb_args);
c896fe29 1382#ifdef CONFIG_PROFILER
49516bc0 1383 s->del_op_count++;
c896fe29 1384#endif
49516bc0
AJ
1385 } else {
1386 do_not_remove:
c896fe29 1387
49516bc0 1388 /* output args are dead */
6b64b624 1389 dead_args = 0;
ec7a869d 1390 sync_args = 0;
49516bc0
AJ
1391 for(i = 0; i < nb_oargs; i++) {
1392 arg = args[i];
6b64b624
AJ
1393 if (dead_temps[arg]) {
1394 dead_args |= (1 << i);
1395 }
9c43b68d
AJ
1396 if (mem_temps[arg]) {
1397 sync_args |= (1 << i);
1398 }
49516bc0 1399 dead_temps[arg] = 1;
9c43b68d 1400 mem_temps[arg] = 0;
49516bc0
AJ
1401 }
1402
1403 /* if end of basic block, update */
1404 if (def->flags & TCG_OPF_BB_END) {
9c43b68d 1405 tcg_la_bb_end(s, dead_temps, mem_temps);
49516bc0 1406 } else if (def->flags & TCG_OPF_CALL_CLOBBER) {
9c43b68d
AJ
1407 /* globals should go back to memory */
1408 memset(dead_temps, 1, s->nb_globals);
1409 memset(mem_temps, 1, s->nb_globals);
49516bc0
AJ
1410 }
1411
1412 /* input args are live */
866cb6cb
AJ
1413 for(i = nb_oargs; i < nb_oargs + nb_iargs; i++) {
1414 arg = args[i];
49516bc0 1415 if (dead_temps[arg]) {
866cb6cb 1416 dead_args |= (1 << i);
c896fe29 1417 }
49516bc0 1418 dead_temps[arg] = 0;
c896fe29 1419 }
866cb6cb 1420 s->op_dead_args[op_index] = dead_args;
ec7a869d 1421 s->op_sync_args[op_index] = sync_args;
c896fe29
FB
1422 }
1423 break;
1424 }
1425 op_index--;
1426 }
1427
1428 if (args != gen_opparam_buf)
1429 tcg_abort();
1430}
1431#else
1432/* dummy liveness analysis */
655feed5 1433static void tcg_liveness_analysis(TCGContext *s)
c896fe29
FB
1434{
1435 int nb_ops;
1436 nb_ops = gen_opc_ptr - gen_opc_buf;
1437
866cb6cb
AJ
1438 s->op_dead_args = tcg_malloc(nb_ops * sizeof(uint16_t));
1439 memset(s->op_dead_args, 0, nb_ops * sizeof(uint16_t));
ec7a869d
AJ
1440 s->op_sync_args = tcg_malloc(nb_ops * sizeof(uint8_t));
1441 memset(s->op_sync_args, 0, nb_ops * sizeof(uint8_t));
c896fe29
FB
1442}
1443#endif
1444
1445#ifndef NDEBUG
1446static void dump_regs(TCGContext *s)
1447{
1448 TCGTemp *ts;
1449 int i;
1450 char buf[64];
1451
1452 for(i = 0; i < s->nb_temps; i++) {
1453 ts = &s->temps[i];
ac56dd48 1454 printf(" %10s: ", tcg_get_arg_str_idx(s, buf, sizeof(buf), i));
c896fe29
FB
1455 switch(ts->val_type) {
1456 case TEMP_VAL_REG:
1457 printf("%s", tcg_target_reg_names[ts->reg]);
1458 break;
1459 case TEMP_VAL_MEM:
1460 printf("%d(%s)", (int)ts->mem_offset, tcg_target_reg_names[ts->mem_reg]);
1461 break;
1462 case TEMP_VAL_CONST:
1463 printf("$0x%" TCG_PRIlx, ts->val);
1464 break;
1465 case TEMP_VAL_DEAD:
1466 printf("D");
1467 break;
1468 default:
1469 printf("???");
1470 break;
1471 }
1472 printf("\n");
1473 }
1474
1475 for(i = 0; i < TCG_TARGET_NB_REGS; i++) {
1476 if (s->reg_to_temp[i] >= 0) {
1477 printf("%s: %s\n",
1478 tcg_target_reg_names[i],
ac56dd48 1479 tcg_get_arg_str_idx(s, buf, sizeof(buf), s->reg_to_temp[i]));
c896fe29
FB
1480 }
1481 }
1482}
1483
1484static void check_regs(TCGContext *s)
1485{
1486 int reg, k;
1487 TCGTemp *ts;
1488 char buf[64];
1489
1490 for(reg = 0; reg < TCG_TARGET_NB_REGS; reg++) {
1491 k = s->reg_to_temp[reg];
1492 if (k >= 0) {
1493 ts = &s->temps[k];
1494 if (ts->val_type != TEMP_VAL_REG ||
1495 ts->reg != reg) {
1496 printf("Inconsistency for register %s:\n",
1497 tcg_target_reg_names[reg]);
b03cce8e 1498 goto fail;
c896fe29
FB
1499 }
1500 }
1501 }
1502 for(k = 0; k < s->nb_temps; k++) {
1503 ts = &s->temps[k];
1504 if (ts->val_type == TEMP_VAL_REG &&
1505 !ts->fixed_reg &&
1506 s->reg_to_temp[ts->reg] != k) {
1507 printf("Inconsistency for temp %s:\n",
ac56dd48 1508 tcg_get_arg_str_idx(s, buf, sizeof(buf), k));
b03cce8e 1509 fail:
c896fe29
FB
1510 printf("reg state:\n");
1511 dump_regs(s);
1512 tcg_abort();
1513 }
1514 }
1515}
1516#endif
1517
1518static void temp_allocate_frame(TCGContext *s, int temp)
1519{
1520 TCGTemp *ts;
1521 ts = &s->temps[temp];
9b9c37c3
RH
1522#if !(defined(__sparc__) && TCG_TARGET_REG_BITS == 64)
1523 /* Sparc64 stack is accessed with offset of 2047 */
b591dc59
BS
1524 s->current_frame_offset = (s->current_frame_offset +
1525 (tcg_target_long)sizeof(tcg_target_long) - 1) &
1526 ~(sizeof(tcg_target_long) - 1);
f44c9960 1527#endif
b591dc59
BS
1528 if (s->current_frame_offset + (tcg_target_long)sizeof(tcg_target_long) >
1529 s->frame_end) {
5ff9d6a4 1530 tcg_abort();
b591dc59 1531 }
c896fe29
FB
1532 ts->mem_offset = s->current_frame_offset;
1533 ts->mem_reg = s->frame_reg;
1534 ts->mem_allocated = 1;
b591dc59 1535 s->current_frame_offset += (tcg_target_long)sizeof(tcg_target_long);
c896fe29
FB
1536}
1537
7f6ceedf
AJ
1538/* sync register 'reg' by saving it to the corresponding temporary */
1539static inline void tcg_reg_sync(TCGContext *s, int reg)
1540{
1541 TCGTemp *ts;
1542 int temp;
1543
1544 temp = s->reg_to_temp[reg];
1545 ts = &s->temps[temp];
1546 assert(ts->val_type == TEMP_VAL_REG);
1547 if (!ts->mem_coherent && !ts->fixed_reg) {
1548 if (!ts->mem_allocated) {
1549 temp_allocate_frame(s, temp);
1550 }
1551 tcg_out_st(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
1552 }
1553 ts->mem_coherent = 1;
1554}
1555
c896fe29
FB
1556/* free register 'reg' by spilling the corresponding temporary if necessary */
1557static void tcg_reg_free(TCGContext *s, int reg)
1558{
c896fe29
FB
1559 int temp;
1560
1561 temp = s->reg_to_temp[reg];
1562 if (temp != -1) {
7f6ceedf
AJ
1563 tcg_reg_sync(s, reg);
1564 s->temps[temp].val_type = TEMP_VAL_MEM;
c896fe29
FB
1565 s->reg_to_temp[reg] = -1;
1566 }
1567}
1568
1569/* Allocate a register belonging to reg1 & ~reg2 */
1570static int tcg_reg_alloc(TCGContext *s, TCGRegSet reg1, TCGRegSet reg2)
1571{
1572 int i, reg;
1573 TCGRegSet reg_ct;
1574
1575 tcg_regset_andnot(reg_ct, reg1, reg2);
1576
1577 /* first try free registers */
0954d0d9 1578 for(i = 0; i < ARRAY_SIZE(tcg_target_reg_alloc_order); i++) {
c896fe29
FB
1579 reg = tcg_target_reg_alloc_order[i];
1580 if (tcg_regset_test_reg(reg_ct, reg) && s->reg_to_temp[reg] == -1)
1581 return reg;
1582 }
1583
1584 /* XXX: do better spill choice */
0954d0d9 1585 for(i = 0; i < ARRAY_SIZE(tcg_target_reg_alloc_order); i++) {
c896fe29
FB
1586 reg = tcg_target_reg_alloc_order[i];
1587 if (tcg_regset_test_reg(reg_ct, reg)) {
1588 tcg_reg_free(s, reg);
1589 return reg;
1590 }
1591 }
1592
1593 tcg_abort();
1594}
1595
639368dd
AJ
1596/* mark a temporary as dead. */
1597static inline void temp_dead(TCGContext *s, int temp)
1598{
1599 TCGTemp *ts;
1600
1601 ts = &s->temps[temp];
1602 if (!ts->fixed_reg) {
1603 if (ts->val_type == TEMP_VAL_REG) {
1604 s->reg_to_temp[ts->reg] = -1;
1605 }
1606 if (temp < s->nb_globals || (ts->temp_local && ts->mem_allocated)) {
1607 ts->val_type = TEMP_VAL_MEM;
1608 } else {
1609 ts->val_type = TEMP_VAL_DEAD;
1610 }
1611 }
1612}
1613
1ad80729 1614/* sync a temporary to memory. 'allocated_regs' is used in case a
641d5fbe 1615 temporary registers needs to be allocated to store a constant. */
1ad80729 1616static inline void temp_sync(TCGContext *s, int temp, TCGRegSet allocated_regs)
641d5fbe
FB
1617{
1618 TCGTemp *ts;
641d5fbe
FB
1619
1620 ts = &s->temps[temp];
1621 if (!ts->fixed_reg) {
1622 switch(ts->val_type) {
1ad80729
AJ
1623 case TEMP_VAL_CONST:
1624 ts->reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type],
1625 allocated_regs);
1626 ts->val_type = TEMP_VAL_REG;
1627 s->reg_to_temp[ts->reg] = temp;
1628 ts->mem_coherent = 0;
1629 tcg_out_movi(s, ts->type, ts->reg, ts->val);
1630 /* fallthrough*/
641d5fbe 1631 case TEMP_VAL_REG:
1ad80729 1632 tcg_reg_sync(s, ts->reg);
641d5fbe
FB
1633 break;
1634 case TEMP_VAL_DEAD:
641d5fbe
FB
1635 case TEMP_VAL_MEM:
1636 break;
1637 default:
1638 tcg_abort();
1639 }
1640 }
1641}
1642
1ad80729
AJ
1643/* save a temporary to memory. 'allocated_regs' is used in case a
1644 temporary registers needs to be allocated to store a constant. */
1645static inline void temp_save(TCGContext *s, int temp, TCGRegSet allocated_regs)
1646{
1647 temp_sync(s, temp, allocated_regs);
1648 temp_dead(s, temp);
1649}
1650
9814dd27 1651/* save globals to their canonical location and assume they can be
e8996ee0
FB
1652 modified be the following code. 'allocated_regs' is used in case a
1653 temporary registers needs to be allocated to store a constant. */
1654static void save_globals(TCGContext *s, TCGRegSet allocated_regs)
c896fe29 1655{
641d5fbe 1656 int i;
c896fe29
FB
1657
1658 for(i = 0; i < s->nb_globals; i++) {
641d5fbe 1659 temp_save(s, i, allocated_regs);
c896fe29 1660 }
e5097dc8
FB
1661}
1662
1663/* at the end of a basic block, we assume all temporaries are dead and
e8996ee0
FB
1664 all globals are stored at their canonical location. */
1665static void tcg_reg_alloc_bb_end(TCGContext *s, TCGRegSet allocated_regs)
e5097dc8
FB
1666{
1667 TCGTemp *ts;
1668 int i;
1669
c896fe29
FB
1670 for(i = s->nb_globals; i < s->nb_temps; i++) {
1671 ts = &s->temps[i];
641d5fbe
FB
1672 if (ts->temp_local) {
1673 temp_save(s, i, allocated_regs);
1674 } else {
639368dd 1675 temp_dead(s, i);
c896fe29
FB
1676 }
1677 }
e8996ee0
FB
1678
1679 save_globals(s, allocated_regs);
c896fe29
FB
1680}
1681
866cb6cb 1682#define IS_DEAD_ARG(n) ((dead_args >> (n)) & 1)
ec7a869d 1683#define NEED_SYNC_ARG(n) ((sync_args >> (n)) & 1)
c896fe29 1684
ec7a869d
AJ
1685static void tcg_reg_alloc_movi(TCGContext *s, const TCGArg *args,
1686 uint16_t dead_args, uint8_t sync_args)
e8996ee0
FB
1687{
1688 TCGTemp *ots;
1689 tcg_target_ulong val;
1690
1691 ots = &s->temps[args[0]];
1692 val = args[1];
1693
1694 if (ots->fixed_reg) {
1695 /* for fixed registers, we do not do any constant
1696 propagation */
1697 tcg_out_movi(s, ots->type, ots->reg, val);
1698 } else {
1235fc06 1699 /* The movi is not explicitly generated here */
e8996ee0
FB
1700 if (ots->val_type == TEMP_VAL_REG)
1701 s->reg_to_temp[ots->reg] = -1;
1702 ots->val_type = TEMP_VAL_CONST;
1703 ots->val = val;
1704 }
ec7a869d
AJ
1705 if (NEED_SYNC_ARG(0)) {
1706 temp_sync(s, args[0], s->reserved_regs);
1707 }
4c4e1ab2
AJ
1708 if (IS_DEAD_ARG(0)) {
1709 temp_dead(s, args[0]);
1710 }
e8996ee0
FB
1711}
1712
c896fe29 1713static void tcg_reg_alloc_mov(TCGContext *s, const TCGOpDef *def,
ec7a869d
AJ
1714 const TCGArg *args, uint16_t dead_args,
1715 uint8_t sync_args)
c896fe29
FB
1716{
1717 TCGTemp *ts, *ots;
1718 int reg;
1719 const TCGArgConstraint *arg_ct;
1720
1721 ots = &s->temps[args[0]];
1722 ts = &s->temps[args[1]];
1723 arg_ct = &def->args_ct[0];
1724
866cb6cb 1725 /* XXX: always mark arg dead if IS_DEAD_ARG(1) */
c896fe29 1726 if (ts->val_type == TEMP_VAL_REG) {
866cb6cb 1727 if (IS_DEAD_ARG(1) && !ts->fixed_reg && !ots->fixed_reg) {
c896fe29
FB
1728 /* the mov can be suppressed */
1729 if (ots->val_type == TEMP_VAL_REG)
1730 s->reg_to_temp[ots->reg] = -1;
1731 reg = ts->reg;
639368dd 1732 temp_dead(s, args[1]);
c896fe29
FB
1733 } else {
1734 if (ots->val_type == TEMP_VAL_REG) {
1735 reg = ots->reg;
1736 } else {
1737 reg = tcg_reg_alloc(s, arg_ct->u.regs, s->reserved_regs);
1738 }
1739 if (ts->reg != reg) {
3b6dac34 1740 tcg_out_mov(s, ots->type, reg, ts->reg);
c896fe29
FB
1741 }
1742 }
1743 } else if (ts->val_type == TEMP_VAL_MEM) {
1744 if (ots->val_type == TEMP_VAL_REG) {
1745 reg = ots->reg;
1746 } else {
1747 reg = tcg_reg_alloc(s, arg_ct->u.regs, s->reserved_regs);
1748 }
e4d5434c 1749 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
c896fe29 1750 } else if (ts->val_type == TEMP_VAL_CONST) {
e8996ee0 1751 if (ots->fixed_reg) {
c896fe29 1752 reg = ots->reg;
e8996ee0 1753 tcg_out_movi(s, ots->type, reg, ts->val);
c896fe29 1754 } else {
e8996ee0
FB
1755 /* propagate constant */
1756 if (ots->val_type == TEMP_VAL_REG)
1757 s->reg_to_temp[ots->reg] = -1;
1758 ots->val_type = TEMP_VAL_CONST;
1759 ots->val = ts->val;
ec7a869d
AJ
1760 if (NEED_SYNC_ARG(0)) {
1761 temp_sync(s, args[0], s->reserved_regs);
1762 }
e8996ee0 1763 return;
c896fe29 1764 }
c896fe29
FB
1765 } else {
1766 tcg_abort();
1767 }
1768 s->reg_to_temp[reg] = args[0];
1769 ots->reg = reg;
1770 ots->val_type = TEMP_VAL_REG;
1771 ots->mem_coherent = 0;
ec7a869d
AJ
1772
1773 if (NEED_SYNC_ARG(0)) {
1774 tcg_reg_sync(s, reg);
1775 }
c896fe29
FB
1776}
1777
1778static void tcg_reg_alloc_op(TCGContext *s,
a9751609 1779 const TCGOpDef *def, TCGOpcode opc,
ec7a869d
AJ
1780 const TCGArg *args, uint16_t dead_args,
1781 uint8_t sync_args)
c896fe29
FB
1782{
1783 TCGRegSet allocated_regs;
1784 int i, k, nb_iargs, nb_oargs, reg;
1785 TCGArg arg;
1786 const TCGArgConstraint *arg_ct;
1787 TCGTemp *ts;
1788 TCGArg new_args[TCG_MAX_OP_ARGS];
1789 int const_args[TCG_MAX_OP_ARGS];
1790
1791 nb_oargs = def->nb_oargs;
1792 nb_iargs = def->nb_iargs;
1793
1794 /* copy constants */
1795 memcpy(new_args + nb_oargs + nb_iargs,
1796 args + nb_oargs + nb_iargs,
1797 sizeof(TCGArg) * def->nb_cargs);
1798
1799 /* satisfy input constraints */
1800 tcg_regset_set(allocated_regs, s->reserved_regs);
1801 for(k = 0; k < nb_iargs; k++) {
1802 i = def->sorted_args[nb_oargs + k];
1803 arg = args[i];
1804 arg_ct = &def->args_ct[i];
1805 ts = &s->temps[arg];
1806 if (ts->val_type == TEMP_VAL_MEM) {
1807 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
e4d5434c 1808 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
c896fe29
FB
1809 ts->val_type = TEMP_VAL_REG;
1810 ts->reg = reg;
1811 ts->mem_coherent = 1;
1812 s->reg_to_temp[reg] = arg;
1813 } else if (ts->val_type == TEMP_VAL_CONST) {
1814 if (tcg_target_const_match(ts->val, arg_ct)) {
1815 /* constant is OK for instruction */
1816 const_args[i] = 1;
1817 new_args[i] = ts->val;
1818 goto iarg_end;
1819 } else {
e8996ee0 1820 /* need to move to a register */
c896fe29
FB
1821 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
1822 tcg_out_movi(s, ts->type, reg, ts->val);
e8996ee0
FB
1823 ts->val_type = TEMP_VAL_REG;
1824 ts->reg = reg;
1825 ts->mem_coherent = 0;
1826 s->reg_to_temp[reg] = arg;
c896fe29
FB
1827 }
1828 }
1829 assert(ts->val_type == TEMP_VAL_REG);
5ff9d6a4
FB
1830 if (arg_ct->ct & TCG_CT_IALIAS) {
1831 if (ts->fixed_reg) {
1832 /* if fixed register, we must allocate a new register
1833 if the alias is not the same register */
1834 if (arg != args[arg_ct->alias_index])
1835 goto allocate_in_reg;
1836 } else {
1837 /* if the input is aliased to an output and if it is
1838 not dead after the instruction, we must allocate
1839 a new register and move it */
866cb6cb 1840 if (!IS_DEAD_ARG(i)) {
5ff9d6a4 1841 goto allocate_in_reg;
866cb6cb 1842 }
5ff9d6a4 1843 }
c896fe29
FB
1844 }
1845 reg = ts->reg;
1846 if (tcg_regset_test_reg(arg_ct->u.regs, reg)) {
1847 /* nothing to do : the constraint is satisfied */
1848 } else {
1849 allocate_in_reg:
1850 /* allocate a new register matching the constraint
1851 and move the temporary register into it */
1852 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
3b6dac34 1853 tcg_out_mov(s, ts->type, reg, ts->reg);
c896fe29 1854 }
c896fe29
FB
1855 new_args[i] = reg;
1856 const_args[i] = 0;
1857 tcg_regset_set_reg(allocated_regs, reg);
1858 iarg_end: ;
1859 }
1860
e8996ee0
FB
1861 if (def->flags & TCG_OPF_BB_END) {
1862 tcg_reg_alloc_bb_end(s, allocated_regs);
1863 } else {
1864 /* mark dead temporaries and free the associated registers */
866cb6cb 1865 for(i = nb_oargs; i < nb_oargs + nb_iargs; i++) {
866cb6cb 1866 if (IS_DEAD_ARG(i)) {
639368dd 1867 temp_dead(s, args[i]);
c896fe29
FB
1868 }
1869 }
e8996ee0
FB
1870
1871 if (def->flags & TCG_OPF_CALL_CLOBBER) {
1872 /* XXX: permit generic clobber register list ? */
1873 for(reg = 0; reg < TCG_TARGET_NB_REGS; reg++) {
1874 if (tcg_regset_test_reg(tcg_target_call_clobber_regs, reg)) {
1875 tcg_reg_free(s, reg);
1876 }
c896fe29 1877 }
e8996ee0
FB
1878 /* XXX: for load/store we could do that only for the slow path
1879 (i.e. when a memory callback is called) */
1880
1881 /* store globals and free associated registers (we assume the insn
1882 can modify any global. */
1883 save_globals(s, allocated_regs);
c896fe29 1884 }
e8996ee0
FB
1885
1886 /* satisfy the output constraints */
1887 tcg_regset_set(allocated_regs, s->reserved_regs);
1888 for(k = 0; k < nb_oargs; k++) {
1889 i = def->sorted_args[k];
1890 arg = args[i];
1891 arg_ct = &def->args_ct[i];
1892 ts = &s->temps[arg];
1893 if (arg_ct->ct & TCG_CT_ALIAS) {
1894 reg = new_args[arg_ct->alias_index];
1895 } else {
1896 /* if fixed register, we try to use it */
1897 reg = ts->reg;
1898 if (ts->fixed_reg &&
1899 tcg_regset_test_reg(arg_ct->u.regs, reg)) {
1900 goto oarg_end;
1901 }
1902 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
c896fe29 1903 }
e8996ee0
FB
1904 tcg_regset_set_reg(allocated_regs, reg);
1905 /* if a fixed register is used, then a move will be done afterwards */
1906 if (!ts->fixed_reg) {
ec7a869d
AJ
1907 if (ts->val_type == TEMP_VAL_REG) {
1908 s->reg_to_temp[ts->reg] = -1;
1909 }
1910 ts->val_type = TEMP_VAL_REG;
1911 ts->reg = reg;
1912 /* temp value is modified, so the value kept in memory is
1913 potentially not the same */
1914 ts->mem_coherent = 0;
1915 s->reg_to_temp[reg] = arg;
e8996ee0
FB
1916 }
1917 oarg_end:
1918 new_args[i] = reg;
c896fe29 1919 }
c896fe29
FB
1920 }
1921
c896fe29
FB
1922 /* emit instruction */
1923 tcg_out_op(s, opc, new_args, const_args);
1924
1925 /* move the outputs in the correct register if needed */
1926 for(i = 0; i < nb_oargs; i++) {
1927 ts = &s->temps[args[i]];
1928 reg = new_args[i];
1929 if (ts->fixed_reg && ts->reg != reg) {
3b6dac34 1930 tcg_out_mov(s, ts->type, ts->reg, reg);
c896fe29 1931 }
ec7a869d
AJ
1932 if (NEED_SYNC_ARG(i)) {
1933 tcg_reg_sync(s, reg);
1934 }
1935 if (IS_DEAD_ARG(i)) {
1936 temp_dead(s, args[i]);
1937 }
c896fe29
FB
1938 }
1939}
1940
b03cce8e
FB
1941#ifdef TCG_TARGET_STACK_GROWSUP
1942#define STACK_DIR(x) (-(x))
1943#else
1944#define STACK_DIR(x) (x)
1945#endif
1946
c896fe29 1947static int tcg_reg_alloc_call(TCGContext *s, const TCGOpDef *def,
a9751609 1948 TCGOpcode opc, const TCGArg *args,
ec7a869d 1949 uint16_t dead_args, uint8_t sync_args)
c896fe29
FB
1950{
1951 int nb_iargs, nb_oargs, flags, nb_regs, i, reg, nb_params;
1952 TCGArg arg, func_arg;
1953 TCGTemp *ts;
f54b3f92 1954 tcg_target_long stack_offset, call_stack_size, func_addr;
b03cce8e 1955 int const_func_arg, allocate_args;
c896fe29
FB
1956 TCGRegSet allocated_regs;
1957 const TCGArgConstraint *arg_ct;
1958
1959 arg = *args++;
1960
1961 nb_oargs = arg >> 16;
1962 nb_iargs = arg & 0xffff;
1963 nb_params = nb_iargs - 1;
1964
1965 flags = args[nb_oargs + nb_iargs];
1966
6e17d0c5 1967 nb_regs = ARRAY_SIZE(tcg_target_call_iarg_regs);
c896fe29
FB
1968 if (nb_regs > nb_params)
1969 nb_regs = nb_params;
1970
1971 /* assign stack slots first */
c896fe29
FB
1972 call_stack_size = (nb_params - nb_regs) * sizeof(tcg_target_long);
1973 call_stack_size = (call_stack_size + TCG_TARGET_STACK_ALIGN - 1) &
1974 ~(TCG_TARGET_STACK_ALIGN - 1);
b03cce8e
FB
1975 allocate_args = (call_stack_size > TCG_STATIC_CALL_ARGS_SIZE);
1976 if (allocate_args) {
345649c0
BS
1977 /* XXX: if more than TCG_STATIC_CALL_ARGS_SIZE is needed,
1978 preallocate call stack */
1979 tcg_abort();
b03cce8e 1980 }
39cf05d3
FB
1981
1982 stack_offset = TCG_TARGET_CALL_STACK_OFFSET;
c896fe29
FB
1983 for(i = nb_regs; i < nb_params; i++) {
1984 arg = args[nb_oargs + i];
39cf05d3
FB
1985#ifdef TCG_TARGET_STACK_GROWSUP
1986 stack_offset -= sizeof(tcg_target_long);
1987#endif
1988 if (arg != TCG_CALL_DUMMY_ARG) {
1989 ts = &s->temps[arg];
1990 if (ts->val_type == TEMP_VAL_REG) {
1991 tcg_out_st(s, ts->type, ts->reg, TCG_REG_CALL_STACK, stack_offset);
1992 } else if (ts->val_type == TEMP_VAL_MEM) {
1993 reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type],
1994 s->reserved_regs);
1995 /* XXX: not correct if reading values from the stack */
1996 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
1997 tcg_out_st(s, ts->type, reg, TCG_REG_CALL_STACK, stack_offset);
1998 } else if (ts->val_type == TEMP_VAL_CONST) {
1999 reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type],
2000 s->reserved_regs);
2001 /* XXX: sign extend may be needed on some targets */
2002 tcg_out_movi(s, ts->type, reg, ts->val);
2003 tcg_out_st(s, ts->type, reg, TCG_REG_CALL_STACK, stack_offset);
2004 } else {
2005 tcg_abort();
2006 }
c896fe29 2007 }
39cf05d3
FB
2008#ifndef TCG_TARGET_STACK_GROWSUP
2009 stack_offset += sizeof(tcg_target_long);
2010#endif
c896fe29
FB
2011 }
2012
2013 /* assign input registers */
2014 tcg_regset_set(allocated_regs, s->reserved_regs);
2015 for(i = 0; i < nb_regs; i++) {
2016 arg = args[nb_oargs + i];
39cf05d3
FB
2017 if (arg != TCG_CALL_DUMMY_ARG) {
2018 ts = &s->temps[arg];
2019 reg = tcg_target_call_iarg_regs[i];
2020 tcg_reg_free(s, reg);
2021 if (ts->val_type == TEMP_VAL_REG) {
2022 if (ts->reg != reg) {
3b6dac34 2023 tcg_out_mov(s, ts->type, reg, ts->reg);
39cf05d3
FB
2024 }
2025 } else if (ts->val_type == TEMP_VAL_MEM) {
2026 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
2027 } else if (ts->val_type == TEMP_VAL_CONST) {
2028 /* XXX: sign extend ? */
2029 tcg_out_movi(s, ts->type, reg, ts->val);
2030 } else {
2031 tcg_abort();
c896fe29 2032 }
39cf05d3 2033 tcg_regset_set_reg(allocated_regs, reg);
c896fe29 2034 }
c896fe29
FB
2035 }
2036
2037 /* assign function address */
2038 func_arg = args[nb_oargs + nb_iargs - 1];
2039 arg_ct = &def->args_ct[0];
2040 ts = &s->temps[func_arg];
f54b3f92 2041 func_addr = ts->val;
c896fe29
FB
2042 const_func_arg = 0;
2043 if (ts->val_type == TEMP_VAL_MEM) {
2044 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
e4d5434c 2045 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
c896fe29 2046 func_arg = reg;
e8996ee0 2047 tcg_regset_set_reg(allocated_regs, reg);
c896fe29
FB
2048 } else if (ts->val_type == TEMP_VAL_REG) {
2049 reg = ts->reg;
2050 if (!tcg_regset_test_reg(arg_ct->u.regs, reg)) {
2051 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
3b6dac34 2052 tcg_out_mov(s, ts->type, reg, ts->reg);
c896fe29
FB
2053 }
2054 func_arg = reg;
e8996ee0 2055 tcg_regset_set_reg(allocated_regs, reg);
c896fe29 2056 } else if (ts->val_type == TEMP_VAL_CONST) {
f54b3f92 2057 if (tcg_target_const_match(func_addr, arg_ct)) {
c896fe29 2058 const_func_arg = 1;
f54b3f92 2059 func_arg = func_addr;
c896fe29
FB
2060 } else {
2061 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
f54b3f92 2062 tcg_out_movi(s, ts->type, reg, func_addr);
c896fe29 2063 func_arg = reg;
e8996ee0 2064 tcg_regset_set_reg(allocated_regs, reg);
c896fe29
FB
2065 }
2066 } else {
2067 tcg_abort();
2068 }
e8996ee0 2069
c896fe29
FB
2070
2071 /* mark dead temporaries and free the associated registers */
866cb6cb 2072 for(i = nb_oargs; i < nb_iargs + nb_oargs; i++) {
866cb6cb 2073 if (IS_DEAD_ARG(i)) {
639368dd 2074 temp_dead(s, args[i]);
c896fe29
FB
2075 }
2076 }
2077
2078 /* clobber call registers */
2079 for(reg = 0; reg < TCG_TARGET_NB_REGS; reg++) {
2080 if (tcg_regset_test_reg(tcg_target_call_clobber_regs, reg)) {
2081 tcg_reg_free(s, reg);
2082 }
2083 }
2084
2085 /* store globals and free associated registers (we assume the call
2086 can modify any global. */
b9c18f56
AJ
2087 if (!(flags & TCG_CALL_CONST)) {
2088 save_globals(s, allocated_regs);
2089 }
c896fe29
FB
2090
2091 tcg_out_op(s, opc, &func_arg, &const_func_arg);
c896fe29
FB
2092
2093 /* assign output registers and emit moves if needed */
2094 for(i = 0; i < nb_oargs; i++) {
2095 arg = args[i];
2096 ts = &s->temps[arg];
2097 reg = tcg_target_call_oarg_regs[i];
e8996ee0 2098 assert(s->reg_to_temp[reg] == -1);
c896fe29
FB
2099 if (ts->fixed_reg) {
2100 if (ts->reg != reg) {
3b6dac34 2101 tcg_out_mov(s, ts->type, ts->reg, reg);
c896fe29
FB
2102 }
2103 } else {
ec7a869d
AJ
2104 if (ts->val_type == TEMP_VAL_REG) {
2105 s->reg_to_temp[ts->reg] = -1;
2106 }
2107 ts->val_type = TEMP_VAL_REG;
2108 ts->reg = reg;
2109 ts->mem_coherent = 0;
2110 s->reg_to_temp[reg] = arg;
2111 if (NEED_SYNC_ARG(i)) {
2112 tcg_reg_sync(s, reg);
2113 }
8c11ad25 2114 if (IS_DEAD_ARG(i)) {
639368dd 2115 temp_dead(s, args[i]);
8c11ad25 2116 }
c896fe29
FB
2117 }
2118 }
2119
2120 return nb_iargs + nb_oargs + def->nb_cargs + 1;
2121}
2122
2123#ifdef CONFIG_PROFILER
2124
54604f74 2125static int64_t tcg_table_op_count[NB_OPS];
c896fe29 2126
871e6c35 2127static void dump_op_count(void)
c896fe29
FB
2128{
2129 int i;
2130 FILE *f;
54604f74 2131 f = fopen("/tmp/op.log", "w");
c896fe29 2132 for(i = INDEX_op_end; i < NB_OPS; i++) {
54604f74 2133 fprintf(f, "%s %" PRId64 "\n", tcg_op_defs[i].name, tcg_table_op_count[i]);
c896fe29
FB
2134 }
2135 fclose(f);
2136}
2137#endif
2138
2139
2140static inline int tcg_gen_code_common(TCGContext *s, uint8_t *gen_code_buf,
2ba1eeb6 2141 long search_pc)
c896fe29 2142{
a9751609
RH
2143 TCGOpcode opc;
2144 int op_index;
c896fe29 2145 const TCGOpDef *def;
c896fe29
FB
2146 const TCGArg *args;
2147
2148#ifdef DEBUG_DISAS
8fec2b8c 2149 if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP))) {
93fcfe39 2150 qemu_log("OP:\n");
eeacee4d 2151 tcg_dump_ops(s);
93fcfe39 2152 qemu_log("\n");
c896fe29
FB
2153 }
2154#endif
2155
c5cc28ff
AJ
2156#ifdef CONFIG_PROFILER
2157 s->opt_time -= profile_getclock();
2158#endif
2159
8f2e8c07
KB
2160#ifdef USE_TCG_OPTIMIZATIONS
2161 gen_opparam_ptr =
2162 tcg_optimize(s, gen_opc_ptr, gen_opparam_buf, tcg_op_defs);
2163#endif
2164
a23a9ec6 2165#ifdef CONFIG_PROFILER
c5cc28ff 2166 s->opt_time += profile_getclock();
a23a9ec6
FB
2167 s->la_time -= profile_getclock();
2168#endif
c5cc28ff 2169
c896fe29 2170 tcg_liveness_analysis(s);
c5cc28ff 2171
a23a9ec6
FB
2172#ifdef CONFIG_PROFILER
2173 s->la_time += profile_getclock();
2174#endif
c896fe29
FB
2175
2176#ifdef DEBUG_DISAS
8fec2b8c 2177 if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP_OPT))) {
c5cc28ff 2178 qemu_log("OP after optimization and liveness analysis:\n");
eeacee4d 2179 tcg_dump_ops(s);
93fcfe39 2180 qemu_log("\n");
c896fe29
FB
2181 }
2182#endif
2183
2184 tcg_reg_alloc_start(s);
2185
2186 s->code_buf = gen_code_buf;
2187 s->code_ptr = gen_code_buf;
2188
c896fe29
FB
2189 args = gen_opparam_buf;
2190 op_index = 0;
b3db8758 2191
c896fe29
FB
2192 for(;;) {
2193 opc = gen_opc_buf[op_index];
2194#ifdef CONFIG_PROFILER
54604f74 2195 tcg_table_op_count[opc]++;
c896fe29
FB
2196#endif
2197 def = &tcg_op_defs[opc];
2198#if 0
2199 printf("%s: %d %d %d\n", def->name,
2200 def->nb_oargs, def->nb_iargs, def->nb_cargs);
2201 // dump_regs(s);
2202#endif
2203 switch(opc) {
2204 case INDEX_op_mov_i32:
c896fe29 2205 case INDEX_op_mov_i64:
ec7a869d
AJ
2206 tcg_reg_alloc_mov(s, def, args, s->op_dead_args[op_index],
2207 s->op_sync_args[op_index]);
c896fe29 2208 break;
e8996ee0 2209 case INDEX_op_movi_i32:
e8996ee0 2210 case INDEX_op_movi_i64:
ec7a869d
AJ
2211 tcg_reg_alloc_movi(s, args, s->op_dead_args[op_index],
2212 s->op_sync_args[op_index]);
e8996ee0 2213 break;
7e4597d7
FB
2214 case INDEX_op_debug_insn_start:
2215 /* debug instruction */
2216 break;
c896fe29
FB
2217 case INDEX_op_nop:
2218 case INDEX_op_nop1:
2219 case INDEX_op_nop2:
2220 case INDEX_op_nop3:
2221 break;
2222 case INDEX_op_nopn:
2223 args += args[0];
2224 goto next;
5ff9d6a4 2225 case INDEX_op_discard:
639368dd 2226 temp_dead(s, args[0]);
5ff9d6a4 2227 break;
c896fe29 2228 case INDEX_op_set_label:
e8996ee0 2229 tcg_reg_alloc_bb_end(s, s->reserved_regs);
9d6fca70 2230 tcg_out_label(s, args[0], s->code_ptr);
c896fe29
FB
2231 break;
2232 case INDEX_op_call:
ec7a869d
AJ
2233 args += tcg_reg_alloc_call(s, def, opc, args,
2234 s->op_dead_args[op_index],
2235 s->op_sync_args[op_index]);
c896fe29
FB
2236 goto next;
2237 case INDEX_op_end:
2238 goto the_end;
c896fe29 2239 default:
25c4d9cc
RH
2240 /* Sanity check that we've not introduced any unhandled opcodes. */
2241 if (def->flags & TCG_OPF_NOT_PRESENT) {
2242 tcg_abort();
2243 }
c896fe29
FB
2244 /* Note: in order to speed up the code, it would be much
2245 faster to have specialized register allocator functions for
2246 some common argument patterns */
ec7a869d
AJ
2247 tcg_reg_alloc_op(s, def, opc, args, s->op_dead_args[op_index],
2248 s->op_sync_args[op_index]);
c896fe29
FB
2249 break;
2250 }
2251 args += def->nb_args;
8df1ca4b 2252 next:
2ba1eeb6 2253 if (search_pc >= 0 && search_pc < s->code_ptr - gen_code_buf) {
b314f270 2254 return op_index;
c896fe29
FB
2255 }
2256 op_index++;
2257#ifndef NDEBUG
2258 check_regs(s);
2259#endif
2260 }
2261 the_end:
2262 return -1;
2263}
2264
54604f74 2265int tcg_gen_code(TCGContext *s, uint8_t *gen_code_buf)
c896fe29
FB
2266{
2267#ifdef CONFIG_PROFILER
2268 {
c896fe29
FB
2269 int n;
2270 n = (gen_opc_ptr - gen_opc_buf);
a23a9ec6
FB
2271 s->op_count += n;
2272 if (n > s->op_count_max)
2273 s->op_count_max = n;
2274
2275 s->temp_count += s->nb_temps;
2276 if (s->nb_temps > s->temp_count_max)
2277 s->temp_count_max = s->nb_temps;
c896fe29
FB
2278 }
2279#endif
2280
2ba1eeb6 2281 tcg_gen_code_common(s, gen_code_buf, -1);
c896fe29
FB
2282
2283 /* flush instruction cache */
2aeabc08
SW
2284 flush_icache_range((tcg_target_ulong)gen_code_buf,
2285 (tcg_target_ulong)s->code_ptr);
2286
c896fe29
FB
2287 return s->code_ptr - gen_code_buf;
2288}
2289
2ba1eeb6 2290/* Return the index of the micro operation such as the pc after is <
623e265c
PB
2291 offset bytes from the start of the TB. The contents of gen_code_buf must
2292 not be changed, though writing the same values is ok.
2293 Return -1 if not found. */
54604f74 2294int tcg_gen_code_search_pc(TCGContext *s, uint8_t *gen_code_buf, long offset)
c896fe29 2295{
623e265c 2296 return tcg_gen_code_common(s, gen_code_buf, offset);
c896fe29 2297}
a23a9ec6
FB
2298
2299#ifdef CONFIG_PROFILER
405cf9ff 2300void tcg_dump_info(FILE *f, fprintf_function cpu_fprintf)
a23a9ec6
FB
2301{
2302 TCGContext *s = &tcg_ctx;
2303 int64_t tot;
2304
2305 tot = s->interm_time + s->code_time;
2306 cpu_fprintf(f, "JIT cycles %" PRId64 " (%0.3f s at 2.4 GHz)\n",
2307 tot, tot / 2.4e9);
2308 cpu_fprintf(f, "translated TBs %" PRId64 " (aborted=%" PRId64 " %0.1f%%)\n",
2309 s->tb_count,
2310 s->tb_count1 - s->tb_count,
2311 s->tb_count1 ? (double)(s->tb_count1 - s->tb_count) / s->tb_count1 * 100.0 : 0);
2312 cpu_fprintf(f, "avg ops/TB %0.1f max=%d\n",
2313 s->tb_count ? (double)s->op_count / s->tb_count : 0, s->op_count_max);
a23a9ec6
FB
2314 cpu_fprintf(f, "deleted ops/TB %0.2f\n",
2315 s->tb_count ?
2316 (double)s->del_op_count / s->tb_count : 0);
2317 cpu_fprintf(f, "avg temps/TB %0.2f max=%d\n",
2318 s->tb_count ?
2319 (double)s->temp_count / s->tb_count : 0,
2320 s->temp_count_max);
2321
2322 cpu_fprintf(f, "cycles/op %0.1f\n",
2323 s->op_count ? (double)tot / s->op_count : 0);
2324 cpu_fprintf(f, "cycles/in byte %0.1f\n",
2325 s->code_in_len ? (double)tot / s->code_in_len : 0);
2326 cpu_fprintf(f, "cycles/out byte %0.1f\n",
2327 s->code_out_len ? (double)tot / s->code_out_len : 0);
2328 if (tot == 0)
2329 tot = 1;
2330 cpu_fprintf(f, " gen_interm time %0.1f%%\n",
2331 (double)s->interm_time / tot * 100.0);
2332 cpu_fprintf(f, " gen_code time %0.1f%%\n",
2333 (double)s->code_time / tot * 100.0);
c5cc28ff
AJ
2334 cpu_fprintf(f, "optim./code time %0.1f%%\n",
2335 (double)s->opt_time / (s->code_time ? s->code_time : 1)
2336 * 100.0);
a23a9ec6
FB
2337 cpu_fprintf(f, "liveness/code time %0.1f%%\n",
2338 (double)s->la_time / (s->code_time ? s->code_time : 1) * 100.0);
2339 cpu_fprintf(f, "cpu_restore count %" PRId64 "\n",
2340 s->restore_count);
2341 cpu_fprintf(f, " avg cycles %0.1f\n",
2342 s->restore_count ? (double)s->restore_time / s->restore_count : 0);
871e6c35
BS
2343
2344 dump_op_count();
a23a9ec6
FB
2345}
2346#else
405cf9ff 2347void tcg_dump_info(FILE *f, fprintf_function cpu_fprintf)
a23a9ec6 2348{
24bf7b3a 2349 cpu_fprintf(f, "[TCG profiler not compiled]\n");
a23a9ec6
FB
2350}
2351#endif
813da627
RH
2352
2353#ifdef ELF_HOST_MACHINE
5872bbf2
RH
2354/* In order to use this feature, the backend needs to do three things:
2355
2356 (1) Define ELF_HOST_MACHINE to indicate both what value to
2357 put into the ELF image and to indicate support for the feature.
2358
2359 (2) Define tcg_register_jit. This should create a buffer containing
2360 the contents of a .debug_frame section that describes the post-
2361 prologue unwind info for the tcg machine.
2362
2363 (3) Call tcg_register_jit_int, with the constructed .debug_frame.
2364*/
813da627
RH
2365
2366/* Begin GDB interface. THE FOLLOWING MUST MATCH GDB DOCS. */
2367typedef enum {
2368 JIT_NOACTION = 0,
2369 JIT_REGISTER_FN,
2370 JIT_UNREGISTER_FN
2371} jit_actions_t;
2372
2373struct jit_code_entry {
2374 struct jit_code_entry *next_entry;
2375 struct jit_code_entry *prev_entry;
2376 const void *symfile_addr;
2377 uint64_t symfile_size;
2378};
2379
2380struct jit_descriptor {
2381 uint32_t version;
2382 uint32_t action_flag;
2383 struct jit_code_entry *relevant_entry;
2384 struct jit_code_entry *first_entry;
2385};
2386
2387void __jit_debug_register_code(void) __attribute__((noinline));
2388void __jit_debug_register_code(void)
2389{
2390 asm("");
2391}
2392
2393/* Must statically initialize the version, because GDB may check
2394 the version before we can set it. */
2395struct jit_descriptor __jit_debug_descriptor = { 1, 0, 0, 0 };
2396
2397/* End GDB interface. */
2398
2399static int find_string(const char *strtab, const char *str)
2400{
2401 const char *p = strtab + 1;
2402
2403 while (1) {
2404 if (strcmp(p, str) == 0) {
2405 return p - strtab;
2406 }
2407 p += strlen(p) + 1;
2408 }
2409}
2410
5872bbf2 2411static void tcg_register_jit_int(void *buf_ptr, size_t buf_size,
813da627
RH
2412 void *debug_frame, size_t debug_frame_size)
2413{
5872bbf2
RH
2414 struct __attribute__((packed)) DebugInfo {
2415 uint32_t len;
2416 uint16_t version;
2417 uint32_t abbrev;
2418 uint8_t ptr_size;
2419 uint8_t cu_die;
2420 uint16_t cu_lang;
2421 uintptr_t cu_low_pc;
2422 uintptr_t cu_high_pc;
2423 uint8_t fn_die;
2424 char fn_name[16];
2425 uintptr_t fn_low_pc;
2426 uintptr_t fn_high_pc;
2427 uint8_t cu_eoc;
2428 };
813da627
RH
2429
2430 struct ElfImage {
2431 ElfW(Ehdr) ehdr;
2432 ElfW(Phdr) phdr;
5872bbf2
RH
2433 ElfW(Shdr) shdr[7];
2434 ElfW(Sym) sym[2];
2435 struct DebugInfo di;
2436 uint8_t da[24];
2437 char str[80];
2438 };
2439
2440 struct ElfImage *img;
2441
2442 static const struct ElfImage img_template = {
2443 .ehdr = {
2444 .e_ident[EI_MAG0] = ELFMAG0,
2445 .e_ident[EI_MAG1] = ELFMAG1,
2446 .e_ident[EI_MAG2] = ELFMAG2,
2447 .e_ident[EI_MAG3] = ELFMAG3,
2448 .e_ident[EI_CLASS] = ELF_CLASS,
2449 .e_ident[EI_DATA] = ELF_DATA,
2450 .e_ident[EI_VERSION] = EV_CURRENT,
2451 .e_type = ET_EXEC,
2452 .e_machine = ELF_HOST_MACHINE,
2453 .e_version = EV_CURRENT,
2454 .e_phoff = offsetof(struct ElfImage, phdr),
2455 .e_shoff = offsetof(struct ElfImage, shdr),
2456 .e_ehsize = sizeof(ElfW(Shdr)),
2457 .e_phentsize = sizeof(ElfW(Phdr)),
2458 .e_phnum = 1,
2459 .e_shentsize = sizeof(ElfW(Shdr)),
2460 .e_shnum = ARRAY_SIZE(img->shdr),
2461 .e_shstrndx = ARRAY_SIZE(img->shdr) - 1,
abbb3eae
RH
2462#ifdef ELF_HOST_FLAGS
2463 .e_flags = ELF_HOST_FLAGS,
2464#endif
2465#ifdef ELF_OSABI
2466 .e_ident[EI_OSABI] = ELF_OSABI,
2467#endif
5872bbf2
RH
2468 },
2469 .phdr = {
2470 .p_type = PT_LOAD,
2471 .p_flags = PF_X,
2472 },
2473 .shdr = {
2474 [0] = { .sh_type = SHT_NULL },
2475 /* Trick: The contents of code_gen_buffer are not present in
2476 this fake ELF file; that got allocated elsewhere. Therefore
2477 we mark .text as SHT_NOBITS (similar to .bss) so that readers
2478 will not look for contents. We can record any address. */
2479 [1] = { /* .text */
2480 .sh_type = SHT_NOBITS,
2481 .sh_flags = SHF_EXECINSTR | SHF_ALLOC,
2482 },
2483 [2] = { /* .debug_info */
2484 .sh_type = SHT_PROGBITS,
2485 .sh_offset = offsetof(struct ElfImage, di),
2486 .sh_size = sizeof(struct DebugInfo),
2487 },
2488 [3] = { /* .debug_abbrev */
2489 .sh_type = SHT_PROGBITS,
2490 .sh_offset = offsetof(struct ElfImage, da),
2491 .sh_size = sizeof(img->da),
2492 },
2493 [4] = { /* .debug_frame */
2494 .sh_type = SHT_PROGBITS,
2495 .sh_offset = sizeof(struct ElfImage),
2496 },
2497 [5] = { /* .symtab */
2498 .sh_type = SHT_SYMTAB,
2499 .sh_offset = offsetof(struct ElfImage, sym),
2500 .sh_size = sizeof(img->sym),
2501 .sh_info = 1,
2502 .sh_link = ARRAY_SIZE(img->shdr) - 1,
2503 .sh_entsize = sizeof(ElfW(Sym)),
2504 },
2505 [6] = { /* .strtab */
2506 .sh_type = SHT_STRTAB,
2507 .sh_offset = offsetof(struct ElfImage, str),
2508 .sh_size = sizeof(img->str),
2509 }
2510 },
2511 .sym = {
2512 [1] = { /* code_gen_buffer */
2513 .st_info = ELF_ST_INFO(STB_GLOBAL, STT_FUNC),
2514 .st_shndx = 1,
2515 }
2516 },
2517 .di = {
2518 .len = sizeof(struct DebugInfo) - 4,
2519 .version = 2,
2520 .ptr_size = sizeof(void *),
2521 .cu_die = 1,
2522 .cu_lang = 0x8001, /* DW_LANG_Mips_Assembler */
2523 .fn_die = 2,
2524 .fn_name = "code_gen_buffer"
2525 },
2526 .da = {
2527 1, /* abbrev number (the cu) */
2528 0x11, 1, /* DW_TAG_compile_unit, has children */
2529 0x13, 0x5, /* DW_AT_language, DW_FORM_data2 */
2530 0x11, 0x1, /* DW_AT_low_pc, DW_FORM_addr */
2531 0x12, 0x1, /* DW_AT_high_pc, DW_FORM_addr */
2532 0, 0, /* end of abbrev */
2533 2, /* abbrev number (the fn) */
2534 0x2e, 0, /* DW_TAG_subprogram, no children */
2535 0x3, 0x8, /* DW_AT_name, DW_FORM_string */
2536 0x11, 0x1, /* DW_AT_low_pc, DW_FORM_addr */
2537 0x12, 0x1, /* DW_AT_high_pc, DW_FORM_addr */
2538 0, 0, /* end of abbrev */
2539 0 /* no more abbrev */
2540 },
2541 .str = "\0" ".text\0" ".debug_info\0" ".debug_abbrev\0"
2542 ".debug_frame\0" ".symtab\0" ".strtab\0" "code_gen_buffer",
813da627
RH
2543 };
2544
2545 /* We only need a single jit entry; statically allocate it. */
2546 static struct jit_code_entry one_entry;
2547
5872bbf2 2548 uintptr_t buf = (uintptr_t)buf_ptr;
813da627 2549 size_t img_size = sizeof(struct ElfImage) + debug_frame_size;
813da627 2550
5872bbf2
RH
2551 img = g_malloc(img_size);
2552 *img = img_template;
2553 memcpy(img + 1, debug_frame, debug_frame_size);
813da627 2554
5872bbf2
RH
2555 img->phdr.p_vaddr = buf;
2556 img->phdr.p_paddr = buf;
2557 img->phdr.p_memsz = buf_size;
813da627 2558
813da627 2559 img->shdr[1].sh_name = find_string(img->str, ".text");
5872bbf2 2560 img->shdr[1].sh_addr = buf;
813da627
RH
2561 img->shdr[1].sh_size = buf_size;
2562
5872bbf2
RH
2563 img->shdr[2].sh_name = find_string(img->str, ".debug_info");
2564 img->shdr[3].sh_name = find_string(img->str, ".debug_abbrev");
2565
2566 img->shdr[4].sh_name = find_string(img->str, ".debug_frame");
2567 img->shdr[4].sh_size = debug_frame_size;
2568
2569 img->shdr[5].sh_name = find_string(img->str, ".symtab");
2570 img->shdr[6].sh_name = find_string(img->str, ".strtab");
2571
2572 img->sym[1].st_name = find_string(img->str, "code_gen_buffer");
2573 img->sym[1].st_value = buf;
2574 img->sym[1].st_size = buf_size;
813da627 2575
5872bbf2
RH
2576 img->di.cu_low_pc = buf;
2577 img->di.cu_high_pc = buf_size;
2578 img->di.fn_low_pc = buf;
2579 img->di.fn_high_pc = buf_size;
813da627
RH
2580
2581#ifdef DEBUG_JIT
2582 /* Enable this block to be able to debug the ELF image file creation.
2583 One can use readelf, objdump, or other inspection utilities. */
2584 {
2585 FILE *f = fopen("/tmp/qemu.jit", "w+b");
2586 if (f) {
5872bbf2 2587 if (fwrite(img, img_size, 1, f) != img_size) {
813da627
RH
2588 /* Avoid stupid unused return value warning for fwrite. */
2589 }
2590 fclose(f);
2591 }
2592 }
2593#endif
2594
2595 one_entry.symfile_addr = img;
2596 one_entry.symfile_size = img_size;
2597
2598 __jit_debug_descriptor.action_flag = JIT_REGISTER_FN;
2599 __jit_debug_descriptor.relevant_entry = &one_entry;
2600 __jit_debug_descriptor.first_entry = &one_entry;
2601 __jit_debug_register_code();
2602}
2603#else
5872bbf2
RH
2604/* No support for the feature. Provide the entry point expected by exec.c,
2605 and implement the internal function we declared earlier. */
813da627
RH
2606
2607static void tcg_register_jit_int(void *buf, size_t size,
2608 void *debug_frame, size_t debug_frame_size)
2609{
2610}
2611
2612void tcg_register_jit(void *buf, size_t buf_size)
2613{
2614}
2615#endif /* ELF_HOST_MACHINE */