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Commit | Line | Data |
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c896fe29 FB |
1 | /* |
2 | * Tiny Code Generator for QEMU | |
3 | * | |
4 | * Copyright (c) 2008 Fabrice Bellard | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
7 | * of this software and associated documentation files (the "Software"), to deal | |
8 | * in the Software without restriction, including without limitation the rights | |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 | * copies of the Software, and to permit persons to whom the Software is | |
11 | * furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
22 | * THE SOFTWARE. | |
23 | */ | |
24 | ||
c896fe29 FB |
25 | /* define it to use liveness analysis (better code) */ |
26 | #define USE_LIVENESS_ANALYSIS | |
8f2e8c07 | 27 | #define USE_TCG_OPTIMIZATIONS |
c896fe29 | 28 | |
cca82982 AJ |
29 | #include "config.h" |
30 | ||
813da627 RH |
31 | /* Define to jump the ELF file used to communicate with GDB. */ |
32 | #undef DEBUG_JIT | |
33 | ||
a6c6f76c | 34 | #if !defined(CONFIG_DEBUG_TCG) && !defined(NDEBUG) |
cca82982 AJ |
35 | /* define it to suppress various consistency checks (faster) */ |
36 | #define NDEBUG | |
37 | #endif | |
38 | ||
ca10f867 | 39 | #include "qemu-common.h" |
902b3d5c | 40 | #include "cache-utils.h" |
379f6698 | 41 | #include "host-utils.h" |
2d8ebcf9 | 42 | #include "qemu-timer.h" |
c896fe29 FB |
43 | |
44 | /* Note: the long term plan is to reduce the dependancies on the QEMU | |
45 | CPU definitions. Currently they are used for qemu_ld/st | |
46 | instructions */ | |
47 | #define NO_CPU_IO_DEFS | |
48 | #include "cpu.h" | |
c896fe29 FB |
49 | |
50 | #include "tcg-op.h" | |
813da627 RH |
51 | |
52 | #if TCG_TARGET_REG_BITS == 64 | |
53 | # define ELF_CLASS ELFCLASS64 | |
54 | #else | |
55 | # define ELF_CLASS ELFCLASS32 | |
56 | #endif | |
57 | #ifdef HOST_WORDS_BIGENDIAN | |
58 | # define ELF_DATA ELFDATA2MSB | |
59 | #else | |
60 | # define ELF_DATA ELFDATA2LSB | |
61 | #endif | |
62 | ||
c896fe29 FB |
63 | #include "elf.h" |
64 | ||
c0ad3001 | 65 | /* Forward declarations for functions declared in tcg-target.c and used here. */ |
e4d58b41 RH |
66 | static void tcg_target_init(TCGContext *s); |
67 | static void tcg_target_qemu_prologue(TCGContext *s); | |
c896fe29 | 68 | static void patch_reloc(uint8_t *code_ptr, int type, |
f54b3f92 | 69 | tcg_target_long value, tcg_target_long addend); |
c896fe29 | 70 | |
813da627 RH |
71 | static void tcg_register_jit_int(void *buf, size_t size, |
72 | void *debug_frame, size_t debug_frame_size) | |
73 | __attribute__((unused)); | |
74 | ||
c0ad3001 SW |
75 | /* Forward declarations for functions declared and used in tcg-target.c. */ |
76 | static int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str); | |
2a534aff | 77 | static void tcg_out_ld(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg1, |
c0ad3001 | 78 | tcg_target_long arg2); |
2a534aff | 79 | static void tcg_out_mov(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg); |
c0ad3001 | 80 | static void tcg_out_movi(TCGContext *s, TCGType type, |
2a534aff | 81 | TCGReg ret, tcg_target_long arg); |
c0ad3001 SW |
82 | static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args, |
83 | const int *const_args); | |
2a534aff | 84 | static void tcg_out_st(TCGContext *s, TCGType type, TCGReg arg, TCGReg arg1, |
c0ad3001 SW |
85 | tcg_target_long arg2); |
86 | static int tcg_target_const_match(tcg_target_long val, | |
87 | const TCGArgConstraint *arg_ct); | |
c0ad3001 | 88 | |
8399ad59 | 89 | TCGOpDef tcg_op_defs[] = { |
0e2029a0 | 90 | #define DEF(s, oargs, iargs, cargs, flags) { #s, oargs, iargs, cargs, iargs + oargs + cargs, flags }, |
c896fe29 FB |
91 | #include "tcg-opc.h" |
92 | #undef DEF | |
c896fe29 | 93 | }; |
2a24374a | 94 | const size_t tcg_op_defs_max = ARRAY_SIZE(tcg_op_defs); |
c896fe29 | 95 | |
b1d8e52e BS |
96 | static TCGRegSet tcg_target_available_regs[2]; |
97 | static TCGRegSet tcg_target_call_clobber_regs; | |
c896fe29 FB |
98 | |
99 | /* XXX: move that inside the context */ | |
100 | uint16_t *gen_opc_ptr; | |
101 | TCGArg *gen_opparam_ptr; | |
102 | ||
103 | static inline void tcg_out8(TCGContext *s, uint8_t v) | |
104 | { | |
105 | *s->code_ptr++ = v; | |
106 | } | |
107 | ||
108 | static inline void tcg_out16(TCGContext *s, uint16_t v) | |
109 | { | |
110 | *(uint16_t *)s->code_ptr = v; | |
111 | s->code_ptr += 2; | |
112 | } | |
113 | ||
114 | static inline void tcg_out32(TCGContext *s, uint32_t v) | |
115 | { | |
116 | *(uint32_t *)s->code_ptr = v; | |
117 | s->code_ptr += 4; | |
118 | } | |
119 | ||
120 | /* label relocation processing */ | |
121 | ||
a5ad5916 SW |
122 | static void tcg_out_reloc(TCGContext *s, uint8_t *code_ptr, int type, |
123 | int label_index, long addend) | |
c896fe29 FB |
124 | { |
125 | TCGLabel *l; | |
126 | TCGRelocation *r; | |
127 | ||
128 | l = &s->labels[label_index]; | |
129 | if (l->has_value) { | |
623e265c PB |
130 | /* FIXME: This may break relocations on RISC targets that |
131 | modify instruction fields in place. The caller may not have | |
132 | written the initial value. */ | |
f54b3f92 | 133 | patch_reloc(code_ptr, type, l->u.value, addend); |
c896fe29 FB |
134 | } else { |
135 | /* add a new relocation entry */ | |
136 | r = tcg_malloc(sizeof(TCGRelocation)); | |
137 | r->type = type; | |
138 | r->ptr = code_ptr; | |
139 | r->addend = addend; | |
140 | r->next = l->u.first_reloc; | |
141 | l->u.first_reloc = r; | |
142 | } | |
143 | } | |
144 | ||
9d6fca70 | 145 | static void tcg_out_label(TCGContext *s, int label_index, void *ptr) |
c896fe29 FB |
146 | { |
147 | TCGLabel *l; | |
148 | TCGRelocation *r; | |
9d6fca70 | 149 | tcg_target_long value = (tcg_target_long)ptr; |
c896fe29 FB |
150 | |
151 | l = &s->labels[label_index]; | |
152 | if (l->has_value) | |
153 | tcg_abort(); | |
154 | r = l->u.first_reloc; | |
155 | while (r != NULL) { | |
f54b3f92 | 156 | patch_reloc(r->ptr, r->type, value, r->addend); |
c896fe29 FB |
157 | r = r->next; |
158 | } | |
159 | l->has_value = 1; | |
160 | l->u.value = value; | |
161 | } | |
162 | ||
163 | int gen_new_label(void) | |
164 | { | |
165 | TCGContext *s = &tcg_ctx; | |
166 | int idx; | |
167 | TCGLabel *l; | |
168 | ||
169 | if (s->nb_labels >= TCG_MAX_LABELS) | |
170 | tcg_abort(); | |
171 | idx = s->nb_labels++; | |
172 | l = &s->labels[idx]; | |
173 | l->has_value = 0; | |
174 | l->u.first_reloc = NULL; | |
175 | return idx; | |
176 | } | |
177 | ||
178 | #include "tcg-target.c" | |
179 | ||
c896fe29 FB |
180 | /* pool based memory allocation */ |
181 | void *tcg_malloc_internal(TCGContext *s, int size) | |
182 | { | |
183 | TCGPool *p; | |
184 | int pool_size; | |
185 | ||
186 | if (size > TCG_POOL_CHUNK_SIZE) { | |
187 | /* big malloc: insert a new pool (XXX: could optimize) */ | |
7267c094 | 188 | p = g_malloc(sizeof(TCGPool) + size); |
c896fe29 | 189 | p->size = size; |
4055299e KB |
190 | p->next = s->pool_first_large; |
191 | s->pool_first_large = p; | |
192 | return p->data; | |
c896fe29 FB |
193 | } else { |
194 | p = s->pool_current; | |
195 | if (!p) { | |
196 | p = s->pool_first; | |
197 | if (!p) | |
198 | goto new_pool; | |
199 | } else { | |
200 | if (!p->next) { | |
201 | new_pool: | |
202 | pool_size = TCG_POOL_CHUNK_SIZE; | |
7267c094 | 203 | p = g_malloc(sizeof(TCGPool) + pool_size); |
c896fe29 FB |
204 | p->size = pool_size; |
205 | p->next = NULL; | |
206 | if (s->pool_current) | |
207 | s->pool_current->next = p; | |
208 | else | |
209 | s->pool_first = p; | |
210 | } else { | |
211 | p = p->next; | |
212 | } | |
213 | } | |
214 | } | |
215 | s->pool_current = p; | |
216 | s->pool_cur = p->data + size; | |
217 | s->pool_end = p->data + p->size; | |
218 | return p->data; | |
219 | } | |
220 | ||
221 | void tcg_pool_reset(TCGContext *s) | |
222 | { | |
4055299e KB |
223 | TCGPool *p, *t; |
224 | for (p = s->pool_first_large; p; p = t) { | |
225 | t = p->next; | |
226 | g_free(p); | |
227 | } | |
228 | s->pool_first_large = NULL; | |
c896fe29 FB |
229 | s->pool_cur = s->pool_end = NULL; |
230 | s->pool_current = NULL; | |
231 | } | |
232 | ||
c896fe29 FB |
233 | void tcg_context_init(TCGContext *s) |
234 | { | |
235 | int op, total_args, n; | |
236 | TCGOpDef *def; | |
237 | TCGArgConstraint *args_ct; | |
238 | int *sorted_args; | |
239 | ||
240 | memset(s, 0, sizeof(*s)); | |
c896fe29 FB |
241 | s->nb_globals = 0; |
242 | ||
243 | /* Count total number of arguments and allocate the corresponding | |
244 | space */ | |
245 | total_args = 0; | |
246 | for(op = 0; op < NB_OPS; op++) { | |
247 | def = &tcg_op_defs[op]; | |
248 | n = def->nb_iargs + def->nb_oargs; | |
249 | total_args += n; | |
250 | } | |
251 | ||
7267c094 AL |
252 | args_ct = g_malloc(sizeof(TCGArgConstraint) * total_args); |
253 | sorted_args = g_malloc(sizeof(int) * total_args); | |
c896fe29 FB |
254 | |
255 | for(op = 0; op < NB_OPS; op++) { | |
256 | def = &tcg_op_defs[op]; | |
257 | def->args_ct = args_ct; | |
258 | def->sorted_args = sorted_args; | |
259 | n = def->nb_iargs + def->nb_oargs; | |
260 | sorted_args += n; | |
261 | args_ct += n; | |
262 | } | |
263 | ||
264 | tcg_target_init(s); | |
9002ec79 | 265 | } |
b03cce8e | 266 | |
9002ec79 RH |
267 | void tcg_prologue_init(TCGContext *s) |
268 | { | |
b03cce8e FB |
269 | /* init global prologue and epilogue */ |
270 | s->code_buf = code_gen_prologue; | |
271 | s->code_ptr = s->code_buf; | |
272 | tcg_target_qemu_prologue(s); | |
2aeabc08 SW |
273 | flush_icache_range((tcg_target_ulong)s->code_buf, |
274 | (tcg_target_ulong)s->code_ptr); | |
c896fe29 FB |
275 | } |
276 | ||
277 | void tcg_set_frame(TCGContext *s, int reg, | |
278 | tcg_target_long start, tcg_target_long size) | |
279 | { | |
280 | s->frame_start = start; | |
281 | s->frame_end = start + size; | |
282 | s->frame_reg = reg; | |
283 | } | |
284 | ||
c896fe29 FB |
285 | void tcg_func_start(TCGContext *s) |
286 | { | |
e8996ee0 | 287 | int i; |
c896fe29 FB |
288 | tcg_pool_reset(s); |
289 | s->nb_temps = s->nb_globals; | |
641d5fbe | 290 | for(i = 0; i < (TCG_TYPE_COUNT * 2); i++) |
e8996ee0 | 291 | s->first_free_temp[i] = -1; |
c896fe29 FB |
292 | s->labels = tcg_malloc(sizeof(TCGLabel) * TCG_MAX_LABELS); |
293 | s->nb_labels = 0; | |
294 | s->current_frame_offset = s->frame_start; | |
295 | ||
0a209d4b RH |
296 | #ifdef CONFIG_DEBUG_TCG |
297 | s->goto_tb_issue_mask = 0; | |
298 | #endif | |
299 | ||
c896fe29 FB |
300 | gen_opc_ptr = gen_opc_buf; |
301 | gen_opparam_ptr = gen_opparam_buf; | |
302 | } | |
303 | ||
304 | static inline void tcg_temp_alloc(TCGContext *s, int n) | |
305 | { | |
306 | if (n > TCG_MAX_TEMPS) | |
307 | tcg_abort(); | |
308 | } | |
309 | ||
a7812ae4 PB |
310 | static inline int tcg_global_reg_new_internal(TCGType type, int reg, |
311 | const char *name) | |
c896fe29 FB |
312 | { |
313 | TCGContext *s = &tcg_ctx; | |
314 | TCGTemp *ts; | |
315 | int idx; | |
316 | ||
317 | #if TCG_TARGET_REG_BITS == 32 | |
318 | if (type != TCG_TYPE_I32) | |
319 | tcg_abort(); | |
320 | #endif | |
321 | if (tcg_regset_test_reg(s->reserved_regs, reg)) | |
322 | tcg_abort(); | |
323 | idx = s->nb_globals; | |
324 | tcg_temp_alloc(s, s->nb_globals + 1); | |
325 | ts = &s->temps[s->nb_globals]; | |
326 | ts->base_type = type; | |
327 | ts->type = type; | |
328 | ts->fixed_reg = 1; | |
329 | ts->reg = reg; | |
c896fe29 FB |
330 | ts->name = name; |
331 | s->nb_globals++; | |
332 | tcg_regset_set_reg(s->reserved_regs, reg); | |
a7812ae4 PB |
333 | return idx; |
334 | } | |
335 | ||
336 | TCGv_i32 tcg_global_reg_new_i32(int reg, const char *name) | |
337 | { | |
338 | int idx; | |
339 | ||
340 | idx = tcg_global_reg_new_internal(TCG_TYPE_I32, reg, name); | |
341 | return MAKE_TCGV_I32(idx); | |
342 | } | |
343 | ||
344 | TCGv_i64 tcg_global_reg_new_i64(int reg, const char *name) | |
345 | { | |
346 | int idx; | |
347 | ||
348 | idx = tcg_global_reg_new_internal(TCG_TYPE_I64, reg, name); | |
349 | return MAKE_TCGV_I64(idx); | |
c896fe29 FB |
350 | } |
351 | ||
a7812ae4 PB |
352 | static inline int tcg_global_mem_new_internal(TCGType type, int reg, |
353 | tcg_target_long offset, | |
354 | const char *name) | |
c896fe29 FB |
355 | { |
356 | TCGContext *s = &tcg_ctx; | |
357 | TCGTemp *ts; | |
358 | int idx; | |
359 | ||
360 | idx = s->nb_globals; | |
361 | #if TCG_TARGET_REG_BITS == 32 | |
362 | if (type == TCG_TYPE_I64) { | |
363 | char buf[64]; | |
c588979b | 364 | tcg_temp_alloc(s, s->nb_globals + 2); |
c896fe29 FB |
365 | ts = &s->temps[s->nb_globals]; |
366 | ts->base_type = type; | |
367 | ts->type = TCG_TYPE_I32; | |
368 | ts->fixed_reg = 0; | |
369 | ts->mem_allocated = 1; | |
370 | ts->mem_reg = reg; | |
371 | #ifdef TCG_TARGET_WORDS_BIGENDIAN | |
372 | ts->mem_offset = offset + 4; | |
373 | #else | |
374 | ts->mem_offset = offset; | |
375 | #endif | |
c896fe29 FB |
376 | pstrcpy(buf, sizeof(buf), name); |
377 | pstrcat(buf, sizeof(buf), "_0"); | |
378 | ts->name = strdup(buf); | |
379 | ts++; | |
380 | ||
381 | ts->base_type = type; | |
382 | ts->type = TCG_TYPE_I32; | |
383 | ts->fixed_reg = 0; | |
384 | ts->mem_allocated = 1; | |
385 | ts->mem_reg = reg; | |
386 | #ifdef TCG_TARGET_WORDS_BIGENDIAN | |
387 | ts->mem_offset = offset; | |
388 | #else | |
389 | ts->mem_offset = offset + 4; | |
390 | #endif | |
c896fe29 FB |
391 | pstrcpy(buf, sizeof(buf), name); |
392 | pstrcat(buf, sizeof(buf), "_1"); | |
393 | ts->name = strdup(buf); | |
394 | ||
395 | s->nb_globals += 2; | |
396 | } else | |
397 | #endif | |
398 | { | |
399 | tcg_temp_alloc(s, s->nb_globals + 1); | |
400 | ts = &s->temps[s->nb_globals]; | |
401 | ts->base_type = type; | |
402 | ts->type = type; | |
403 | ts->fixed_reg = 0; | |
404 | ts->mem_allocated = 1; | |
405 | ts->mem_reg = reg; | |
406 | ts->mem_offset = offset; | |
c896fe29 FB |
407 | ts->name = name; |
408 | s->nb_globals++; | |
409 | } | |
a7812ae4 PB |
410 | return idx; |
411 | } | |
412 | ||
413 | TCGv_i32 tcg_global_mem_new_i32(int reg, tcg_target_long offset, | |
414 | const char *name) | |
415 | { | |
416 | int idx; | |
417 | ||
418 | idx = tcg_global_mem_new_internal(TCG_TYPE_I32, reg, offset, name); | |
419 | return MAKE_TCGV_I32(idx); | |
420 | } | |
421 | ||
422 | TCGv_i64 tcg_global_mem_new_i64(int reg, tcg_target_long offset, | |
423 | const char *name) | |
424 | { | |
425 | int idx; | |
426 | ||
427 | idx = tcg_global_mem_new_internal(TCG_TYPE_I64, reg, offset, name); | |
428 | return MAKE_TCGV_I64(idx); | |
c896fe29 FB |
429 | } |
430 | ||
a7812ae4 | 431 | static inline int tcg_temp_new_internal(TCGType type, int temp_local) |
c896fe29 FB |
432 | { |
433 | TCGContext *s = &tcg_ctx; | |
434 | TCGTemp *ts; | |
641d5fbe | 435 | int idx, k; |
c896fe29 | 436 | |
641d5fbe FB |
437 | k = type; |
438 | if (temp_local) | |
439 | k += TCG_TYPE_COUNT; | |
440 | idx = s->first_free_temp[k]; | |
e8996ee0 FB |
441 | if (idx != -1) { |
442 | /* There is already an available temp with the | |
443 | right type */ | |
444 | ts = &s->temps[idx]; | |
641d5fbe | 445 | s->first_free_temp[k] = ts->next_free_temp; |
e8996ee0 | 446 | ts->temp_allocated = 1; |
641d5fbe | 447 | assert(ts->temp_local == temp_local); |
e8996ee0 FB |
448 | } else { |
449 | idx = s->nb_temps; | |
c896fe29 | 450 | #if TCG_TARGET_REG_BITS == 32 |
e8996ee0 | 451 | if (type == TCG_TYPE_I64) { |
8df1ca4b | 452 | tcg_temp_alloc(s, s->nb_temps + 2); |
e8996ee0 FB |
453 | ts = &s->temps[s->nb_temps]; |
454 | ts->base_type = type; | |
455 | ts->type = TCG_TYPE_I32; | |
456 | ts->temp_allocated = 1; | |
641d5fbe | 457 | ts->temp_local = temp_local; |
e8996ee0 FB |
458 | ts->name = NULL; |
459 | ts++; | |
460 | ts->base_type = TCG_TYPE_I32; | |
461 | ts->type = TCG_TYPE_I32; | |
462 | ts->temp_allocated = 1; | |
641d5fbe | 463 | ts->temp_local = temp_local; |
e8996ee0 FB |
464 | ts->name = NULL; |
465 | s->nb_temps += 2; | |
466 | } else | |
c896fe29 | 467 | #endif |
e8996ee0 FB |
468 | { |
469 | tcg_temp_alloc(s, s->nb_temps + 1); | |
470 | ts = &s->temps[s->nb_temps]; | |
471 | ts->base_type = type; | |
472 | ts->type = type; | |
473 | ts->temp_allocated = 1; | |
641d5fbe | 474 | ts->temp_local = temp_local; |
e8996ee0 FB |
475 | ts->name = NULL; |
476 | s->nb_temps++; | |
477 | } | |
c896fe29 | 478 | } |
27bfd83c PM |
479 | |
480 | #if defined(CONFIG_DEBUG_TCG) | |
481 | s->temps_in_use++; | |
482 | #endif | |
a7812ae4 | 483 | return idx; |
c896fe29 FB |
484 | } |
485 | ||
a7812ae4 PB |
486 | TCGv_i32 tcg_temp_new_internal_i32(int temp_local) |
487 | { | |
488 | int idx; | |
489 | ||
490 | idx = tcg_temp_new_internal(TCG_TYPE_I32, temp_local); | |
491 | return MAKE_TCGV_I32(idx); | |
492 | } | |
493 | ||
494 | TCGv_i64 tcg_temp_new_internal_i64(int temp_local) | |
495 | { | |
496 | int idx; | |
497 | ||
498 | idx = tcg_temp_new_internal(TCG_TYPE_I64, temp_local); | |
499 | return MAKE_TCGV_I64(idx); | |
500 | } | |
501 | ||
502 | static inline void tcg_temp_free_internal(int idx) | |
c896fe29 FB |
503 | { |
504 | TCGContext *s = &tcg_ctx; | |
505 | TCGTemp *ts; | |
641d5fbe | 506 | int k; |
c896fe29 | 507 | |
27bfd83c PM |
508 | #if defined(CONFIG_DEBUG_TCG) |
509 | s->temps_in_use--; | |
510 | if (s->temps_in_use < 0) { | |
511 | fprintf(stderr, "More temporaries freed than allocated!\n"); | |
512 | } | |
513 | #endif | |
514 | ||
e8996ee0 | 515 | assert(idx >= s->nb_globals && idx < s->nb_temps); |
c896fe29 | 516 | ts = &s->temps[idx]; |
e8996ee0 FB |
517 | assert(ts->temp_allocated != 0); |
518 | ts->temp_allocated = 0; | |
641d5fbe FB |
519 | k = ts->base_type; |
520 | if (ts->temp_local) | |
521 | k += TCG_TYPE_COUNT; | |
522 | ts->next_free_temp = s->first_free_temp[k]; | |
523 | s->first_free_temp[k] = idx; | |
c896fe29 FB |
524 | } |
525 | ||
a7812ae4 PB |
526 | void tcg_temp_free_i32(TCGv_i32 arg) |
527 | { | |
528 | tcg_temp_free_internal(GET_TCGV_I32(arg)); | |
529 | } | |
530 | ||
531 | void tcg_temp_free_i64(TCGv_i64 arg) | |
532 | { | |
533 | tcg_temp_free_internal(GET_TCGV_I64(arg)); | |
534 | } | |
e8996ee0 | 535 | |
a7812ae4 | 536 | TCGv_i32 tcg_const_i32(int32_t val) |
c896fe29 | 537 | { |
a7812ae4 PB |
538 | TCGv_i32 t0; |
539 | t0 = tcg_temp_new_i32(); | |
e8996ee0 FB |
540 | tcg_gen_movi_i32(t0, val); |
541 | return t0; | |
542 | } | |
c896fe29 | 543 | |
a7812ae4 | 544 | TCGv_i64 tcg_const_i64(int64_t val) |
e8996ee0 | 545 | { |
a7812ae4 PB |
546 | TCGv_i64 t0; |
547 | t0 = tcg_temp_new_i64(); | |
e8996ee0 FB |
548 | tcg_gen_movi_i64(t0, val); |
549 | return t0; | |
c896fe29 FB |
550 | } |
551 | ||
a7812ae4 | 552 | TCGv_i32 tcg_const_local_i32(int32_t val) |
bdffd4a9 | 553 | { |
a7812ae4 PB |
554 | TCGv_i32 t0; |
555 | t0 = tcg_temp_local_new_i32(); | |
bdffd4a9 AJ |
556 | tcg_gen_movi_i32(t0, val); |
557 | return t0; | |
558 | } | |
559 | ||
a7812ae4 | 560 | TCGv_i64 tcg_const_local_i64(int64_t val) |
bdffd4a9 | 561 | { |
a7812ae4 PB |
562 | TCGv_i64 t0; |
563 | t0 = tcg_temp_local_new_i64(); | |
bdffd4a9 AJ |
564 | tcg_gen_movi_i64(t0, val); |
565 | return t0; | |
566 | } | |
567 | ||
27bfd83c PM |
568 | #if defined(CONFIG_DEBUG_TCG) |
569 | void tcg_clear_temp_count(void) | |
570 | { | |
571 | TCGContext *s = &tcg_ctx; | |
572 | s->temps_in_use = 0; | |
573 | } | |
574 | ||
575 | int tcg_check_temp_count(void) | |
576 | { | |
577 | TCGContext *s = &tcg_ctx; | |
578 | if (s->temps_in_use) { | |
579 | /* Clear the count so that we don't give another | |
580 | * warning immediately next time around. | |
581 | */ | |
582 | s->temps_in_use = 0; | |
583 | return 1; | |
584 | } | |
585 | return 0; | |
586 | } | |
587 | #endif | |
588 | ||
c896fe29 FB |
589 | void tcg_register_helper(void *func, const char *name) |
590 | { | |
591 | TCGContext *s = &tcg_ctx; | |
592 | int n; | |
593 | if ((s->nb_helpers + 1) > s->allocated_helpers) { | |
594 | n = s->allocated_helpers; | |
595 | if (n == 0) { | |
596 | n = 4; | |
597 | } else { | |
598 | n *= 2; | |
599 | } | |
600 | s->helpers = realloc(s->helpers, n * sizeof(TCGHelperInfo)); | |
601 | s->allocated_helpers = n; | |
602 | } | |
4dc81f28 | 603 | s->helpers[s->nb_helpers].func = (tcg_target_ulong)func; |
c896fe29 FB |
604 | s->helpers[s->nb_helpers].name = name; |
605 | s->nb_helpers++; | |
606 | } | |
607 | ||
39cf05d3 FB |
608 | /* Note: we convert the 64 bit args to 32 bit and do some alignment |
609 | and endian swap. Maybe it would be better to do the alignment | |
610 | and endian swap in tcg_reg_alloc_call(). */ | |
a7812ae4 PB |
611 | void tcg_gen_callN(TCGContext *s, TCGv_ptr func, unsigned int flags, |
612 | int sizemask, TCGArg ret, int nargs, TCGArg *args) | |
c896fe29 | 613 | { |
a7812ae4 PB |
614 | int i; |
615 | int real_args; | |
616 | int nb_rets; | |
617 | TCGArg *nparam; | |
2bece2c8 RH |
618 | |
619 | #if defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64 | |
620 | for (i = 0; i < nargs; ++i) { | |
621 | int is_64bit = sizemask & (1 << (i+1)*2); | |
622 | int is_signed = sizemask & (2 << (i+1)*2); | |
623 | if (!is_64bit) { | |
624 | TCGv_i64 temp = tcg_temp_new_i64(); | |
625 | TCGv_i64 orig = MAKE_TCGV_I64(args[i]); | |
626 | if (is_signed) { | |
627 | tcg_gen_ext32s_i64(temp, orig); | |
628 | } else { | |
629 | tcg_gen_ext32u_i64(temp, orig); | |
630 | } | |
631 | args[i] = GET_TCGV_I64(temp); | |
632 | } | |
633 | } | |
634 | #endif /* TCG_TARGET_EXTEND_ARGS */ | |
635 | ||
a7812ae4 PB |
636 | *gen_opc_ptr++ = INDEX_op_call; |
637 | nparam = gen_opparam_ptr++; | |
a7812ae4 PB |
638 | if (ret != TCG_CALL_DUMMY_ARG) { |
639 | #if TCG_TARGET_REG_BITS < 64 | |
640 | if (sizemask & 1) { | |
39cf05d3 | 641 | #ifdef TCG_TARGET_WORDS_BIGENDIAN |
a7812ae4 PB |
642 | *gen_opparam_ptr++ = ret + 1; |
643 | *gen_opparam_ptr++ = ret; | |
39cf05d3 | 644 | #else |
a7812ae4 PB |
645 | *gen_opparam_ptr++ = ret; |
646 | *gen_opparam_ptr++ = ret + 1; | |
39cf05d3 | 647 | #endif |
a7812ae4 PB |
648 | nb_rets = 2; |
649 | } else | |
650 | #endif | |
651 | { | |
652 | *gen_opparam_ptr++ = ret; | |
653 | nb_rets = 1; | |
c896fe29 | 654 | } |
a7812ae4 PB |
655 | } else { |
656 | nb_rets = 0; | |
c896fe29 | 657 | } |
a7812ae4 PB |
658 | real_args = 0; |
659 | for (i = 0; i < nargs; i++) { | |
660 | #if TCG_TARGET_REG_BITS < 64 | |
2bece2c8 RH |
661 | int is_64bit = sizemask & (1 << (i+1)*2); |
662 | if (is_64bit) { | |
39cf05d3 FB |
663 | #ifdef TCG_TARGET_CALL_ALIGN_ARGS |
664 | /* some targets want aligned 64 bit args */ | |
ebd486d5 | 665 | if (real_args & 1) { |
a7812ae4 | 666 | *gen_opparam_ptr++ = TCG_CALL_DUMMY_ARG; |
ebd486d5 | 667 | real_args++; |
39cf05d3 FB |
668 | } |
669 | #endif | |
3f90f252 RH |
670 | /* If stack grows up, then we will be placing successive |
671 | arguments at lower addresses, which means we need to | |
672 | reverse the order compared to how we would normally | |
673 | treat either big or little-endian. For those arguments | |
674 | that will wind up in registers, this still works for | |
675 | HPPA (the only current STACK_GROWSUP target) since the | |
676 | argument registers are *also* allocated in decreasing | |
677 | order. If another such target is added, this logic may | |
678 | have to get more complicated to differentiate between | |
679 | stack arguments and register arguments. */ | |
680 | #if defined(TCG_TARGET_WORDS_BIGENDIAN) != defined(TCG_TARGET_STACK_GROWSUP) | |
a7812ae4 PB |
681 | *gen_opparam_ptr++ = args[i] + 1; |
682 | *gen_opparam_ptr++ = args[i]; | |
c896fe29 | 683 | #else |
a7812ae4 PB |
684 | *gen_opparam_ptr++ = args[i]; |
685 | *gen_opparam_ptr++ = args[i] + 1; | |
c896fe29 | 686 | #endif |
a7812ae4 | 687 | real_args += 2; |
2bece2c8 | 688 | continue; |
c896fe29 | 689 | } |
2bece2c8 RH |
690 | #endif /* TCG_TARGET_REG_BITS < 64 */ |
691 | ||
692 | *gen_opparam_ptr++ = args[i]; | |
693 | real_args++; | |
c896fe29 | 694 | } |
a7812ae4 PB |
695 | *gen_opparam_ptr++ = GET_TCGV_PTR(func); |
696 | ||
697 | *gen_opparam_ptr++ = flags; | |
698 | ||
699 | *nparam = (nb_rets << 16) | (real_args + 1); | |
700 | ||
701 | /* total parameters, needed to go backward in the instruction stream */ | |
702 | *gen_opparam_ptr++ = 1 + nb_rets + real_args + 3; | |
2bece2c8 RH |
703 | |
704 | #if defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64 | |
705 | for (i = 0; i < nargs; ++i) { | |
706 | int is_64bit = sizemask & (1 << (i+1)*2); | |
707 | if (!is_64bit) { | |
708 | TCGv_i64 temp = MAKE_TCGV_I64(args[i]); | |
709 | tcg_temp_free_i64(temp); | |
710 | } | |
711 | } | |
712 | #endif /* TCG_TARGET_EXTEND_ARGS */ | |
c896fe29 | 713 | } |
c896fe29 | 714 | |
ac56dd48 | 715 | #if TCG_TARGET_REG_BITS == 32 |
a7812ae4 | 716 | void tcg_gen_shifti_i64(TCGv_i64 ret, TCGv_i64 arg1, |
c896fe29 FB |
717 | int c, int right, int arith) |
718 | { | |
cf60bce4 | 719 | if (c == 0) { |
a7812ae4 | 720 | tcg_gen_mov_i32(TCGV_LOW(ret), TCGV_LOW(arg1)); |
cf60bce4 FB |
721 | tcg_gen_mov_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1)); |
722 | } else if (c >= 32) { | |
c896fe29 FB |
723 | c -= 32; |
724 | if (right) { | |
725 | if (arith) { | |
a7812ae4 | 726 | tcg_gen_sari_i32(TCGV_LOW(ret), TCGV_HIGH(arg1), c); |
ac56dd48 | 727 | tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), 31); |
c896fe29 | 728 | } else { |
a7812ae4 | 729 | tcg_gen_shri_i32(TCGV_LOW(ret), TCGV_HIGH(arg1), c); |
ac56dd48 | 730 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); |
c896fe29 FB |
731 | } |
732 | } else { | |
a7812ae4 PB |
733 | tcg_gen_shli_i32(TCGV_HIGH(ret), TCGV_LOW(arg1), c); |
734 | tcg_gen_movi_i32(TCGV_LOW(ret), 0); | |
c896fe29 FB |
735 | } |
736 | } else { | |
a7812ae4 | 737 | TCGv_i32 t0, t1; |
c896fe29 | 738 | |
a7812ae4 PB |
739 | t0 = tcg_temp_new_i32(); |
740 | t1 = tcg_temp_new_i32(); | |
c896fe29 | 741 | if (right) { |
ac56dd48 | 742 | tcg_gen_shli_i32(t0, TCGV_HIGH(arg1), 32 - c); |
c896fe29 | 743 | if (arith) |
ac56dd48 | 744 | tcg_gen_sari_i32(t1, TCGV_HIGH(arg1), c); |
a7812ae4 | 745 | else |
ac56dd48 | 746 | tcg_gen_shri_i32(t1, TCGV_HIGH(arg1), c); |
a7812ae4 PB |
747 | tcg_gen_shri_i32(TCGV_LOW(ret), TCGV_LOW(arg1), c); |
748 | tcg_gen_or_i32(TCGV_LOW(ret), TCGV_LOW(ret), t0); | |
ac56dd48 | 749 | tcg_gen_mov_i32(TCGV_HIGH(ret), t1); |
c896fe29 | 750 | } else { |
a7812ae4 | 751 | tcg_gen_shri_i32(t0, TCGV_LOW(arg1), 32 - c); |
c896fe29 | 752 | /* Note: ret can be the same as arg1, so we use t1 */ |
a7812ae4 | 753 | tcg_gen_shli_i32(t1, TCGV_LOW(arg1), c); |
ac56dd48 PB |
754 | tcg_gen_shli_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), c); |
755 | tcg_gen_or_i32(TCGV_HIGH(ret), TCGV_HIGH(ret), t0); | |
a7812ae4 | 756 | tcg_gen_mov_i32(TCGV_LOW(ret), t1); |
c896fe29 | 757 | } |
a7812ae4 PB |
758 | tcg_temp_free_i32(t0); |
759 | tcg_temp_free_i32(t1); | |
c896fe29 FB |
760 | } |
761 | } | |
ac56dd48 | 762 | #endif |
c896fe29 | 763 | |
be210acb | 764 | |
8fcd3692 | 765 | static void tcg_reg_alloc_start(TCGContext *s) |
c896fe29 FB |
766 | { |
767 | int i; | |
768 | TCGTemp *ts; | |
769 | for(i = 0; i < s->nb_globals; i++) { | |
770 | ts = &s->temps[i]; | |
771 | if (ts->fixed_reg) { | |
772 | ts->val_type = TEMP_VAL_REG; | |
773 | } else { | |
774 | ts->val_type = TEMP_VAL_MEM; | |
775 | } | |
776 | } | |
e8996ee0 FB |
777 | for(i = s->nb_globals; i < s->nb_temps; i++) { |
778 | ts = &s->temps[i]; | |
779 | ts->val_type = TEMP_VAL_DEAD; | |
780 | ts->mem_allocated = 0; | |
781 | ts->fixed_reg = 0; | |
782 | } | |
c896fe29 FB |
783 | for(i = 0; i < TCG_TARGET_NB_REGS; i++) { |
784 | s->reg_to_temp[i] = -1; | |
785 | } | |
786 | } | |
787 | ||
ac56dd48 PB |
788 | static char *tcg_get_arg_str_idx(TCGContext *s, char *buf, int buf_size, |
789 | int idx) | |
c896fe29 FB |
790 | { |
791 | TCGTemp *ts; | |
ac56dd48 | 792 | |
7f6f0ae5 | 793 | assert(idx >= 0 && idx < s->nb_temps); |
ac56dd48 | 794 | ts = &s->temps[idx]; |
7f6f0ae5 | 795 | assert(ts); |
ac56dd48 PB |
796 | if (idx < s->nb_globals) { |
797 | pstrcpy(buf, buf_size, ts->name); | |
c896fe29 | 798 | } else { |
641d5fbe FB |
799 | if (ts->temp_local) |
800 | snprintf(buf, buf_size, "loc%d", idx - s->nb_globals); | |
801 | else | |
802 | snprintf(buf, buf_size, "tmp%d", idx - s->nb_globals); | |
c896fe29 FB |
803 | } |
804 | return buf; | |
805 | } | |
806 | ||
a7812ae4 PB |
807 | char *tcg_get_arg_str_i32(TCGContext *s, char *buf, int buf_size, TCGv_i32 arg) |
808 | { | |
809 | return tcg_get_arg_str_idx(s, buf, buf_size, GET_TCGV_I32(arg)); | |
810 | } | |
811 | ||
812 | char *tcg_get_arg_str_i64(TCGContext *s, char *buf, int buf_size, TCGv_i64 arg) | |
ac56dd48 | 813 | { |
a810a2de | 814 | return tcg_get_arg_str_idx(s, buf, buf_size, GET_TCGV_I64(arg)); |
ac56dd48 PB |
815 | } |
816 | ||
e8996ee0 | 817 | static int helper_cmp(const void *p1, const void *p2) |
4dc81f28 | 818 | { |
e8996ee0 FB |
819 | const TCGHelperInfo *th1 = p1; |
820 | const TCGHelperInfo *th2 = p2; | |
821 | if (th1->func < th2->func) | |
822 | return -1; | |
823 | else if (th1->func == th2->func) | |
824 | return 0; | |
825 | else | |
826 | return 1; | |
4dc81f28 FB |
827 | } |
828 | ||
e8996ee0 FB |
829 | /* find helper definition (Note: A hash table would be better) */ |
830 | static TCGHelperInfo *tcg_find_helper(TCGContext *s, tcg_target_ulong val) | |
4dc81f28 | 831 | { |
e8996ee0 | 832 | int m, m_min, m_max; |
4dc81f28 | 833 | TCGHelperInfo *th; |
e8996ee0 | 834 | tcg_target_ulong v; |
4dc81f28 | 835 | |
e8996ee0 FB |
836 | if (unlikely(!s->helpers_sorted)) { |
837 | qsort(s->helpers, s->nb_helpers, sizeof(TCGHelperInfo), | |
838 | helper_cmp); | |
839 | s->helpers_sorted = 1; | |
840 | } | |
841 | ||
842 | /* binary search */ | |
843 | m_min = 0; | |
844 | m_max = s->nb_helpers - 1; | |
845 | while (m_min <= m_max) { | |
846 | m = (m_min + m_max) >> 1; | |
847 | th = &s->helpers[m]; | |
848 | v = th->func; | |
849 | if (v == val) | |
850 | return th; | |
851 | else if (val < v) { | |
852 | m_max = m - 1; | |
853 | } else { | |
854 | m_min = m + 1; | |
4dc81f28 FB |
855 | } |
856 | } | |
e8996ee0 | 857 | return NULL; |
4dc81f28 FB |
858 | } |
859 | ||
f48f3ede BS |
860 | static const char * const cond_name[] = |
861 | { | |
0aed257f RH |
862 | [TCG_COND_NEVER] = "never", |
863 | [TCG_COND_ALWAYS] = "always", | |
f48f3ede BS |
864 | [TCG_COND_EQ] = "eq", |
865 | [TCG_COND_NE] = "ne", | |
866 | [TCG_COND_LT] = "lt", | |
867 | [TCG_COND_GE] = "ge", | |
868 | [TCG_COND_LE] = "le", | |
869 | [TCG_COND_GT] = "gt", | |
870 | [TCG_COND_LTU] = "ltu", | |
871 | [TCG_COND_GEU] = "geu", | |
872 | [TCG_COND_LEU] = "leu", | |
873 | [TCG_COND_GTU] = "gtu" | |
874 | }; | |
875 | ||
eeacee4d | 876 | void tcg_dump_ops(TCGContext *s) |
c896fe29 FB |
877 | { |
878 | const uint16_t *opc_ptr; | |
879 | const TCGArg *args; | |
880 | TCGArg arg; | |
a9751609 RH |
881 | TCGOpcode c; |
882 | int i, k, nb_oargs, nb_iargs, nb_cargs, first_insn; | |
c896fe29 FB |
883 | const TCGOpDef *def; |
884 | char buf[128]; | |
885 | ||
7e4597d7 | 886 | first_insn = 1; |
c896fe29 FB |
887 | opc_ptr = gen_opc_buf; |
888 | args = gen_opparam_buf; | |
889 | while (opc_ptr < gen_opc_ptr) { | |
890 | c = *opc_ptr++; | |
891 | def = &tcg_op_defs[c]; | |
7e4597d7 FB |
892 | if (c == INDEX_op_debug_insn_start) { |
893 | uint64_t pc; | |
894 | #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS | |
895 | pc = ((uint64_t)args[1] << 32) | args[0]; | |
896 | #else | |
897 | pc = args[0]; | |
898 | #endif | |
eeacee4d BS |
899 | if (!first_insn) { |
900 | qemu_log("\n"); | |
901 | } | |
902 | qemu_log(" ---- 0x%" PRIx64, pc); | |
7e4597d7 FB |
903 | first_insn = 0; |
904 | nb_oargs = def->nb_oargs; | |
905 | nb_iargs = def->nb_iargs; | |
906 | nb_cargs = def->nb_cargs; | |
907 | } else if (c == INDEX_op_call) { | |
c896fe29 | 908 | TCGArg arg; |
4dc81f28 | 909 | |
c896fe29 FB |
910 | /* variable number of arguments */ |
911 | arg = *args++; | |
912 | nb_oargs = arg >> 16; | |
913 | nb_iargs = arg & 0xffff; | |
914 | nb_cargs = def->nb_cargs; | |
c896fe29 | 915 | |
eeacee4d | 916 | qemu_log(" %s ", def->name); |
7e4597d7 | 917 | |
b03cce8e | 918 | /* function name */ |
eeacee4d BS |
919 | qemu_log("%s", |
920 | tcg_get_arg_str_idx(s, buf, sizeof(buf), | |
921 | args[nb_oargs + nb_iargs - 1])); | |
b03cce8e | 922 | /* flags */ |
eeacee4d | 923 | qemu_log(",$0x%" TCG_PRIlx, args[nb_oargs + nb_iargs]); |
b03cce8e | 924 | /* nb out args */ |
eeacee4d | 925 | qemu_log(",$%d", nb_oargs); |
b03cce8e | 926 | for(i = 0; i < nb_oargs; i++) { |
eeacee4d BS |
927 | qemu_log(","); |
928 | qemu_log("%s", tcg_get_arg_str_idx(s, buf, sizeof(buf), | |
929 | args[i])); | |
b03cce8e FB |
930 | } |
931 | for(i = 0; i < (nb_iargs - 1); i++) { | |
eeacee4d | 932 | qemu_log(","); |
39cf05d3 | 933 | if (args[nb_oargs + i] == TCG_CALL_DUMMY_ARG) { |
eeacee4d | 934 | qemu_log("<dummy>"); |
39cf05d3 | 935 | } else { |
eeacee4d BS |
936 | qemu_log("%s", tcg_get_arg_str_idx(s, buf, sizeof(buf), |
937 | args[nb_oargs + i])); | |
39cf05d3 | 938 | } |
b03cce8e | 939 | } |
fba3161f | 940 | } else if (c == INDEX_op_movi_i32 || c == INDEX_op_movi_i64) { |
e8996ee0 FB |
941 | tcg_target_ulong val; |
942 | TCGHelperInfo *th; | |
943 | ||
944 | nb_oargs = def->nb_oargs; | |
945 | nb_iargs = def->nb_iargs; | |
946 | nb_cargs = def->nb_cargs; | |
eeacee4d BS |
947 | qemu_log(" %s %s,$", def->name, |
948 | tcg_get_arg_str_idx(s, buf, sizeof(buf), args[0])); | |
e8996ee0 FB |
949 | val = args[1]; |
950 | th = tcg_find_helper(s, val); | |
951 | if (th) { | |
eeacee4d | 952 | qemu_log("%s", th->name); |
e8996ee0 | 953 | } else { |
eeacee4d BS |
954 | if (c == INDEX_op_movi_i32) { |
955 | qemu_log("0x%x", (uint32_t)val); | |
956 | } else { | |
957 | qemu_log("0x%" PRIx64 , (uint64_t)val); | |
958 | } | |
e8996ee0 | 959 | } |
b03cce8e | 960 | } else { |
eeacee4d | 961 | qemu_log(" %s ", def->name); |
b03cce8e FB |
962 | if (c == INDEX_op_nopn) { |
963 | /* variable number of arguments */ | |
964 | nb_cargs = *args; | |
965 | nb_oargs = 0; | |
966 | nb_iargs = 0; | |
967 | } else { | |
968 | nb_oargs = def->nb_oargs; | |
969 | nb_iargs = def->nb_iargs; | |
970 | nb_cargs = def->nb_cargs; | |
971 | } | |
972 | ||
973 | k = 0; | |
974 | for(i = 0; i < nb_oargs; i++) { | |
eeacee4d BS |
975 | if (k != 0) { |
976 | qemu_log(","); | |
977 | } | |
978 | qemu_log("%s", tcg_get_arg_str_idx(s, buf, sizeof(buf), | |
979 | args[k++])); | |
b03cce8e FB |
980 | } |
981 | for(i = 0; i < nb_iargs; i++) { | |
eeacee4d BS |
982 | if (k != 0) { |
983 | qemu_log(","); | |
984 | } | |
985 | qemu_log("%s", tcg_get_arg_str_idx(s, buf, sizeof(buf), | |
986 | args[k++])); | |
b03cce8e | 987 | } |
be210acb RH |
988 | switch (c) { |
989 | case INDEX_op_brcond_i32: | |
be210acb | 990 | case INDEX_op_setcond_i32: |
ffc5ea09 | 991 | case INDEX_op_movcond_i32: |
ffc5ea09 | 992 | case INDEX_op_brcond2_i32: |
be210acb | 993 | case INDEX_op_setcond2_i32: |
ffc5ea09 | 994 | case INDEX_op_brcond_i64: |
be210acb | 995 | case INDEX_op_setcond_i64: |
ffc5ea09 | 996 | case INDEX_op_movcond_i64: |
eeacee4d BS |
997 | if (args[k] < ARRAY_SIZE(cond_name) && cond_name[args[k]]) { |
998 | qemu_log(",%s", cond_name[args[k++]]); | |
999 | } else { | |
1000 | qemu_log(",$0x%" TCG_PRIlx, args[k++]); | |
1001 | } | |
f48f3ede | 1002 | i = 1; |
be210acb RH |
1003 | break; |
1004 | default: | |
f48f3ede | 1005 | i = 0; |
be210acb RH |
1006 | break; |
1007 | } | |
f48f3ede | 1008 | for(; i < nb_cargs; i++) { |
eeacee4d BS |
1009 | if (k != 0) { |
1010 | qemu_log(","); | |
1011 | } | |
b03cce8e | 1012 | arg = args[k++]; |
eeacee4d | 1013 | qemu_log("$0x%" TCG_PRIlx, arg); |
b03cce8e | 1014 | } |
c896fe29 | 1015 | } |
eeacee4d | 1016 | qemu_log("\n"); |
c896fe29 FB |
1017 | args += nb_iargs + nb_oargs + nb_cargs; |
1018 | } | |
1019 | } | |
1020 | ||
1021 | /* we give more priority to constraints with less registers */ | |
1022 | static int get_constraint_priority(const TCGOpDef *def, int k) | |
1023 | { | |
1024 | const TCGArgConstraint *arg_ct; | |
1025 | ||
1026 | int i, n; | |
1027 | arg_ct = &def->args_ct[k]; | |
1028 | if (arg_ct->ct & TCG_CT_ALIAS) { | |
1029 | /* an alias is equivalent to a single register */ | |
1030 | n = 1; | |
1031 | } else { | |
1032 | if (!(arg_ct->ct & TCG_CT_REG)) | |
1033 | return 0; | |
1034 | n = 0; | |
1035 | for(i = 0; i < TCG_TARGET_NB_REGS; i++) { | |
1036 | if (tcg_regset_test_reg(arg_ct->u.regs, i)) | |
1037 | n++; | |
1038 | } | |
1039 | } | |
1040 | return TCG_TARGET_NB_REGS - n + 1; | |
1041 | } | |
1042 | ||
1043 | /* sort from highest priority to lowest */ | |
1044 | static void sort_constraints(TCGOpDef *def, int start, int n) | |
1045 | { | |
1046 | int i, j, p1, p2, tmp; | |
1047 | ||
1048 | for(i = 0; i < n; i++) | |
1049 | def->sorted_args[start + i] = start + i; | |
1050 | if (n <= 1) | |
1051 | return; | |
1052 | for(i = 0; i < n - 1; i++) { | |
1053 | for(j = i + 1; j < n; j++) { | |
1054 | p1 = get_constraint_priority(def, def->sorted_args[start + i]); | |
1055 | p2 = get_constraint_priority(def, def->sorted_args[start + j]); | |
1056 | if (p1 < p2) { | |
1057 | tmp = def->sorted_args[start + i]; | |
1058 | def->sorted_args[start + i] = def->sorted_args[start + j]; | |
1059 | def->sorted_args[start + j] = tmp; | |
1060 | } | |
1061 | } | |
1062 | } | |
1063 | } | |
1064 | ||
1065 | void tcg_add_target_add_op_defs(const TCGTargetOpDef *tdefs) | |
1066 | { | |
a9751609 | 1067 | TCGOpcode op; |
c896fe29 FB |
1068 | TCGOpDef *def; |
1069 | const char *ct_str; | |
1070 | int i, nb_args; | |
1071 | ||
1072 | for(;;) { | |
a9751609 | 1073 | if (tdefs->op == (TCGOpcode)-1) |
c896fe29 FB |
1074 | break; |
1075 | op = tdefs->op; | |
c3b08d0e | 1076 | assert((unsigned)op < NB_OPS); |
c896fe29 | 1077 | def = &tcg_op_defs[op]; |
c68aaa18 SW |
1078 | #if defined(CONFIG_DEBUG_TCG) |
1079 | /* Duplicate entry in op definitions? */ | |
1080 | assert(!def->used); | |
1081 | def->used = 1; | |
1082 | #endif | |
c896fe29 FB |
1083 | nb_args = def->nb_iargs + def->nb_oargs; |
1084 | for(i = 0; i < nb_args; i++) { | |
1085 | ct_str = tdefs->args_ct_str[i]; | |
c68aaa18 SW |
1086 | /* Incomplete TCGTargetOpDef entry? */ |
1087 | assert(ct_str != NULL); | |
c896fe29 FB |
1088 | tcg_regset_clear(def->args_ct[i].u.regs); |
1089 | def->args_ct[i].ct = 0; | |
1090 | if (ct_str[0] >= '0' && ct_str[0] <= '9') { | |
1091 | int oarg; | |
1092 | oarg = ct_str[0] - '0'; | |
1093 | assert(oarg < def->nb_oargs); | |
1094 | assert(def->args_ct[oarg].ct & TCG_CT_REG); | |
1095 | /* TCG_CT_ALIAS is for the output arguments. The input | |
5ff9d6a4 | 1096 | argument is tagged with TCG_CT_IALIAS. */ |
c896fe29 | 1097 | def->args_ct[i] = def->args_ct[oarg]; |
5ff9d6a4 FB |
1098 | def->args_ct[oarg].ct = TCG_CT_ALIAS; |
1099 | def->args_ct[oarg].alias_index = i; | |
c896fe29 | 1100 | def->args_ct[i].ct |= TCG_CT_IALIAS; |
5ff9d6a4 | 1101 | def->args_ct[i].alias_index = oarg; |
c896fe29 FB |
1102 | } else { |
1103 | for(;;) { | |
1104 | if (*ct_str == '\0') | |
1105 | break; | |
1106 | switch(*ct_str) { | |
1107 | case 'i': | |
1108 | def->args_ct[i].ct |= TCG_CT_CONST; | |
1109 | ct_str++; | |
1110 | break; | |
1111 | default: | |
1112 | if (target_parse_constraint(&def->args_ct[i], &ct_str) < 0) { | |
1113 | fprintf(stderr, "Invalid constraint '%s' for arg %d of operation '%s'\n", | |
1114 | ct_str, i, def->name); | |
1115 | exit(1); | |
1116 | } | |
1117 | } | |
1118 | } | |
1119 | } | |
1120 | } | |
1121 | ||
c68aaa18 SW |
1122 | /* TCGTargetOpDef entry with too much information? */ |
1123 | assert(i == TCG_MAX_OP_ARGS || tdefs->args_ct_str[i] == NULL); | |
1124 | ||
c896fe29 FB |
1125 | /* sort the constraints (XXX: this is just an heuristic) */ |
1126 | sort_constraints(def, 0, def->nb_oargs); | |
1127 | sort_constraints(def, def->nb_oargs, def->nb_iargs); | |
1128 | ||
1129 | #if 0 | |
1130 | { | |
1131 | int i; | |
1132 | ||
1133 | printf("%s: sorted=", def->name); | |
1134 | for(i = 0; i < def->nb_oargs + def->nb_iargs; i++) | |
1135 | printf(" %d", def->sorted_args[i]); | |
1136 | printf("\n"); | |
1137 | } | |
1138 | #endif | |
1139 | tdefs++; | |
1140 | } | |
1141 | ||
c68aaa18 | 1142 | #if defined(CONFIG_DEBUG_TCG) |
a9751609 | 1143 | i = 0; |
c68aaa18 | 1144 | for (op = 0; op < ARRAY_SIZE(tcg_op_defs); op++) { |
f412c762 RH |
1145 | const TCGOpDef *def = &tcg_op_defs[op]; |
1146 | if (op < INDEX_op_call | |
1147 | || op == INDEX_op_debug_insn_start | |
1148 | || (def->flags & TCG_OPF_NOT_PRESENT)) { | |
c68aaa18 | 1149 | /* Wrong entry in op definitions? */ |
f412c762 RH |
1150 | if (def->used) { |
1151 | fprintf(stderr, "Invalid op definition for %s\n", def->name); | |
a9751609 RH |
1152 | i = 1; |
1153 | } | |
c68aaa18 SW |
1154 | } else { |
1155 | /* Missing entry in op definitions? */ | |
f412c762 RH |
1156 | if (!def->used) { |
1157 | fprintf(stderr, "Missing op definition for %s\n", def->name); | |
a9751609 RH |
1158 | i = 1; |
1159 | } | |
c68aaa18 SW |
1160 | } |
1161 | } | |
a9751609 RH |
1162 | if (i == 1) { |
1163 | tcg_abort(); | |
1164 | } | |
c68aaa18 | 1165 | #endif |
c896fe29 FB |
1166 | } |
1167 | ||
1168 | #ifdef USE_LIVENESS_ANALYSIS | |
1169 | ||
1170 | /* set a nop for an operation using 'nb_args' */ | |
1171 | static inline void tcg_set_nop(TCGContext *s, uint16_t *opc_ptr, | |
1172 | TCGArg *args, int nb_args) | |
1173 | { | |
1174 | if (nb_args == 0) { | |
1175 | *opc_ptr = INDEX_op_nop; | |
1176 | } else { | |
1177 | *opc_ptr = INDEX_op_nopn; | |
1178 | args[0] = nb_args; | |
1179 | args[nb_args - 1] = nb_args; | |
1180 | } | |
1181 | } | |
1182 | ||
641d5fbe FB |
1183 | /* liveness analysis: end of function: globals are live, temps are |
1184 | dead. */ | |
1185 | /* XXX: at this stage, not used as there would be little gains because | |
1186 | most TBs end with a conditional jump. */ | |
1187 | static inline void tcg_la_func_end(TCGContext *s, uint8_t *dead_temps) | |
c896fe29 FB |
1188 | { |
1189 | memset(dead_temps, 0, s->nb_globals); | |
1190 | memset(dead_temps + s->nb_globals, 1, s->nb_temps - s->nb_globals); | |
1191 | } | |
1192 | ||
641d5fbe FB |
1193 | /* liveness analysis: end of basic block: globals are live, temps are |
1194 | dead, local temps are live. */ | |
1195 | static inline void tcg_la_bb_end(TCGContext *s, uint8_t *dead_temps) | |
1196 | { | |
1197 | int i; | |
1198 | TCGTemp *ts; | |
1199 | ||
1200 | memset(dead_temps, 0, s->nb_globals); | |
1201 | ts = &s->temps[s->nb_globals]; | |
1202 | for(i = s->nb_globals; i < s->nb_temps; i++) { | |
1203 | if (ts->temp_local) | |
1204 | dead_temps[i] = 0; | |
1205 | else | |
1206 | dead_temps[i] = 1; | |
1207 | ts++; | |
1208 | } | |
1209 | } | |
1210 | ||
866cb6cb | 1211 | /* Liveness analysis : update the opc_dead_args array to tell if a |
c896fe29 FB |
1212 | given input arguments is dead. Instructions updating dead |
1213 | temporaries are removed. */ | |
8fcd3692 | 1214 | static void tcg_liveness_analysis(TCGContext *s) |
c896fe29 | 1215 | { |
a9751609 RH |
1216 | int i, op_index, nb_args, nb_iargs, nb_oargs, arg, nb_ops; |
1217 | TCGOpcode op; | |
c896fe29 FB |
1218 | TCGArg *args; |
1219 | const TCGOpDef *def; | |
1220 | uint8_t *dead_temps; | |
866cb6cb | 1221 | unsigned int dead_args; |
c896fe29 FB |
1222 | |
1223 | gen_opc_ptr++; /* skip end */ | |
1224 | ||
1225 | nb_ops = gen_opc_ptr - gen_opc_buf; | |
1226 | ||
866cb6cb | 1227 | s->op_dead_args = tcg_malloc(nb_ops * sizeof(uint16_t)); |
c896fe29 FB |
1228 | |
1229 | dead_temps = tcg_malloc(s->nb_temps); | |
1230 | memset(dead_temps, 1, s->nb_temps); | |
1231 | ||
1232 | args = gen_opparam_ptr; | |
1233 | op_index = nb_ops - 1; | |
1234 | while (op_index >= 0) { | |
1235 | op = gen_opc_buf[op_index]; | |
1236 | def = &tcg_op_defs[op]; | |
1237 | switch(op) { | |
1238 | case INDEX_op_call: | |
c6e113f5 FB |
1239 | { |
1240 | int call_flags; | |
c896fe29 | 1241 | |
c6e113f5 FB |
1242 | nb_args = args[-1]; |
1243 | args -= nb_args; | |
1244 | nb_iargs = args[0] & 0xffff; | |
1245 | nb_oargs = args[0] >> 16; | |
1246 | args++; | |
1247 | call_flags = args[nb_oargs + nb_iargs]; | |
1248 | ||
1249 | /* pure functions can be removed if their result is not | |
1250 | used */ | |
1251 | if (call_flags & TCG_CALL_PURE) { | |
1252 | for(i = 0; i < nb_oargs; i++) { | |
1253 | arg = args[i]; | |
1254 | if (!dead_temps[arg]) | |
1255 | goto do_not_remove_call; | |
1256 | } | |
1257 | tcg_set_nop(s, gen_opc_buf + op_index, | |
1258 | args - 1, nb_args); | |
1259 | } else { | |
1260 | do_not_remove_call: | |
c896fe29 | 1261 | |
c6e113f5 | 1262 | /* output args are dead */ |
6b64b624 | 1263 | dead_args = 0; |
c6e113f5 FB |
1264 | for(i = 0; i < nb_oargs; i++) { |
1265 | arg = args[i]; | |
6b64b624 AJ |
1266 | if (dead_temps[arg]) { |
1267 | dead_args |= (1 << i); | |
1268 | } | |
c6e113f5 FB |
1269 | dead_temps[arg] = 1; |
1270 | } | |
1271 | ||
b9c18f56 AJ |
1272 | if (!(call_flags & TCG_CALL_CONST)) { |
1273 | /* globals are live (they may be used by the call) */ | |
1274 | memset(dead_temps, 0, s->nb_globals); | |
1275 | } | |
1276 | ||
c6e113f5 | 1277 | /* input args are live */ |
866cb6cb AJ |
1278 | for(i = nb_oargs; i < nb_iargs + nb_oargs; i++) { |
1279 | arg = args[i]; | |
39cf05d3 FB |
1280 | if (arg != TCG_CALL_DUMMY_ARG) { |
1281 | if (dead_temps[arg]) { | |
866cb6cb | 1282 | dead_args |= (1 << i); |
39cf05d3 FB |
1283 | } |
1284 | dead_temps[arg] = 0; | |
c6e113f5 | 1285 | } |
c6e113f5 | 1286 | } |
866cb6cb | 1287 | s->op_dead_args[op_index] = dead_args; |
c896fe29 | 1288 | } |
c6e113f5 | 1289 | args--; |
c896fe29 | 1290 | } |
c896fe29 | 1291 | break; |
7e4597d7 FB |
1292 | case INDEX_op_debug_insn_start: |
1293 | args -= def->nb_args; | |
1294 | break; | |
c896fe29 FB |
1295 | case INDEX_op_nopn: |
1296 | nb_args = args[-1]; | |
1297 | args -= nb_args; | |
1298 | break; | |
5ff9d6a4 FB |
1299 | case INDEX_op_discard: |
1300 | args--; | |
1301 | /* mark the temporary as dead */ | |
1302 | dead_temps[args[0]] = 1; | |
1303 | break; | |
c896fe29 FB |
1304 | case INDEX_op_end: |
1305 | break; | |
1305c451 RH |
1306 | |
1307 | case INDEX_op_add2_i32: | |
1308 | case INDEX_op_sub2_i32: | |
1309 | args -= 6; | |
1310 | nb_iargs = 4; | |
1311 | nb_oargs = 2; | |
1312 | /* Test if the high part of the operation is dead, but not | |
1313 | the low part. The result can be optimized to a simple | |
1314 | add or sub. This happens often for x86_64 guest when the | |
1315 | cpu mode is set to 32 bit. */ | |
1316 | if (dead_temps[args[1]]) { | |
1317 | if (dead_temps[args[0]]) { | |
1318 | goto do_remove; | |
1319 | } | |
1320 | /* Create the single operation plus nop. */ | |
1321 | if (op == INDEX_op_add2_i32) { | |
1322 | op = INDEX_op_add_i32; | |
1323 | } else { | |
1324 | op = INDEX_op_sub_i32; | |
1325 | } | |
1326 | gen_opc_buf[op_index] = op; | |
1327 | args[1] = args[2]; | |
1328 | args[2] = args[4]; | |
1329 | assert(gen_opc_buf[op_index + 1] == INDEX_op_nop); | |
1330 | tcg_set_nop(s, gen_opc_buf + op_index + 1, args + 3, 3); | |
1331 | /* Fall through and mark the single-word operation live. */ | |
1332 | nb_iargs = 2; | |
1333 | nb_oargs = 1; | |
1334 | } | |
1335 | goto do_not_remove; | |
1336 | ||
1414968a RH |
1337 | case INDEX_op_mulu2_i32: |
1338 | args -= 4; | |
1339 | nb_iargs = 2; | |
1340 | nb_oargs = 2; | |
1341 | /* Likewise, test for the high part of the operation dead. */ | |
1342 | if (dead_temps[args[1]]) { | |
1343 | if (dead_temps[args[0]]) { | |
1344 | goto do_remove; | |
1345 | } | |
1346 | gen_opc_buf[op_index] = op = INDEX_op_mul_i32; | |
1347 | args[1] = args[2]; | |
1348 | args[2] = args[3]; | |
1349 | assert(gen_opc_buf[op_index + 1] == INDEX_op_nop); | |
1350 | tcg_set_nop(s, gen_opc_buf + op_index + 1, args + 3, 1); | |
1351 | /* Fall through and mark the single-word operation live. */ | |
1352 | nb_oargs = 1; | |
1353 | } | |
1354 | goto do_not_remove; | |
1355 | ||
c896fe29 | 1356 | default: |
1305c451 | 1357 | /* XXX: optimize by hardcoding common cases (e.g. triadic ops) */ |
49516bc0 AJ |
1358 | args -= def->nb_args; |
1359 | nb_iargs = def->nb_iargs; | |
1360 | nb_oargs = def->nb_oargs; | |
c896fe29 | 1361 | |
49516bc0 AJ |
1362 | /* Test if the operation can be removed because all |
1363 | its outputs are dead. We assume that nb_oargs == 0 | |
1364 | implies side effects */ | |
1365 | if (!(def->flags & TCG_OPF_SIDE_EFFECTS) && nb_oargs != 0) { | |
1366 | for(i = 0; i < nb_oargs; i++) { | |
1367 | arg = args[i]; | |
1368 | if (!dead_temps[arg]) | |
1369 | goto do_not_remove; | |
1370 | } | |
1305c451 | 1371 | do_remove: |
49516bc0 | 1372 | tcg_set_nop(s, gen_opc_buf + op_index, args, def->nb_args); |
c896fe29 | 1373 | #ifdef CONFIG_PROFILER |
49516bc0 | 1374 | s->del_op_count++; |
c896fe29 | 1375 | #endif |
49516bc0 AJ |
1376 | } else { |
1377 | do_not_remove: | |
c896fe29 | 1378 | |
49516bc0 | 1379 | /* output args are dead */ |
6b64b624 | 1380 | dead_args = 0; |
49516bc0 AJ |
1381 | for(i = 0; i < nb_oargs; i++) { |
1382 | arg = args[i]; | |
6b64b624 AJ |
1383 | if (dead_temps[arg]) { |
1384 | dead_args |= (1 << i); | |
1385 | } | |
49516bc0 AJ |
1386 | dead_temps[arg] = 1; |
1387 | } | |
1388 | ||
1389 | /* if end of basic block, update */ | |
1390 | if (def->flags & TCG_OPF_BB_END) { | |
1391 | tcg_la_bb_end(s, dead_temps); | |
1392 | } else if (def->flags & TCG_OPF_CALL_CLOBBER) { | |
1393 | /* globals are live */ | |
1394 | memset(dead_temps, 0, s->nb_globals); | |
1395 | } | |
1396 | ||
1397 | /* input args are live */ | |
866cb6cb AJ |
1398 | for(i = nb_oargs; i < nb_oargs + nb_iargs; i++) { |
1399 | arg = args[i]; | |
49516bc0 | 1400 | if (dead_temps[arg]) { |
866cb6cb | 1401 | dead_args |= (1 << i); |
c896fe29 | 1402 | } |
49516bc0 | 1403 | dead_temps[arg] = 0; |
c896fe29 | 1404 | } |
866cb6cb | 1405 | s->op_dead_args[op_index] = dead_args; |
c896fe29 FB |
1406 | } |
1407 | break; | |
1408 | } | |
1409 | op_index--; | |
1410 | } | |
1411 | ||
1412 | if (args != gen_opparam_buf) | |
1413 | tcg_abort(); | |
1414 | } | |
1415 | #else | |
1416 | /* dummy liveness analysis */ | |
655feed5 | 1417 | static void tcg_liveness_analysis(TCGContext *s) |
c896fe29 FB |
1418 | { |
1419 | int nb_ops; | |
1420 | nb_ops = gen_opc_ptr - gen_opc_buf; | |
1421 | ||
866cb6cb AJ |
1422 | s->op_dead_args = tcg_malloc(nb_ops * sizeof(uint16_t)); |
1423 | memset(s->op_dead_args, 0, nb_ops * sizeof(uint16_t)); | |
c896fe29 FB |
1424 | } |
1425 | #endif | |
1426 | ||
1427 | #ifndef NDEBUG | |
1428 | static void dump_regs(TCGContext *s) | |
1429 | { | |
1430 | TCGTemp *ts; | |
1431 | int i; | |
1432 | char buf[64]; | |
1433 | ||
1434 | for(i = 0; i < s->nb_temps; i++) { | |
1435 | ts = &s->temps[i]; | |
ac56dd48 | 1436 | printf(" %10s: ", tcg_get_arg_str_idx(s, buf, sizeof(buf), i)); |
c896fe29 FB |
1437 | switch(ts->val_type) { |
1438 | case TEMP_VAL_REG: | |
1439 | printf("%s", tcg_target_reg_names[ts->reg]); | |
1440 | break; | |
1441 | case TEMP_VAL_MEM: | |
1442 | printf("%d(%s)", (int)ts->mem_offset, tcg_target_reg_names[ts->mem_reg]); | |
1443 | break; | |
1444 | case TEMP_VAL_CONST: | |
1445 | printf("$0x%" TCG_PRIlx, ts->val); | |
1446 | break; | |
1447 | case TEMP_VAL_DEAD: | |
1448 | printf("D"); | |
1449 | break; | |
1450 | default: | |
1451 | printf("???"); | |
1452 | break; | |
1453 | } | |
1454 | printf("\n"); | |
1455 | } | |
1456 | ||
1457 | for(i = 0; i < TCG_TARGET_NB_REGS; i++) { | |
1458 | if (s->reg_to_temp[i] >= 0) { | |
1459 | printf("%s: %s\n", | |
1460 | tcg_target_reg_names[i], | |
ac56dd48 | 1461 | tcg_get_arg_str_idx(s, buf, sizeof(buf), s->reg_to_temp[i])); |
c896fe29 FB |
1462 | } |
1463 | } | |
1464 | } | |
1465 | ||
1466 | static void check_regs(TCGContext *s) | |
1467 | { | |
1468 | int reg, k; | |
1469 | TCGTemp *ts; | |
1470 | char buf[64]; | |
1471 | ||
1472 | for(reg = 0; reg < TCG_TARGET_NB_REGS; reg++) { | |
1473 | k = s->reg_to_temp[reg]; | |
1474 | if (k >= 0) { | |
1475 | ts = &s->temps[k]; | |
1476 | if (ts->val_type != TEMP_VAL_REG || | |
1477 | ts->reg != reg) { | |
1478 | printf("Inconsistency for register %s:\n", | |
1479 | tcg_target_reg_names[reg]); | |
b03cce8e | 1480 | goto fail; |
c896fe29 FB |
1481 | } |
1482 | } | |
1483 | } | |
1484 | for(k = 0; k < s->nb_temps; k++) { | |
1485 | ts = &s->temps[k]; | |
1486 | if (ts->val_type == TEMP_VAL_REG && | |
1487 | !ts->fixed_reg && | |
1488 | s->reg_to_temp[ts->reg] != k) { | |
1489 | printf("Inconsistency for temp %s:\n", | |
ac56dd48 | 1490 | tcg_get_arg_str_idx(s, buf, sizeof(buf), k)); |
b03cce8e | 1491 | fail: |
c896fe29 FB |
1492 | printf("reg state:\n"); |
1493 | dump_regs(s); | |
1494 | tcg_abort(); | |
1495 | } | |
1496 | } | |
1497 | } | |
1498 | #endif | |
1499 | ||
1500 | static void temp_allocate_frame(TCGContext *s, int temp) | |
1501 | { | |
1502 | TCGTemp *ts; | |
1503 | ts = &s->temps[temp]; | |
9b9c37c3 RH |
1504 | #if !(defined(__sparc__) && TCG_TARGET_REG_BITS == 64) |
1505 | /* Sparc64 stack is accessed with offset of 2047 */ | |
b591dc59 BS |
1506 | s->current_frame_offset = (s->current_frame_offset + |
1507 | (tcg_target_long)sizeof(tcg_target_long) - 1) & | |
1508 | ~(sizeof(tcg_target_long) - 1); | |
f44c9960 | 1509 | #endif |
b591dc59 BS |
1510 | if (s->current_frame_offset + (tcg_target_long)sizeof(tcg_target_long) > |
1511 | s->frame_end) { | |
5ff9d6a4 | 1512 | tcg_abort(); |
b591dc59 | 1513 | } |
c896fe29 FB |
1514 | ts->mem_offset = s->current_frame_offset; |
1515 | ts->mem_reg = s->frame_reg; | |
1516 | ts->mem_allocated = 1; | |
b591dc59 | 1517 | s->current_frame_offset += (tcg_target_long)sizeof(tcg_target_long); |
c896fe29 FB |
1518 | } |
1519 | ||
1520 | /* free register 'reg' by spilling the corresponding temporary if necessary */ | |
1521 | static void tcg_reg_free(TCGContext *s, int reg) | |
1522 | { | |
1523 | TCGTemp *ts; | |
1524 | int temp; | |
1525 | ||
1526 | temp = s->reg_to_temp[reg]; | |
1527 | if (temp != -1) { | |
1528 | ts = &s->temps[temp]; | |
1529 | assert(ts->val_type == TEMP_VAL_REG); | |
1530 | if (!ts->mem_coherent) { | |
1531 | if (!ts->mem_allocated) | |
1532 | temp_allocate_frame(s, temp); | |
e4d5434c | 1533 | tcg_out_st(s, ts->type, reg, ts->mem_reg, ts->mem_offset); |
c896fe29 FB |
1534 | } |
1535 | ts->val_type = TEMP_VAL_MEM; | |
1536 | s->reg_to_temp[reg] = -1; | |
1537 | } | |
1538 | } | |
1539 | ||
1540 | /* Allocate a register belonging to reg1 & ~reg2 */ | |
1541 | static int tcg_reg_alloc(TCGContext *s, TCGRegSet reg1, TCGRegSet reg2) | |
1542 | { | |
1543 | int i, reg; | |
1544 | TCGRegSet reg_ct; | |
1545 | ||
1546 | tcg_regset_andnot(reg_ct, reg1, reg2); | |
1547 | ||
1548 | /* first try free registers */ | |
0954d0d9 | 1549 | for(i = 0; i < ARRAY_SIZE(tcg_target_reg_alloc_order); i++) { |
c896fe29 FB |
1550 | reg = tcg_target_reg_alloc_order[i]; |
1551 | if (tcg_regset_test_reg(reg_ct, reg) && s->reg_to_temp[reg] == -1) | |
1552 | return reg; | |
1553 | } | |
1554 | ||
1555 | /* XXX: do better spill choice */ | |
0954d0d9 | 1556 | for(i = 0; i < ARRAY_SIZE(tcg_target_reg_alloc_order); i++) { |
c896fe29 FB |
1557 | reg = tcg_target_reg_alloc_order[i]; |
1558 | if (tcg_regset_test_reg(reg_ct, reg)) { | |
1559 | tcg_reg_free(s, reg); | |
1560 | return reg; | |
1561 | } | |
1562 | } | |
1563 | ||
1564 | tcg_abort(); | |
1565 | } | |
1566 | ||
639368dd AJ |
1567 | /* mark a temporary as dead. */ |
1568 | static inline void temp_dead(TCGContext *s, int temp) | |
1569 | { | |
1570 | TCGTemp *ts; | |
1571 | ||
1572 | ts = &s->temps[temp]; | |
1573 | if (!ts->fixed_reg) { | |
1574 | if (ts->val_type == TEMP_VAL_REG) { | |
1575 | s->reg_to_temp[ts->reg] = -1; | |
1576 | } | |
1577 | if (temp < s->nb_globals || (ts->temp_local && ts->mem_allocated)) { | |
1578 | ts->val_type = TEMP_VAL_MEM; | |
1579 | } else { | |
1580 | ts->val_type = TEMP_VAL_DEAD; | |
1581 | } | |
1582 | } | |
1583 | } | |
1584 | ||
641d5fbe FB |
1585 | /* save a temporary to memory. 'allocated_regs' is used in case a |
1586 | temporary registers needs to be allocated to store a constant. */ | |
1587 | static void temp_save(TCGContext *s, int temp, TCGRegSet allocated_regs) | |
1588 | { | |
1589 | TCGTemp *ts; | |
1590 | int reg; | |
1591 | ||
1592 | ts = &s->temps[temp]; | |
1593 | if (!ts->fixed_reg) { | |
1594 | switch(ts->val_type) { | |
1595 | case TEMP_VAL_REG: | |
1596 | tcg_reg_free(s, ts->reg); | |
1597 | break; | |
1598 | case TEMP_VAL_DEAD: | |
1599 | ts->val_type = TEMP_VAL_MEM; | |
1600 | break; | |
1601 | case TEMP_VAL_CONST: | |
d6859202 AJ |
1602 | reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type], |
1603 | allocated_regs); | |
641d5fbe FB |
1604 | if (!ts->mem_allocated) |
1605 | temp_allocate_frame(s, temp); | |
d6859202 AJ |
1606 | tcg_out_movi(s, ts->type, reg, ts->val); |
1607 | tcg_out_st(s, ts->type, reg, ts->mem_reg, ts->mem_offset); | |
641d5fbe FB |
1608 | ts->val_type = TEMP_VAL_MEM; |
1609 | break; | |
1610 | case TEMP_VAL_MEM: | |
1611 | break; | |
1612 | default: | |
1613 | tcg_abort(); | |
1614 | } | |
1615 | } | |
1616 | } | |
1617 | ||
9814dd27 | 1618 | /* save globals to their canonical location and assume they can be |
e8996ee0 FB |
1619 | modified be the following code. 'allocated_regs' is used in case a |
1620 | temporary registers needs to be allocated to store a constant. */ | |
1621 | static void save_globals(TCGContext *s, TCGRegSet allocated_regs) | |
c896fe29 | 1622 | { |
641d5fbe | 1623 | int i; |
c896fe29 FB |
1624 | |
1625 | for(i = 0; i < s->nb_globals; i++) { | |
641d5fbe | 1626 | temp_save(s, i, allocated_regs); |
c896fe29 | 1627 | } |
e5097dc8 FB |
1628 | } |
1629 | ||
1630 | /* at the end of a basic block, we assume all temporaries are dead and | |
e8996ee0 FB |
1631 | all globals are stored at their canonical location. */ |
1632 | static void tcg_reg_alloc_bb_end(TCGContext *s, TCGRegSet allocated_regs) | |
e5097dc8 FB |
1633 | { |
1634 | TCGTemp *ts; | |
1635 | int i; | |
1636 | ||
c896fe29 FB |
1637 | for(i = s->nb_globals; i < s->nb_temps; i++) { |
1638 | ts = &s->temps[i]; | |
641d5fbe FB |
1639 | if (ts->temp_local) { |
1640 | temp_save(s, i, allocated_regs); | |
1641 | } else { | |
639368dd | 1642 | temp_dead(s, i); |
c896fe29 FB |
1643 | } |
1644 | } | |
e8996ee0 FB |
1645 | |
1646 | save_globals(s, allocated_regs); | |
c896fe29 FB |
1647 | } |
1648 | ||
866cb6cb | 1649 | #define IS_DEAD_ARG(n) ((dead_args >> (n)) & 1) |
c896fe29 | 1650 | |
e8996ee0 FB |
1651 | static void tcg_reg_alloc_movi(TCGContext *s, const TCGArg *args) |
1652 | { | |
1653 | TCGTemp *ots; | |
1654 | tcg_target_ulong val; | |
1655 | ||
1656 | ots = &s->temps[args[0]]; | |
1657 | val = args[1]; | |
1658 | ||
1659 | if (ots->fixed_reg) { | |
1660 | /* for fixed registers, we do not do any constant | |
1661 | propagation */ | |
1662 | tcg_out_movi(s, ots->type, ots->reg, val); | |
1663 | } else { | |
1235fc06 | 1664 | /* The movi is not explicitly generated here */ |
e8996ee0 FB |
1665 | if (ots->val_type == TEMP_VAL_REG) |
1666 | s->reg_to_temp[ots->reg] = -1; | |
1667 | ots->val_type = TEMP_VAL_CONST; | |
1668 | ots->val = val; | |
1669 | } | |
1670 | } | |
1671 | ||
c896fe29 FB |
1672 | static void tcg_reg_alloc_mov(TCGContext *s, const TCGOpDef *def, |
1673 | const TCGArg *args, | |
866cb6cb | 1674 | unsigned int dead_args) |
c896fe29 FB |
1675 | { |
1676 | TCGTemp *ts, *ots; | |
1677 | int reg; | |
1678 | const TCGArgConstraint *arg_ct; | |
1679 | ||
1680 | ots = &s->temps[args[0]]; | |
1681 | ts = &s->temps[args[1]]; | |
1682 | arg_ct = &def->args_ct[0]; | |
1683 | ||
866cb6cb | 1684 | /* XXX: always mark arg dead if IS_DEAD_ARG(1) */ |
c896fe29 | 1685 | if (ts->val_type == TEMP_VAL_REG) { |
866cb6cb | 1686 | if (IS_DEAD_ARG(1) && !ts->fixed_reg && !ots->fixed_reg) { |
c896fe29 FB |
1687 | /* the mov can be suppressed */ |
1688 | if (ots->val_type == TEMP_VAL_REG) | |
1689 | s->reg_to_temp[ots->reg] = -1; | |
1690 | reg = ts->reg; | |
639368dd | 1691 | temp_dead(s, args[1]); |
c896fe29 FB |
1692 | } else { |
1693 | if (ots->val_type == TEMP_VAL_REG) { | |
1694 | reg = ots->reg; | |
1695 | } else { | |
1696 | reg = tcg_reg_alloc(s, arg_ct->u.regs, s->reserved_regs); | |
1697 | } | |
1698 | if (ts->reg != reg) { | |
3b6dac34 | 1699 | tcg_out_mov(s, ots->type, reg, ts->reg); |
c896fe29 FB |
1700 | } |
1701 | } | |
1702 | } else if (ts->val_type == TEMP_VAL_MEM) { | |
1703 | if (ots->val_type == TEMP_VAL_REG) { | |
1704 | reg = ots->reg; | |
1705 | } else { | |
1706 | reg = tcg_reg_alloc(s, arg_ct->u.regs, s->reserved_regs); | |
1707 | } | |
e4d5434c | 1708 | tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset); |
c896fe29 | 1709 | } else if (ts->val_type == TEMP_VAL_CONST) { |
e8996ee0 | 1710 | if (ots->fixed_reg) { |
c896fe29 | 1711 | reg = ots->reg; |
e8996ee0 | 1712 | tcg_out_movi(s, ots->type, reg, ts->val); |
c896fe29 | 1713 | } else { |
e8996ee0 FB |
1714 | /* propagate constant */ |
1715 | if (ots->val_type == TEMP_VAL_REG) | |
1716 | s->reg_to_temp[ots->reg] = -1; | |
1717 | ots->val_type = TEMP_VAL_CONST; | |
1718 | ots->val = ts->val; | |
1719 | return; | |
c896fe29 | 1720 | } |
c896fe29 FB |
1721 | } else { |
1722 | tcg_abort(); | |
1723 | } | |
1724 | s->reg_to_temp[reg] = args[0]; | |
1725 | ots->reg = reg; | |
1726 | ots->val_type = TEMP_VAL_REG; | |
1727 | ots->mem_coherent = 0; | |
1728 | } | |
1729 | ||
1730 | static void tcg_reg_alloc_op(TCGContext *s, | |
a9751609 | 1731 | const TCGOpDef *def, TCGOpcode opc, |
c896fe29 | 1732 | const TCGArg *args, |
866cb6cb | 1733 | unsigned int dead_args) |
c896fe29 FB |
1734 | { |
1735 | TCGRegSet allocated_regs; | |
1736 | int i, k, nb_iargs, nb_oargs, reg; | |
1737 | TCGArg arg; | |
1738 | const TCGArgConstraint *arg_ct; | |
1739 | TCGTemp *ts; | |
1740 | TCGArg new_args[TCG_MAX_OP_ARGS]; | |
1741 | int const_args[TCG_MAX_OP_ARGS]; | |
1742 | ||
1743 | nb_oargs = def->nb_oargs; | |
1744 | nb_iargs = def->nb_iargs; | |
1745 | ||
1746 | /* copy constants */ | |
1747 | memcpy(new_args + nb_oargs + nb_iargs, | |
1748 | args + nb_oargs + nb_iargs, | |
1749 | sizeof(TCGArg) * def->nb_cargs); | |
1750 | ||
1751 | /* satisfy input constraints */ | |
1752 | tcg_regset_set(allocated_regs, s->reserved_regs); | |
1753 | for(k = 0; k < nb_iargs; k++) { | |
1754 | i = def->sorted_args[nb_oargs + k]; | |
1755 | arg = args[i]; | |
1756 | arg_ct = &def->args_ct[i]; | |
1757 | ts = &s->temps[arg]; | |
1758 | if (ts->val_type == TEMP_VAL_MEM) { | |
1759 | reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs); | |
e4d5434c | 1760 | tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset); |
c896fe29 FB |
1761 | ts->val_type = TEMP_VAL_REG; |
1762 | ts->reg = reg; | |
1763 | ts->mem_coherent = 1; | |
1764 | s->reg_to_temp[reg] = arg; | |
1765 | } else if (ts->val_type == TEMP_VAL_CONST) { | |
1766 | if (tcg_target_const_match(ts->val, arg_ct)) { | |
1767 | /* constant is OK for instruction */ | |
1768 | const_args[i] = 1; | |
1769 | new_args[i] = ts->val; | |
1770 | goto iarg_end; | |
1771 | } else { | |
e8996ee0 | 1772 | /* need to move to a register */ |
c896fe29 FB |
1773 | reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs); |
1774 | tcg_out_movi(s, ts->type, reg, ts->val); | |
e8996ee0 FB |
1775 | ts->val_type = TEMP_VAL_REG; |
1776 | ts->reg = reg; | |
1777 | ts->mem_coherent = 0; | |
1778 | s->reg_to_temp[reg] = arg; | |
c896fe29 FB |
1779 | } |
1780 | } | |
1781 | assert(ts->val_type == TEMP_VAL_REG); | |
5ff9d6a4 FB |
1782 | if (arg_ct->ct & TCG_CT_IALIAS) { |
1783 | if (ts->fixed_reg) { | |
1784 | /* if fixed register, we must allocate a new register | |
1785 | if the alias is not the same register */ | |
1786 | if (arg != args[arg_ct->alias_index]) | |
1787 | goto allocate_in_reg; | |
1788 | } else { | |
1789 | /* if the input is aliased to an output and if it is | |
1790 | not dead after the instruction, we must allocate | |
1791 | a new register and move it */ | |
866cb6cb | 1792 | if (!IS_DEAD_ARG(i)) { |
5ff9d6a4 | 1793 | goto allocate_in_reg; |
866cb6cb | 1794 | } |
5ff9d6a4 | 1795 | } |
c896fe29 FB |
1796 | } |
1797 | reg = ts->reg; | |
1798 | if (tcg_regset_test_reg(arg_ct->u.regs, reg)) { | |
1799 | /* nothing to do : the constraint is satisfied */ | |
1800 | } else { | |
1801 | allocate_in_reg: | |
1802 | /* allocate a new register matching the constraint | |
1803 | and move the temporary register into it */ | |
1804 | reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs); | |
3b6dac34 | 1805 | tcg_out_mov(s, ts->type, reg, ts->reg); |
c896fe29 | 1806 | } |
c896fe29 FB |
1807 | new_args[i] = reg; |
1808 | const_args[i] = 0; | |
1809 | tcg_regset_set_reg(allocated_regs, reg); | |
1810 | iarg_end: ; | |
1811 | } | |
1812 | ||
e8996ee0 FB |
1813 | if (def->flags & TCG_OPF_BB_END) { |
1814 | tcg_reg_alloc_bb_end(s, allocated_regs); | |
1815 | } else { | |
1816 | /* mark dead temporaries and free the associated registers */ | |
866cb6cb | 1817 | for(i = nb_oargs; i < nb_oargs + nb_iargs; i++) { |
866cb6cb | 1818 | if (IS_DEAD_ARG(i)) { |
639368dd | 1819 | temp_dead(s, args[i]); |
c896fe29 FB |
1820 | } |
1821 | } | |
e8996ee0 FB |
1822 | |
1823 | if (def->flags & TCG_OPF_CALL_CLOBBER) { | |
1824 | /* XXX: permit generic clobber register list ? */ | |
1825 | for(reg = 0; reg < TCG_TARGET_NB_REGS; reg++) { | |
1826 | if (tcg_regset_test_reg(tcg_target_call_clobber_regs, reg)) { | |
1827 | tcg_reg_free(s, reg); | |
1828 | } | |
c896fe29 | 1829 | } |
e8996ee0 FB |
1830 | /* XXX: for load/store we could do that only for the slow path |
1831 | (i.e. when a memory callback is called) */ | |
1832 | ||
1833 | /* store globals and free associated registers (we assume the insn | |
1834 | can modify any global. */ | |
1835 | save_globals(s, allocated_regs); | |
c896fe29 | 1836 | } |
e8996ee0 FB |
1837 | |
1838 | /* satisfy the output constraints */ | |
1839 | tcg_regset_set(allocated_regs, s->reserved_regs); | |
1840 | for(k = 0; k < nb_oargs; k++) { | |
1841 | i = def->sorted_args[k]; | |
1842 | arg = args[i]; | |
1843 | arg_ct = &def->args_ct[i]; | |
1844 | ts = &s->temps[arg]; | |
1845 | if (arg_ct->ct & TCG_CT_ALIAS) { | |
1846 | reg = new_args[arg_ct->alias_index]; | |
1847 | } else { | |
1848 | /* if fixed register, we try to use it */ | |
1849 | reg = ts->reg; | |
1850 | if (ts->fixed_reg && | |
1851 | tcg_regset_test_reg(arg_ct->u.regs, reg)) { | |
1852 | goto oarg_end; | |
1853 | } | |
1854 | reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs); | |
c896fe29 | 1855 | } |
e8996ee0 FB |
1856 | tcg_regset_set_reg(allocated_regs, reg); |
1857 | /* if a fixed register is used, then a move will be done afterwards */ | |
1858 | if (!ts->fixed_reg) { | |
8c11ad25 | 1859 | if (IS_DEAD_ARG(i)) { |
639368dd | 1860 | temp_dead(s, args[i]); |
8c11ad25 | 1861 | } else { |
639368dd AJ |
1862 | if (ts->val_type == TEMP_VAL_REG) { |
1863 | s->reg_to_temp[ts->reg] = -1; | |
1864 | } | |
8c11ad25 AJ |
1865 | ts->val_type = TEMP_VAL_REG; |
1866 | ts->reg = reg; | |
1867 | /* temp value is modified, so the value kept in memory is | |
1868 | potentially not the same */ | |
1869 | ts->mem_coherent = 0; | |
1870 | s->reg_to_temp[reg] = arg; | |
1871 | } | |
e8996ee0 FB |
1872 | } |
1873 | oarg_end: | |
1874 | new_args[i] = reg; | |
c896fe29 | 1875 | } |
c896fe29 FB |
1876 | } |
1877 | ||
c896fe29 FB |
1878 | /* emit instruction */ |
1879 | tcg_out_op(s, opc, new_args, const_args); | |
1880 | ||
1881 | /* move the outputs in the correct register if needed */ | |
1882 | for(i = 0; i < nb_oargs; i++) { | |
1883 | ts = &s->temps[args[i]]; | |
1884 | reg = new_args[i]; | |
1885 | if (ts->fixed_reg && ts->reg != reg) { | |
3b6dac34 | 1886 | tcg_out_mov(s, ts->type, ts->reg, reg); |
c896fe29 FB |
1887 | } |
1888 | } | |
1889 | } | |
1890 | ||
b03cce8e FB |
1891 | #ifdef TCG_TARGET_STACK_GROWSUP |
1892 | #define STACK_DIR(x) (-(x)) | |
1893 | #else | |
1894 | #define STACK_DIR(x) (x) | |
1895 | #endif | |
1896 | ||
c896fe29 | 1897 | static int tcg_reg_alloc_call(TCGContext *s, const TCGOpDef *def, |
a9751609 | 1898 | TCGOpcode opc, const TCGArg *args, |
866cb6cb | 1899 | unsigned int dead_args) |
c896fe29 FB |
1900 | { |
1901 | int nb_iargs, nb_oargs, flags, nb_regs, i, reg, nb_params; | |
1902 | TCGArg arg, func_arg; | |
1903 | TCGTemp *ts; | |
f54b3f92 | 1904 | tcg_target_long stack_offset, call_stack_size, func_addr; |
b03cce8e | 1905 | int const_func_arg, allocate_args; |
c896fe29 FB |
1906 | TCGRegSet allocated_regs; |
1907 | const TCGArgConstraint *arg_ct; | |
1908 | ||
1909 | arg = *args++; | |
1910 | ||
1911 | nb_oargs = arg >> 16; | |
1912 | nb_iargs = arg & 0xffff; | |
1913 | nb_params = nb_iargs - 1; | |
1914 | ||
1915 | flags = args[nb_oargs + nb_iargs]; | |
1916 | ||
6e17d0c5 | 1917 | nb_regs = ARRAY_SIZE(tcg_target_call_iarg_regs); |
c896fe29 FB |
1918 | if (nb_regs > nb_params) |
1919 | nb_regs = nb_params; | |
1920 | ||
1921 | /* assign stack slots first */ | |
c896fe29 FB |
1922 | call_stack_size = (nb_params - nb_regs) * sizeof(tcg_target_long); |
1923 | call_stack_size = (call_stack_size + TCG_TARGET_STACK_ALIGN - 1) & | |
1924 | ~(TCG_TARGET_STACK_ALIGN - 1); | |
b03cce8e FB |
1925 | allocate_args = (call_stack_size > TCG_STATIC_CALL_ARGS_SIZE); |
1926 | if (allocate_args) { | |
345649c0 BS |
1927 | /* XXX: if more than TCG_STATIC_CALL_ARGS_SIZE is needed, |
1928 | preallocate call stack */ | |
1929 | tcg_abort(); | |
b03cce8e | 1930 | } |
39cf05d3 FB |
1931 | |
1932 | stack_offset = TCG_TARGET_CALL_STACK_OFFSET; | |
c896fe29 FB |
1933 | for(i = nb_regs; i < nb_params; i++) { |
1934 | arg = args[nb_oargs + i]; | |
39cf05d3 FB |
1935 | #ifdef TCG_TARGET_STACK_GROWSUP |
1936 | stack_offset -= sizeof(tcg_target_long); | |
1937 | #endif | |
1938 | if (arg != TCG_CALL_DUMMY_ARG) { | |
1939 | ts = &s->temps[arg]; | |
1940 | if (ts->val_type == TEMP_VAL_REG) { | |
1941 | tcg_out_st(s, ts->type, ts->reg, TCG_REG_CALL_STACK, stack_offset); | |
1942 | } else if (ts->val_type == TEMP_VAL_MEM) { | |
1943 | reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type], | |
1944 | s->reserved_regs); | |
1945 | /* XXX: not correct if reading values from the stack */ | |
1946 | tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset); | |
1947 | tcg_out_st(s, ts->type, reg, TCG_REG_CALL_STACK, stack_offset); | |
1948 | } else if (ts->val_type == TEMP_VAL_CONST) { | |
1949 | reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type], | |
1950 | s->reserved_regs); | |
1951 | /* XXX: sign extend may be needed on some targets */ | |
1952 | tcg_out_movi(s, ts->type, reg, ts->val); | |
1953 | tcg_out_st(s, ts->type, reg, TCG_REG_CALL_STACK, stack_offset); | |
1954 | } else { | |
1955 | tcg_abort(); | |
1956 | } | |
c896fe29 | 1957 | } |
39cf05d3 FB |
1958 | #ifndef TCG_TARGET_STACK_GROWSUP |
1959 | stack_offset += sizeof(tcg_target_long); | |
1960 | #endif | |
c896fe29 FB |
1961 | } |
1962 | ||
1963 | /* assign input registers */ | |
1964 | tcg_regset_set(allocated_regs, s->reserved_regs); | |
1965 | for(i = 0; i < nb_regs; i++) { | |
1966 | arg = args[nb_oargs + i]; | |
39cf05d3 FB |
1967 | if (arg != TCG_CALL_DUMMY_ARG) { |
1968 | ts = &s->temps[arg]; | |
1969 | reg = tcg_target_call_iarg_regs[i]; | |
1970 | tcg_reg_free(s, reg); | |
1971 | if (ts->val_type == TEMP_VAL_REG) { | |
1972 | if (ts->reg != reg) { | |
3b6dac34 | 1973 | tcg_out_mov(s, ts->type, reg, ts->reg); |
39cf05d3 FB |
1974 | } |
1975 | } else if (ts->val_type == TEMP_VAL_MEM) { | |
1976 | tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset); | |
1977 | } else if (ts->val_type == TEMP_VAL_CONST) { | |
1978 | /* XXX: sign extend ? */ | |
1979 | tcg_out_movi(s, ts->type, reg, ts->val); | |
1980 | } else { | |
1981 | tcg_abort(); | |
c896fe29 | 1982 | } |
39cf05d3 | 1983 | tcg_regset_set_reg(allocated_regs, reg); |
c896fe29 | 1984 | } |
c896fe29 FB |
1985 | } |
1986 | ||
1987 | /* assign function address */ | |
1988 | func_arg = args[nb_oargs + nb_iargs - 1]; | |
1989 | arg_ct = &def->args_ct[0]; | |
1990 | ts = &s->temps[func_arg]; | |
f54b3f92 | 1991 | func_addr = ts->val; |
c896fe29 FB |
1992 | const_func_arg = 0; |
1993 | if (ts->val_type == TEMP_VAL_MEM) { | |
1994 | reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs); | |
e4d5434c | 1995 | tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset); |
c896fe29 | 1996 | func_arg = reg; |
e8996ee0 | 1997 | tcg_regset_set_reg(allocated_regs, reg); |
c896fe29 FB |
1998 | } else if (ts->val_type == TEMP_VAL_REG) { |
1999 | reg = ts->reg; | |
2000 | if (!tcg_regset_test_reg(arg_ct->u.regs, reg)) { | |
2001 | reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs); | |
3b6dac34 | 2002 | tcg_out_mov(s, ts->type, reg, ts->reg); |
c896fe29 FB |
2003 | } |
2004 | func_arg = reg; | |
e8996ee0 | 2005 | tcg_regset_set_reg(allocated_regs, reg); |
c896fe29 | 2006 | } else if (ts->val_type == TEMP_VAL_CONST) { |
f54b3f92 | 2007 | if (tcg_target_const_match(func_addr, arg_ct)) { |
c896fe29 | 2008 | const_func_arg = 1; |
f54b3f92 | 2009 | func_arg = func_addr; |
c896fe29 FB |
2010 | } else { |
2011 | reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs); | |
f54b3f92 | 2012 | tcg_out_movi(s, ts->type, reg, func_addr); |
c896fe29 | 2013 | func_arg = reg; |
e8996ee0 | 2014 | tcg_regset_set_reg(allocated_regs, reg); |
c896fe29 FB |
2015 | } |
2016 | } else { | |
2017 | tcg_abort(); | |
2018 | } | |
e8996ee0 | 2019 | |
c896fe29 FB |
2020 | |
2021 | /* mark dead temporaries and free the associated registers */ | |
866cb6cb | 2022 | for(i = nb_oargs; i < nb_iargs + nb_oargs; i++) { |
866cb6cb | 2023 | if (IS_DEAD_ARG(i)) { |
639368dd | 2024 | temp_dead(s, args[i]); |
c896fe29 FB |
2025 | } |
2026 | } | |
2027 | ||
2028 | /* clobber call registers */ | |
2029 | for(reg = 0; reg < TCG_TARGET_NB_REGS; reg++) { | |
2030 | if (tcg_regset_test_reg(tcg_target_call_clobber_regs, reg)) { | |
2031 | tcg_reg_free(s, reg); | |
2032 | } | |
2033 | } | |
2034 | ||
2035 | /* store globals and free associated registers (we assume the call | |
2036 | can modify any global. */ | |
b9c18f56 AJ |
2037 | if (!(flags & TCG_CALL_CONST)) { |
2038 | save_globals(s, allocated_regs); | |
2039 | } | |
c896fe29 FB |
2040 | |
2041 | tcg_out_op(s, opc, &func_arg, &const_func_arg); | |
c896fe29 FB |
2042 | |
2043 | /* assign output registers and emit moves if needed */ | |
2044 | for(i = 0; i < nb_oargs; i++) { | |
2045 | arg = args[i]; | |
2046 | ts = &s->temps[arg]; | |
2047 | reg = tcg_target_call_oarg_regs[i]; | |
e8996ee0 | 2048 | assert(s->reg_to_temp[reg] == -1); |
c896fe29 FB |
2049 | if (ts->fixed_reg) { |
2050 | if (ts->reg != reg) { | |
3b6dac34 | 2051 | tcg_out_mov(s, ts->type, ts->reg, reg); |
c896fe29 FB |
2052 | } |
2053 | } else { | |
8c11ad25 | 2054 | if (IS_DEAD_ARG(i)) { |
639368dd | 2055 | temp_dead(s, args[i]); |
8c11ad25 | 2056 | } else { |
639368dd AJ |
2057 | if (ts->val_type == TEMP_VAL_REG) { |
2058 | s->reg_to_temp[ts->reg] = -1; | |
2059 | } | |
8c11ad25 AJ |
2060 | ts->val_type = TEMP_VAL_REG; |
2061 | ts->reg = reg; | |
2062 | ts->mem_coherent = 0; | |
2063 | s->reg_to_temp[reg] = arg; | |
2064 | } | |
c896fe29 FB |
2065 | } |
2066 | } | |
2067 | ||
2068 | return nb_iargs + nb_oargs + def->nb_cargs + 1; | |
2069 | } | |
2070 | ||
2071 | #ifdef CONFIG_PROFILER | |
2072 | ||
54604f74 | 2073 | static int64_t tcg_table_op_count[NB_OPS]; |
c896fe29 | 2074 | |
871e6c35 | 2075 | static void dump_op_count(void) |
c896fe29 FB |
2076 | { |
2077 | int i; | |
2078 | FILE *f; | |
54604f74 | 2079 | f = fopen("/tmp/op.log", "w"); |
c896fe29 | 2080 | for(i = INDEX_op_end; i < NB_OPS; i++) { |
54604f74 | 2081 | fprintf(f, "%s %" PRId64 "\n", tcg_op_defs[i].name, tcg_table_op_count[i]); |
c896fe29 FB |
2082 | } |
2083 | fclose(f); | |
2084 | } | |
2085 | #endif | |
2086 | ||
2087 | ||
2088 | static inline int tcg_gen_code_common(TCGContext *s, uint8_t *gen_code_buf, | |
2ba1eeb6 | 2089 | long search_pc) |
c896fe29 | 2090 | { |
a9751609 RH |
2091 | TCGOpcode opc; |
2092 | int op_index; | |
c896fe29 | 2093 | const TCGOpDef *def; |
866cb6cb | 2094 | unsigned int dead_args; |
c896fe29 FB |
2095 | const TCGArg *args; |
2096 | ||
2097 | #ifdef DEBUG_DISAS | |
8fec2b8c | 2098 | if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP))) { |
93fcfe39 | 2099 | qemu_log("OP:\n"); |
eeacee4d | 2100 | tcg_dump_ops(s); |
93fcfe39 | 2101 | qemu_log("\n"); |
c896fe29 FB |
2102 | } |
2103 | #endif | |
2104 | ||
c5cc28ff AJ |
2105 | #ifdef CONFIG_PROFILER |
2106 | s->opt_time -= profile_getclock(); | |
2107 | #endif | |
2108 | ||
8f2e8c07 KB |
2109 | #ifdef USE_TCG_OPTIMIZATIONS |
2110 | gen_opparam_ptr = | |
2111 | tcg_optimize(s, gen_opc_ptr, gen_opparam_buf, tcg_op_defs); | |
2112 | #endif | |
2113 | ||
a23a9ec6 | 2114 | #ifdef CONFIG_PROFILER |
c5cc28ff | 2115 | s->opt_time += profile_getclock(); |
a23a9ec6 FB |
2116 | s->la_time -= profile_getclock(); |
2117 | #endif | |
c5cc28ff | 2118 | |
c896fe29 | 2119 | tcg_liveness_analysis(s); |
c5cc28ff | 2120 | |
a23a9ec6 FB |
2121 | #ifdef CONFIG_PROFILER |
2122 | s->la_time += profile_getclock(); | |
2123 | #endif | |
c896fe29 FB |
2124 | |
2125 | #ifdef DEBUG_DISAS | |
8fec2b8c | 2126 | if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP_OPT))) { |
c5cc28ff | 2127 | qemu_log("OP after optimization and liveness analysis:\n"); |
eeacee4d | 2128 | tcg_dump_ops(s); |
93fcfe39 | 2129 | qemu_log("\n"); |
c896fe29 FB |
2130 | } |
2131 | #endif | |
2132 | ||
2133 | tcg_reg_alloc_start(s); | |
2134 | ||
2135 | s->code_buf = gen_code_buf; | |
2136 | s->code_ptr = gen_code_buf; | |
2137 | ||
c896fe29 FB |
2138 | args = gen_opparam_buf; |
2139 | op_index = 0; | |
b3db8758 | 2140 | |
c896fe29 FB |
2141 | for(;;) { |
2142 | opc = gen_opc_buf[op_index]; | |
2143 | #ifdef CONFIG_PROFILER | |
54604f74 | 2144 | tcg_table_op_count[opc]++; |
c896fe29 FB |
2145 | #endif |
2146 | def = &tcg_op_defs[opc]; | |
2147 | #if 0 | |
2148 | printf("%s: %d %d %d\n", def->name, | |
2149 | def->nb_oargs, def->nb_iargs, def->nb_cargs); | |
2150 | // dump_regs(s); | |
2151 | #endif | |
2152 | switch(opc) { | |
2153 | case INDEX_op_mov_i32: | |
c896fe29 | 2154 | case INDEX_op_mov_i64: |
866cb6cb AJ |
2155 | dead_args = s->op_dead_args[op_index]; |
2156 | tcg_reg_alloc_mov(s, def, args, dead_args); | |
c896fe29 | 2157 | break; |
e8996ee0 | 2158 | case INDEX_op_movi_i32: |
e8996ee0 | 2159 | case INDEX_op_movi_i64: |
e8996ee0 FB |
2160 | tcg_reg_alloc_movi(s, args); |
2161 | break; | |
7e4597d7 FB |
2162 | case INDEX_op_debug_insn_start: |
2163 | /* debug instruction */ | |
2164 | break; | |
c896fe29 FB |
2165 | case INDEX_op_nop: |
2166 | case INDEX_op_nop1: | |
2167 | case INDEX_op_nop2: | |
2168 | case INDEX_op_nop3: | |
2169 | break; | |
2170 | case INDEX_op_nopn: | |
2171 | args += args[0]; | |
2172 | goto next; | |
5ff9d6a4 | 2173 | case INDEX_op_discard: |
639368dd | 2174 | temp_dead(s, args[0]); |
5ff9d6a4 | 2175 | break; |
c896fe29 | 2176 | case INDEX_op_set_label: |
e8996ee0 | 2177 | tcg_reg_alloc_bb_end(s, s->reserved_regs); |
9d6fca70 | 2178 | tcg_out_label(s, args[0], s->code_ptr); |
c896fe29 FB |
2179 | break; |
2180 | case INDEX_op_call: | |
866cb6cb AJ |
2181 | dead_args = s->op_dead_args[op_index]; |
2182 | args += tcg_reg_alloc_call(s, def, opc, args, dead_args); | |
c896fe29 FB |
2183 | goto next; |
2184 | case INDEX_op_end: | |
2185 | goto the_end; | |
c896fe29 | 2186 | default: |
25c4d9cc RH |
2187 | /* Sanity check that we've not introduced any unhandled opcodes. */ |
2188 | if (def->flags & TCG_OPF_NOT_PRESENT) { | |
2189 | tcg_abort(); | |
2190 | } | |
c896fe29 FB |
2191 | /* Note: in order to speed up the code, it would be much |
2192 | faster to have specialized register allocator functions for | |
2193 | some common argument patterns */ | |
866cb6cb AJ |
2194 | dead_args = s->op_dead_args[op_index]; |
2195 | tcg_reg_alloc_op(s, def, opc, args, dead_args); | |
c896fe29 FB |
2196 | break; |
2197 | } | |
2198 | args += def->nb_args; | |
8df1ca4b | 2199 | next: |
2ba1eeb6 | 2200 | if (search_pc >= 0 && search_pc < s->code_ptr - gen_code_buf) { |
b314f270 | 2201 | return op_index; |
c896fe29 FB |
2202 | } |
2203 | op_index++; | |
2204 | #ifndef NDEBUG | |
2205 | check_regs(s); | |
2206 | #endif | |
2207 | } | |
2208 | the_end: | |
2209 | return -1; | |
2210 | } | |
2211 | ||
54604f74 | 2212 | int tcg_gen_code(TCGContext *s, uint8_t *gen_code_buf) |
c896fe29 FB |
2213 | { |
2214 | #ifdef CONFIG_PROFILER | |
2215 | { | |
c896fe29 FB |
2216 | int n; |
2217 | n = (gen_opc_ptr - gen_opc_buf); | |
a23a9ec6 FB |
2218 | s->op_count += n; |
2219 | if (n > s->op_count_max) | |
2220 | s->op_count_max = n; | |
2221 | ||
2222 | s->temp_count += s->nb_temps; | |
2223 | if (s->nb_temps > s->temp_count_max) | |
2224 | s->temp_count_max = s->nb_temps; | |
c896fe29 FB |
2225 | } |
2226 | #endif | |
2227 | ||
2ba1eeb6 | 2228 | tcg_gen_code_common(s, gen_code_buf, -1); |
c896fe29 FB |
2229 | |
2230 | /* flush instruction cache */ | |
2aeabc08 SW |
2231 | flush_icache_range((tcg_target_ulong)gen_code_buf, |
2232 | (tcg_target_ulong)s->code_ptr); | |
2233 | ||
c896fe29 FB |
2234 | return s->code_ptr - gen_code_buf; |
2235 | } | |
2236 | ||
2ba1eeb6 | 2237 | /* Return the index of the micro operation such as the pc after is < |
623e265c PB |
2238 | offset bytes from the start of the TB. The contents of gen_code_buf must |
2239 | not be changed, though writing the same values is ok. | |
2240 | Return -1 if not found. */ | |
54604f74 | 2241 | int tcg_gen_code_search_pc(TCGContext *s, uint8_t *gen_code_buf, long offset) |
c896fe29 | 2242 | { |
623e265c | 2243 | return tcg_gen_code_common(s, gen_code_buf, offset); |
c896fe29 | 2244 | } |
a23a9ec6 FB |
2245 | |
2246 | #ifdef CONFIG_PROFILER | |
405cf9ff | 2247 | void tcg_dump_info(FILE *f, fprintf_function cpu_fprintf) |
a23a9ec6 FB |
2248 | { |
2249 | TCGContext *s = &tcg_ctx; | |
2250 | int64_t tot; | |
2251 | ||
2252 | tot = s->interm_time + s->code_time; | |
2253 | cpu_fprintf(f, "JIT cycles %" PRId64 " (%0.3f s at 2.4 GHz)\n", | |
2254 | tot, tot / 2.4e9); | |
2255 | cpu_fprintf(f, "translated TBs %" PRId64 " (aborted=%" PRId64 " %0.1f%%)\n", | |
2256 | s->tb_count, | |
2257 | s->tb_count1 - s->tb_count, | |
2258 | s->tb_count1 ? (double)(s->tb_count1 - s->tb_count) / s->tb_count1 * 100.0 : 0); | |
2259 | cpu_fprintf(f, "avg ops/TB %0.1f max=%d\n", | |
2260 | s->tb_count ? (double)s->op_count / s->tb_count : 0, s->op_count_max); | |
a23a9ec6 FB |
2261 | cpu_fprintf(f, "deleted ops/TB %0.2f\n", |
2262 | s->tb_count ? | |
2263 | (double)s->del_op_count / s->tb_count : 0); | |
2264 | cpu_fprintf(f, "avg temps/TB %0.2f max=%d\n", | |
2265 | s->tb_count ? | |
2266 | (double)s->temp_count / s->tb_count : 0, | |
2267 | s->temp_count_max); | |
2268 | ||
2269 | cpu_fprintf(f, "cycles/op %0.1f\n", | |
2270 | s->op_count ? (double)tot / s->op_count : 0); | |
2271 | cpu_fprintf(f, "cycles/in byte %0.1f\n", | |
2272 | s->code_in_len ? (double)tot / s->code_in_len : 0); | |
2273 | cpu_fprintf(f, "cycles/out byte %0.1f\n", | |
2274 | s->code_out_len ? (double)tot / s->code_out_len : 0); | |
2275 | if (tot == 0) | |
2276 | tot = 1; | |
2277 | cpu_fprintf(f, " gen_interm time %0.1f%%\n", | |
2278 | (double)s->interm_time / tot * 100.0); | |
2279 | cpu_fprintf(f, " gen_code time %0.1f%%\n", | |
2280 | (double)s->code_time / tot * 100.0); | |
c5cc28ff AJ |
2281 | cpu_fprintf(f, "optim./code time %0.1f%%\n", |
2282 | (double)s->opt_time / (s->code_time ? s->code_time : 1) | |
2283 | * 100.0); | |
a23a9ec6 FB |
2284 | cpu_fprintf(f, "liveness/code time %0.1f%%\n", |
2285 | (double)s->la_time / (s->code_time ? s->code_time : 1) * 100.0); | |
2286 | cpu_fprintf(f, "cpu_restore count %" PRId64 "\n", | |
2287 | s->restore_count); | |
2288 | cpu_fprintf(f, " avg cycles %0.1f\n", | |
2289 | s->restore_count ? (double)s->restore_time / s->restore_count : 0); | |
871e6c35 BS |
2290 | |
2291 | dump_op_count(); | |
a23a9ec6 FB |
2292 | } |
2293 | #else | |
405cf9ff | 2294 | void tcg_dump_info(FILE *f, fprintf_function cpu_fprintf) |
a23a9ec6 | 2295 | { |
24bf7b3a | 2296 | cpu_fprintf(f, "[TCG profiler not compiled]\n"); |
a23a9ec6 FB |
2297 | } |
2298 | #endif | |
813da627 RH |
2299 | |
2300 | #ifdef ELF_HOST_MACHINE | |
5872bbf2 RH |
2301 | /* In order to use this feature, the backend needs to do three things: |
2302 | ||
2303 | (1) Define ELF_HOST_MACHINE to indicate both what value to | |
2304 | put into the ELF image and to indicate support for the feature. | |
2305 | ||
2306 | (2) Define tcg_register_jit. This should create a buffer containing | |
2307 | the contents of a .debug_frame section that describes the post- | |
2308 | prologue unwind info for the tcg machine. | |
2309 | ||
2310 | (3) Call tcg_register_jit_int, with the constructed .debug_frame. | |
2311 | */ | |
813da627 RH |
2312 | |
2313 | /* Begin GDB interface. THE FOLLOWING MUST MATCH GDB DOCS. */ | |
2314 | typedef enum { | |
2315 | JIT_NOACTION = 0, | |
2316 | JIT_REGISTER_FN, | |
2317 | JIT_UNREGISTER_FN | |
2318 | } jit_actions_t; | |
2319 | ||
2320 | struct jit_code_entry { | |
2321 | struct jit_code_entry *next_entry; | |
2322 | struct jit_code_entry *prev_entry; | |
2323 | const void *symfile_addr; | |
2324 | uint64_t symfile_size; | |
2325 | }; | |
2326 | ||
2327 | struct jit_descriptor { | |
2328 | uint32_t version; | |
2329 | uint32_t action_flag; | |
2330 | struct jit_code_entry *relevant_entry; | |
2331 | struct jit_code_entry *first_entry; | |
2332 | }; | |
2333 | ||
2334 | void __jit_debug_register_code(void) __attribute__((noinline)); | |
2335 | void __jit_debug_register_code(void) | |
2336 | { | |
2337 | asm(""); | |
2338 | } | |
2339 | ||
2340 | /* Must statically initialize the version, because GDB may check | |
2341 | the version before we can set it. */ | |
2342 | struct jit_descriptor __jit_debug_descriptor = { 1, 0, 0, 0 }; | |
2343 | ||
2344 | /* End GDB interface. */ | |
2345 | ||
2346 | static int find_string(const char *strtab, const char *str) | |
2347 | { | |
2348 | const char *p = strtab + 1; | |
2349 | ||
2350 | while (1) { | |
2351 | if (strcmp(p, str) == 0) { | |
2352 | return p - strtab; | |
2353 | } | |
2354 | p += strlen(p) + 1; | |
2355 | } | |
2356 | } | |
2357 | ||
5872bbf2 | 2358 | static void tcg_register_jit_int(void *buf_ptr, size_t buf_size, |
813da627 RH |
2359 | void *debug_frame, size_t debug_frame_size) |
2360 | { | |
5872bbf2 RH |
2361 | struct __attribute__((packed)) DebugInfo { |
2362 | uint32_t len; | |
2363 | uint16_t version; | |
2364 | uint32_t abbrev; | |
2365 | uint8_t ptr_size; | |
2366 | uint8_t cu_die; | |
2367 | uint16_t cu_lang; | |
2368 | uintptr_t cu_low_pc; | |
2369 | uintptr_t cu_high_pc; | |
2370 | uint8_t fn_die; | |
2371 | char fn_name[16]; | |
2372 | uintptr_t fn_low_pc; | |
2373 | uintptr_t fn_high_pc; | |
2374 | uint8_t cu_eoc; | |
2375 | }; | |
813da627 RH |
2376 | |
2377 | struct ElfImage { | |
2378 | ElfW(Ehdr) ehdr; | |
2379 | ElfW(Phdr) phdr; | |
5872bbf2 RH |
2380 | ElfW(Shdr) shdr[7]; |
2381 | ElfW(Sym) sym[2]; | |
2382 | struct DebugInfo di; | |
2383 | uint8_t da[24]; | |
2384 | char str[80]; | |
2385 | }; | |
2386 | ||
2387 | struct ElfImage *img; | |
2388 | ||
2389 | static const struct ElfImage img_template = { | |
2390 | .ehdr = { | |
2391 | .e_ident[EI_MAG0] = ELFMAG0, | |
2392 | .e_ident[EI_MAG1] = ELFMAG1, | |
2393 | .e_ident[EI_MAG2] = ELFMAG2, | |
2394 | .e_ident[EI_MAG3] = ELFMAG3, | |
2395 | .e_ident[EI_CLASS] = ELF_CLASS, | |
2396 | .e_ident[EI_DATA] = ELF_DATA, | |
2397 | .e_ident[EI_VERSION] = EV_CURRENT, | |
2398 | .e_type = ET_EXEC, | |
2399 | .e_machine = ELF_HOST_MACHINE, | |
2400 | .e_version = EV_CURRENT, | |
2401 | .e_phoff = offsetof(struct ElfImage, phdr), | |
2402 | .e_shoff = offsetof(struct ElfImage, shdr), | |
2403 | .e_ehsize = sizeof(ElfW(Shdr)), | |
2404 | .e_phentsize = sizeof(ElfW(Phdr)), | |
2405 | .e_phnum = 1, | |
2406 | .e_shentsize = sizeof(ElfW(Shdr)), | |
2407 | .e_shnum = ARRAY_SIZE(img->shdr), | |
2408 | .e_shstrndx = ARRAY_SIZE(img->shdr) - 1, | |
abbb3eae RH |
2409 | #ifdef ELF_HOST_FLAGS |
2410 | .e_flags = ELF_HOST_FLAGS, | |
2411 | #endif | |
2412 | #ifdef ELF_OSABI | |
2413 | .e_ident[EI_OSABI] = ELF_OSABI, | |
2414 | #endif | |
5872bbf2 RH |
2415 | }, |
2416 | .phdr = { | |
2417 | .p_type = PT_LOAD, | |
2418 | .p_flags = PF_X, | |
2419 | }, | |
2420 | .shdr = { | |
2421 | [0] = { .sh_type = SHT_NULL }, | |
2422 | /* Trick: The contents of code_gen_buffer are not present in | |
2423 | this fake ELF file; that got allocated elsewhere. Therefore | |
2424 | we mark .text as SHT_NOBITS (similar to .bss) so that readers | |
2425 | will not look for contents. We can record any address. */ | |
2426 | [1] = { /* .text */ | |
2427 | .sh_type = SHT_NOBITS, | |
2428 | .sh_flags = SHF_EXECINSTR | SHF_ALLOC, | |
2429 | }, | |
2430 | [2] = { /* .debug_info */ | |
2431 | .sh_type = SHT_PROGBITS, | |
2432 | .sh_offset = offsetof(struct ElfImage, di), | |
2433 | .sh_size = sizeof(struct DebugInfo), | |
2434 | }, | |
2435 | [3] = { /* .debug_abbrev */ | |
2436 | .sh_type = SHT_PROGBITS, | |
2437 | .sh_offset = offsetof(struct ElfImage, da), | |
2438 | .sh_size = sizeof(img->da), | |
2439 | }, | |
2440 | [4] = { /* .debug_frame */ | |
2441 | .sh_type = SHT_PROGBITS, | |
2442 | .sh_offset = sizeof(struct ElfImage), | |
2443 | }, | |
2444 | [5] = { /* .symtab */ | |
2445 | .sh_type = SHT_SYMTAB, | |
2446 | .sh_offset = offsetof(struct ElfImage, sym), | |
2447 | .sh_size = sizeof(img->sym), | |
2448 | .sh_info = 1, | |
2449 | .sh_link = ARRAY_SIZE(img->shdr) - 1, | |
2450 | .sh_entsize = sizeof(ElfW(Sym)), | |
2451 | }, | |
2452 | [6] = { /* .strtab */ | |
2453 | .sh_type = SHT_STRTAB, | |
2454 | .sh_offset = offsetof(struct ElfImage, str), | |
2455 | .sh_size = sizeof(img->str), | |
2456 | } | |
2457 | }, | |
2458 | .sym = { | |
2459 | [1] = { /* code_gen_buffer */ | |
2460 | .st_info = ELF_ST_INFO(STB_GLOBAL, STT_FUNC), | |
2461 | .st_shndx = 1, | |
2462 | } | |
2463 | }, | |
2464 | .di = { | |
2465 | .len = sizeof(struct DebugInfo) - 4, | |
2466 | .version = 2, | |
2467 | .ptr_size = sizeof(void *), | |
2468 | .cu_die = 1, | |
2469 | .cu_lang = 0x8001, /* DW_LANG_Mips_Assembler */ | |
2470 | .fn_die = 2, | |
2471 | .fn_name = "code_gen_buffer" | |
2472 | }, | |
2473 | .da = { | |
2474 | 1, /* abbrev number (the cu) */ | |
2475 | 0x11, 1, /* DW_TAG_compile_unit, has children */ | |
2476 | 0x13, 0x5, /* DW_AT_language, DW_FORM_data2 */ | |
2477 | 0x11, 0x1, /* DW_AT_low_pc, DW_FORM_addr */ | |
2478 | 0x12, 0x1, /* DW_AT_high_pc, DW_FORM_addr */ | |
2479 | 0, 0, /* end of abbrev */ | |
2480 | 2, /* abbrev number (the fn) */ | |
2481 | 0x2e, 0, /* DW_TAG_subprogram, no children */ | |
2482 | 0x3, 0x8, /* DW_AT_name, DW_FORM_string */ | |
2483 | 0x11, 0x1, /* DW_AT_low_pc, DW_FORM_addr */ | |
2484 | 0x12, 0x1, /* DW_AT_high_pc, DW_FORM_addr */ | |
2485 | 0, 0, /* end of abbrev */ | |
2486 | 0 /* no more abbrev */ | |
2487 | }, | |
2488 | .str = "\0" ".text\0" ".debug_info\0" ".debug_abbrev\0" | |
2489 | ".debug_frame\0" ".symtab\0" ".strtab\0" "code_gen_buffer", | |
813da627 RH |
2490 | }; |
2491 | ||
2492 | /* We only need a single jit entry; statically allocate it. */ | |
2493 | static struct jit_code_entry one_entry; | |
2494 | ||
5872bbf2 | 2495 | uintptr_t buf = (uintptr_t)buf_ptr; |
813da627 | 2496 | size_t img_size = sizeof(struct ElfImage) + debug_frame_size; |
813da627 | 2497 | |
5872bbf2 RH |
2498 | img = g_malloc(img_size); |
2499 | *img = img_template; | |
2500 | memcpy(img + 1, debug_frame, debug_frame_size); | |
813da627 | 2501 | |
5872bbf2 RH |
2502 | img->phdr.p_vaddr = buf; |
2503 | img->phdr.p_paddr = buf; | |
2504 | img->phdr.p_memsz = buf_size; | |
813da627 | 2505 | |
813da627 | 2506 | img->shdr[1].sh_name = find_string(img->str, ".text"); |
5872bbf2 | 2507 | img->shdr[1].sh_addr = buf; |
813da627 RH |
2508 | img->shdr[1].sh_size = buf_size; |
2509 | ||
5872bbf2 RH |
2510 | img->shdr[2].sh_name = find_string(img->str, ".debug_info"); |
2511 | img->shdr[3].sh_name = find_string(img->str, ".debug_abbrev"); | |
2512 | ||
2513 | img->shdr[4].sh_name = find_string(img->str, ".debug_frame"); | |
2514 | img->shdr[4].sh_size = debug_frame_size; | |
2515 | ||
2516 | img->shdr[5].sh_name = find_string(img->str, ".symtab"); | |
2517 | img->shdr[6].sh_name = find_string(img->str, ".strtab"); | |
2518 | ||
2519 | img->sym[1].st_name = find_string(img->str, "code_gen_buffer"); | |
2520 | img->sym[1].st_value = buf; | |
2521 | img->sym[1].st_size = buf_size; | |
813da627 | 2522 | |
5872bbf2 RH |
2523 | img->di.cu_low_pc = buf; |
2524 | img->di.cu_high_pc = buf_size; | |
2525 | img->di.fn_low_pc = buf; | |
2526 | img->di.fn_high_pc = buf_size; | |
813da627 RH |
2527 | |
2528 | #ifdef DEBUG_JIT | |
2529 | /* Enable this block to be able to debug the ELF image file creation. | |
2530 | One can use readelf, objdump, or other inspection utilities. */ | |
2531 | { | |
2532 | FILE *f = fopen("/tmp/qemu.jit", "w+b"); | |
2533 | if (f) { | |
5872bbf2 | 2534 | if (fwrite(img, img_size, 1, f) != img_size) { |
813da627 RH |
2535 | /* Avoid stupid unused return value warning for fwrite. */ |
2536 | } | |
2537 | fclose(f); | |
2538 | } | |
2539 | } | |
2540 | #endif | |
2541 | ||
2542 | one_entry.symfile_addr = img; | |
2543 | one_entry.symfile_size = img_size; | |
2544 | ||
2545 | __jit_debug_descriptor.action_flag = JIT_REGISTER_FN; | |
2546 | __jit_debug_descriptor.relevant_entry = &one_entry; | |
2547 | __jit_debug_descriptor.first_entry = &one_entry; | |
2548 | __jit_debug_register_code(); | |
2549 | } | |
2550 | #else | |
5872bbf2 RH |
2551 | /* No support for the feature. Provide the entry point expected by exec.c, |
2552 | and implement the internal function we declared earlier. */ | |
813da627 RH |
2553 | |
2554 | static void tcg_register_jit_int(void *buf, size_t size, | |
2555 | void *debug_frame, size_t debug_frame_size) | |
2556 | { | |
2557 | } | |
2558 | ||
2559 | void tcg_register_jit(void *buf, size_t buf_size) | |
2560 | { | |
2561 | } | |
2562 | #endif /* ELF_HOST_MACHINE */ |