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[qemu.git] / tcg / tcg.c
CommitLineData
c896fe29
FB
1/*
2 * Tiny Code Generator for QEMU
3 *
4 * Copyright (c) 2008 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24
c896fe29
FB
25/* define it to use liveness analysis (better code) */
26#define USE_LIVENESS_ANALYSIS
8f2e8c07 27#define USE_TCG_OPTIMIZATIONS
c896fe29 28
cca82982
AJ
29#include "config.h"
30
813da627
RH
31/* Define to jump the ELF file used to communicate with GDB. */
32#undef DEBUG_JIT
33
a6c6f76c 34#if !defined(CONFIG_DEBUG_TCG) && !defined(NDEBUG)
cca82982
AJ
35/* define it to suppress various consistency checks (faster) */
36#define NDEBUG
37#endif
38
ca10f867 39#include "qemu-common.h"
1de7afc9
PB
40#include "qemu/cache-utils.h"
41#include "qemu/host-utils.h"
42#include "qemu/timer.h"
c896fe29
FB
43
44/* Note: the long term plan is to reduce the dependancies on the QEMU
45 CPU definitions. Currently they are used for qemu_ld/st
46 instructions */
47#define NO_CPU_IO_DEFS
48#include "cpu.h"
c896fe29
FB
49
50#include "tcg-op.h"
813da627
RH
51
52#if TCG_TARGET_REG_BITS == 64
53# define ELF_CLASS ELFCLASS64
54#else
55# define ELF_CLASS ELFCLASS32
56#endif
57#ifdef HOST_WORDS_BIGENDIAN
58# define ELF_DATA ELFDATA2MSB
59#else
60# define ELF_DATA ELFDATA2LSB
61#endif
62
c896fe29
FB
63#include "elf.h"
64
c0ad3001 65/* Forward declarations for functions declared in tcg-target.c and used here. */
e4d58b41
RH
66static void tcg_target_init(TCGContext *s);
67static void tcg_target_qemu_prologue(TCGContext *s);
c896fe29 68static void patch_reloc(uint8_t *code_ptr, int type,
f54b3f92 69 tcg_target_long value, tcg_target_long addend);
c896fe29 70
497a22eb
RH
71/* The CIE and FDE header definitions will be common to all hosts. */
72typedef struct {
73 uint32_t len __attribute__((aligned((sizeof(void *)))));
74 uint32_t id;
75 uint8_t version;
76 char augmentation[1];
77 uint8_t code_align;
78 uint8_t data_align;
79 uint8_t return_column;
80} DebugFrameCIE;
81
82typedef struct QEMU_PACKED {
83 uint32_t len __attribute__((aligned((sizeof(void *)))));
84 uint32_t cie_offset;
85 tcg_target_long func_start;
86 tcg_target_long func_len;
87} DebugFrameFDEHeader;
88
813da627
RH
89static void tcg_register_jit_int(void *buf, size_t size,
90 void *debug_frame, size_t debug_frame_size)
91 __attribute__((unused));
92
c0ad3001
SW
93/* Forward declarations for functions declared and used in tcg-target.c. */
94static int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str);
2a534aff 95static void tcg_out_ld(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg1,
c0ad3001 96 tcg_target_long arg2);
2a534aff 97static void tcg_out_mov(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg);
c0ad3001 98static void tcg_out_movi(TCGContext *s, TCGType type,
2a534aff 99 TCGReg ret, tcg_target_long arg);
c0ad3001
SW
100static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
101 const int *const_args);
2a534aff 102static void tcg_out_st(TCGContext *s, TCGType type, TCGReg arg, TCGReg arg1,
c0ad3001
SW
103 tcg_target_long arg2);
104static int tcg_target_const_match(tcg_target_long val,
105 const TCGArgConstraint *arg_ct);
c0ad3001 106
8399ad59 107TCGOpDef tcg_op_defs[] = {
0e2029a0 108#define DEF(s, oargs, iargs, cargs, flags) { #s, oargs, iargs, cargs, iargs + oargs + cargs, flags },
c896fe29
FB
109#include "tcg-opc.h"
110#undef DEF
c896fe29 111};
2a24374a 112const size_t tcg_op_defs_max = ARRAY_SIZE(tcg_op_defs);
c896fe29 113
b1d8e52e
BS
114static TCGRegSet tcg_target_available_regs[2];
115static TCGRegSet tcg_target_call_clobber_regs;
c896fe29 116
c896fe29
FB
117static inline void tcg_out8(TCGContext *s, uint8_t v)
118{
119 *s->code_ptr++ = v;
120}
121
122static inline void tcg_out16(TCGContext *s, uint16_t v)
123{
124 *(uint16_t *)s->code_ptr = v;
125 s->code_ptr += 2;
126}
127
128static inline void tcg_out32(TCGContext *s, uint32_t v)
129{
130 *(uint32_t *)s->code_ptr = v;
131 s->code_ptr += 4;
132}
133
134/* label relocation processing */
135
a5ad5916
SW
136static void tcg_out_reloc(TCGContext *s, uint8_t *code_ptr, int type,
137 int label_index, long addend)
c896fe29
FB
138{
139 TCGLabel *l;
140 TCGRelocation *r;
141
142 l = &s->labels[label_index];
143 if (l->has_value) {
623e265c
PB
144 /* FIXME: This may break relocations on RISC targets that
145 modify instruction fields in place. The caller may not have
146 written the initial value. */
f54b3f92 147 patch_reloc(code_ptr, type, l->u.value, addend);
c896fe29
FB
148 } else {
149 /* add a new relocation entry */
150 r = tcg_malloc(sizeof(TCGRelocation));
151 r->type = type;
152 r->ptr = code_ptr;
153 r->addend = addend;
154 r->next = l->u.first_reloc;
155 l->u.first_reloc = r;
156 }
157}
158
9d6fca70 159static void tcg_out_label(TCGContext *s, int label_index, void *ptr)
c896fe29
FB
160{
161 TCGLabel *l;
162 TCGRelocation *r;
9d6fca70 163 tcg_target_long value = (tcg_target_long)ptr;
c896fe29
FB
164
165 l = &s->labels[label_index];
166 if (l->has_value)
167 tcg_abort();
168 r = l->u.first_reloc;
169 while (r != NULL) {
f54b3f92 170 patch_reloc(r->ptr, r->type, value, r->addend);
c896fe29
FB
171 r = r->next;
172 }
173 l->has_value = 1;
174 l->u.value = value;
175}
176
177int gen_new_label(void)
178{
179 TCGContext *s = &tcg_ctx;
180 int idx;
181 TCGLabel *l;
182
183 if (s->nb_labels >= TCG_MAX_LABELS)
184 tcg_abort();
185 idx = s->nb_labels++;
186 l = &s->labels[idx];
187 l->has_value = 0;
188 l->u.first_reloc = NULL;
189 return idx;
190}
191
192#include "tcg-target.c"
193
c896fe29
FB
194/* pool based memory allocation */
195void *tcg_malloc_internal(TCGContext *s, int size)
196{
197 TCGPool *p;
198 int pool_size;
199
200 if (size > TCG_POOL_CHUNK_SIZE) {
201 /* big malloc: insert a new pool (XXX: could optimize) */
7267c094 202 p = g_malloc(sizeof(TCGPool) + size);
c896fe29 203 p->size = size;
4055299e
KB
204 p->next = s->pool_first_large;
205 s->pool_first_large = p;
206 return p->data;
c896fe29
FB
207 } else {
208 p = s->pool_current;
209 if (!p) {
210 p = s->pool_first;
211 if (!p)
212 goto new_pool;
213 } else {
214 if (!p->next) {
215 new_pool:
216 pool_size = TCG_POOL_CHUNK_SIZE;
7267c094 217 p = g_malloc(sizeof(TCGPool) + pool_size);
c896fe29
FB
218 p->size = pool_size;
219 p->next = NULL;
220 if (s->pool_current)
221 s->pool_current->next = p;
222 else
223 s->pool_first = p;
224 } else {
225 p = p->next;
226 }
227 }
228 }
229 s->pool_current = p;
230 s->pool_cur = p->data + size;
231 s->pool_end = p->data + p->size;
232 return p->data;
233}
234
235void tcg_pool_reset(TCGContext *s)
236{
4055299e
KB
237 TCGPool *p, *t;
238 for (p = s->pool_first_large; p; p = t) {
239 t = p->next;
240 g_free(p);
241 }
242 s->pool_first_large = NULL;
c896fe29
FB
243 s->pool_cur = s->pool_end = NULL;
244 s->pool_current = NULL;
245}
246
c896fe29
FB
247void tcg_context_init(TCGContext *s)
248{
249 int op, total_args, n;
250 TCGOpDef *def;
251 TCGArgConstraint *args_ct;
252 int *sorted_args;
253
254 memset(s, 0, sizeof(*s));
c896fe29
FB
255 s->nb_globals = 0;
256
257 /* Count total number of arguments and allocate the corresponding
258 space */
259 total_args = 0;
260 for(op = 0; op < NB_OPS; op++) {
261 def = &tcg_op_defs[op];
262 n = def->nb_iargs + def->nb_oargs;
263 total_args += n;
264 }
265
7267c094
AL
266 args_ct = g_malloc(sizeof(TCGArgConstraint) * total_args);
267 sorted_args = g_malloc(sizeof(int) * total_args);
c896fe29
FB
268
269 for(op = 0; op < NB_OPS; op++) {
270 def = &tcg_op_defs[op];
271 def->args_ct = args_ct;
272 def->sorted_args = sorted_args;
273 n = def->nb_iargs + def->nb_oargs;
274 sorted_args += n;
275 args_ct += n;
276 }
277
278 tcg_target_init(s);
9002ec79 279}
b03cce8e 280
9002ec79
RH
281void tcg_prologue_init(TCGContext *s)
282{
b03cce8e 283 /* init global prologue and epilogue */
0b0d3320 284 s->code_buf = s->code_gen_prologue;
b03cce8e
FB
285 s->code_ptr = s->code_buf;
286 tcg_target_qemu_prologue(s);
2aeabc08
SW
287 flush_icache_range((tcg_target_ulong)s->code_buf,
288 (tcg_target_ulong)s->code_ptr);
d6b64b2b
RH
289
290#ifdef DEBUG_DISAS
291 if (qemu_loglevel_mask(CPU_LOG_TB_OUT_ASM)) {
292 size_t size = s->code_ptr - s->code_buf;
293 qemu_log("PROLOGUE: [size=%zu]\n", size);
294 log_disas(s->code_buf, size);
295 qemu_log("\n");
296 qemu_log_flush();
297 }
298#endif
c896fe29
FB
299}
300
301void tcg_set_frame(TCGContext *s, int reg,
302 tcg_target_long start, tcg_target_long size)
303{
304 s->frame_start = start;
305 s->frame_end = start + size;
306 s->frame_reg = reg;
307}
308
c896fe29
FB
309void tcg_func_start(TCGContext *s)
310{
e8996ee0 311 int i;
c896fe29
FB
312 tcg_pool_reset(s);
313 s->nb_temps = s->nb_globals;
641d5fbe 314 for(i = 0; i < (TCG_TYPE_COUNT * 2); i++)
e8996ee0 315 s->first_free_temp[i] = -1;
c896fe29
FB
316 s->labels = tcg_malloc(sizeof(TCGLabel) * TCG_MAX_LABELS);
317 s->nb_labels = 0;
318 s->current_frame_offset = s->frame_start;
319
0a209d4b
RH
320#ifdef CONFIG_DEBUG_TCG
321 s->goto_tb_issue_mask = 0;
322#endif
323
92414b31 324 s->gen_opc_ptr = s->gen_opc_buf;
1ff0a2c5 325 s->gen_opparam_ptr = s->gen_opparam_buf;
b76f0d8c
YL
326
327#if defined(CONFIG_QEMU_LDST_OPTIMIZATION) && defined(CONFIG_SOFTMMU)
328 /* Initialize qemu_ld/st labels to assist code generation at the end of TB
329 for TLB miss cases at the end of TB */
330 s->qemu_ldst_labels = tcg_malloc(sizeof(TCGLabelQemuLdst) *
331 TCG_MAX_QEMU_LDST);
332 s->nb_qemu_ldst_labels = 0;
333#endif
c896fe29
FB
334}
335
336static inline void tcg_temp_alloc(TCGContext *s, int n)
337{
338 if (n > TCG_MAX_TEMPS)
339 tcg_abort();
340}
341
a7812ae4
PB
342static inline int tcg_global_reg_new_internal(TCGType type, int reg,
343 const char *name)
c896fe29
FB
344{
345 TCGContext *s = &tcg_ctx;
346 TCGTemp *ts;
347 int idx;
348
349#if TCG_TARGET_REG_BITS == 32
350 if (type != TCG_TYPE_I32)
351 tcg_abort();
352#endif
353 if (tcg_regset_test_reg(s->reserved_regs, reg))
354 tcg_abort();
355 idx = s->nb_globals;
356 tcg_temp_alloc(s, s->nb_globals + 1);
357 ts = &s->temps[s->nb_globals];
358 ts->base_type = type;
359 ts->type = type;
360 ts->fixed_reg = 1;
361 ts->reg = reg;
c896fe29
FB
362 ts->name = name;
363 s->nb_globals++;
364 tcg_regset_set_reg(s->reserved_regs, reg);
a7812ae4
PB
365 return idx;
366}
367
368TCGv_i32 tcg_global_reg_new_i32(int reg, const char *name)
369{
370 int idx;
371
372 idx = tcg_global_reg_new_internal(TCG_TYPE_I32, reg, name);
373 return MAKE_TCGV_I32(idx);
374}
375
376TCGv_i64 tcg_global_reg_new_i64(int reg, const char *name)
377{
378 int idx;
379
380 idx = tcg_global_reg_new_internal(TCG_TYPE_I64, reg, name);
381 return MAKE_TCGV_I64(idx);
c896fe29
FB
382}
383
a7812ae4
PB
384static inline int tcg_global_mem_new_internal(TCGType type, int reg,
385 tcg_target_long offset,
386 const char *name)
c896fe29
FB
387{
388 TCGContext *s = &tcg_ctx;
389 TCGTemp *ts;
390 int idx;
391
392 idx = s->nb_globals;
393#if TCG_TARGET_REG_BITS == 32
394 if (type == TCG_TYPE_I64) {
395 char buf[64];
c588979b 396 tcg_temp_alloc(s, s->nb_globals + 2);
c896fe29
FB
397 ts = &s->temps[s->nb_globals];
398 ts->base_type = type;
399 ts->type = TCG_TYPE_I32;
400 ts->fixed_reg = 0;
401 ts->mem_allocated = 1;
402 ts->mem_reg = reg;
403#ifdef TCG_TARGET_WORDS_BIGENDIAN
404 ts->mem_offset = offset + 4;
405#else
406 ts->mem_offset = offset;
407#endif
c896fe29
FB
408 pstrcpy(buf, sizeof(buf), name);
409 pstrcat(buf, sizeof(buf), "_0");
410 ts->name = strdup(buf);
411 ts++;
412
413 ts->base_type = type;
414 ts->type = TCG_TYPE_I32;
415 ts->fixed_reg = 0;
416 ts->mem_allocated = 1;
417 ts->mem_reg = reg;
418#ifdef TCG_TARGET_WORDS_BIGENDIAN
419 ts->mem_offset = offset;
420#else
421 ts->mem_offset = offset + 4;
422#endif
c896fe29
FB
423 pstrcpy(buf, sizeof(buf), name);
424 pstrcat(buf, sizeof(buf), "_1");
425 ts->name = strdup(buf);
426
427 s->nb_globals += 2;
428 } else
429#endif
430 {
431 tcg_temp_alloc(s, s->nb_globals + 1);
432 ts = &s->temps[s->nb_globals];
433 ts->base_type = type;
434 ts->type = type;
435 ts->fixed_reg = 0;
436 ts->mem_allocated = 1;
437 ts->mem_reg = reg;
438 ts->mem_offset = offset;
c896fe29
FB
439 ts->name = name;
440 s->nb_globals++;
441 }
a7812ae4
PB
442 return idx;
443}
444
445TCGv_i32 tcg_global_mem_new_i32(int reg, tcg_target_long offset,
446 const char *name)
447{
448 int idx;
449
450 idx = tcg_global_mem_new_internal(TCG_TYPE_I32, reg, offset, name);
451 return MAKE_TCGV_I32(idx);
452}
453
454TCGv_i64 tcg_global_mem_new_i64(int reg, tcg_target_long offset,
455 const char *name)
456{
457 int idx;
458
459 idx = tcg_global_mem_new_internal(TCG_TYPE_I64, reg, offset, name);
460 return MAKE_TCGV_I64(idx);
c896fe29
FB
461}
462
a7812ae4 463static inline int tcg_temp_new_internal(TCGType type, int temp_local)
c896fe29
FB
464{
465 TCGContext *s = &tcg_ctx;
466 TCGTemp *ts;
641d5fbe 467 int idx, k;
c896fe29 468
641d5fbe
FB
469 k = type;
470 if (temp_local)
471 k += TCG_TYPE_COUNT;
472 idx = s->first_free_temp[k];
e8996ee0
FB
473 if (idx != -1) {
474 /* There is already an available temp with the
475 right type */
476 ts = &s->temps[idx];
641d5fbe 477 s->first_free_temp[k] = ts->next_free_temp;
e8996ee0 478 ts->temp_allocated = 1;
641d5fbe 479 assert(ts->temp_local == temp_local);
e8996ee0
FB
480 } else {
481 idx = s->nb_temps;
c896fe29 482#if TCG_TARGET_REG_BITS == 32
e8996ee0 483 if (type == TCG_TYPE_I64) {
8df1ca4b 484 tcg_temp_alloc(s, s->nb_temps + 2);
e8996ee0
FB
485 ts = &s->temps[s->nb_temps];
486 ts->base_type = type;
487 ts->type = TCG_TYPE_I32;
488 ts->temp_allocated = 1;
641d5fbe 489 ts->temp_local = temp_local;
e8996ee0
FB
490 ts->name = NULL;
491 ts++;
492 ts->base_type = TCG_TYPE_I32;
493 ts->type = TCG_TYPE_I32;
494 ts->temp_allocated = 1;
641d5fbe 495 ts->temp_local = temp_local;
e8996ee0
FB
496 ts->name = NULL;
497 s->nb_temps += 2;
498 } else
c896fe29 499#endif
e8996ee0
FB
500 {
501 tcg_temp_alloc(s, s->nb_temps + 1);
502 ts = &s->temps[s->nb_temps];
503 ts->base_type = type;
504 ts->type = type;
505 ts->temp_allocated = 1;
641d5fbe 506 ts->temp_local = temp_local;
e8996ee0
FB
507 ts->name = NULL;
508 s->nb_temps++;
509 }
c896fe29 510 }
27bfd83c
PM
511
512#if defined(CONFIG_DEBUG_TCG)
513 s->temps_in_use++;
514#endif
a7812ae4 515 return idx;
c896fe29
FB
516}
517
a7812ae4
PB
518TCGv_i32 tcg_temp_new_internal_i32(int temp_local)
519{
520 int idx;
521
522 idx = tcg_temp_new_internal(TCG_TYPE_I32, temp_local);
523 return MAKE_TCGV_I32(idx);
524}
525
526TCGv_i64 tcg_temp_new_internal_i64(int temp_local)
527{
528 int idx;
529
530 idx = tcg_temp_new_internal(TCG_TYPE_I64, temp_local);
531 return MAKE_TCGV_I64(idx);
532}
533
534static inline void tcg_temp_free_internal(int idx)
c896fe29
FB
535{
536 TCGContext *s = &tcg_ctx;
537 TCGTemp *ts;
641d5fbe 538 int k;
c896fe29 539
27bfd83c
PM
540#if defined(CONFIG_DEBUG_TCG)
541 s->temps_in_use--;
542 if (s->temps_in_use < 0) {
543 fprintf(stderr, "More temporaries freed than allocated!\n");
544 }
545#endif
546
e8996ee0 547 assert(idx >= s->nb_globals && idx < s->nb_temps);
c896fe29 548 ts = &s->temps[idx];
e8996ee0
FB
549 assert(ts->temp_allocated != 0);
550 ts->temp_allocated = 0;
641d5fbe
FB
551 k = ts->base_type;
552 if (ts->temp_local)
553 k += TCG_TYPE_COUNT;
554 ts->next_free_temp = s->first_free_temp[k];
555 s->first_free_temp[k] = idx;
c896fe29
FB
556}
557
a7812ae4
PB
558void tcg_temp_free_i32(TCGv_i32 arg)
559{
560 tcg_temp_free_internal(GET_TCGV_I32(arg));
561}
562
563void tcg_temp_free_i64(TCGv_i64 arg)
564{
565 tcg_temp_free_internal(GET_TCGV_I64(arg));
566}
e8996ee0 567
a7812ae4 568TCGv_i32 tcg_const_i32(int32_t val)
c896fe29 569{
a7812ae4
PB
570 TCGv_i32 t0;
571 t0 = tcg_temp_new_i32();
e8996ee0
FB
572 tcg_gen_movi_i32(t0, val);
573 return t0;
574}
c896fe29 575
a7812ae4 576TCGv_i64 tcg_const_i64(int64_t val)
e8996ee0 577{
a7812ae4
PB
578 TCGv_i64 t0;
579 t0 = tcg_temp_new_i64();
e8996ee0
FB
580 tcg_gen_movi_i64(t0, val);
581 return t0;
c896fe29
FB
582}
583
a7812ae4 584TCGv_i32 tcg_const_local_i32(int32_t val)
bdffd4a9 585{
a7812ae4
PB
586 TCGv_i32 t0;
587 t0 = tcg_temp_local_new_i32();
bdffd4a9
AJ
588 tcg_gen_movi_i32(t0, val);
589 return t0;
590}
591
a7812ae4 592TCGv_i64 tcg_const_local_i64(int64_t val)
bdffd4a9 593{
a7812ae4
PB
594 TCGv_i64 t0;
595 t0 = tcg_temp_local_new_i64();
bdffd4a9
AJ
596 tcg_gen_movi_i64(t0, val);
597 return t0;
598}
599
27bfd83c
PM
600#if defined(CONFIG_DEBUG_TCG)
601void tcg_clear_temp_count(void)
602{
603 TCGContext *s = &tcg_ctx;
604 s->temps_in_use = 0;
605}
606
607int tcg_check_temp_count(void)
608{
609 TCGContext *s = &tcg_ctx;
610 if (s->temps_in_use) {
611 /* Clear the count so that we don't give another
612 * warning immediately next time around.
613 */
614 s->temps_in_use = 0;
615 return 1;
616 }
617 return 0;
618}
619#endif
620
c896fe29
FB
621void tcg_register_helper(void *func, const char *name)
622{
623 TCGContext *s = &tcg_ctx;
624 int n;
625 if ((s->nb_helpers + 1) > s->allocated_helpers) {
626 n = s->allocated_helpers;
627 if (n == 0) {
628 n = 4;
629 } else {
630 n *= 2;
631 }
632 s->helpers = realloc(s->helpers, n * sizeof(TCGHelperInfo));
633 s->allocated_helpers = n;
634 }
4dc81f28 635 s->helpers[s->nb_helpers].func = (tcg_target_ulong)func;
c896fe29
FB
636 s->helpers[s->nb_helpers].name = name;
637 s->nb_helpers++;
638}
639
39cf05d3
FB
640/* Note: we convert the 64 bit args to 32 bit and do some alignment
641 and endian swap. Maybe it would be better to do the alignment
642 and endian swap in tcg_reg_alloc_call(). */
a7812ae4
PB
643void tcg_gen_callN(TCGContext *s, TCGv_ptr func, unsigned int flags,
644 int sizemask, TCGArg ret, int nargs, TCGArg *args)
c896fe29 645{
a7812ae4
PB
646 int i;
647 int real_args;
648 int nb_rets;
649 TCGArg *nparam;
2bece2c8
RH
650
651#if defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64
652 for (i = 0; i < nargs; ++i) {
653 int is_64bit = sizemask & (1 << (i+1)*2);
654 int is_signed = sizemask & (2 << (i+1)*2);
655 if (!is_64bit) {
656 TCGv_i64 temp = tcg_temp_new_i64();
657 TCGv_i64 orig = MAKE_TCGV_I64(args[i]);
658 if (is_signed) {
659 tcg_gen_ext32s_i64(temp, orig);
660 } else {
661 tcg_gen_ext32u_i64(temp, orig);
662 }
663 args[i] = GET_TCGV_I64(temp);
664 }
665 }
666#endif /* TCG_TARGET_EXTEND_ARGS */
667
efd7f486 668 *s->gen_opc_ptr++ = INDEX_op_call;
c4afe5c4 669 nparam = s->gen_opparam_ptr++;
a7812ae4
PB
670 if (ret != TCG_CALL_DUMMY_ARG) {
671#if TCG_TARGET_REG_BITS < 64
672 if (sizemask & 1) {
39cf05d3 673#ifdef TCG_TARGET_WORDS_BIGENDIAN
c4afe5c4
EV
674 *s->gen_opparam_ptr++ = ret + 1;
675 *s->gen_opparam_ptr++ = ret;
39cf05d3 676#else
c4afe5c4
EV
677 *s->gen_opparam_ptr++ = ret;
678 *s->gen_opparam_ptr++ = ret + 1;
39cf05d3 679#endif
a7812ae4
PB
680 nb_rets = 2;
681 } else
682#endif
683 {
c4afe5c4 684 *s->gen_opparam_ptr++ = ret;
a7812ae4 685 nb_rets = 1;
c896fe29 686 }
a7812ae4
PB
687 } else {
688 nb_rets = 0;
c896fe29 689 }
a7812ae4
PB
690 real_args = 0;
691 for (i = 0; i < nargs; i++) {
692#if TCG_TARGET_REG_BITS < 64
2bece2c8
RH
693 int is_64bit = sizemask & (1 << (i+1)*2);
694 if (is_64bit) {
39cf05d3
FB
695#ifdef TCG_TARGET_CALL_ALIGN_ARGS
696 /* some targets want aligned 64 bit args */
ebd486d5 697 if (real_args & 1) {
c4afe5c4 698 *s->gen_opparam_ptr++ = TCG_CALL_DUMMY_ARG;
ebd486d5 699 real_args++;
39cf05d3
FB
700 }
701#endif
3f90f252
RH
702 /* If stack grows up, then we will be placing successive
703 arguments at lower addresses, which means we need to
704 reverse the order compared to how we would normally
705 treat either big or little-endian. For those arguments
706 that will wind up in registers, this still works for
707 HPPA (the only current STACK_GROWSUP target) since the
708 argument registers are *also* allocated in decreasing
709 order. If another such target is added, this logic may
710 have to get more complicated to differentiate between
711 stack arguments and register arguments. */
712#if defined(TCG_TARGET_WORDS_BIGENDIAN) != defined(TCG_TARGET_STACK_GROWSUP)
c4afe5c4
EV
713 *s->gen_opparam_ptr++ = args[i] + 1;
714 *s->gen_opparam_ptr++ = args[i];
c896fe29 715#else
c4afe5c4
EV
716 *s->gen_opparam_ptr++ = args[i];
717 *s->gen_opparam_ptr++ = args[i] + 1;
c896fe29 718#endif
a7812ae4 719 real_args += 2;
2bece2c8 720 continue;
c896fe29 721 }
2bece2c8
RH
722#endif /* TCG_TARGET_REG_BITS < 64 */
723
c4afe5c4 724 *s->gen_opparam_ptr++ = args[i];
2bece2c8 725 real_args++;
c896fe29 726 }
c4afe5c4 727 *s->gen_opparam_ptr++ = GET_TCGV_PTR(func);
a7812ae4 728
c4afe5c4 729 *s->gen_opparam_ptr++ = flags;
a7812ae4
PB
730
731 *nparam = (nb_rets << 16) | (real_args + 1);
732
733 /* total parameters, needed to go backward in the instruction stream */
c4afe5c4 734 *s->gen_opparam_ptr++ = 1 + nb_rets + real_args + 3;
2bece2c8
RH
735
736#if defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64
737 for (i = 0; i < nargs; ++i) {
738 int is_64bit = sizemask & (1 << (i+1)*2);
739 if (!is_64bit) {
740 TCGv_i64 temp = MAKE_TCGV_I64(args[i]);
741 tcg_temp_free_i64(temp);
742 }
743 }
744#endif /* TCG_TARGET_EXTEND_ARGS */
c896fe29 745}
c896fe29 746
ac56dd48 747#if TCG_TARGET_REG_BITS == 32
a7812ae4 748void tcg_gen_shifti_i64(TCGv_i64 ret, TCGv_i64 arg1,
c896fe29
FB
749 int c, int right, int arith)
750{
cf60bce4 751 if (c == 0) {
a7812ae4 752 tcg_gen_mov_i32(TCGV_LOW(ret), TCGV_LOW(arg1));
cf60bce4
FB
753 tcg_gen_mov_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1));
754 } else if (c >= 32) {
c896fe29
FB
755 c -= 32;
756 if (right) {
757 if (arith) {
a7812ae4 758 tcg_gen_sari_i32(TCGV_LOW(ret), TCGV_HIGH(arg1), c);
ac56dd48 759 tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), 31);
c896fe29 760 } else {
a7812ae4 761 tcg_gen_shri_i32(TCGV_LOW(ret), TCGV_HIGH(arg1), c);
ac56dd48 762 tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
c896fe29
FB
763 }
764 } else {
a7812ae4
PB
765 tcg_gen_shli_i32(TCGV_HIGH(ret), TCGV_LOW(arg1), c);
766 tcg_gen_movi_i32(TCGV_LOW(ret), 0);
c896fe29
FB
767 }
768 } else {
a7812ae4 769 TCGv_i32 t0, t1;
c896fe29 770
a7812ae4
PB
771 t0 = tcg_temp_new_i32();
772 t1 = tcg_temp_new_i32();
c896fe29 773 if (right) {
ac56dd48 774 tcg_gen_shli_i32(t0, TCGV_HIGH(arg1), 32 - c);
c896fe29 775 if (arith)
ac56dd48 776 tcg_gen_sari_i32(t1, TCGV_HIGH(arg1), c);
a7812ae4 777 else
ac56dd48 778 tcg_gen_shri_i32(t1, TCGV_HIGH(arg1), c);
a7812ae4
PB
779 tcg_gen_shri_i32(TCGV_LOW(ret), TCGV_LOW(arg1), c);
780 tcg_gen_or_i32(TCGV_LOW(ret), TCGV_LOW(ret), t0);
ac56dd48 781 tcg_gen_mov_i32(TCGV_HIGH(ret), t1);
c896fe29 782 } else {
a7812ae4 783 tcg_gen_shri_i32(t0, TCGV_LOW(arg1), 32 - c);
c896fe29 784 /* Note: ret can be the same as arg1, so we use t1 */
a7812ae4 785 tcg_gen_shli_i32(t1, TCGV_LOW(arg1), c);
ac56dd48
PB
786 tcg_gen_shli_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), c);
787 tcg_gen_or_i32(TCGV_HIGH(ret), TCGV_HIGH(ret), t0);
a7812ae4 788 tcg_gen_mov_i32(TCGV_LOW(ret), t1);
c896fe29 789 }
a7812ae4
PB
790 tcg_temp_free_i32(t0);
791 tcg_temp_free_i32(t1);
c896fe29
FB
792 }
793}
ac56dd48 794#endif
c896fe29 795
be210acb 796
8fcd3692 797static void tcg_reg_alloc_start(TCGContext *s)
c896fe29
FB
798{
799 int i;
800 TCGTemp *ts;
801 for(i = 0; i < s->nb_globals; i++) {
802 ts = &s->temps[i];
803 if (ts->fixed_reg) {
804 ts->val_type = TEMP_VAL_REG;
805 } else {
806 ts->val_type = TEMP_VAL_MEM;
807 }
808 }
e8996ee0
FB
809 for(i = s->nb_globals; i < s->nb_temps; i++) {
810 ts = &s->temps[i];
7dfd8c6a
AJ
811 if (ts->temp_local) {
812 ts->val_type = TEMP_VAL_MEM;
813 } else {
814 ts->val_type = TEMP_VAL_DEAD;
815 }
e8996ee0
FB
816 ts->mem_allocated = 0;
817 ts->fixed_reg = 0;
818 }
c896fe29
FB
819 for(i = 0; i < TCG_TARGET_NB_REGS; i++) {
820 s->reg_to_temp[i] = -1;
821 }
822}
823
ac56dd48
PB
824static char *tcg_get_arg_str_idx(TCGContext *s, char *buf, int buf_size,
825 int idx)
c896fe29
FB
826{
827 TCGTemp *ts;
ac56dd48 828
7f6f0ae5 829 assert(idx >= 0 && idx < s->nb_temps);
ac56dd48
PB
830 ts = &s->temps[idx];
831 if (idx < s->nb_globals) {
832 pstrcpy(buf, buf_size, ts->name);
c896fe29 833 } else {
641d5fbe
FB
834 if (ts->temp_local)
835 snprintf(buf, buf_size, "loc%d", idx - s->nb_globals);
836 else
837 snprintf(buf, buf_size, "tmp%d", idx - s->nb_globals);
c896fe29
FB
838 }
839 return buf;
840}
841
a7812ae4
PB
842char *tcg_get_arg_str_i32(TCGContext *s, char *buf, int buf_size, TCGv_i32 arg)
843{
844 return tcg_get_arg_str_idx(s, buf, buf_size, GET_TCGV_I32(arg));
845}
846
847char *tcg_get_arg_str_i64(TCGContext *s, char *buf, int buf_size, TCGv_i64 arg)
ac56dd48 848{
a810a2de 849 return tcg_get_arg_str_idx(s, buf, buf_size, GET_TCGV_I64(arg));
ac56dd48
PB
850}
851
e8996ee0 852static int helper_cmp(const void *p1, const void *p2)
4dc81f28 853{
e8996ee0
FB
854 const TCGHelperInfo *th1 = p1;
855 const TCGHelperInfo *th2 = p2;
856 if (th1->func < th2->func)
857 return -1;
858 else if (th1->func == th2->func)
859 return 0;
860 else
861 return 1;
4dc81f28
FB
862}
863
e8996ee0
FB
864/* find helper definition (Note: A hash table would be better) */
865static TCGHelperInfo *tcg_find_helper(TCGContext *s, tcg_target_ulong val)
4dc81f28 866{
e8996ee0 867 int m, m_min, m_max;
4dc81f28 868 TCGHelperInfo *th;
e8996ee0 869 tcg_target_ulong v;
4dc81f28 870
e8996ee0
FB
871 if (unlikely(!s->helpers_sorted)) {
872 qsort(s->helpers, s->nb_helpers, sizeof(TCGHelperInfo),
873 helper_cmp);
874 s->helpers_sorted = 1;
875 }
876
877 /* binary search */
878 m_min = 0;
879 m_max = s->nb_helpers - 1;
880 while (m_min <= m_max) {
881 m = (m_min + m_max) >> 1;
882 th = &s->helpers[m];
883 v = th->func;
884 if (v == val)
885 return th;
886 else if (val < v) {
887 m_max = m - 1;
888 } else {
889 m_min = m + 1;
4dc81f28
FB
890 }
891 }
e8996ee0 892 return NULL;
4dc81f28
FB
893}
894
f48f3ede
BS
895static const char * const cond_name[] =
896{
0aed257f
RH
897 [TCG_COND_NEVER] = "never",
898 [TCG_COND_ALWAYS] = "always",
f48f3ede
BS
899 [TCG_COND_EQ] = "eq",
900 [TCG_COND_NE] = "ne",
901 [TCG_COND_LT] = "lt",
902 [TCG_COND_GE] = "ge",
903 [TCG_COND_LE] = "le",
904 [TCG_COND_GT] = "gt",
905 [TCG_COND_LTU] = "ltu",
906 [TCG_COND_GEU] = "geu",
907 [TCG_COND_LEU] = "leu",
908 [TCG_COND_GTU] = "gtu"
909};
910
eeacee4d 911void tcg_dump_ops(TCGContext *s)
c896fe29
FB
912{
913 const uint16_t *opc_ptr;
914 const TCGArg *args;
915 TCGArg arg;
a9751609
RH
916 TCGOpcode c;
917 int i, k, nb_oargs, nb_iargs, nb_cargs, first_insn;
c896fe29
FB
918 const TCGOpDef *def;
919 char buf[128];
920
7e4597d7 921 first_insn = 1;
92414b31 922 opc_ptr = s->gen_opc_buf;
1ff0a2c5 923 args = s->gen_opparam_buf;
efd7f486 924 while (opc_ptr < s->gen_opc_ptr) {
c896fe29
FB
925 c = *opc_ptr++;
926 def = &tcg_op_defs[c];
7e4597d7
FB
927 if (c == INDEX_op_debug_insn_start) {
928 uint64_t pc;
929#if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
930 pc = ((uint64_t)args[1] << 32) | args[0];
931#else
932 pc = args[0];
933#endif
eeacee4d
BS
934 if (!first_insn) {
935 qemu_log("\n");
936 }
937 qemu_log(" ---- 0x%" PRIx64, pc);
7e4597d7
FB
938 first_insn = 0;
939 nb_oargs = def->nb_oargs;
940 nb_iargs = def->nb_iargs;
941 nb_cargs = def->nb_cargs;
942 } else if (c == INDEX_op_call) {
c896fe29 943 TCGArg arg;
4dc81f28 944
c896fe29
FB
945 /* variable number of arguments */
946 arg = *args++;
947 nb_oargs = arg >> 16;
948 nb_iargs = arg & 0xffff;
949 nb_cargs = def->nb_cargs;
c896fe29 950
eeacee4d 951 qemu_log(" %s ", def->name);
7e4597d7 952
b03cce8e 953 /* function name */
eeacee4d
BS
954 qemu_log("%s",
955 tcg_get_arg_str_idx(s, buf, sizeof(buf),
956 args[nb_oargs + nb_iargs - 1]));
b03cce8e 957 /* flags */
eeacee4d 958 qemu_log(",$0x%" TCG_PRIlx, args[nb_oargs + nb_iargs]);
b03cce8e 959 /* nb out args */
eeacee4d 960 qemu_log(",$%d", nb_oargs);
b03cce8e 961 for(i = 0; i < nb_oargs; i++) {
eeacee4d
BS
962 qemu_log(",");
963 qemu_log("%s", tcg_get_arg_str_idx(s, buf, sizeof(buf),
964 args[i]));
b03cce8e
FB
965 }
966 for(i = 0; i < (nb_iargs - 1); i++) {
eeacee4d 967 qemu_log(",");
39cf05d3 968 if (args[nb_oargs + i] == TCG_CALL_DUMMY_ARG) {
eeacee4d 969 qemu_log("<dummy>");
39cf05d3 970 } else {
eeacee4d
BS
971 qemu_log("%s", tcg_get_arg_str_idx(s, buf, sizeof(buf),
972 args[nb_oargs + i]));
39cf05d3 973 }
b03cce8e 974 }
fba3161f 975 } else if (c == INDEX_op_movi_i32 || c == INDEX_op_movi_i64) {
e8996ee0
FB
976 tcg_target_ulong val;
977 TCGHelperInfo *th;
978
979 nb_oargs = def->nb_oargs;
980 nb_iargs = def->nb_iargs;
981 nb_cargs = def->nb_cargs;
eeacee4d
BS
982 qemu_log(" %s %s,$", def->name,
983 tcg_get_arg_str_idx(s, buf, sizeof(buf), args[0]));
e8996ee0
FB
984 val = args[1];
985 th = tcg_find_helper(s, val);
986 if (th) {
eeacee4d 987 qemu_log("%s", th->name);
e8996ee0 988 } else {
eeacee4d
BS
989 if (c == INDEX_op_movi_i32) {
990 qemu_log("0x%x", (uint32_t)val);
991 } else {
992 qemu_log("0x%" PRIx64 , (uint64_t)val);
993 }
e8996ee0 994 }
b03cce8e 995 } else {
eeacee4d 996 qemu_log(" %s ", def->name);
b03cce8e
FB
997 if (c == INDEX_op_nopn) {
998 /* variable number of arguments */
999 nb_cargs = *args;
1000 nb_oargs = 0;
1001 nb_iargs = 0;
1002 } else {
1003 nb_oargs = def->nb_oargs;
1004 nb_iargs = def->nb_iargs;
1005 nb_cargs = def->nb_cargs;
1006 }
1007
1008 k = 0;
1009 for(i = 0; i < nb_oargs; i++) {
eeacee4d
BS
1010 if (k != 0) {
1011 qemu_log(",");
1012 }
1013 qemu_log("%s", tcg_get_arg_str_idx(s, buf, sizeof(buf),
1014 args[k++]));
b03cce8e
FB
1015 }
1016 for(i = 0; i < nb_iargs; i++) {
eeacee4d
BS
1017 if (k != 0) {
1018 qemu_log(",");
1019 }
1020 qemu_log("%s", tcg_get_arg_str_idx(s, buf, sizeof(buf),
1021 args[k++]));
b03cce8e 1022 }
be210acb
RH
1023 switch (c) {
1024 case INDEX_op_brcond_i32:
be210acb 1025 case INDEX_op_setcond_i32:
ffc5ea09 1026 case INDEX_op_movcond_i32:
ffc5ea09 1027 case INDEX_op_brcond2_i32:
be210acb 1028 case INDEX_op_setcond2_i32:
ffc5ea09 1029 case INDEX_op_brcond_i64:
be210acb 1030 case INDEX_op_setcond_i64:
ffc5ea09 1031 case INDEX_op_movcond_i64:
eeacee4d
BS
1032 if (args[k] < ARRAY_SIZE(cond_name) && cond_name[args[k]]) {
1033 qemu_log(",%s", cond_name[args[k++]]);
1034 } else {
1035 qemu_log(",$0x%" TCG_PRIlx, args[k++]);
1036 }
f48f3ede 1037 i = 1;
be210acb
RH
1038 break;
1039 default:
f48f3ede 1040 i = 0;
be210acb
RH
1041 break;
1042 }
f48f3ede 1043 for(; i < nb_cargs; i++) {
eeacee4d
BS
1044 if (k != 0) {
1045 qemu_log(",");
1046 }
b03cce8e 1047 arg = args[k++];
eeacee4d 1048 qemu_log("$0x%" TCG_PRIlx, arg);
b03cce8e 1049 }
c896fe29 1050 }
eeacee4d 1051 qemu_log("\n");
c896fe29
FB
1052 args += nb_iargs + nb_oargs + nb_cargs;
1053 }
1054}
1055
1056/* we give more priority to constraints with less registers */
1057static int get_constraint_priority(const TCGOpDef *def, int k)
1058{
1059 const TCGArgConstraint *arg_ct;
1060
1061 int i, n;
1062 arg_ct = &def->args_ct[k];
1063 if (arg_ct->ct & TCG_CT_ALIAS) {
1064 /* an alias is equivalent to a single register */
1065 n = 1;
1066 } else {
1067 if (!(arg_ct->ct & TCG_CT_REG))
1068 return 0;
1069 n = 0;
1070 for(i = 0; i < TCG_TARGET_NB_REGS; i++) {
1071 if (tcg_regset_test_reg(arg_ct->u.regs, i))
1072 n++;
1073 }
1074 }
1075 return TCG_TARGET_NB_REGS - n + 1;
1076}
1077
1078/* sort from highest priority to lowest */
1079static void sort_constraints(TCGOpDef *def, int start, int n)
1080{
1081 int i, j, p1, p2, tmp;
1082
1083 for(i = 0; i < n; i++)
1084 def->sorted_args[start + i] = start + i;
1085 if (n <= 1)
1086 return;
1087 for(i = 0; i < n - 1; i++) {
1088 for(j = i + 1; j < n; j++) {
1089 p1 = get_constraint_priority(def, def->sorted_args[start + i]);
1090 p2 = get_constraint_priority(def, def->sorted_args[start + j]);
1091 if (p1 < p2) {
1092 tmp = def->sorted_args[start + i];
1093 def->sorted_args[start + i] = def->sorted_args[start + j];
1094 def->sorted_args[start + j] = tmp;
1095 }
1096 }
1097 }
1098}
1099
1100void tcg_add_target_add_op_defs(const TCGTargetOpDef *tdefs)
1101{
a9751609 1102 TCGOpcode op;
c896fe29
FB
1103 TCGOpDef *def;
1104 const char *ct_str;
1105 int i, nb_args;
1106
1107 for(;;) {
a9751609 1108 if (tdefs->op == (TCGOpcode)-1)
c896fe29
FB
1109 break;
1110 op = tdefs->op;
c3b08d0e 1111 assert((unsigned)op < NB_OPS);
c896fe29 1112 def = &tcg_op_defs[op];
c68aaa18
SW
1113#if defined(CONFIG_DEBUG_TCG)
1114 /* Duplicate entry in op definitions? */
1115 assert(!def->used);
1116 def->used = 1;
1117#endif
c896fe29
FB
1118 nb_args = def->nb_iargs + def->nb_oargs;
1119 for(i = 0; i < nb_args; i++) {
1120 ct_str = tdefs->args_ct_str[i];
c68aaa18
SW
1121 /* Incomplete TCGTargetOpDef entry? */
1122 assert(ct_str != NULL);
c896fe29
FB
1123 tcg_regset_clear(def->args_ct[i].u.regs);
1124 def->args_ct[i].ct = 0;
1125 if (ct_str[0] >= '0' && ct_str[0] <= '9') {
1126 int oarg;
1127 oarg = ct_str[0] - '0';
1128 assert(oarg < def->nb_oargs);
1129 assert(def->args_ct[oarg].ct & TCG_CT_REG);
1130 /* TCG_CT_ALIAS is for the output arguments. The input
5ff9d6a4 1131 argument is tagged with TCG_CT_IALIAS. */
c896fe29 1132 def->args_ct[i] = def->args_ct[oarg];
5ff9d6a4
FB
1133 def->args_ct[oarg].ct = TCG_CT_ALIAS;
1134 def->args_ct[oarg].alias_index = i;
c896fe29 1135 def->args_ct[i].ct |= TCG_CT_IALIAS;
5ff9d6a4 1136 def->args_ct[i].alias_index = oarg;
c896fe29
FB
1137 } else {
1138 for(;;) {
1139 if (*ct_str == '\0')
1140 break;
1141 switch(*ct_str) {
1142 case 'i':
1143 def->args_ct[i].ct |= TCG_CT_CONST;
1144 ct_str++;
1145 break;
1146 default:
1147 if (target_parse_constraint(&def->args_ct[i], &ct_str) < 0) {
1148 fprintf(stderr, "Invalid constraint '%s' for arg %d of operation '%s'\n",
1149 ct_str, i, def->name);
1150 exit(1);
1151 }
1152 }
1153 }
1154 }
1155 }
1156
c68aaa18
SW
1157 /* TCGTargetOpDef entry with too much information? */
1158 assert(i == TCG_MAX_OP_ARGS || tdefs->args_ct_str[i] == NULL);
1159
c896fe29
FB
1160 /* sort the constraints (XXX: this is just an heuristic) */
1161 sort_constraints(def, 0, def->nb_oargs);
1162 sort_constraints(def, def->nb_oargs, def->nb_iargs);
1163
1164#if 0
1165 {
1166 int i;
1167
1168 printf("%s: sorted=", def->name);
1169 for(i = 0; i < def->nb_oargs + def->nb_iargs; i++)
1170 printf(" %d", def->sorted_args[i]);
1171 printf("\n");
1172 }
1173#endif
1174 tdefs++;
1175 }
1176
c68aaa18 1177#if defined(CONFIG_DEBUG_TCG)
a9751609 1178 i = 0;
c68aaa18 1179 for (op = 0; op < ARRAY_SIZE(tcg_op_defs); op++) {
f412c762 1180 const TCGOpDef *def = &tcg_op_defs[op];
c1a61f6c 1181 if (def->flags & TCG_OPF_NOT_PRESENT) {
c68aaa18 1182 /* Wrong entry in op definitions? */
f412c762
RH
1183 if (def->used) {
1184 fprintf(stderr, "Invalid op definition for %s\n", def->name);
a9751609
RH
1185 i = 1;
1186 }
c68aaa18
SW
1187 } else {
1188 /* Missing entry in op definitions? */
f412c762
RH
1189 if (!def->used) {
1190 fprintf(stderr, "Missing op definition for %s\n", def->name);
a9751609
RH
1191 i = 1;
1192 }
c68aaa18
SW
1193 }
1194 }
a9751609
RH
1195 if (i == 1) {
1196 tcg_abort();
1197 }
c68aaa18 1198#endif
c896fe29
FB
1199}
1200
1201#ifdef USE_LIVENESS_ANALYSIS
1202
1203/* set a nop for an operation using 'nb_args' */
1204static inline void tcg_set_nop(TCGContext *s, uint16_t *opc_ptr,
1205 TCGArg *args, int nb_args)
1206{
1207 if (nb_args == 0) {
1208 *opc_ptr = INDEX_op_nop;
1209 } else {
1210 *opc_ptr = INDEX_op_nopn;
1211 args[0] = nb_args;
1212 args[nb_args - 1] = nb_args;
1213 }
1214}
1215
9c43b68d
AJ
1216/* liveness analysis: end of function: all temps are dead, and globals
1217 should be in memory. */
1218static inline void tcg_la_func_end(TCGContext *s, uint8_t *dead_temps,
1219 uint8_t *mem_temps)
c896fe29 1220{
9c43b68d
AJ
1221 memset(dead_temps, 1, s->nb_temps);
1222 memset(mem_temps, 1, s->nb_globals);
1223 memset(mem_temps + s->nb_globals, 0, s->nb_temps - s->nb_globals);
c896fe29
FB
1224}
1225
9c43b68d
AJ
1226/* liveness analysis: end of basic block: all temps are dead, globals
1227 and local temps should be in memory. */
1228static inline void tcg_la_bb_end(TCGContext *s, uint8_t *dead_temps,
1229 uint8_t *mem_temps)
641d5fbe
FB
1230{
1231 int i;
641d5fbe 1232
9c43b68d
AJ
1233 memset(dead_temps, 1, s->nb_temps);
1234 memset(mem_temps, 1, s->nb_globals);
641d5fbe 1235 for(i = s->nb_globals; i < s->nb_temps; i++) {
9c43b68d 1236 mem_temps[i] = s->temps[i].temp_local;
641d5fbe
FB
1237 }
1238}
1239
866cb6cb 1240/* Liveness analysis : update the opc_dead_args array to tell if a
c896fe29
FB
1241 given input arguments is dead. Instructions updating dead
1242 temporaries are removed. */
8fcd3692 1243static void tcg_liveness_analysis(TCGContext *s)
c896fe29 1244{
a9751609 1245 int i, op_index, nb_args, nb_iargs, nb_oargs, arg, nb_ops;
f1fae40c 1246 TCGOpcode op, op_new;
c896fe29
FB
1247 TCGArg *args;
1248 const TCGOpDef *def;
9c43b68d 1249 uint8_t *dead_temps, *mem_temps;
ec7a869d
AJ
1250 uint16_t dead_args;
1251 uint8_t sync_args;
c896fe29 1252
efd7f486 1253 s->gen_opc_ptr++; /* skip end */
c896fe29 1254
92414b31 1255 nb_ops = s->gen_opc_ptr - s->gen_opc_buf;
c896fe29 1256
866cb6cb 1257 s->op_dead_args = tcg_malloc(nb_ops * sizeof(uint16_t));
ec7a869d 1258 s->op_sync_args = tcg_malloc(nb_ops * sizeof(uint8_t));
c896fe29
FB
1259
1260 dead_temps = tcg_malloc(s->nb_temps);
9c43b68d
AJ
1261 mem_temps = tcg_malloc(s->nb_temps);
1262 tcg_la_func_end(s, dead_temps, mem_temps);
c896fe29 1263
c4afe5c4 1264 args = s->gen_opparam_ptr;
c896fe29
FB
1265 op_index = nb_ops - 1;
1266 while (op_index >= 0) {
92414b31 1267 op = s->gen_opc_buf[op_index];
c896fe29
FB
1268 def = &tcg_op_defs[op];
1269 switch(op) {
1270 case INDEX_op_call:
c6e113f5
FB
1271 {
1272 int call_flags;
c896fe29 1273
c6e113f5
FB
1274 nb_args = args[-1];
1275 args -= nb_args;
1276 nb_iargs = args[0] & 0xffff;
1277 nb_oargs = args[0] >> 16;
1278 args++;
1279 call_flags = args[nb_oargs + nb_iargs];
1280
1281 /* pure functions can be removed if their result is not
1282 used */
78505279 1283 if (call_flags & TCG_CALL_NO_SIDE_EFFECTS) {
c6e113f5
FB
1284 for(i = 0; i < nb_oargs; i++) {
1285 arg = args[i];
9c43b68d 1286 if (!dead_temps[arg] || mem_temps[arg]) {
c6e113f5 1287 goto do_not_remove_call;
9c43b68d 1288 }
c6e113f5 1289 }
92414b31 1290 tcg_set_nop(s, s->gen_opc_buf + op_index,
c6e113f5
FB
1291 args - 1, nb_args);
1292 } else {
1293 do_not_remove_call:
c896fe29 1294
c6e113f5 1295 /* output args are dead */
6b64b624 1296 dead_args = 0;
ec7a869d 1297 sync_args = 0;
c6e113f5
FB
1298 for(i = 0; i < nb_oargs; i++) {
1299 arg = args[i];
6b64b624
AJ
1300 if (dead_temps[arg]) {
1301 dead_args |= (1 << i);
1302 }
9c43b68d
AJ
1303 if (mem_temps[arg]) {
1304 sync_args |= (1 << i);
1305 }
c6e113f5 1306 dead_temps[arg] = 1;
9c43b68d 1307 mem_temps[arg] = 0;
c6e113f5 1308 }
78505279
AJ
1309
1310 if (!(call_flags & TCG_CALL_NO_READ_GLOBALS)) {
1311 /* globals should be synced to memory */
1312 memset(mem_temps, 1, s->nb_globals);
1313 }
1314 if (!(call_flags & (TCG_CALL_NO_WRITE_GLOBALS |
1315 TCG_CALL_NO_READ_GLOBALS))) {
9c43b68d
AJ
1316 /* globals should go back to memory */
1317 memset(dead_temps, 1, s->nb_globals);
b9c18f56
AJ
1318 }
1319
c6e113f5 1320 /* input args are live */
866cb6cb
AJ
1321 for(i = nb_oargs; i < nb_iargs + nb_oargs; i++) {
1322 arg = args[i];
39cf05d3
FB
1323 if (arg != TCG_CALL_DUMMY_ARG) {
1324 if (dead_temps[arg]) {
866cb6cb 1325 dead_args |= (1 << i);
39cf05d3
FB
1326 }
1327 dead_temps[arg] = 0;
c6e113f5 1328 }
c6e113f5 1329 }
866cb6cb 1330 s->op_dead_args[op_index] = dead_args;
ec7a869d 1331 s->op_sync_args[op_index] = sync_args;
c896fe29 1332 }
c6e113f5 1333 args--;
c896fe29 1334 }
c896fe29 1335 break;
7e4597d7
FB
1336 case INDEX_op_debug_insn_start:
1337 args -= def->nb_args;
1338 break;
c896fe29
FB
1339 case INDEX_op_nopn:
1340 nb_args = args[-1];
1341 args -= nb_args;
1342 break;
5ff9d6a4
FB
1343 case INDEX_op_discard:
1344 args--;
1345 /* mark the temporary as dead */
1346 dead_temps[args[0]] = 1;
9c43b68d 1347 mem_temps[args[0]] = 0;
5ff9d6a4 1348 break;
c896fe29
FB
1349 case INDEX_op_end:
1350 break;
1305c451
RH
1351
1352 case INDEX_op_add2_i32:
f1fae40c
RH
1353 op_new = INDEX_op_add_i32;
1354 goto do_addsub2;
1305c451 1355 case INDEX_op_sub2_i32:
f1fae40c
RH
1356 op_new = INDEX_op_sub_i32;
1357 goto do_addsub2;
1358 case INDEX_op_add2_i64:
1359 op_new = INDEX_op_add_i64;
1360 goto do_addsub2;
1361 case INDEX_op_sub2_i64:
1362 op_new = INDEX_op_sub_i64;
1363 do_addsub2:
1305c451
RH
1364 args -= 6;
1365 nb_iargs = 4;
1366 nb_oargs = 2;
1367 /* Test if the high part of the operation is dead, but not
1368 the low part. The result can be optimized to a simple
1369 add or sub. This happens often for x86_64 guest when the
1370 cpu mode is set to 32 bit. */
3c5645fa
KB
1371 if (dead_temps[args[1]] && !mem_temps[args[1]]) {
1372 if (dead_temps[args[0]] && !mem_temps[args[0]]) {
1305c451
RH
1373 goto do_remove;
1374 }
1375 /* Create the single operation plus nop. */
f1fae40c 1376 s->gen_opc_buf[op_index] = op = op_new;
1305c451
RH
1377 args[1] = args[2];
1378 args[2] = args[4];
92414b31
EV
1379 assert(s->gen_opc_buf[op_index + 1] == INDEX_op_nop);
1380 tcg_set_nop(s, s->gen_opc_buf + op_index + 1, args + 3, 3);
1305c451
RH
1381 /* Fall through and mark the single-word operation live. */
1382 nb_iargs = 2;
1383 nb_oargs = 1;
1384 }
1385 goto do_not_remove;
1386
1414968a 1387 case INDEX_op_mulu2_i32:
f1fae40c
RH
1388 case INDEX_op_muls2_i32:
1389 op_new = INDEX_op_mul_i32;
1390 goto do_mul2;
1391 case INDEX_op_mulu2_i64:
1392 case INDEX_op_muls2_i64:
1393 op_new = INDEX_op_mul_i64;
1394 do_mul2:
1414968a
RH
1395 args -= 4;
1396 nb_iargs = 2;
1397 nb_oargs = 2;
1398 /* Likewise, test for the high part of the operation dead. */
3c5645fa
KB
1399 if (dead_temps[args[1]] && !mem_temps[args[1]]) {
1400 if (dead_temps[args[0]] && !mem_temps[args[0]]) {
1414968a
RH
1401 goto do_remove;
1402 }
f1fae40c 1403 s->gen_opc_buf[op_index] = op = op_new;
1414968a
RH
1404 args[1] = args[2];
1405 args[2] = args[3];
92414b31
EV
1406 assert(s->gen_opc_buf[op_index + 1] == INDEX_op_nop);
1407 tcg_set_nop(s, s->gen_opc_buf + op_index + 1, args + 3, 1);
1414968a
RH
1408 /* Fall through and mark the single-word operation live. */
1409 nb_oargs = 1;
1410 }
1411 goto do_not_remove;
1412
c896fe29 1413 default:
1305c451 1414 /* XXX: optimize by hardcoding common cases (e.g. triadic ops) */
49516bc0
AJ
1415 args -= def->nb_args;
1416 nb_iargs = def->nb_iargs;
1417 nb_oargs = def->nb_oargs;
c896fe29 1418
49516bc0
AJ
1419 /* Test if the operation can be removed because all
1420 its outputs are dead. We assume that nb_oargs == 0
1421 implies side effects */
1422 if (!(def->flags & TCG_OPF_SIDE_EFFECTS) && nb_oargs != 0) {
1423 for(i = 0; i < nb_oargs; i++) {
1424 arg = args[i];
9c43b68d 1425 if (!dead_temps[arg] || mem_temps[arg]) {
49516bc0 1426 goto do_not_remove;
9c43b68d 1427 }
49516bc0 1428 }
1305c451 1429 do_remove:
92414b31 1430 tcg_set_nop(s, s->gen_opc_buf + op_index, args, def->nb_args);
c896fe29 1431#ifdef CONFIG_PROFILER
49516bc0 1432 s->del_op_count++;
c896fe29 1433#endif
49516bc0
AJ
1434 } else {
1435 do_not_remove:
c896fe29 1436
49516bc0 1437 /* output args are dead */
6b64b624 1438 dead_args = 0;
ec7a869d 1439 sync_args = 0;
49516bc0
AJ
1440 for(i = 0; i < nb_oargs; i++) {
1441 arg = args[i];
6b64b624
AJ
1442 if (dead_temps[arg]) {
1443 dead_args |= (1 << i);
1444 }
9c43b68d
AJ
1445 if (mem_temps[arg]) {
1446 sync_args |= (1 << i);
1447 }
49516bc0 1448 dead_temps[arg] = 1;
9c43b68d 1449 mem_temps[arg] = 0;
49516bc0
AJ
1450 }
1451
1452 /* if end of basic block, update */
1453 if (def->flags & TCG_OPF_BB_END) {
9c43b68d 1454 tcg_la_bb_end(s, dead_temps, mem_temps);
3d5c5f87
AJ
1455 } else if (def->flags & TCG_OPF_SIDE_EFFECTS) {
1456 /* globals should be synced to memory */
9c43b68d 1457 memset(mem_temps, 1, s->nb_globals);
49516bc0
AJ
1458 }
1459
1460 /* input args are live */
866cb6cb
AJ
1461 for(i = nb_oargs; i < nb_oargs + nb_iargs; i++) {
1462 arg = args[i];
49516bc0 1463 if (dead_temps[arg]) {
866cb6cb 1464 dead_args |= (1 << i);
c896fe29 1465 }
49516bc0 1466 dead_temps[arg] = 0;
c896fe29 1467 }
866cb6cb 1468 s->op_dead_args[op_index] = dead_args;
ec7a869d 1469 s->op_sync_args[op_index] = sync_args;
c896fe29
FB
1470 }
1471 break;
1472 }
1473 op_index--;
1474 }
1475
1ff0a2c5 1476 if (args != s->gen_opparam_buf) {
c896fe29 1477 tcg_abort();
1ff0a2c5 1478 }
c896fe29
FB
1479}
1480#else
1481/* dummy liveness analysis */
655feed5 1482static void tcg_liveness_analysis(TCGContext *s)
c896fe29
FB
1483{
1484 int nb_ops;
92414b31 1485 nb_ops = s->gen_opc_ptr - s->gen_opc_buf;
c896fe29 1486
866cb6cb
AJ
1487 s->op_dead_args = tcg_malloc(nb_ops * sizeof(uint16_t));
1488 memset(s->op_dead_args, 0, nb_ops * sizeof(uint16_t));
ec7a869d
AJ
1489 s->op_sync_args = tcg_malloc(nb_ops * sizeof(uint8_t));
1490 memset(s->op_sync_args, 0, nb_ops * sizeof(uint8_t));
c896fe29
FB
1491}
1492#endif
1493
1494#ifndef NDEBUG
1495static void dump_regs(TCGContext *s)
1496{
1497 TCGTemp *ts;
1498 int i;
1499 char buf[64];
1500
1501 for(i = 0; i < s->nb_temps; i++) {
1502 ts = &s->temps[i];
ac56dd48 1503 printf(" %10s: ", tcg_get_arg_str_idx(s, buf, sizeof(buf), i));
c896fe29
FB
1504 switch(ts->val_type) {
1505 case TEMP_VAL_REG:
1506 printf("%s", tcg_target_reg_names[ts->reg]);
1507 break;
1508 case TEMP_VAL_MEM:
1509 printf("%d(%s)", (int)ts->mem_offset, tcg_target_reg_names[ts->mem_reg]);
1510 break;
1511 case TEMP_VAL_CONST:
1512 printf("$0x%" TCG_PRIlx, ts->val);
1513 break;
1514 case TEMP_VAL_DEAD:
1515 printf("D");
1516 break;
1517 default:
1518 printf("???");
1519 break;
1520 }
1521 printf("\n");
1522 }
1523
1524 for(i = 0; i < TCG_TARGET_NB_REGS; i++) {
1525 if (s->reg_to_temp[i] >= 0) {
1526 printf("%s: %s\n",
1527 tcg_target_reg_names[i],
ac56dd48 1528 tcg_get_arg_str_idx(s, buf, sizeof(buf), s->reg_to_temp[i]));
c896fe29
FB
1529 }
1530 }
1531}
1532
1533static void check_regs(TCGContext *s)
1534{
1535 int reg, k;
1536 TCGTemp *ts;
1537 char buf[64];
1538
1539 for(reg = 0; reg < TCG_TARGET_NB_REGS; reg++) {
1540 k = s->reg_to_temp[reg];
1541 if (k >= 0) {
1542 ts = &s->temps[k];
1543 if (ts->val_type != TEMP_VAL_REG ||
1544 ts->reg != reg) {
1545 printf("Inconsistency for register %s:\n",
1546 tcg_target_reg_names[reg]);
b03cce8e 1547 goto fail;
c896fe29
FB
1548 }
1549 }
1550 }
1551 for(k = 0; k < s->nb_temps; k++) {
1552 ts = &s->temps[k];
1553 if (ts->val_type == TEMP_VAL_REG &&
1554 !ts->fixed_reg &&
1555 s->reg_to_temp[ts->reg] != k) {
1556 printf("Inconsistency for temp %s:\n",
ac56dd48 1557 tcg_get_arg_str_idx(s, buf, sizeof(buf), k));
b03cce8e 1558 fail:
c896fe29
FB
1559 printf("reg state:\n");
1560 dump_regs(s);
1561 tcg_abort();
1562 }
1563 }
1564}
1565#endif
1566
1567static void temp_allocate_frame(TCGContext *s, int temp)
1568{
1569 TCGTemp *ts;
1570 ts = &s->temps[temp];
9b9c37c3
RH
1571#if !(defined(__sparc__) && TCG_TARGET_REG_BITS == 64)
1572 /* Sparc64 stack is accessed with offset of 2047 */
b591dc59
BS
1573 s->current_frame_offset = (s->current_frame_offset +
1574 (tcg_target_long)sizeof(tcg_target_long) - 1) &
1575 ~(sizeof(tcg_target_long) - 1);
f44c9960 1576#endif
b591dc59
BS
1577 if (s->current_frame_offset + (tcg_target_long)sizeof(tcg_target_long) >
1578 s->frame_end) {
5ff9d6a4 1579 tcg_abort();
b591dc59 1580 }
c896fe29
FB
1581 ts->mem_offset = s->current_frame_offset;
1582 ts->mem_reg = s->frame_reg;
1583 ts->mem_allocated = 1;
b591dc59 1584 s->current_frame_offset += (tcg_target_long)sizeof(tcg_target_long);
c896fe29
FB
1585}
1586
7f6ceedf
AJ
1587/* sync register 'reg' by saving it to the corresponding temporary */
1588static inline void tcg_reg_sync(TCGContext *s, int reg)
1589{
1590 TCGTemp *ts;
1591 int temp;
1592
1593 temp = s->reg_to_temp[reg];
1594 ts = &s->temps[temp];
1595 assert(ts->val_type == TEMP_VAL_REG);
1596 if (!ts->mem_coherent && !ts->fixed_reg) {
1597 if (!ts->mem_allocated) {
1598 temp_allocate_frame(s, temp);
1599 }
1600 tcg_out_st(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
1601 }
1602 ts->mem_coherent = 1;
1603}
1604
c896fe29
FB
1605/* free register 'reg' by spilling the corresponding temporary if necessary */
1606static void tcg_reg_free(TCGContext *s, int reg)
1607{
c896fe29
FB
1608 int temp;
1609
1610 temp = s->reg_to_temp[reg];
1611 if (temp != -1) {
7f6ceedf
AJ
1612 tcg_reg_sync(s, reg);
1613 s->temps[temp].val_type = TEMP_VAL_MEM;
c896fe29
FB
1614 s->reg_to_temp[reg] = -1;
1615 }
1616}
1617
1618/* Allocate a register belonging to reg1 & ~reg2 */
1619static int tcg_reg_alloc(TCGContext *s, TCGRegSet reg1, TCGRegSet reg2)
1620{
1621 int i, reg;
1622 TCGRegSet reg_ct;
1623
1624 tcg_regset_andnot(reg_ct, reg1, reg2);
1625
1626 /* first try free registers */
0954d0d9 1627 for(i = 0; i < ARRAY_SIZE(tcg_target_reg_alloc_order); i++) {
c896fe29
FB
1628 reg = tcg_target_reg_alloc_order[i];
1629 if (tcg_regset_test_reg(reg_ct, reg) && s->reg_to_temp[reg] == -1)
1630 return reg;
1631 }
1632
1633 /* XXX: do better spill choice */
0954d0d9 1634 for(i = 0; i < ARRAY_SIZE(tcg_target_reg_alloc_order); i++) {
c896fe29
FB
1635 reg = tcg_target_reg_alloc_order[i];
1636 if (tcg_regset_test_reg(reg_ct, reg)) {
1637 tcg_reg_free(s, reg);
1638 return reg;
1639 }
1640 }
1641
1642 tcg_abort();
1643}
1644
639368dd
AJ
1645/* mark a temporary as dead. */
1646static inline void temp_dead(TCGContext *s, int temp)
1647{
1648 TCGTemp *ts;
1649
1650 ts = &s->temps[temp];
1651 if (!ts->fixed_reg) {
1652 if (ts->val_type == TEMP_VAL_REG) {
1653 s->reg_to_temp[ts->reg] = -1;
1654 }
e5138db5 1655 if (temp < s->nb_globals || ts->temp_local) {
639368dd
AJ
1656 ts->val_type = TEMP_VAL_MEM;
1657 } else {
1658 ts->val_type = TEMP_VAL_DEAD;
1659 }
1660 }
1661}
1662
1ad80729 1663/* sync a temporary to memory. 'allocated_regs' is used in case a
641d5fbe 1664 temporary registers needs to be allocated to store a constant. */
1ad80729 1665static inline void temp_sync(TCGContext *s, int temp, TCGRegSet allocated_regs)
641d5fbe
FB
1666{
1667 TCGTemp *ts;
641d5fbe
FB
1668
1669 ts = &s->temps[temp];
1670 if (!ts->fixed_reg) {
1671 switch(ts->val_type) {
1ad80729
AJ
1672 case TEMP_VAL_CONST:
1673 ts->reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type],
1674 allocated_regs);
1675 ts->val_type = TEMP_VAL_REG;
1676 s->reg_to_temp[ts->reg] = temp;
1677 ts->mem_coherent = 0;
1678 tcg_out_movi(s, ts->type, ts->reg, ts->val);
1679 /* fallthrough*/
641d5fbe 1680 case TEMP_VAL_REG:
1ad80729 1681 tcg_reg_sync(s, ts->reg);
641d5fbe
FB
1682 break;
1683 case TEMP_VAL_DEAD:
641d5fbe
FB
1684 case TEMP_VAL_MEM:
1685 break;
1686 default:
1687 tcg_abort();
1688 }
1689 }
1690}
1691
1ad80729
AJ
1692/* save a temporary to memory. 'allocated_regs' is used in case a
1693 temporary registers needs to be allocated to store a constant. */
1694static inline void temp_save(TCGContext *s, int temp, TCGRegSet allocated_regs)
1695{
2c0366f0
AJ
1696#ifdef USE_LIVENESS_ANALYSIS
1697 /* The liveness analysis already ensures that globals are back
1698 in memory. Keep an assert for safety. */
1699 assert(s->temps[temp].val_type == TEMP_VAL_MEM || s->temps[temp].fixed_reg);
1700#else
1ad80729
AJ
1701 temp_sync(s, temp, allocated_regs);
1702 temp_dead(s, temp);
2c0366f0 1703#endif
1ad80729
AJ
1704}
1705
9814dd27 1706/* save globals to their canonical location and assume they can be
e8996ee0
FB
1707 modified be the following code. 'allocated_regs' is used in case a
1708 temporary registers needs to be allocated to store a constant. */
1709static void save_globals(TCGContext *s, TCGRegSet allocated_regs)
c896fe29 1710{
641d5fbe 1711 int i;
c896fe29
FB
1712
1713 for(i = 0; i < s->nb_globals; i++) {
641d5fbe 1714 temp_save(s, i, allocated_regs);
c896fe29 1715 }
e5097dc8
FB
1716}
1717
3d5c5f87
AJ
1718/* sync globals to their canonical location and assume they can be
1719 read by the following code. 'allocated_regs' is used in case a
1720 temporary registers needs to be allocated to store a constant. */
1721static void sync_globals(TCGContext *s, TCGRegSet allocated_regs)
1722{
1723 int i;
1724
1725 for (i = 0; i < s->nb_globals; i++) {
1726#ifdef USE_LIVENESS_ANALYSIS
1727 assert(s->temps[i].val_type != TEMP_VAL_REG || s->temps[i].fixed_reg ||
1728 s->temps[i].mem_coherent);
1729#else
1730 temp_sync(s, i, allocated_regs);
1731#endif
1732 }
1733}
1734
e5097dc8 1735/* at the end of a basic block, we assume all temporaries are dead and
e8996ee0
FB
1736 all globals are stored at their canonical location. */
1737static void tcg_reg_alloc_bb_end(TCGContext *s, TCGRegSet allocated_regs)
e5097dc8
FB
1738{
1739 TCGTemp *ts;
1740 int i;
1741
c896fe29
FB
1742 for(i = s->nb_globals; i < s->nb_temps; i++) {
1743 ts = &s->temps[i];
641d5fbe
FB
1744 if (ts->temp_local) {
1745 temp_save(s, i, allocated_regs);
1746 } else {
2c0366f0
AJ
1747#ifdef USE_LIVENESS_ANALYSIS
1748 /* The liveness analysis already ensures that temps are dead.
1749 Keep an assert for safety. */
1750 assert(ts->val_type == TEMP_VAL_DEAD);
1751#else
639368dd 1752 temp_dead(s, i);
2c0366f0 1753#endif
c896fe29
FB
1754 }
1755 }
e8996ee0
FB
1756
1757 save_globals(s, allocated_regs);
c896fe29
FB
1758}
1759
866cb6cb 1760#define IS_DEAD_ARG(n) ((dead_args >> (n)) & 1)
ec7a869d 1761#define NEED_SYNC_ARG(n) ((sync_args >> (n)) & 1)
c896fe29 1762
ec7a869d
AJ
1763static void tcg_reg_alloc_movi(TCGContext *s, const TCGArg *args,
1764 uint16_t dead_args, uint8_t sync_args)
e8996ee0
FB
1765{
1766 TCGTemp *ots;
1767 tcg_target_ulong val;
1768
1769 ots = &s->temps[args[0]];
1770 val = args[1];
1771
1772 if (ots->fixed_reg) {
1773 /* for fixed registers, we do not do any constant
1774 propagation */
1775 tcg_out_movi(s, ots->type, ots->reg, val);
1776 } else {
1235fc06 1777 /* The movi is not explicitly generated here */
e8996ee0
FB
1778 if (ots->val_type == TEMP_VAL_REG)
1779 s->reg_to_temp[ots->reg] = -1;
1780 ots->val_type = TEMP_VAL_CONST;
1781 ots->val = val;
1782 }
ec7a869d
AJ
1783 if (NEED_SYNC_ARG(0)) {
1784 temp_sync(s, args[0], s->reserved_regs);
1785 }
4c4e1ab2
AJ
1786 if (IS_DEAD_ARG(0)) {
1787 temp_dead(s, args[0]);
1788 }
e8996ee0
FB
1789}
1790
c896fe29 1791static void tcg_reg_alloc_mov(TCGContext *s, const TCGOpDef *def,
ec7a869d
AJ
1792 const TCGArg *args, uint16_t dead_args,
1793 uint8_t sync_args)
c896fe29 1794{
c29c1d7e 1795 TCGRegSet allocated_regs;
c896fe29 1796 TCGTemp *ts, *ots;
c29c1d7e 1797 const TCGArgConstraint *arg_ct, *oarg_ct;
c896fe29 1798
c29c1d7e 1799 tcg_regset_set(allocated_regs, s->reserved_regs);
c896fe29
FB
1800 ots = &s->temps[args[0]];
1801 ts = &s->temps[args[1]];
c29c1d7e
AJ
1802 oarg_ct = &def->args_ct[0];
1803 arg_ct = &def->args_ct[1];
1804
1805 /* If the source value is not in a register, and we're going to be
1806 forced to have it in a register in order to perform the copy,
1807 then copy the SOURCE value into its own register first. That way
1808 we don't have to reload SOURCE the next time it is used. */
1809 if (((NEED_SYNC_ARG(0) || ots->fixed_reg) && ts->val_type != TEMP_VAL_REG)
1810 || ts->val_type == TEMP_VAL_MEM) {
1811 ts->reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
1812 if (ts->val_type == TEMP_VAL_MEM) {
1813 tcg_out_ld(s, ts->type, ts->reg, ts->mem_reg, ts->mem_offset);
1814 ts->mem_coherent = 1;
1815 } else if (ts->val_type == TEMP_VAL_CONST) {
1816 tcg_out_movi(s, ts->type, ts->reg, ts->val);
1817 }
1818 s->reg_to_temp[ts->reg] = args[1];
1819 ts->val_type = TEMP_VAL_REG;
1820 }
c896fe29 1821
c29c1d7e
AJ
1822 if (IS_DEAD_ARG(0) && !ots->fixed_reg) {
1823 /* mov to a non-saved dead register makes no sense (even with
1824 liveness analysis disabled). */
1825 assert(NEED_SYNC_ARG(0));
1826 /* The code above should have moved the temp to a register. */
1827 assert(ts->val_type == TEMP_VAL_REG);
1828 if (!ots->mem_allocated) {
1829 temp_allocate_frame(s, args[0]);
1830 }
1831 tcg_out_st(s, ots->type, ts->reg, ots->mem_reg, ots->mem_offset);
1832 if (IS_DEAD_ARG(1)) {
1833 temp_dead(s, args[1]);
1834 }
1835 temp_dead(s, args[0]);
1836 } else if (ts->val_type == TEMP_VAL_CONST) {
1837 /* propagate constant */
1838 if (ots->val_type == TEMP_VAL_REG) {
1839 s->reg_to_temp[ots->reg] = -1;
1840 }
1841 ots->val_type = TEMP_VAL_CONST;
1842 ots->val = ts->val;
1843 } else {
1844 /* The code in the first if block should have moved the
1845 temp to a register. */
1846 assert(ts->val_type == TEMP_VAL_REG);
866cb6cb 1847 if (IS_DEAD_ARG(1) && !ts->fixed_reg && !ots->fixed_reg) {
c896fe29 1848 /* the mov can be suppressed */
c29c1d7e 1849 if (ots->val_type == TEMP_VAL_REG) {
c896fe29 1850 s->reg_to_temp[ots->reg] = -1;
c29c1d7e
AJ
1851 }
1852 ots->reg = ts->reg;
639368dd 1853 temp_dead(s, args[1]);
c896fe29 1854 } else {
c29c1d7e
AJ
1855 if (ots->val_type != TEMP_VAL_REG) {
1856 /* When allocating a new register, make sure to not spill the
1857 input one. */
1858 tcg_regset_set_reg(allocated_regs, ts->reg);
1859 ots->reg = tcg_reg_alloc(s, oarg_ct->u.regs, allocated_regs);
c896fe29 1860 }
c29c1d7e 1861 tcg_out_mov(s, ots->type, ots->reg, ts->reg);
c896fe29 1862 }
c29c1d7e
AJ
1863 ots->val_type = TEMP_VAL_REG;
1864 ots->mem_coherent = 0;
1865 s->reg_to_temp[ots->reg] = args[0];
1866 if (NEED_SYNC_ARG(0)) {
1867 tcg_reg_sync(s, ots->reg);
c896fe29 1868 }
ec7a869d 1869 }
c896fe29
FB
1870}
1871
1872static void tcg_reg_alloc_op(TCGContext *s,
a9751609 1873 const TCGOpDef *def, TCGOpcode opc,
ec7a869d
AJ
1874 const TCGArg *args, uint16_t dead_args,
1875 uint8_t sync_args)
c896fe29
FB
1876{
1877 TCGRegSet allocated_regs;
1878 int i, k, nb_iargs, nb_oargs, reg;
1879 TCGArg arg;
1880 const TCGArgConstraint *arg_ct;
1881 TCGTemp *ts;
1882 TCGArg new_args[TCG_MAX_OP_ARGS];
1883 int const_args[TCG_MAX_OP_ARGS];
1884
1885 nb_oargs = def->nb_oargs;
1886 nb_iargs = def->nb_iargs;
1887
1888 /* copy constants */
1889 memcpy(new_args + nb_oargs + nb_iargs,
1890 args + nb_oargs + nb_iargs,
1891 sizeof(TCGArg) * def->nb_cargs);
1892
1893 /* satisfy input constraints */
1894 tcg_regset_set(allocated_regs, s->reserved_regs);
1895 for(k = 0; k < nb_iargs; k++) {
1896 i = def->sorted_args[nb_oargs + k];
1897 arg = args[i];
1898 arg_ct = &def->args_ct[i];
1899 ts = &s->temps[arg];
1900 if (ts->val_type == TEMP_VAL_MEM) {
1901 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
e4d5434c 1902 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
c896fe29
FB
1903 ts->val_type = TEMP_VAL_REG;
1904 ts->reg = reg;
1905 ts->mem_coherent = 1;
1906 s->reg_to_temp[reg] = arg;
1907 } else if (ts->val_type == TEMP_VAL_CONST) {
1908 if (tcg_target_const_match(ts->val, arg_ct)) {
1909 /* constant is OK for instruction */
1910 const_args[i] = 1;
1911 new_args[i] = ts->val;
1912 goto iarg_end;
1913 } else {
e8996ee0 1914 /* need to move to a register */
c896fe29
FB
1915 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
1916 tcg_out_movi(s, ts->type, reg, ts->val);
e8996ee0
FB
1917 ts->val_type = TEMP_VAL_REG;
1918 ts->reg = reg;
1919 ts->mem_coherent = 0;
1920 s->reg_to_temp[reg] = arg;
c896fe29
FB
1921 }
1922 }
1923 assert(ts->val_type == TEMP_VAL_REG);
5ff9d6a4
FB
1924 if (arg_ct->ct & TCG_CT_IALIAS) {
1925 if (ts->fixed_reg) {
1926 /* if fixed register, we must allocate a new register
1927 if the alias is not the same register */
1928 if (arg != args[arg_ct->alias_index])
1929 goto allocate_in_reg;
1930 } else {
1931 /* if the input is aliased to an output and if it is
1932 not dead after the instruction, we must allocate
1933 a new register and move it */
866cb6cb 1934 if (!IS_DEAD_ARG(i)) {
5ff9d6a4 1935 goto allocate_in_reg;
866cb6cb 1936 }
5ff9d6a4 1937 }
c896fe29
FB
1938 }
1939 reg = ts->reg;
1940 if (tcg_regset_test_reg(arg_ct->u.regs, reg)) {
1941 /* nothing to do : the constraint is satisfied */
1942 } else {
1943 allocate_in_reg:
1944 /* allocate a new register matching the constraint
1945 and move the temporary register into it */
1946 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
3b6dac34 1947 tcg_out_mov(s, ts->type, reg, ts->reg);
c896fe29 1948 }
c896fe29
FB
1949 new_args[i] = reg;
1950 const_args[i] = 0;
1951 tcg_regset_set_reg(allocated_regs, reg);
1952 iarg_end: ;
1953 }
1954
a52ad07e
AJ
1955 /* mark dead temporaries and free the associated registers */
1956 for (i = nb_oargs; i < nb_oargs + nb_iargs; i++) {
1957 if (IS_DEAD_ARG(i)) {
1958 temp_dead(s, args[i]);
1959 }
1960 }
1961
e8996ee0
FB
1962 if (def->flags & TCG_OPF_BB_END) {
1963 tcg_reg_alloc_bb_end(s, allocated_regs);
1964 } else {
e8996ee0
FB
1965 if (def->flags & TCG_OPF_CALL_CLOBBER) {
1966 /* XXX: permit generic clobber register list ? */
1967 for(reg = 0; reg < TCG_TARGET_NB_REGS; reg++) {
1968 if (tcg_regset_test_reg(tcg_target_call_clobber_regs, reg)) {
1969 tcg_reg_free(s, reg);
1970 }
c896fe29 1971 }
3d5c5f87
AJ
1972 }
1973 if (def->flags & TCG_OPF_SIDE_EFFECTS) {
1974 /* sync globals if the op has side effects and might trigger
1975 an exception. */
1976 sync_globals(s, allocated_regs);
c896fe29 1977 }
e8996ee0
FB
1978
1979 /* satisfy the output constraints */
1980 tcg_regset_set(allocated_regs, s->reserved_regs);
1981 for(k = 0; k < nb_oargs; k++) {
1982 i = def->sorted_args[k];
1983 arg = args[i];
1984 arg_ct = &def->args_ct[i];
1985 ts = &s->temps[arg];
1986 if (arg_ct->ct & TCG_CT_ALIAS) {
1987 reg = new_args[arg_ct->alias_index];
1988 } else {
1989 /* if fixed register, we try to use it */
1990 reg = ts->reg;
1991 if (ts->fixed_reg &&
1992 tcg_regset_test_reg(arg_ct->u.regs, reg)) {
1993 goto oarg_end;
1994 }
1995 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
c896fe29 1996 }
e8996ee0
FB
1997 tcg_regset_set_reg(allocated_regs, reg);
1998 /* if a fixed register is used, then a move will be done afterwards */
1999 if (!ts->fixed_reg) {
ec7a869d
AJ
2000 if (ts->val_type == TEMP_VAL_REG) {
2001 s->reg_to_temp[ts->reg] = -1;
2002 }
2003 ts->val_type = TEMP_VAL_REG;
2004 ts->reg = reg;
2005 /* temp value is modified, so the value kept in memory is
2006 potentially not the same */
2007 ts->mem_coherent = 0;
2008 s->reg_to_temp[reg] = arg;
e8996ee0
FB
2009 }
2010 oarg_end:
2011 new_args[i] = reg;
c896fe29 2012 }
c896fe29
FB
2013 }
2014
c896fe29
FB
2015 /* emit instruction */
2016 tcg_out_op(s, opc, new_args, const_args);
2017
2018 /* move the outputs in the correct register if needed */
2019 for(i = 0; i < nb_oargs; i++) {
2020 ts = &s->temps[args[i]];
2021 reg = new_args[i];
2022 if (ts->fixed_reg && ts->reg != reg) {
3b6dac34 2023 tcg_out_mov(s, ts->type, ts->reg, reg);
c896fe29 2024 }
ec7a869d
AJ
2025 if (NEED_SYNC_ARG(i)) {
2026 tcg_reg_sync(s, reg);
2027 }
2028 if (IS_DEAD_ARG(i)) {
2029 temp_dead(s, args[i]);
2030 }
c896fe29
FB
2031 }
2032}
2033
b03cce8e
FB
2034#ifdef TCG_TARGET_STACK_GROWSUP
2035#define STACK_DIR(x) (-(x))
2036#else
2037#define STACK_DIR(x) (x)
2038#endif
2039
c896fe29 2040static int tcg_reg_alloc_call(TCGContext *s, const TCGOpDef *def,
a9751609 2041 TCGOpcode opc, const TCGArg *args,
ec7a869d 2042 uint16_t dead_args, uint8_t sync_args)
c896fe29
FB
2043{
2044 int nb_iargs, nb_oargs, flags, nb_regs, i, reg, nb_params;
2045 TCGArg arg, func_arg;
2046 TCGTemp *ts;
f54b3f92 2047 tcg_target_long stack_offset, call_stack_size, func_addr;
b03cce8e 2048 int const_func_arg, allocate_args;
c896fe29
FB
2049 TCGRegSet allocated_regs;
2050 const TCGArgConstraint *arg_ct;
2051
2052 arg = *args++;
2053
2054 nb_oargs = arg >> 16;
2055 nb_iargs = arg & 0xffff;
2056 nb_params = nb_iargs - 1;
2057
2058 flags = args[nb_oargs + nb_iargs];
2059
6e17d0c5 2060 nb_regs = ARRAY_SIZE(tcg_target_call_iarg_regs);
c896fe29
FB
2061 if (nb_regs > nb_params)
2062 nb_regs = nb_params;
2063
2064 /* assign stack slots first */
c896fe29
FB
2065 call_stack_size = (nb_params - nb_regs) * sizeof(tcg_target_long);
2066 call_stack_size = (call_stack_size + TCG_TARGET_STACK_ALIGN - 1) &
2067 ~(TCG_TARGET_STACK_ALIGN - 1);
b03cce8e
FB
2068 allocate_args = (call_stack_size > TCG_STATIC_CALL_ARGS_SIZE);
2069 if (allocate_args) {
345649c0
BS
2070 /* XXX: if more than TCG_STATIC_CALL_ARGS_SIZE is needed,
2071 preallocate call stack */
2072 tcg_abort();
b03cce8e 2073 }
39cf05d3
FB
2074
2075 stack_offset = TCG_TARGET_CALL_STACK_OFFSET;
c896fe29
FB
2076 for(i = nb_regs; i < nb_params; i++) {
2077 arg = args[nb_oargs + i];
39cf05d3
FB
2078#ifdef TCG_TARGET_STACK_GROWSUP
2079 stack_offset -= sizeof(tcg_target_long);
2080#endif
2081 if (arg != TCG_CALL_DUMMY_ARG) {
2082 ts = &s->temps[arg];
2083 if (ts->val_type == TEMP_VAL_REG) {
2084 tcg_out_st(s, ts->type, ts->reg, TCG_REG_CALL_STACK, stack_offset);
2085 } else if (ts->val_type == TEMP_VAL_MEM) {
2086 reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type],
2087 s->reserved_regs);
2088 /* XXX: not correct if reading values from the stack */
2089 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
2090 tcg_out_st(s, ts->type, reg, TCG_REG_CALL_STACK, stack_offset);
2091 } else if (ts->val_type == TEMP_VAL_CONST) {
2092 reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type],
2093 s->reserved_regs);
2094 /* XXX: sign extend may be needed on some targets */
2095 tcg_out_movi(s, ts->type, reg, ts->val);
2096 tcg_out_st(s, ts->type, reg, TCG_REG_CALL_STACK, stack_offset);
2097 } else {
2098 tcg_abort();
2099 }
c896fe29 2100 }
39cf05d3
FB
2101#ifndef TCG_TARGET_STACK_GROWSUP
2102 stack_offset += sizeof(tcg_target_long);
2103#endif
c896fe29
FB
2104 }
2105
2106 /* assign input registers */
2107 tcg_regset_set(allocated_regs, s->reserved_regs);
2108 for(i = 0; i < nb_regs; i++) {
2109 arg = args[nb_oargs + i];
39cf05d3
FB
2110 if (arg != TCG_CALL_DUMMY_ARG) {
2111 ts = &s->temps[arg];
2112 reg = tcg_target_call_iarg_regs[i];
2113 tcg_reg_free(s, reg);
2114 if (ts->val_type == TEMP_VAL_REG) {
2115 if (ts->reg != reg) {
3b6dac34 2116 tcg_out_mov(s, ts->type, reg, ts->reg);
39cf05d3
FB
2117 }
2118 } else if (ts->val_type == TEMP_VAL_MEM) {
2119 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
2120 } else if (ts->val_type == TEMP_VAL_CONST) {
2121 /* XXX: sign extend ? */
2122 tcg_out_movi(s, ts->type, reg, ts->val);
2123 } else {
2124 tcg_abort();
c896fe29 2125 }
39cf05d3 2126 tcg_regset_set_reg(allocated_regs, reg);
c896fe29 2127 }
c896fe29
FB
2128 }
2129
2130 /* assign function address */
2131 func_arg = args[nb_oargs + nb_iargs - 1];
2132 arg_ct = &def->args_ct[0];
2133 ts = &s->temps[func_arg];
f54b3f92 2134 func_addr = ts->val;
c896fe29
FB
2135 const_func_arg = 0;
2136 if (ts->val_type == TEMP_VAL_MEM) {
2137 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
e4d5434c 2138 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
c896fe29 2139 func_arg = reg;
e8996ee0 2140 tcg_regset_set_reg(allocated_regs, reg);
c896fe29
FB
2141 } else if (ts->val_type == TEMP_VAL_REG) {
2142 reg = ts->reg;
2143 if (!tcg_regset_test_reg(arg_ct->u.regs, reg)) {
2144 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
3b6dac34 2145 tcg_out_mov(s, ts->type, reg, ts->reg);
c896fe29
FB
2146 }
2147 func_arg = reg;
e8996ee0 2148 tcg_regset_set_reg(allocated_regs, reg);
c896fe29 2149 } else if (ts->val_type == TEMP_VAL_CONST) {
f54b3f92 2150 if (tcg_target_const_match(func_addr, arg_ct)) {
c896fe29 2151 const_func_arg = 1;
f54b3f92 2152 func_arg = func_addr;
c896fe29
FB
2153 } else {
2154 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
f54b3f92 2155 tcg_out_movi(s, ts->type, reg, func_addr);
c896fe29 2156 func_arg = reg;
e8996ee0 2157 tcg_regset_set_reg(allocated_regs, reg);
c896fe29
FB
2158 }
2159 } else {
2160 tcg_abort();
2161 }
e8996ee0 2162
c896fe29
FB
2163
2164 /* mark dead temporaries and free the associated registers */
866cb6cb 2165 for(i = nb_oargs; i < nb_iargs + nb_oargs; i++) {
866cb6cb 2166 if (IS_DEAD_ARG(i)) {
639368dd 2167 temp_dead(s, args[i]);
c896fe29
FB
2168 }
2169 }
2170
2171 /* clobber call registers */
2172 for(reg = 0; reg < TCG_TARGET_NB_REGS; reg++) {
2173 if (tcg_regset_test_reg(tcg_target_call_clobber_regs, reg)) {
2174 tcg_reg_free(s, reg);
2175 }
2176 }
78505279
AJ
2177
2178 /* Save globals if they might be written by the helper, sync them if
2179 they might be read. */
2180 if (flags & TCG_CALL_NO_READ_GLOBALS) {
2181 /* Nothing to do */
2182 } else if (flags & TCG_CALL_NO_WRITE_GLOBALS) {
2183 sync_globals(s, allocated_regs);
2184 } else {
b9c18f56
AJ
2185 save_globals(s, allocated_regs);
2186 }
c896fe29
FB
2187
2188 tcg_out_op(s, opc, &func_arg, &const_func_arg);
c896fe29
FB
2189
2190 /* assign output registers and emit moves if needed */
2191 for(i = 0; i < nb_oargs; i++) {
2192 arg = args[i];
2193 ts = &s->temps[arg];
2194 reg = tcg_target_call_oarg_regs[i];
e8996ee0 2195 assert(s->reg_to_temp[reg] == -1);
c896fe29
FB
2196 if (ts->fixed_reg) {
2197 if (ts->reg != reg) {
3b6dac34 2198 tcg_out_mov(s, ts->type, ts->reg, reg);
c896fe29
FB
2199 }
2200 } else {
ec7a869d
AJ
2201 if (ts->val_type == TEMP_VAL_REG) {
2202 s->reg_to_temp[ts->reg] = -1;
2203 }
2204 ts->val_type = TEMP_VAL_REG;
2205 ts->reg = reg;
2206 ts->mem_coherent = 0;
2207 s->reg_to_temp[reg] = arg;
2208 if (NEED_SYNC_ARG(i)) {
2209 tcg_reg_sync(s, reg);
2210 }
8c11ad25 2211 if (IS_DEAD_ARG(i)) {
639368dd 2212 temp_dead(s, args[i]);
8c11ad25 2213 }
c896fe29
FB
2214 }
2215 }
2216
2217 return nb_iargs + nb_oargs + def->nb_cargs + 1;
2218}
2219
2220#ifdef CONFIG_PROFILER
2221
54604f74 2222static int64_t tcg_table_op_count[NB_OPS];
c896fe29 2223
871e6c35 2224static void dump_op_count(void)
c896fe29
FB
2225{
2226 int i;
2227 FILE *f;
54604f74 2228 f = fopen("/tmp/op.log", "w");
c896fe29 2229 for(i = INDEX_op_end; i < NB_OPS; i++) {
54604f74 2230 fprintf(f, "%s %" PRId64 "\n", tcg_op_defs[i].name, tcg_table_op_count[i]);
c896fe29
FB
2231 }
2232 fclose(f);
2233}
2234#endif
2235
2236
2237static inline int tcg_gen_code_common(TCGContext *s, uint8_t *gen_code_buf,
2ba1eeb6 2238 long search_pc)
c896fe29 2239{
a9751609
RH
2240 TCGOpcode opc;
2241 int op_index;
c896fe29 2242 const TCGOpDef *def;
c896fe29
FB
2243 const TCGArg *args;
2244
2245#ifdef DEBUG_DISAS
8fec2b8c 2246 if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP))) {
93fcfe39 2247 qemu_log("OP:\n");
eeacee4d 2248 tcg_dump_ops(s);
93fcfe39 2249 qemu_log("\n");
c896fe29
FB
2250 }
2251#endif
2252
c5cc28ff
AJ
2253#ifdef CONFIG_PROFILER
2254 s->opt_time -= profile_getclock();
2255#endif
2256
8f2e8c07 2257#ifdef USE_TCG_OPTIMIZATIONS
c4afe5c4 2258 s->gen_opparam_ptr =
1ff0a2c5 2259 tcg_optimize(s, s->gen_opc_ptr, s->gen_opparam_buf, tcg_op_defs);
8f2e8c07
KB
2260#endif
2261
a23a9ec6 2262#ifdef CONFIG_PROFILER
c5cc28ff 2263 s->opt_time += profile_getclock();
a23a9ec6
FB
2264 s->la_time -= profile_getclock();
2265#endif
c5cc28ff 2266
c896fe29 2267 tcg_liveness_analysis(s);
c5cc28ff 2268
a23a9ec6
FB
2269#ifdef CONFIG_PROFILER
2270 s->la_time += profile_getclock();
2271#endif
c896fe29
FB
2272
2273#ifdef DEBUG_DISAS
8fec2b8c 2274 if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP_OPT))) {
c5cc28ff 2275 qemu_log("OP after optimization and liveness analysis:\n");
eeacee4d 2276 tcg_dump_ops(s);
93fcfe39 2277 qemu_log("\n");
c896fe29
FB
2278 }
2279#endif
2280
2281 tcg_reg_alloc_start(s);
2282
2283 s->code_buf = gen_code_buf;
2284 s->code_ptr = gen_code_buf;
2285
1ff0a2c5 2286 args = s->gen_opparam_buf;
c896fe29 2287 op_index = 0;
b3db8758 2288
c896fe29 2289 for(;;) {
92414b31 2290 opc = s->gen_opc_buf[op_index];
c896fe29 2291#ifdef CONFIG_PROFILER
54604f74 2292 tcg_table_op_count[opc]++;
c896fe29
FB
2293#endif
2294 def = &tcg_op_defs[opc];
2295#if 0
2296 printf("%s: %d %d %d\n", def->name,
2297 def->nb_oargs, def->nb_iargs, def->nb_cargs);
2298 // dump_regs(s);
2299#endif
2300 switch(opc) {
2301 case INDEX_op_mov_i32:
c896fe29 2302 case INDEX_op_mov_i64:
ec7a869d
AJ
2303 tcg_reg_alloc_mov(s, def, args, s->op_dead_args[op_index],
2304 s->op_sync_args[op_index]);
c896fe29 2305 break;
e8996ee0 2306 case INDEX_op_movi_i32:
e8996ee0 2307 case INDEX_op_movi_i64:
ec7a869d
AJ
2308 tcg_reg_alloc_movi(s, args, s->op_dead_args[op_index],
2309 s->op_sync_args[op_index]);
e8996ee0 2310 break;
7e4597d7
FB
2311 case INDEX_op_debug_insn_start:
2312 /* debug instruction */
2313 break;
c896fe29
FB
2314 case INDEX_op_nop:
2315 case INDEX_op_nop1:
2316 case INDEX_op_nop2:
2317 case INDEX_op_nop3:
2318 break;
2319 case INDEX_op_nopn:
2320 args += args[0];
2321 goto next;
5ff9d6a4 2322 case INDEX_op_discard:
639368dd 2323 temp_dead(s, args[0]);
5ff9d6a4 2324 break;
c896fe29 2325 case INDEX_op_set_label:
e8996ee0 2326 tcg_reg_alloc_bb_end(s, s->reserved_regs);
9d6fca70 2327 tcg_out_label(s, args[0], s->code_ptr);
c896fe29
FB
2328 break;
2329 case INDEX_op_call:
ec7a869d
AJ
2330 args += tcg_reg_alloc_call(s, def, opc, args,
2331 s->op_dead_args[op_index],
2332 s->op_sync_args[op_index]);
c896fe29
FB
2333 goto next;
2334 case INDEX_op_end:
2335 goto the_end;
c896fe29 2336 default:
25c4d9cc
RH
2337 /* Sanity check that we've not introduced any unhandled opcodes. */
2338 if (def->flags & TCG_OPF_NOT_PRESENT) {
2339 tcg_abort();
2340 }
c896fe29
FB
2341 /* Note: in order to speed up the code, it would be much
2342 faster to have specialized register allocator functions for
2343 some common argument patterns */
ec7a869d
AJ
2344 tcg_reg_alloc_op(s, def, opc, args, s->op_dead_args[op_index],
2345 s->op_sync_args[op_index]);
c896fe29
FB
2346 break;
2347 }
2348 args += def->nb_args;
8df1ca4b 2349 next:
2ba1eeb6 2350 if (search_pc >= 0 && search_pc < s->code_ptr - gen_code_buf) {
b314f270 2351 return op_index;
c896fe29
FB
2352 }
2353 op_index++;
2354#ifndef NDEBUG
2355 check_regs(s);
2356#endif
2357 }
2358 the_end:
b76f0d8c
YL
2359#if defined(CONFIG_QEMU_LDST_OPTIMIZATION) && defined(CONFIG_SOFTMMU)
2360 /* Generate TB finalization at the end of block */
2361 tcg_out_tb_finalize(s);
2362#endif
c896fe29
FB
2363 return -1;
2364}
2365
54604f74 2366int tcg_gen_code(TCGContext *s, uint8_t *gen_code_buf)
c896fe29
FB
2367{
2368#ifdef CONFIG_PROFILER
2369 {
c896fe29 2370 int n;
92414b31 2371 n = (s->gen_opc_ptr - s->gen_opc_buf);
a23a9ec6
FB
2372 s->op_count += n;
2373 if (n > s->op_count_max)
2374 s->op_count_max = n;
2375
2376 s->temp_count += s->nb_temps;
2377 if (s->nb_temps > s->temp_count_max)
2378 s->temp_count_max = s->nb_temps;
c896fe29
FB
2379 }
2380#endif
2381
2ba1eeb6 2382 tcg_gen_code_common(s, gen_code_buf, -1);
c896fe29
FB
2383
2384 /* flush instruction cache */
2aeabc08
SW
2385 flush_icache_range((tcg_target_ulong)gen_code_buf,
2386 (tcg_target_ulong)s->code_ptr);
2387
c896fe29
FB
2388 return s->code_ptr - gen_code_buf;
2389}
2390
2ba1eeb6 2391/* Return the index of the micro operation such as the pc after is <
623e265c
PB
2392 offset bytes from the start of the TB. The contents of gen_code_buf must
2393 not be changed, though writing the same values is ok.
2394 Return -1 if not found. */
54604f74 2395int tcg_gen_code_search_pc(TCGContext *s, uint8_t *gen_code_buf, long offset)
c896fe29 2396{
623e265c 2397 return tcg_gen_code_common(s, gen_code_buf, offset);
c896fe29 2398}
a23a9ec6
FB
2399
2400#ifdef CONFIG_PROFILER
405cf9ff 2401void tcg_dump_info(FILE *f, fprintf_function cpu_fprintf)
a23a9ec6
FB
2402{
2403 TCGContext *s = &tcg_ctx;
2404 int64_t tot;
2405
2406 tot = s->interm_time + s->code_time;
2407 cpu_fprintf(f, "JIT cycles %" PRId64 " (%0.3f s at 2.4 GHz)\n",
2408 tot, tot / 2.4e9);
2409 cpu_fprintf(f, "translated TBs %" PRId64 " (aborted=%" PRId64 " %0.1f%%)\n",
2410 s->tb_count,
2411 s->tb_count1 - s->tb_count,
2412 s->tb_count1 ? (double)(s->tb_count1 - s->tb_count) / s->tb_count1 * 100.0 : 0);
2413 cpu_fprintf(f, "avg ops/TB %0.1f max=%d\n",
2414 s->tb_count ? (double)s->op_count / s->tb_count : 0, s->op_count_max);
a23a9ec6
FB
2415 cpu_fprintf(f, "deleted ops/TB %0.2f\n",
2416 s->tb_count ?
2417 (double)s->del_op_count / s->tb_count : 0);
2418 cpu_fprintf(f, "avg temps/TB %0.2f max=%d\n",
2419 s->tb_count ?
2420 (double)s->temp_count / s->tb_count : 0,
2421 s->temp_count_max);
2422
2423 cpu_fprintf(f, "cycles/op %0.1f\n",
2424 s->op_count ? (double)tot / s->op_count : 0);
2425 cpu_fprintf(f, "cycles/in byte %0.1f\n",
2426 s->code_in_len ? (double)tot / s->code_in_len : 0);
2427 cpu_fprintf(f, "cycles/out byte %0.1f\n",
2428 s->code_out_len ? (double)tot / s->code_out_len : 0);
2429 if (tot == 0)
2430 tot = 1;
2431 cpu_fprintf(f, " gen_interm time %0.1f%%\n",
2432 (double)s->interm_time / tot * 100.0);
2433 cpu_fprintf(f, " gen_code time %0.1f%%\n",
2434 (double)s->code_time / tot * 100.0);
c5cc28ff
AJ
2435 cpu_fprintf(f, "optim./code time %0.1f%%\n",
2436 (double)s->opt_time / (s->code_time ? s->code_time : 1)
2437 * 100.0);
a23a9ec6
FB
2438 cpu_fprintf(f, "liveness/code time %0.1f%%\n",
2439 (double)s->la_time / (s->code_time ? s->code_time : 1) * 100.0);
2440 cpu_fprintf(f, "cpu_restore count %" PRId64 "\n",
2441 s->restore_count);
2442 cpu_fprintf(f, " avg cycles %0.1f\n",
2443 s->restore_count ? (double)s->restore_time / s->restore_count : 0);
871e6c35
BS
2444
2445 dump_op_count();
a23a9ec6
FB
2446}
2447#else
405cf9ff 2448void tcg_dump_info(FILE *f, fprintf_function cpu_fprintf)
a23a9ec6 2449{
24bf7b3a 2450 cpu_fprintf(f, "[TCG profiler not compiled]\n");
a23a9ec6
FB
2451}
2452#endif
813da627
RH
2453
2454#ifdef ELF_HOST_MACHINE
5872bbf2
RH
2455/* In order to use this feature, the backend needs to do three things:
2456
2457 (1) Define ELF_HOST_MACHINE to indicate both what value to
2458 put into the ELF image and to indicate support for the feature.
2459
2460 (2) Define tcg_register_jit. This should create a buffer containing
2461 the contents of a .debug_frame section that describes the post-
2462 prologue unwind info for the tcg machine.
2463
2464 (3) Call tcg_register_jit_int, with the constructed .debug_frame.
2465*/
813da627
RH
2466
2467/* Begin GDB interface. THE FOLLOWING MUST MATCH GDB DOCS. */
2468typedef enum {
2469 JIT_NOACTION = 0,
2470 JIT_REGISTER_FN,
2471 JIT_UNREGISTER_FN
2472} jit_actions_t;
2473
2474struct jit_code_entry {
2475 struct jit_code_entry *next_entry;
2476 struct jit_code_entry *prev_entry;
2477 const void *symfile_addr;
2478 uint64_t symfile_size;
2479};
2480
2481struct jit_descriptor {
2482 uint32_t version;
2483 uint32_t action_flag;
2484 struct jit_code_entry *relevant_entry;
2485 struct jit_code_entry *first_entry;
2486};
2487
2488void __jit_debug_register_code(void) __attribute__((noinline));
2489void __jit_debug_register_code(void)
2490{
2491 asm("");
2492}
2493
2494/* Must statically initialize the version, because GDB may check
2495 the version before we can set it. */
2496struct jit_descriptor __jit_debug_descriptor = { 1, 0, 0, 0 };
2497
2498/* End GDB interface. */
2499
2500static int find_string(const char *strtab, const char *str)
2501{
2502 const char *p = strtab + 1;
2503
2504 while (1) {
2505 if (strcmp(p, str) == 0) {
2506 return p - strtab;
2507 }
2508 p += strlen(p) + 1;
2509 }
2510}
2511
5872bbf2 2512static void tcg_register_jit_int(void *buf_ptr, size_t buf_size,
813da627
RH
2513 void *debug_frame, size_t debug_frame_size)
2514{
5872bbf2
RH
2515 struct __attribute__((packed)) DebugInfo {
2516 uint32_t len;
2517 uint16_t version;
2518 uint32_t abbrev;
2519 uint8_t ptr_size;
2520 uint8_t cu_die;
2521 uint16_t cu_lang;
2522 uintptr_t cu_low_pc;
2523 uintptr_t cu_high_pc;
2524 uint8_t fn_die;
2525 char fn_name[16];
2526 uintptr_t fn_low_pc;
2527 uintptr_t fn_high_pc;
2528 uint8_t cu_eoc;
2529 };
813da627
RH
2530
2531 struct ElfImage {
2532 ElfW(Ehdr) ehdr;
2533 ElfW(Phdr) phdr;
5872bbf2
RH
2534 ElfW(Shdr) shdr[7];
2535 ElfW(Sym) sym[2];
2536 struct DebugInfo di;
2537 uint8_t da[24];
2538 char str[80];
2539 };
2540
2541 struct ElfImage *img;
2542
2543 static const struct ElfImage img_template = {
2544 .ehdr = {
2545 .e_ident[EI_MAG0] = ELFMAG0,
2546 .e_ident[EI_MAG1] = ELFMAG1,
2547 .e_ident[EI_MAG2] = ELFMAG2,
2548 .e_ident[EI_MAG3] = ELFMAG3,
2549 .e_ident[EI_CLASS] = ELF_CLASS,
2550 .e_ident[EI_DATA] = ELF_DATA,
2551 .e_ident[EI_VERSION] = EV_CURRENT,
2552 .e_type = ET_EXEC,
2553 .e_machine = ELF_HOST_MACHINE,
2554 .e_version = EV_CURRENT,
2555 .e_phoff = offsetof(struct ElfImage, phdr),
2556 .e_shoff = offsetof(struct ElfImage, shdr),
2557 .e_ehsize = sizeof(ElfW(Shdr)),
2558 .e_phentsize = sizeof(ElfW(Phdr)),
2559 .e_phnum = 1,
2560 .e_shentsize = sizeof(ElfW(Shdr)),
2561 .e_shnum = ARRAY_SIZE(img->shdr),
2562 .e_shstrndx = ARRAY_SIZE(img->shdr) - 1,
abbb3eae
RH
2563#ifdef ELF_HOST_FLAGS
2564 .e_flags = ELF_HOST_FLAGS,
2565#endif
2566#ifdef ELF_OSABI
2567 .e_ident[EI_OSABI] = ELF_OSABI,
2568#endif
5872bbf2
RH
2569 },
2570 .phdr = {
2571 .p_type = PT_LOAD,
2572 .p_flags = PF_X,
2573 },
2574 .shdr = {
2575 [0] = { .sh_type = SHT_NULL },
2576 /* Trick: The contents of code_gen_buffer are not present in
2577 this fake ELF file; that got allocated elsewhere. Therefore
2578 we mark .text as SHT_NOBITS (similar to .bss) so that readers
2579 will not look for contents. We can record any address. */
2580 [1] = { /* .text */
2581 .sh_type = SHT_NOBITS,
2582 .sh_flags = SHF_EXECINSTR | SHF_ALLOC,
2583 },
2584 [2] = { /* .debug_info */
2585 .sh_type = SHT_PROGBITS,
2586 .sh_offset = offsetof(struct ElfImage, di),
2587 .sh_size = sizeof(struct DebugInfo),
2588 },
2589 [3] = { /* .debug_abbrev */
2590 .sh_type = SHT_PROGBITS,
2591 .sh_offset = offsetof(struct ElfImage, da),
2592 .sh_size = sizeof(img->da),
2593 },
2594 [4] = { /* .debug_frame */
2595 .sh_type = SHT_PROGBITS,
2596 .sh_offset = sizeof(struct ElfImage),
2597 },
2598 [5] = { /* .symtab */
2599 .sh_type = SHT_SYMTAB,
2600 .sh_offset = offsetof(struct ElfImage, sym),
2601 .sh_size = sizeof(img->sym),
2602 .sh_info = 1,
2603 .sh_link = ARRAY_SIZE(img->shdr) - 1,
2604 .sh_entsize = sizeof(ElfW(Sym)),
2605 },
2606 [6] = { /* .strtab */
2607 .sh_type = SHT_STRTAB,
2608 .sh_offset = offsetof(struct ElfImage, str),
2609 .sh_size = sizeof(img->str),
2610 }
2611 },
2612 .sym = {
2613 [1] = { /* code_gen_buffer */
2614 .st_info = ELF_ST_INFO(STB_GLOBAL, STT_FUNC),
2615 .st_shndx = 1,
2616 }
2617 },
2618 .di = {
2619 .len = sizeof(struct DebugInfo) - 4,
2620 .version = 2,
2621 .ptr_size = sizeof(void *),
2622 .cu_die = 1,
2623 .cu_lang = 0x8001, /* DW_LANG_Mips_Assembler */
2624 .fn_die = 2,
2625 .fn_name = "code_gen_buffer"
2626 },
2627 .da = {
2628 1, /* abbrev number (the cu) */
2629 0x11, 1, /* DW_TAG_compile_unit, has children */
2630 0x13, 0x5, /* DW_AT_language, DW_FORM_data2 */
2631 0x11, 0x1, /* DW_AT_low_pc, DW_FORM_addr */
2632 0x12, 0x1, /* DW_AT_high_pc, DW_FORM_addr */
2633 0, 0, /* end of abbrev */
2634 2, /* abbrev number (the fn) */
2635 0x2e, 0, /* DW_TAG_subprogram, no children */
2636 0x3, 0x8, /* DW_AT_name, DW_FORM_string */
2637 0x11, 0x1, /* DW_AT_low_pc, DW_FORM_addr */
2638 0x12, 0x1, /* DW_AT_high_pc, DW_FORM_addr */
2639 0, 0, /* end of abbrev */
2640 0 /* no more abbrev */
2641 },
2642 .str = "\0" ".text\0" ".debug_info\0" ".debug_abbrev\0"
2643 ".debug_frame\0" ".symtab\0" ".strtab\0" "code_gen_buffer",
813da627
RH
2644 };
2645
2646 /* We only need a single jit entry; statically allocate it. */
2647 static struct jit_code_entry one_entry;
2648
5872bbf2 2649 uintptr_t buf = (uintptr_t)buf_ptr;
813da627 2650 size_t img_size = sizeof(struct ElfImage) + debug_frame_size;
813da627 2651
5872bbf2
RH
2652 img = g_malloc(img_size);
2653 *img = img_template;
2654 memcpy(img + 1, debug_frame, debug_frame_size);
813da627 2655
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2656 img->phdr.p_vaddr = buf;
2657 img->phdr.p_paddr = buf;
2658 img->phdr.p_memsz = buf_size;
813da627 2659
813da627 2660 img->shdr[1].sh_name = find_string(img->str, ".text");
5872bbf2 2661 img->shdr[1].sh_addr = buf;
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2662 img->shdr[1].sh_size = buf_size;
2663
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RH
2664 img->shdr[2].sh_name = find_string(img->str, ".debug_info");
2665 img->shdr[3].sh_name = find_string(img->str, ".debug_abbrev");
2666
2667 img->shdr[4].sh_name = find_string(img->str, ".debug_frame");
2668 img->shdr[4].sh_size = debug_frame_size;
2669
2670 img->shdr[5].sh_name = find_string(img->str, ".symtab");
2671 img->shdr[6].sh_name = find_string(img->str, ".strtab");
2672
2673 img->sym[1].st_name = find_string(img->str, "code_gen_buffer");
2674 img->sym[1].st_value = buf;
2675 img->sym[1].st_size = buf_size;
813da627 2676
5872bbf2 2677 img->di.cu_low_pc = buf;
45aba097 2678 img->di.cu_high_pc = buf + buf_size;
5872bbf2 2679 img->di.fn_low_pc = buf;
45aba097 2680 img->di.fn_high_pc = buf + buf_size;
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RH
2681
2682#ifdef DEBUG_JIT
2683 /* Enable this block to be able to debug the ELF image file creation.
2684 One can use readelf, objdump, or other inspection utilities. */
2685 {
2686 FILE *f = fopen("/tmp/qemu.jit", "w+b");
2687 if (f) {
5872bbf2 2688 if (fwrite(img, img_size, 1, f) != img_size) {
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RH
2689 /* Avoid stupid unused return value warning for fwrite. */
2690 }
2691 fclose(f);
2692 }
2693 }
2694#endif
2695
2696 one_entry.symfile_addr = img;
2697 one_entry.symfile_size = img_size;
2698
2699 __jit_debug_descriptor.action_flag = JIT_REGISTER_FN;
2700 __jit_debug_descriptor.relevant_entry = &one_entry;
2701 __jit_debug_descriptor.first_entry = &one_entry;
2702 __jit_debug_register_code();
2703}
2704#else
5872bbf2
RH
2705/* No support for the feature. Provide the entry point expected by exec.c,
2706 and implement the internal function we declared earlier. */
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RH
2707
2708static void tcg_register_jit_int(void *buf, size_t size,
2709 void *debug_frame, size_t debug_frame_size)
2710{
2711}
2712
2713void tcg_register_jit(void *buf, size_t buf_size)
2714{
2715}
2716#endif /* ELF_HOST_MACHINE */