[qemu.git] / tests / fdc-test.c

/*
 * Floppy test cases.
 *
 * Copyright (c) 2012 Kevin Wolf <kwolf@redhat.com>
 *
 * Permission is hereby granted, free of charge, to any person obtaining a copy
 * of this software and associated documentation files (the "Software"), to deal
 * in the Software without restriction, including without limitation the rights
 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
 * copies of the Software, and to permit persons to whom the Software is
 * furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
 * THE SOFTWARE.
 */

#include <stdint.h>
#include <string.h>
#include <stdio.h>

#include <glib.h>

#include "libqtest.h"
#include "qemu-common.h"

#define TEST_IMAGE_SIZE 1440 * 1024

#define FLOPPY_BASE 0x3f0
#define FLOPPY_IRQ 6

enum {
    reg_sra         = 0x0,
    reg_srb         = 0x1,
    reg_dor         = 0x2,
    reg_msr         = 0x4,
    reg_dsr         = 0x4,
    reg_fifo        = 0x5,
    reg_dir         = 0x7,
};

enum {
    CMD_SENSE_INT           = 0x08,
    CMD_READ_ID             = 0x0a,
    CMD_SEEK                = 0x0f,
    CMD_VERIFY              = 0x16,
    CMD_READ                = 0xe6,
    CMD_RELATIVE_SEEK_OUT   = 0x8f,
    CMD_RELATIVE_SEEK_IN    = 0xcf,
};

enum {
    BUSY    = 0x10,
    NONDMA  = 0x20,
    RQM     = 0x80,
    DIO     = 0x40,

    DSKCHG  = 0x80,
};

char test_image[] = "/tmp/qtest.XXXXXX";

#define assert_bit_set(data, mask) g_assert_cmphex((data) & (mask), ==, (mask))
#define assert_bit_clear(data, mask) g_assert_cmphex((data) & (mask), ==, 0)

static uint8_t base = 0x70;

enum {
    CMOS_FLOPPY     = 0x10,
};

static void floppy_send(uint8_t byte)
{
    uint8_t msr;

    msr = inb(FLOPPY_BASE + reg_msr);
    assert_bit_set(msr, RQM);
    assert_bit_clear(msr, DIO);

    outb(FLOPPY_BASE + reg_fifo, byte);
}

static uint8_t floppy_recv(void)
{
    uint8_t msr;

    msr = inb(FLOPPY_BASE + reg_msr);
    assert_bit_set(msr, RQM | DIO);

    return inb(FLOPPY_BASE + reg_fifo);
}

/* pcn: Present Cylinder Number */
static void ack_irq(uint8_t *pcn)
{
    uint8_t ret;

    g_assert(get_irq(FLOPPY_IRQ));
    floppy_send(CMD_SENSE_INT);
    floppy_recv();

    ret = floppy_recv();
    if (pcn != NULL) {
        *pcn = ret;
    }

    g_assert(!get_irq(FLOPPY_IRQ));
}

static uint8_t send_read_command(uint8_t cmd)
{
    uint8_t drive = 0;
    uint8_t head = 0;
    uint8_t cyl = 0;
    uint8_t sect_addr = 1;
    uint8_t sect_size = 2;
    uint8_t eot = 1;
    uint8_t gap = 0x1b;
    uint8_t gpl = 0xff;

    uint8_t msr = 0;
    uint8_t st0;

    uint8_t ret = 0;

    floppy_send(cmd);
    floppy_send(head << 2 | drive);
    g_assert(!get_irq(FLOPPY_IRQ));
    floppy_send(cyl);
    floppy_send(head);
    floppy_send(sect_addr);
    floppy_send(sect_size);
    floppy_send(eot);
    floppy_send(gap);
    floppy_send(gpl);

    uint8_t i = 0;
    uint8_t n = 2;
    for (; i < n; i++) {
        msr = inb(FLOPPY_BASE + reg_msr);
        if (msr == 0xd0) {
            break;
        }
        sleep(1);
    }

    if (i >= n) {
        return 1;
    }

    st0 = floppy_recv();
    if (st0 != 0x40) {
        ret = 1;
    }

    floppy_recv();
    floppy_recv();
    floppy_recv();
    floppy_recv();
    floppy_recv();
    floppy_recv();

    return ret;
}

static uint8_t send_read_no_dma_command(int nb_sect, uint8_t expected_st0)
{
    uint8_t drive = 0;
    uint8_t head = 0;
    uint8_t cyl = 0;
    uint8_t sect_addr = 1;
    uint8_t sect_size = 2;
    uint8_t eot = nb_sect;
    uint8_t gap = 0x1b;
    uint8_t gpl = 0xff;

    uint8_t msr = 0;
    uint8_t st0;

    uint8_t ret = 0;

    floppy_send(CMD_READ);
    floppy_send(head << 2 | drive);
    g_assert(!get_irq(FLOPPY_IRQ));
    floppy_send(cyl);
    floppy_send(head);
    floppy_send(sect_addr);
    floppy_send(sect_size);
    floppy_send(eot);
    floppy_send(gap);
    floppy_send(gpl);

    uint16_t i = 0;
    uint8_t n = 2;
    for (; i < n; i++) {
        msr = inb(FLOPPY_BASE + reg_msr);
        if (msr == (BUSY | NONDMA | DIO | RQM)) {
            break;
        }
        sleep(1);
    }

    if (i >= n) {
        return 1;
    }

    /* Non-DMA mode */
    for (i = 0; i < 512 * 2 * nb_sect; i++) {
        msr = inb(FLOPPY_BASE + reg_msr);
        assert_bit_set(msr, BUSY | RQM | DIO);
        inb(FLOPPY_BASE + reg_fifo);
    }

    st0 = floppy_recv();
    if (st0 != expected_st0) {
        ret = 1;
    }

    floppy_recv();
    floppy_recv();
    floppy_recv();
    floppy_recv();
    floppy_recv();
    floppy_recv();

    return ret;
}

static void send_seek(int cyl)
{
    int drive = 0;
    int head = 0;

    floppy_send(CMD_SEEK);
    floppy_send(head << 2 | drive);
    g_assert(!get_irq(FLOPPY_IRQ));
    floppy_send(cyl);
    ack_irq(NULL);
}

static uint8_t cmos_read(uint8_t reg)
{
    outb(base + 0, reg);
    return inb(base + 1);
}

static void test_cmos(void)
{
    uint8_t cmos;

    cmos = cmos_read(CMOS_FLOPPY);
    g_assert(cmos == 0x40);
}

static void test_no_media_on_start(void)
{
    uint8_t dir;

    /* Media changed bit must be set all time after start if there is
     * no media in drive. */
    dir = inb(FLOPPY_BASE + reg_dir);
    assert_bit_set(dir, DSKCHG);
    dir = inb(FLOPPY_BASE + reg_dir);
    assert_bit_set(dir, DSKCHG);
    send_seek(1);
    dir = inb(FLOPPY_BASE + reg_dir);
    assert_bit_set(dir, DSKCHG);
    dir = inb(FLOPPY_BASE + reg_dir);
    assert_bit_set(dir, DSKCHG);
}

static void test_read_without_media(void)
{
    uint8_t ret;

    ret = send_read_command(CMD_READ);
    g_assert(ret == 0);
}

static void test_media_insert(void)
{
    uint8_t dir;

    /* Insert media in drive. DSKCHK should not be reset until a step pulse
     * is sent. */
    qmp("{'execute':'change', 'arguments':{ 'device':'floppy0', "
        "'target': '%s' }}", test_image);
    qmp(""); /* ignore event (FIXME open -> open transition?!) */
    qmp(""); /* ignore event */

    dir = inb(FLOPPY_BASE + reg_dir);
    assert_bit_set(dir, DSKCHG);
    dir = inb(FLOPPY_BASE + reg_dir);
    assert_bit_set(dir, DSKCHG);

    send_seek(0);
    dir = inb(FLOPPY_BASE + reg_dir);
    assert_bit_set(dir, DSKCHG);
    dir = inb(FLOPPY_BASE + reg_dir);
    assert_bit_set(dir, DSKCHG);

    /* Step to next track should clear DSKCHG bit. */
    send_seek(1);
    dir = inb(FLOPPY_BASE + reg_dir);
    assert_bit_clear(dir, DSKCHG);
    dir = inb(FLOPPY_BASE + reg_dir);
    assert_bit_clear(dir, DSKCHG);
}

static void test_media_change(void)
{
    uint8_t dir;

    test_media_insert();

    /* Eject the floppy and check that DSKCHG is set. Reading it out doesn't
     * reset the bit. */
    qmp("{'execute':'eject', 'arguments':{ 'device':'floppy0' }}");
    qmp(""); /* ignore event */

    dir = inb(FLOPPY_BASE + reg_dir);
    assert_bit_set(dir, DSKCHG);
    dir = inb(FLOPPY_BASE + reg_dir);
    assert_bit_set(dir, DSKCHG);

    send_seek(0);
    dir = inb(FLOPPY_BASE + reg_dir);
    assert_bit_set(dir, DSKCHG);
    dir = inb(FLOPPY_BASE + reg_dir);
    assert_bit_set(dir, DSKCHG);

    send_seek(1);
    dir = inb(FLOPPY_BASE + reg_dir);
    assert_bit_set(dir, DSKCHG);
    dir = inb(FLOPPY_BASE + reg_dir);
    assert_bit_set(dir, DSKCHG);
}

static void test_sense_interrupt(void)
{
    int drive = 0;
    int head = 0;
    int cyl = 0;
    int ret = 0;

    floppy_send(CMD_SENSE_INT);
    ret = floppy_recv();
    g_assert(ret == 0x80);

    floppy_send(CMD_SEEK);
    floppy_send(head << 2 | drive);
    g_assert(!get_irq(FLOPPY_IRQ));
    floppy_send(cyl);

    floppy_send(CMD_SENSE_INT);
    ret = floppy_recv();
    g_assert(ret == 0x20);
    floppy_recv();
}

static void test_relative_seek(void)
{
    uint8_t drive = 0;
    uint8_t head = 0;
    uint8_t cyl = 1;
    uint8_t pcn;

    /* Send seek to track 0 */
    send_seek(0);

    /* Send relative seek to increase track by 1 */
    floppy_send(CMD_RELATIVE_SEEK_IN);
    floppy_send(head << 2 | drive);
    g_assert(!get_irq(FLOPPY_IRQ));
    floppy_send(cyl);

    ack_irq(&pcn);
    g_assert(pcn == 1);

    /* Send relative seek to decrease track by 1 */
    floppy_send(CMD_RELATIVE_SEEK_OUT);
    floppy_send(head << 2 | drive);
    g_assert(!get_irq(FLOPPY_IRQ));
    floppy_send(cyl);

    ack_irq(&pcn);
    g_assert(pcn == 0);
}

static void test_read_id(void)
{
    uint8_t drive = 0;
    uint8_t head = 0;
    uint8_t cyl;
    uint8_t st0;

    /* Seek to track 0 and check with READ ID */
    send_seek(0);

    floppy_send(CMD_READ_ID);
    g_assert(!get_irq(FLOPPY_IRQ));
    floppy_send(head << 2 | drive);

    while (!get_irq(FLOPPY_IRQ)) {
        /* qemu involves a timer with READ ID... */
        clock_step(1000000000LL / 50);
    }

    st0 = floppy_recv();
    floppy_recv();
    floppy_recv();
    cyl = floppy_recv();
    head = floppy_recv();
    floppy_recv();
    floppy_recv();

    g_assert_cmpint(cyl, ==, 0);
    g_assert_cmpint(head, ==, 0);
    g_assert_cmpint(st0, ==, head << 2);

    /* Seek to track 8 on head 1 and check with READ ID */
    head = 1;
    cyl = 8;

    floppy_send(CMD_SEEK);
    floppy_send(head << 2 | drive);
    g_assert(!get_irq(FLOPPY_IRQ));
    floppy_send(cyl);
    g_assert(get_irq(FLOPPY_IRQ));
    ack_irq(NULL);

    floppy_send(CMD_READ_ID);
    g_assert(!get_irq(FLOPPY_IRQ));
    floppy_send(head << 2 | drive);

    while (!get_irq(FLOPPY_IRQ)) {
        /* qemu involves a timer with READ ID... */
        clock_step(1000000000LL / 50);
    }

    st0 = floppy_recv();
    floppy_recv();
    floppy_recv();
    cyl = floppy_recv();
    head = floppy_recv();
    floppy_recv();
    floppy_recv();

    g_assert_cmpint(cyl, ==, 8);
    g_assert_cmpint(head, ==, 1);
    g_assert_cmpint(st0, ==, head << 2);
}

static void test_read_no_dma_1(void)
{
    uint8_t ret;

    outb(FLOPPY_BASE + reg_dor, inb(FLOPPY_BASE + reg_dor) & ~0x08);
    send_seek(0);
    ret = send_read_no_dma_command(1, 0x04);
    g_assert(ret == 0);
}

static void test_read_no_dma_18(void)
{
    uint8_t ret;

    outb(FLOPPY_BASE + reg_dor, inb(FLOPPY_BASE + reg_dor) & ~0x08);
    send_seek(0);
    ret = send_read_no_dma_command(18, 0x04);
    g_assert(ret == 0);
}

static void test_read_no_dma_19(void)
{
    uint8_t ret;

    outb(FLOPPY_BASE + reg_dor, inb(FLOPPY_BASE + reg_dor) & ~0x08);
    send_seek(0);
    ret = send_read_no_dma_command(19, 0x20);
    g_assert(ret == 0);
}

static void test_verify(void)
{
    uint8_t ret;

    ret = send_read_command(CMD_VERIFY);
    g_assert(ret == 0);
}

/* success if no crash or abort */
static void fuzz_registers(void)
{
    unsigned int i;

    for (i = 0; i < 1000; i++) {
        uint8_t reg, val;

        reg = (uint8_t)g_test_rand_int_range(0, 8);
        val = (uint8_t)g_test_rand_int_range(0, 256);

        outb(FLOPPY_BASE + reg, val);
        inb(FLOPPY_BASE + reg);
    }
}

int main(int argc, char **argv)
{
    const char *arch = qtest_get_arch();
    char *cmdline;
    int fd;
    int ret;

    /* Check architecture */
    if (strcmp(arch, "i386") && strcmp(arch, "x86_64")) {
        g_test_message("Skipping test for non-x86\n");
        return 0;
    }

    /* Create a temporary raw image */
    fd = mkstemp(test_image);
    g_assert(fd >= 0);
    ret = ftruncate(fd, TEST_IMAGE_SIZE);
    g_assert(ret == 0);
    close(fd);

    /* Run the tests */
    g_test_init(&argc, &argv, NULL);

    cmdline = g_strdup_printf("-vnc none ");

    qtest_start(cmdline);
    qtest_irq_intercept_in(global_qtest, "ioapic");
    qtest_add_func("/fdc/cmos", test_cmos);
    qtest_add_func("/fdc/no_media_on_start", test_no_media_on_start);
    qtest_add_func("/fdc/read_without_media", test_read_without_media);
    qtest_add_func("/fdc/media_change", test_media_change);
    qtest_add_func("/fdc/sense_interrupt", test_sense_interrupt);
    qtest_add_func("/fdc/relative_seek", test_relative_seek);
    qtest_add_func("/fdc/read_id", test_read_id);
    qtest_add_func("/fdc/verify", test_verify);
    qtest_add_func("/fdc/media_insert", test_media_insert);
    qtest_add_func("/fdc/read_no_dma_1", test_read_no_dma_1);
    qtest_add_func("/fdc/read_no_dma_18", test_read_no_dma_18);
    qtest_add_func("/fdc/read_no_dma_19", test_read_no_dma_19);
    qtest_add_func("/fdc/fuzz-registers", fuzz_registers);

    ret = g_test_run();

    /* Cleanup */
    qtest_quit(global_qtest);
    unlink(test_image);

    return ret;
}
Commit	Line	Data
93e9eb68 KW	1	/*
	2	* Floppy test cases.
	3	*
	4	* Copyright (c) 2012 Kevin Wolf <kwolf@redhat.com>
	5	*
	6	* Permission is hereby granted, free of charge, to any person obtaining a copy
	7	* of this software and associated documentation files (the "Software"), to deal
	8	* in the Software without restriction, including without limitation the rights
	9	* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
	10	* copies of the Software, and to permit persons to whom the Software is
	11	* furnished to do so, subject to the following conditions:
	12	*
	13	* The above copyright notice and this permission notice shall be included in
	14	* all copies or substantial portions of the Software.
	15	*
	16	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	17	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	18	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	19	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
	20	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
	21	* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
	22	* THE SOFTWARE.
	23	*/
	24
	25	#include <stdint.h>
	26	#include <string.h>
	27	#include <stdio.h>
	28
	29	#include <glib.h>
	30
	31	#include "libqtest.h"
	32	#include "qemu-common.h"
	33
	34	#define TEST_IMAGE_SIZE 1440 * 1024
	35
	36	#define FLOPPY_BASE 0x3f0
	37	#define FLOPPY_IRQ 6
	38
	39	enum {
	40	reg_sra = 0x0,
	41	reg_srb = 0x1,
	42	reg_dor = 0x2,
	43	reg_msr = 0x4,
	44	reg_dsr = 0x4,
	45	reg_fifo = 0x5,
	46	reg_dir = 0x7,
	47	};
	48
	49	enum {
98272dbb	50	CMD_SENSE_INT = 0x08,
67f194bd	51	CMD_READ_ID = 0x0a,
98272dbb	52	CMD_SEEK = 0x0f,
6f442fe8	53	CMD_VERIFY = 0x16,
98272dbb PH	54	CMD_READ = 0xe6,
	55	CMD_RELATIVE_SEEK_OUT = 0x8f,
	56	CMD_RELATIVE_SEEK_IN = 0xcf,
93e9eb68 KW	57	};
	58
	59	enum {
5f8ae8e2 HP	60	BUSY = 0x10,
5f8ae8e2 HP	61	NONDMA = 0x20,
93e9eb68 KW	62	RQM = 0x80,
	63	DIO = 0x40,
	64
	65	DSKCHG = 0x80,
	66	};
	67
	68	char test_image[] = "/tmp/qtest.XXXXXX";
	69
	70	#define assert_bit_set(data, mask) g_assert_cmphex((data) & (mask), ==, (mask))
	71	#define assert_bit_clear(data, mask) g_assert_cmphex((data) & (mask), ==, 0)
	72
7cd33161 PH	73	static uint8_t base = 0x70;
	74
	75	enum {
	76	CMOS_FLOPPY = 0x10,
	77	};
	78
93e9eb68 KW	79	static void floppy_send(uint8_t byte)
	80	{
	81	uint8_t msr;
	82
	83	msr = inb(FLOPPY_BASE + reg_msr);
	84	assert_bit_set(msr, RQM);
	85	assert_bit_clear(msr, DIO);
	86
	87	outb(FLOPPY_BASE + reg_fifo, byte);
	88	}
	89
	90	static uint8_t floppy_recv(void)
	91	{
	92	uint8_t msr;
	93
	94	msr = inb(FLOPPY_BASE + reg_msr);
	95	assert_bit_set(msr, RQM \| DIO);
	96
	97	return inb(FLOPPY_BASE + reg_fifo);
	98	}
	99
c3cdc1b0 KW	100	/* pcn: Present Cylinder Number */
c3cdc1b0 KW	101	static void ack_irq(uint8_t *pcn)
93e9eb68	102	{
98272dbb PH	103	uint8_t ret;
98272dbb PH	104
93e9eb68 KW	105	g_assert(get_irq(FLOPPY_IRQ));
	106	floppy_send(CMD_SENSE_INT);
	107	floppy_recv();
c3cdc1b0	108
98272dbb	109	ret = floppy_recv();
c3cdc1b0 KW	110	if (pcn != NULL) {
	111	*pcn = ret;
	112	}
98272dbb	113
c3cdc1b0	114	g_assert(!get_irq(FLOPPY_IRQ));
93e9eb68 KW	115	}
93e9eb68 KW	116
6f442fe8	117	static uint8_t send_read_command(uint8_t cmd)
8b9ef60d PH	118	{
	119	uint8_t drive = 0;
	120	uint8_t head = 0;
	121	uint8_t cyl = 0;
	122	uint8_t sect_addr = 1;
	123	uint8_t sect_size = 2;
	124	uint8_t eot = 1;
	125	uint8_t gap = 0x1b;
	126	uint8_t gpl = 0xff;
	127
	128	uint8_t msr = 0;
	129	uint8_t st0;
	130
	131	uint8_t ret = 0;
	132
6f442fe8	133	floppy_send(cmd);
8b9ef60d PH	134	floppy_send(head << 2 \| drive);
	135	g_assert(!get_irq(FLOPPY_IRQ));
	136	floppy_send(cyl);
	137	floppy_send(head);
	138	floppy_send(sect_addr);
	139	floppy_send(sect_size);
	140	floppy_send(eot);
	141	floppy_send(gap);
	142	floppy_send(gpl);
	143
	144	uint8_t i = 0;
	145	uint8_t n = 2;
	146	for (; i < n; i++) {
	147	msr = inb(FLOPPY_BASE + reg_msr);
	148	if (msr == 0xd0) {
	149	break;
	150	}
	151	sleep(1);
	152	}
	153
	154	if (i >= n) {
	155	return 1;
	156	}
	157
	158	st0 = floppy_recv();
075f5532	159	if (st0 != 0x40) {
8b9ef60d PH	160	ret = 1;
	161	}
	162
	163	floppy_recv();
	164	floppy_recv();
	165	floppy_recv();
	166	floppy_recv();
	167	floppy_recv();
	168	floppy_recv();
	169
	170	return ret;
	171	}
	172
5f8ae8e2 HP	173	static uint8_t send_read_no_dma_command(int nb_sect, uint8_t expected_st0)
	174	{
	175	uint8_t drive = 0;
	176	uint8_t head = 0;
	177	uint8_t cyl = 0;
	178	uint8_t sect_addr = 1;
	179	uint8_t sect_size = 2;
	180	uint8_t eot = nb_sect;
	181	uint8_t gap = 0x1b;
	182	uint8_t gpl = 0xff;
	183
	184	uint8_t msr = 0;
	185	uint8_t st0;
	186
	187	uint8_t ret = 0;
	188
	189	floppy_send(CMD_READ);
	190	floppy_send(head << 2 \| drive);
	191	g_assert(!get_irq(FLOPPY_IRQ));
	192	floppy_send(cyl);
	193	floppy_send(head);
	194	floppy_send(sect_addr);
	195	floppy_send(sect_size);
	196	floppy_send(eot);
	197	floppy_send(gap);
	198	floppy_send(gpl);
	199
	200	uint16_t i = 0;
	201	uint8_t n = 2;
	202	for (; i < n; i++) {
	203	msr = inb(FLOPPY_BASE + reg_msr);
	204	if (msr == (BUSY \| NONDMA \| DIO \| RQM)) {
	205	break;
	206	}
	207	sleep(1);
	208	}
	209
	210	if (i >= n) {
	211	return 1;
	212	}
	213
	214	/* Non-DMA mode */
	215	for (i = 0; i < 512 * 2 * nb_sect; i++) {
	216	msr = inb(FLOPPY_BASE + reg_msr);
	217	assert_bit_set(msr, BUSY \| RQM \| DIO);
	218	inb(FLOPPY_BASE + reg_fifo);
	219	}
	220
	221	st0 = floppy_recv();
	222	if (st0 != expected_st0) {
	223	ret = 1;
	224	}
	225
	226	floppy_recv();
	227	floppy_recv();
	228	floppy_recv();
	229	floppy_recv();
	230	floppy_recv();
	231	floppy_recv();
	232
	233	return ret;
	234	}
	235
c3cdc1b0	236	static void send_seek(int cyl)
93e9eb68 KW	237	{
	238	int drive = 0;
	239	int head = 0;
93e9eb68 KW	240
	241	floppy_send(CMD_SEEK);
	242	floppy_send(head << 2 \| drive);
	243	g_assert(!get_irq(FLOPPY_IRQ));
	244	floppy_send(cyl);
c3cdc1b0	245	ack_irq(NULL);
93e9eb68 KW	246	}
93e9eb68 KW	247
7cd33161	248	static uint8_t cmos_read(uint8_t reg)
93e9eb68	249	{
7cd33161 PH	250	outb(base + 0, reg);
	251	return inb(base + 1);
	252	}
93e9eb68	253
7cd33161 PH	254	static void test_cmos(void)
	255	{
	256	uint8_t cmos;
93e9eb68	257
7cd33161 PH	258	cmos = cmos_read(CMOS_FLOPPY);
	259	g_assert(cmos == 0x40);
	260	}
93e9eb68	261
7cd33161 PH	262	static void test_no_media_on_start(void)
	263	{
	264	uint8_t dir;
	265
	266	/* Media changed bit must be set all time after start if there is
	267	* no media in drive. */
93e9eb68 KW	268	dir = inb(FLOPPY_BASE + reg_dir);
	269	assert_bit_set(dir, DSKCHG);
	270	dir = inb(FLOPPY_BASE + reg_dir);
	271	assert_bit_set(dir, DSKCHG);
c3cdc1b0	272	send_seek(1);
93e9eb68 KW	273	dir = inb(FLOPPY_BASE + reg_dir);
	274	assert_bit_set(dir, DSKCHG);
	275	dir = inb(FLOPPY_BASE + reg_dir);
	276	assert_bit_set(dir, DSKCHG);
7cd33161 PH	277	}
7cd33161 PH	278
8b9ef60d PH	279	static void test_read_without_media(void)
	280	{
	281	uint8_t ret;
	282
6f442fe8	283	ret = send_read_command(CMD_READ);
8b9ef60d PH	284	g_assert(ret == 0);
	285	}
	286
1f507913	287	static void test_media_insert(void)
7cd33161 PH	288	{
7cd33161 PH	289	uint8_t dir;
93e9eb68	290
7cd33161	291	/* Insert media in drive. DSKCHK should not be reset until a step pulse
93e9eb68 KW	292	* is sent. */
	293	qmp("{'execute':'change', 'arguments':{ 'device':'floppy0', "
	294	"'target': '%s' }}", test_image);
	295	qmp(""); /* ignore event (FIXME open -> open transition?!) */
	296	qmp(""); /* ignore event */
	297
	298	dir = inb(FLOPPY_BASE + reg_dir);
	299	assert_bit_set(dir, DSKCHG);
	300	dir = inb(FLOPPY_BASE + reg_dir);
	301	assert_bit_set(dir, DSKCHG);
	302
c3cdc1b0	303	send_seek(0);
59240c34 PH	304	dir = inb(FLOPPY_BASE + reg_dir);
	305	assert_bit_set(dir, DSKCHG);
	306	dir = inb(FLOPPY_BASE + reg_dir);
	307	assert_bit_set(dir, DSKCHG);
	308
	309	/* Step to next track should clear DSKCHG bit. */
c3cdc1b0	310	send_seek(1);
93e9eb68 KW	311	dir = inb(FLOPPY_BASE + reg_dir);
	312	assert_bit_clear(dir, DSKCHG);
	313	dir = inb(FLOPPY_BASE + reg_dir);
	314	assert_bit_clear(dir, DSKCHG);
1f507913 HP	315	}
	316
	317	static void test_media_change(void)
	318	{
	319	uint8_t dir;
	320
	321	test_media_insert();
7cd33161 PH	322
	323	/* Eject the floppy and check that DSKCHG is set. Reading it out doesn't
	324	* reset the bit. */
	325	qmp("{'execute':'eject', 'arguments':{ 'device':'floppy0' }}");
	326	qmp(""); /* ignore event */
	327
	328	dir = inb(FLOPPY_BASE + reg_dir);
	329	assert_bit_set(dir, DSKCHG);
	330	dir = inb(FLOPPY_BASE + reg_dir);
	331	assert_bit_set(dir, DSKCHG);
	332
c3cdc1b0	333	send_seek(0);
59240c34 PH	334	dir = inb(FLOPPY_BASE + reg_dir);
	335	assert_bit_set(dir, DSKCHG);
	336	dir = inb(FLOPPY_BASE + reg_dir);
	337	assert_bit_set(dir, DSKCHG);
	338
c3cdc1b0	339	send_seek(1);
7cd33161 PH	340	dir = inb(FLOPPY_BASE + reg_dir);
	341	assert_bit_set(dir, DSKCHG);
	342	dir = inb(FLOPPY_BASE + reg_dir);
	343	assert_bit_set(dir, DSKCHG);
93e9eb68 KW	344	}
93e9eb68 KW	345
b3ce604e PH	346	static void test_sense_interrupt(void)
	347	{
	348	int drive = 0;
	349	int head = 0;
	350	int cyl = 0;
	351	int ret = 0;
	352
	353	floppy_send(CMD_SENSE_INT);
	354	ret = floppy_recv();
	355	g_assert(ret == 0x80);
	356
	357	floppy_send(CMD_SEEK);
	358	floppy_send(head << 2 \| drive);
	359	g_assert(!get_irq(FLOPPY_IRQ));
	360	floppy_send(cyl);
	361
	362	floppy_send(CMD_SENSE_INT);
	363	ret = floppy_recv();
	364	g_assert(ret == 0x20);
	365	floppy_recv();
	366	}
	367
98272dbb PH	368	static void test_relative_seek(void)
	369	{
	370	uint8_t drive = 0;
	371	uint8_t head = 0;
	372	uint8_t cyl = 1;
c3cdc1b0	373	uint8_t pcn;
98272dbb PH	374
98272dbb PH	375	/* Send seek to track 0 */
c3cdc1b0	376	send_seek(0);
98272dbb PH	377
	378	/* Send relative seek to increase track by 1 */
	379	floppy_send(CMD_RELATIVE_SEEK_IN);
	380	floppy_send(head << 2 \| drive);
	381	g_assert(!get_irq(FLOPPY_IRQ));
	382	floppy_send(cyl);
	383
c3cdc1b0 KW	384	ack_irq(&pcn);
c3cdc1b0 KW	385	g_assert(pcn == 1);
98272dbb PH	386
	387	/* Send relative seek to decrease track by 1 */
	388	floppy_send(CMD_RELATIVE_SEEK_OUT);
	389	floppy_send(head << 2 \| drive);
	390	g_assert(!get_irq(FLOPPY_IRQ));
	391	floppy_send(cyl);
	392
c3cdc1b0 KW	393	ack_irq(&pcn);
c3cdc1b0 KW	394	g_assert(pcn == 0);
98272dbb PH	395	}
98272dbb PH	396
67f194bd KW	397	static void test_read_id(void)
	398	{
	399	uint8_t drive = 0;
	400	uint8_t head = 0;
	401	uint8_t cyl;
	402	uint8_t st0;
	403
	404	/* Seek to track 0 and check with READ ID */
	405	send_seek(0);
	406
	407	floppy_send(CMD_READ_ID);
	408	g_assert(!get_irq(FLOPPY_IRQ));
	409	floppy_send(head << 2 \| drive);
	410
	411	while (!get_irq(FLOPPY_IRQ)) {
	412	/* qemu involves a timer with READ ID... */
	413	clock_step(1000000000LL / 50);
	414	}
	415
	416	st0 = floppy_recv();
	417	floppy_recv();
	418	floppy_recv();
	419	cyl = floppy_recv();
	420	head = floppy_recv();
	421	floppy_recv();
	422	floppy_recv();
	423
	424	g_assert_cmpint(cyl, ==, 0);
	425	g_assert_cmpint(head, ==, 0);
	426	g_assert_cmpint(st0, ==, head << 2);
	427
	428	/* Seek to track 8 on head 1 and check with READ ID */
	429	head = 1;
	430	cyl = 8;
	431
	432	floppy_send(CMD_SEEK);
	433	floppy_send(head << 2 \| drive);
	434	g_assert(!get_irq(FLOPPY_IRQ));
	435	floppy_send(cyl);
	436	g_assert(get_irq(FLOPPY_IRQ));
	437	ack_irq(NULL);
	438
	439	floppy_send(CMD_READ_ID);
	440	g_assert(!get_irq(FLOPPY_IRQ));
	441	floppy_send(head << 2 \| drive);
	442
	443	while (!get_irq(FLOPPY_IRQ)) {
	444	/* qemu involves a timer with READ ID... */
	445	clock_step(1000000000LL / 50);
	446	}
	447
	448	st0 = floppy_recv();
	449	floppy_recv();
	450	floppy_recv();
	451	cyl = floppy_recv();
	452	head = floppy_recv();
	453	floppy_recv();
	454	floppy_recv();
	455
	456	g_assert_cmpint(cyl, ==, 8);
	457	g_assert_cmpint(head, ==, 1);
	458	g_assert_cmpint(st0, ==, head << 2);
	459	}
	460
5f8ae8e2 HP	461	static void test_read_no_dma_1(void)
	462	{
	463	uint8_t ret;
	464
	465	outb(FLOPPY_BASE + reg_dor, inb(FLOPPY_BASE + reg_dor) & ~0x08);
	466	send_seek(0);
075f5532	467	ret = send_read_no_dma_command(1, 0x04);
5f8ae8e2 HP	468	g_assert(ret == 0);
	469	}
	470
	471	static void test_read_no_dma_18(void)
	472	{
	473	uint8_t ret;
	474
	475	outb(FLOPPY_BASE + reg_dor, inb(FLOPPY_BASE + reg_dor) & ~0x08);
	476	send_seek(0);
075f5532	477	ret = send_read_no_dma_command(18, 0x04);
5f8ae8e2 HP	478	g_assert(ret == 0);
	479	}
	480
	481	static void test_read_no_dma_19(void)
	482	{
	483	uint8_t ret;
	484
	485	outb(FLOPPY_BASE + reg_dor, inb(FLOPPY_BASE + reg_dor) & ~0x08);
	486	send_seek(0);
	487	ret = send_read_no_dma_command(19, 0x20);
	488	g_assert(ret == 0);
	489	}
	490
6f442fe8 HP	491	static void test_verify(void)
	492	{
	493	uint8_t ret;
	494
	495	ret = send_read_command(CMD_VERIFY);
	496	g_assert(ret == 0);
	497	}
	498
3359847e BS	499	/* success if no crash or abort */
	500	static void fuzz_registers(void)
	501	{
	502	unsigned int i;
	503
	504	for (i = 0; i < 1000; i++) {
	505	uint8_t reg, val;
	506
	507	reg = (uint8_t)g_test_rand_int_range(0, 8);
	508	val = (uint8_t)g_test_rand_int_range(0, 256);
	509
	510	outb(FLOPPY_BASE + reg, val);
	511	inb(FLOPPY_BASE + reg);
	512	}
	513	}
	514
93e9eb68 KW	515	int main(int argc, char **argv)
	516	{
	517	const char *arch = qtest_get_arch();
	518	char *cmdline;
	519	int fd;
	520	int ret;
	521
	522	/* Check architecture */
	523	if (strcmp(arch, "i386") && strcmp(arch, "x86_64")) {
	524	g_test_message("Skipping test for non-x86\n");
	525	return 0;
	526	}
	527
	528	/* Create a temporary raw image */
	529	fd = mkstemp(test_image);
	530	g_assert(fd >= 0);
	531	ret = ftruncate(fd, TEST_IMAGE_SIZE);
	532	g_assert(ret == 0);
	533	close(fd);
	534
	535	/* Run the tests */
	536	g_test_init(&argc, &argv, NULL);
	537
7cd33161	538	cmdline = g_strdup_printf("-vnc none ");
93e9eb68 KW	539
	540	qtest_start(cmdline);
	541	qtest_irq_intercept_in(global_qtest, "ioapic");
7cd33161 PH	542	qtest_add_func("/fdc/cmos", test_cmos);
7cd33161 PH	543	qtest_add_func("/fdc/no_media_on_start", test_no_media_on_start);
8b9ef60d	544	qtest_add_func("/fdc/read_without_media", test_read_without_media);
93e9eb68	545	qtest_add_func("/fdc/media_change", test_media_change);
b3ce604e	546	qtest_add_func("/fdc/sense_interrupt", test_sense_interrupt);
98272dbb	547	qtest_add_func("/fdc/relative_seek", test_relative_seek);
67f194bd	548	qtest_add_func("/fdc/read_id", test_read_id);
6f442fe8	549	qtest_add_func("/fdc/verify", test_verify);
44212dcc	550	qtest_add_func("/fdc/media_insert", test_media_insert);
5f8ae8e2 HP	551	qtest_add_func("/fdc/read_no_dma_1", test_read_no_dma_1);
	552	qtest_add_func("/fdc/read_no_dma_18", test_read_no_dma_18);
	553	qtest_add_func("/fdc/read_no_dma_19", test_read_no_dma_19);
3359847e	554	qtest_add_func("/fdc/fuzz-registers", fuzz_registers);
93e9eb68 KW	555
	556	ret = g_test_run();
	557
	558	/* Cleanup */
	559	qtest_quit(global_qtest);
	560	unlink(test_image);
	561
	562	return ret;
	563	}