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d19893da FB |
1 | /* |
2 | * Host code generation | |
5fafdf24 | 3 | * |
d19893da FB |
4 | * Copyright (c) 2003 Fabrice Bellard |
5 | * | |
6 | * This library is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU Lesser General Public | |
8 | * License as published by the Free Software Foundation; either | |
9 | * version 2 of the License, or (at your option) any later version. | |
10 | * | |
11 | * This library is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | * Lesser General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU Lesser General Public | |
8167ee88 | 17 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. |
d19893da FB |
18 | */ |
19 | #include <stdarg.h> | |
20 | #include <stdlib.h> | |
21 | #include <stdio.h> | |
22 | #include <string.h> | |
23 | #include <inttypes.h> | |
24 | ||
25 | #include "config.h" | |
2054396a | 26 | |
af5ad107 | 27 | #define NO_CPU_IO_DEFS |
d3eead2e | 28 | #include "cpu.h" |
d19893da | 29 | #include "disas.h" |
57fec1fe | 30 | #include "tcg.h" |
29e922b6 | 31 | #include "qemu-timer.h" |
d19893da | 32 | |
57fec1fe FB |
33 | /* code generation context */ |
34 | TCGContext tcg_ctx; | |
d19893da | 35 | |
c4687878 | 36 | target_ulong gen_opc_pc[OPC_BUF_SIZE]; |
2e70f6ef | 37 | uint16_t gen_opc_icount[OPC_BUF_SIZE]; |
d19893da | 38 | uint8_t gen_opc_instr_start[OPC_BUF_SIZE]; |
d19893da | 39 | |
57fec1fe FB |
40 | void cpu_gen_init(void) |
41 | { | |
42 | tcg_context_init(&tcg_ctx); | |
57fec1fe FB |
43 | } |
44 | ||
d19893da | 45 | /* return non zero if the very first instruction is invalid so that |
5fafdf24 | 46 | the virtual CPU can trigger an exception. |
d19893da FB |
47 | |
48 | '*gen_code_size_ptr' contains the size of the generated code (host | |
49 | code). | |
50 | */ | |
9349b4f9 | 51 | int cpu_gen_code(CPUArchState *env, TranslationBlock *tb, int *gen_code_size_ptr) |
d19893da | 52 | { |
57fec1fe | 53 | TCGContext *s = &tcg_ctx; |
d19893da FB |
54 | uint8_t *gen_code_buf; |
55 | int gen_code_size; | |
57fec1fe FB |
56 | #ifdef CONFIG_PROFILER |
57 | int64_t ti; | |
58 | #endif | |
59 | ||
60 | #ifdef CONFIG_PROFILER | |
b67d9a52 FB |
61 | s->tb_count1++; /* includes aborted translations because of |
62 | exceptions */ | |
57fec1fe FB |
63 | ti = profile_getclock(); |
64 | #endif | |
65 | tcg_func_start(s); | |
d19893da | 66 | |
2cfc5f17 TS |
67 | gen_intermediate_code(env, tb); |
68 | ||
ec6338ba | 69 | /* generate machine code */ |
57fec1fe | 70 | gen_code_buf = tb->tc_ptr; |
ec6338ba FB |
71 | tb->tb_next_offset[0] = 0xffff; |
72 | tb->tb_next_offset[1] = 0xffff; | |
57fec1fe | 73 | s->tb_next_offset = tb->tb_next_offset; |
4cbb86e1 | 74 | #ifdef USE_DIRECT_JUMP |
57fec1fe FB |
75 | s->tb_jmp_offset = tb->tb_jmp_offset; |
76 | s->tb_next = NULL; | |
d19893da | 77 | #else |
57fec1fe FB |
78 | s->tb_jmp_offset = NULL; |
79 | s->tb_next = tb->tb_next; | |
d19893da | 80 | #endif |
57fec1fe FB |
81 | |
82 | #ifdef CONFIG_PROFILER | |
b67d9a52 FB |
83 | s->tb_count++; |
84 | s->interm_time += profile_getclock() - ti; | |
85 | s->code_time -= profile_getclock(); | |
57fec1fe | 86 | #endif |
54604f74 | 87 | gen_code_size = tcg_gen_code(s, gen_code_buf); |
d19893da | 88 | *gen_code_size_ptr = gen_code_size; |
57fec1fe | 89 | #ifdef CONFIG_PROFILER |
b67d9a52 FB |
90 | s->code_time += profile_getclock(); |
91 | s->code_in_len += tb->size; | |
92 | s->code_out_len += gen_code_size; | |
57fec1fe FB |
93 | #endif |
94 | ||
d19893da | 95 | #ifdef DEBUG_DISAS |
8fec2b8c | 96 | if (qemu_loglevel_mask(CPU_LOG_TB_OUT_ASM)) { |
93fcfe39 AL |
97 | qemu_log("OUT: [size=%d]\n", *gen_code_size_ptr); |
98 | log_disas(tb->tc_ptr, *gen_code_size_ptr); | |
99 | qemu_log("\n"); | |
31b1a7b4 | 100 | qemu_log_flush(); |
d19893da FB |
101 | } |
102 | #endif | |
103 | return 0; | |
104 | } | |
105 | ||
5fafdf24 | 106 | /* The cpu state corresponding to 'searched_pc' is restored. |
d19893da | 107 | */ |
5fafdf24 | 108 | int cpu_restore_state(TranslationBlock *tb, |
6375e09e | 109 | CPUArchState *env, uintptr_t searched_pc) |
d19893da | 110 | { |
57fec1fe FB |
111 | TCGContext *s = &tcg_ctx; |
112 | int j; | |
6375e09e | 113 | uintptr_t tc_ptr; |
57fec1fe FB |
114 | #ifdef CONFIG_PROFILER |
115 | int64_t ti; | |
116 | #endif | |
117 | ||
118 | #ifdef CONFIG_PROFILER | |
119 | ti = profile_getclock(); | |
120 | #endif | |
121 | tcg_func_start(s); | |
d19893da | 122 | |
2cfc5f17 | 123 | gen_intermediate_code_pc(env, tb); |
3b46e624 | 124 | |
2e70f6ef PB |
125 | if (use_icount) { |
126 | /* Reset the cycle counter to the start of the block. */ | |
127 | env->icount_decr.u16.low += tb->icount; | |
128 | /* Clear the IO flag. */ | |
129 | env->can_do_io = 0; | |
130 | } | |
131 | ||
d19893da | 132 | /* find opc index corresponding to search_pc */ |
6375e09e | 133 | tc_ptr = (uintptr_t)tb->tc_ptr; |
d19893da FB |
134 | if (searched_pc < tc_ptr) |
135 | return -1; | |
57fec1fe FB |
136 | |
137 | s->tb_next_offset = tb->tb_next_offset; | |
138 | #ifdef USE_DIRECT_JUMP | |
139 | s->tb_jmp_offset = tb->tb_jmp_offset; | |
140 | s->tb_next = NULL; | |
141 | #else | |
142 | s->tb_jmp_offset = NULL; | |
143 | s->tb_next = tb->tb_next; | |
144 | #endif | |
54604f74 | 145 | j = tcg_gen_code_search_pc(s, (uint8_t *)tc_ptr, searched_pc - tc_ptr); |
57fec1fe FB |
146 | if (j < 0) |
147 | return -1; | |
d19893da FB |
148 | /* now find start of instruction before */ |
149 | while (gen_opc_instr_start[j] == 0) | |
150 | j--; | |
2e70f6ef | 151 | env->icount_decr.u16.low -= gen_opc_icount[j]; |
3b46e624 | 152 | |
e87b7cb0 | 153 | restore_state_to_opc(env, tb, j); |
57fec1fe FB |
154 | |
155 | #ifdef CONFIG_PROFILER | |
b67d9a52 FB |
156 | s->restore_time += profile_getclock() - ti; |
157 | s->restore_count++; | |
57fec1fe | 158 | #endif |
d19893da FB |
159 | return 0; |
160 | } |