]> git.proxmox.com Git - qemu.git/blame - vl.h
enable qcow2
[qemu.git] / vl.h
CommitLineData
fc01f7e7
FB
1/*
2 * QEMU System Emulator header
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24#ifndef VL_H
25#define VL_H
26
67b915a5
FB
27/* we put basic includes here to avoid repeating them in device drivers */
28#include <stdlib.h>
29#include <stdio.h>
30#include <stdarg.h>
31#include <string.h>
32#include <inttypes.h>
85571bc7 33#include <limits.h>
8a7ddc38 34#include <time.h>
67b915a5
FB
35#include <ctype.h>
36#include <errno.h>
37#include <unistd.h>
38#include <fcntl.h>
7d3505c5 39#include <sys/stat.h>
67b915a5
FB
40
41#ifndef O_LARGEFILE
42#define O_LARGEFILE 0
43#endif
40c3bac3
FB
44#ifndef O_BINARY
45#define O_BINARY 0
46#endif
67b915a5
FB
47
48#ifdef _WIN32
a18e524a 49#include <windows.h>
ac62f715 50#define fsync _commit
57d1a2b6
FB
51#define lseek _lseeki64
52#define ENOTSUP 4096
beac80cd
FB
53extern int qemu_ftruncate64(int, int64_t);
54#define ftruncate qemu_ftruncate64
55
57d1a2b6
FB
56
57static inline char *realpath(const char *path, char *resolved_path)
58{
59 _fullpath(resolved_path, path, _MAX_PATH);
60 return resolved_path;
61}
ec3757de
FB
62
63#define PRId64 "I64d"
26a76461
FB
64#define PRIx64 "I64x"
65#define PRIu64 "I64u"
66#define PRIo64 "I64o"
67b915a5 67#endif
8a7ddc38 68
ea2384d3
FB
69#ifdef QEMU_TOOL
70
71/* we use QEMU_TOOL in the command line tools which do not depend on
72 the target CPU type */
73#include "config-host.h"
74#include <setjmp.h>
75#include "osdep.h"
76#include "bswap.h"
77
78#else
79
4f209290 80#include "audio/audio.h"
16f62432 81#include "cpu.h"
1fddef4b 82#include "gdbstub.h"
16f62432 83
ea2384d3
FB
84#endif /* !defined(QEMU_TOOL) */
85
67b915a5
FB
86#ifndef glue
87#define xglue(x, y) x ## y
88#define glue(x, y) xglue(x, y)
89#define stringify(s) tostring(s)
90#define tostring(s) #s
91#endif
92
24236869
FB
93#ifndef MIN
94#define MIN(a, b) (((a) < (b)) ? (a) : (b))
95#endif
96#ifndef MAX
97#define MAX(a, b) (((a) > (b)) ? (a) : (b))
98#endif
99
33e3963e 100/* vl.c */
80cabfad 101uint64_t muldiv64(uint64_t a, uint32_t b, uint32_t c);
313aa567 102
80cabfad
FB
103void hw_error(const char *fmt, ...);
104
80cabfad
FB
105extern const char *bios_dir;
106
107void pstrcpy(char *buf, int buf_size, const char *str);
108char *pstrcat(char *buf, int buf_size, const char *s);
82c643ff 109int strstart(const char *str, const char *val, const char **ptr);
c4b1fcc0 110
8a7ddc38
FB
111extern int vm_running;
112
0bd48850
FB
113typedef struct vm_change_state_entry VMChangeStateEntry;
114typedef void VMChangeStateHandler(void *opaque, int running);
8a7ddc38
FB
115typedef void VMStopHandler(void *opaque, int reason);
116
0bd48850
FB
117VMChangeStateEntry *qemu_add_vm_change_state_handler(VMChangeStateHandler *cb,
118 void *opaque);
119void qemu_del_vm_change_state_handler(VMChangeStateEntry *e);
120
8a7ddc38
FB
121int qemu_add_vm_stop_handler(VMStopHandler *cb, void *opaque);
122void qemu_del_vm_stop_handler(VMStopHandler *cb, void *opaque);
123
124void vm_start(void);
125void vm_stop(int reason);
126
bb0c6722
FB
127typedef void QEMUResetHandler(void *opaque);
128
129void qemu_register_reset(QEMUResetHandler *func, void *opaque);
130void qemu_system_reset_request(void);
131void qemu_system_shutdown_request(void);
3475187d
FB
132void qemu_system_powerdown_request(void);
133#if !defined(TARGET_SPARC)
134// Please implement a power failure function to signal the OS
135#define qemu_system_powerdown() do{}while(0)
136#else
137void qemu_system_powerdown(void);
138#endif
bb0c6722 139
ea2384d3
FB
140void main_loop_wait(int timeout);
141
0ced6589
FB
142extern int ram_size;
143extern int bios_size;
ee22c2f7 144extern int rtc_utc;
1f04275e 145extern int cirrus_vga_enabled;
28b9b5af
FB
146extern int graphic_width;
147extern int graphic_height;
148extern int graphic_depth;
3d11d0eb 149extern const char *keyboard_layout;
d993e026 150extern int kqemu_allowed;
a09db21f 151extern int win2k_install_hack;
bb36d470 152extern int usb_enabled;
6a00d601 153extern int smp_cpus;
0ced6589
FB
154
155/* XXX: make it dynamic */
75956cf0 156#if defined (TARGET_PPC) || defined (TARGET_SPARC64)
d5295253 157#define BIOS_SIZE ((512 + 32) * 1024)
6af0bf9c
FB
158#elif defined(TARGET_MIPS)
159#define BIOS_SIZE (128 * 1024)
0ced6589 160#else
7587cf44 161#define BIOS_SIZE ((256 + 64) * 1024)
0ced6589 162#endif
aaaa7df6 163
63066f4f
FB
164/* keyboard/mouse support */
165
166#define MOUSE_EVENT_LBUTTON 0x01
167#define MOUSE_EVENT_RBUTTON 0x02
168#define MOUSE_EVENT_MBUTTON 0x04
169
170typedef void QEMUPutKBDEvent(void *opaque, int keycode);
171typedef void QEMUPutMouseEvent(void *opaque, int dx, int dy, int dz, int buttons_state);
172
173void qemu_add_kbd_event_handler(QEMUPutKBDEvent *func, void *opaque);
09b26c5e 174void qemu_add_mouse_event_handler(QEMUPutMouseEvent *func, void *opaque, int absolute);
63066f4f
FB
175
176void kbd_put_keycode(int keycode);
177void kbd_mouse_event(int dx, int dy, int dz, int buttons_state);
09b26c5e 178int kbd_mouse_is_absolute(void);
63066f4f 179
82c643ff
FB
180/* keysym is a unicode code except for special keys (see QEMU_KEY_xxx
181 constants) */
182#define QEMU_KEY_ESC1(c) ((c) | 0xe100)
183#define QEMU_KEY_BACKSPACE 0x007f
184#define QEMU_KEY_UP QEMU_KEY_ESC1('A')
185#define QEMU_KEY_DOWN QEMU_KEY_ESC1('B')
186#define QEMU_KEY_RIGHT QEMU_KEY_ESC1('C')
187#define QEMU_KEY_LEFT QEMU_KEY_ESC1('D')
188#define QEMU_KEY_HOME QEMU_KEY_ESC1(1)
189#define QEMU_KEY_END QEMU_KEY_ESC1(4)
190#define QEMU_KEY_PAGEUP QEMU_KEY_ESC1(5)
191#define QEMU_KEY_PAGEDOWN QEMU_KEY_ESC1(6)
192#define QEMU_KEY_DELETE QEMU_KEY_ESC1(3)
193
194#define QEMU_KEY_CTRL_UP 0xe400
195#define QEMU_KEY_CTRL_DOWN 0xe401
196#define QEMU_KEY_CTRL_LEFT 0xe402
197#define QEMU_KEY_CTRL_RIGHT 0xe403
198#define QEMU_KEY_CTRL_HOME 0xe404
199#define QEMU_KEY_CTRL_END 0xe405
200#define QEMU_KEY_CTRL_PAGEUP 0xe406
201#define QEMU_KEY_CTRL_PAGEDOWN 0xe407
202
203void kbd_put_keysym(int keysym);
204
c20709aa
FB
205/* async I/O support */
206
207typedef void IOReadHandler(void *opaque, const uint8_t *buf, int size);
208typedef int IOCanRWHandler(void *opaque);
7c9d8e07 209typedef void IOHandler(void *opaque);
c20709aa 210
7c9d8e07
FB
211int qemu_set_fd_handler2(int fd,
212 IOCanRWHandler *fd_read_poll,
213 IOHandler *fd_read,
214 IOHandler *fd_write,
215 void *opaque);
216int qemu_set_fd_handler(int fd,
217 IOHandler *fd_read,
218 IOHandler *fd_write,
219 void *opaque);
c20709aa 220
f331110f
FB
221/* Polling handling */
222
223/* return TRUE if no sleep should be done afterwards */
224typedef int PollingFunc(void *opaque);
225
226int qemu_add_polling_cb(PollingFunc *func, void *opaque);
227void qemu_del_polling_cb(PollingFunc *func, void *opaque);
228
a18e524a
FB
229#ifdef _WIN32
230/* Wait objects handling */
231typedef void WaitObjectFunc(void *opaque);
232
233int qemu_add_wait_object(HANDLE handle, WaitObjectFunc *func, void *opaque);
234void qemu_del_wait_object(HANDLE handle, WaitObjectFunc *func, void *opaque);
235#endif
236
82c643ff
FB
237/* character device */
238
239#define CHR_EVENT_BREAK 0 /* serial break char */
ea2384d3 240#define CHR_EVENT_FOCUS 1 /* focus to this terminal (modal input needed) */
82c643ff 241
2122c51a
FB
242
243
244#define CHR_IOCTL_SERIAL_SET_PARAMS 1
245typedef struct {
246 int speed;
247 int parity;
248 int data_bits;
249 int stop_bits;
250} QEMUSerialSetParams;
251
252#define CHR_IOCTL_SERIAL_SET_BREAK 2
253
254#define CHR_IOCTL_PP_READ_DATA 3
255#define CHR_IOCTL_PP_WRITE_DATA 4
256#define CHR_IOCTL_PP_READ_CONTROL 5
257#define CHR_IOCTL_PP_WRITE_CONTROL 6
258#define CHR_IOCTL_PP_READ_STATUS 7
259
82c643ff
FB
260typedef void IOEventHandler(void *opaque, int event);
261
262typedef struct CharDriverState {
263 int (*chr_write)(struct CharDriverState *s, const uint8_t *buf, int len);
264 void (*chr_add_read_handler)(struct CharDriverState *s,
265 IOCanRWHandler *fd_can_read,
266 IOReadHandler *fd_read, void *opaque);
2122c51a 267 int (*chr_ioctl)(struct CharDriverState *s, int cmd, void *arg);
82c643ff 268 IOEventHandler *chr_event;
eb45f5fe 269 void (*chr_send_event)(struct CharDriverState *chr, int event);
f331110f 270 void (*chr_close)(struct CharDriverState *chr);
82c643ff
FB
271 void *opaque;
272} CharDriverState;
273
274void qemu_chr_printf(CharDriverState *s, const char *fmt, ...);
275int qemu_chr_write(CharDriverState *s, const uint8_t *buf, int len);
ea2384d3 276void qemu_chr_send_event(CharDriverState *s, int event);
82c643ff
FB
277void qemu_chr_add_read_handler(CharDriverState *s,
278 IOCanRWHandler *fd_can_read,
279 IOReadHandler *fd_read, void *opaque);
280void qemu_chr_add_event_handler(CharDriverState *s, IOEventHandler *chr_event);
2122c51a 281int qemu_chr_ioctl(CharDriverState *s, int cmd, void *arg);
f8d179e3 282
82c643ff
FB
283/* consoles */
284
285typedef struct DisplayState DisplayState;
286typedef struct TextConsole TextConsole;
287
95219897
PB
288typedef void (*vga_hw_update_ptr)(void *);
289typedef void (*vga_hw_invalidate_ptr)(void *);
290typedef void (*vga_hw_screen_dump_ptr)(void *, const char *);
291
292TextConsole *graphic_console_init(DisplayState *ds, vga_hw_update_ptr update,
293 vga_hw_invalidate_ptr invalidate,
294 vga_hw_screen_dump_ptr screen_dump,
295 void *opaque);
296void vga_hw_update(void);
297void vga_hw_invalidate(void);
298void vga_hw_screen_dump(const char *filename);
299
300int is_graphic_console(void);
82c643ff
FB
301CharDriverState *text_console_init(DisplayState *ds);
302void console_select(unsigned int index);
303
8d11df9e
FB
304/* serial ports */
305
306#define MAX_SERIAL_PORTS 4
307
308extern CharDriverState *serial_hds[MAX_SERIAL_PORTS];
309
6508fe59
FB
310/* parallel ports */
311
312#define MAX_PARALLEL_PORTS 3
313
314extern CharDriverState *parallel_hds[MAX_PARALLEL_PORTS];
315
7c9d8e07
FB
316/* VLANs support */
317
318typedef struct VLANClientState VLANClientState;
319
320struct VLANClientState {
321 IOReadHandler *fd_read;
d861b05e
PB
322 /* Packets may still be sent if this returns zero. It's used to
323 rate-limit the slirp code. */
324 IOCanRWHandler *fd_can_read;
7c9d8e07
FB
325 void *opaque;
326 struct VLANClientState *next;
327 struct VLANState *vlan;
328 char info_str[256];
329};
330
331typedef struct VLANState {
332 int id;
333 VLANClientState *first_client;
334 struct VLANState *next;
335} VLANState;
336
337VLANState *qemu_find_vlan(int id);
338VLANClientState *qemu_new_vlan_client(VLANState *vlan,
d861b05e
PB
339 IOReadHandler *fd_read,
340 IOCanRWHandler *fd_can_read,
341 void *opaque);
342int qemu_can_send_packet(VLANClientState *vc);
7c9d8e07 343void qemu_send_packet(VLANClientState *vc, const uint8_t *buf, int size);
d861b05e 344void qemu_handler_true(void *opaque);
7c9d8e07
FB
345
346void do_info_network(void);
347
7fb843f8
FB
348/* TAP win32 */
349int tap_win32_init(VLANState *vlan, const char *ifname);
350void tap_win32_poll(void);
351
7c9d8e07 352/* NIC info */
c4b1fcc0
FB
353
354#define MAX_NICS 8
355
7c9d8e07 356typedef struct NICInfo {
c4b1fcc0 357 uint8_t macaddr[6];
a41b2ff2 358 const char *model;
7c9d8e07
FB
359 VLANState *vlan;
360} NICInfo;
c4b1fcc0
FB
361
362extern int nb_nics;
7c9d8e07 363extern NICInfo nd_table[MAX_NICS];
8a7ddc38
FB
364
365/* timers */
366
367typedef struct QEMUClock QEMUClock;
368typedef struct QEMUTimer QEMUTimer;
369typedef void QEMUTimerCB(void *opaque);
370
371/* The real time clock should be used only for stuff which does not
372 change the virtual machine state, as it is run even if the virtual
69b91039 373 machine is stopped. The real time clock has a frequency of 1000
8a7ddc38
FB
374 Hz. */
375extern QEMUClock *rt_clock;
376
e80cfcfc 377/* The virtual clock is only run during the emulation. It is stopped
8a7ddc38
FB
378 when the virtual machine is stopped. Virtual timers use a high
379 precision clock, usually cpu cycles (use ticks_per_sec). */
380extern QEMUClock *vm_clock;
381
382int64_t qemu_get_clock(QEMUClock *clock);
383
384QEMUTimer *qemu_new_timer(QEMUClock *clock, QEMUTimerCB *cb, void *opaque);
385void qemu_free_timer(QEMUTimer *ts);
386void qemu_del_timer(QEMUTimer *ts);
387void qemu_mod_timer(QEMUTimer *ts, int64_t expire_time);
388int qemu_timer_pending(QEMUTimer *ts);
389
390extern int64_t ticks_per_sec;
391extern int pit_min_timer_count;
392
1dce7c3c 393int64_t cpu_get_ticks(void);
8a7ddc38
FB
394void cpu_enable_ticks(void);
395void cpu_disable_ticks(void);
396
397/* VM Load/Save */
398
399typedef FILE QEMUFile;
400
401void qemu_put_buffer(QEMUFile *f, const uint8_t *buf, int size);
402void qemu_put_byte(QEMUFile *f, int v);
403void qemu_put_be16(QEMUFile *f, unsigned int v);
404void qemu_put_be32(QEMUFile *f, unsigned int v);
405void qemu_put_be64(QEMUFile *f, uint64_t v);
406int qemu_get_buffer(QEMUFile *f, uint8_t *buf, int size);
407int qemu_get_byte(QEMUFile *f);
408unsigned int qemu_get_be16(QEMUFile *f);
409unsigned int qemu_get_be32(QEMUFile *f);
410uint64_t qemu_get_be64(QEMUFile *f);
411
412static inline void qemu_put_be64s(QEMUFile *f, const uint64_t *pv)
413{
414 qemu_put_be64(f, *pv);
415}
416
417static inline void qemu_put_be32s(QEMUFile *f, const uint32_t *pv)
418{
419 qemu_put_be32(f, *pv);
420}
421
422static inline void qemu_put_be16s(QEMUFile *f, const uint16_t *pv)
423{
424 qemu_put_be16(f, *pv);
425}
426
427static inline void qemu_put_8s(QEMUFile *f, const uint8_t *pv)
428{
429 qemu_put_byte(f, *pv);
430}
431
432static inline void qemu_get_be64s(QEMUFile *f, uint64_t *pv)
433{
434 *pv = qemu_get_be64(f);
435}
436
437static inline void qemu_get_be32s(QEMUFile *f, uint32_t *pv)
438{
439 *pv = qemu_get_be32(f);
440}
441
442static inline void qemu_get_be16s(QEMUFile *f, uint16_t *pv)
443{
444 *pv = qemu_get_be16(f);
445}
446
447static inline void qemu_get_8s(QEMUFile *f, uint8_t *pv)
448{
449 *pv = qemu_get_byte(f);
450}
451
c27004ec
FB
452#if TARGET_LONG_BITS == 64
453#define qemu_put_betl qemu_put_be64
454#define qemu_get_betl qemu_get_be64
455#define qemu_put_betls qemu_put_be64s
456#define qemu_get_betls qemu_get_be64s
457#else
458#define qemu_put_betl qemu_put_be32
459#define qemu_get_betl qemu_get_be32
460#define qemu_put_betls qemu_put_be32s
461#define qemu_get_betls qemu_get_be32s
462#endif
463
8a7ddc38
FB
464int64_t qemu_ftell(QEMUFile *f);
465int64_t qemu_fseek(QEMUFile *f, int64_t pos, int whence);
466
467typedef void SaveStateHandler(QEMUFile *f, void *opaque);
468typedef int LoadStateHandler(QEMUFile *f, void *opaque, int version_id);
469
470int qemu_loadvm(const char *filename);
471int qemu_savevm(const char *filename);
472int register_savevm(const char *idstr,
473 int instance_id,
474 int version_id,
475 SaveStateHandler *save_state,
476 LoadStateHandler *load_state,
477 void *opaque);
478void qemu_get_timer(QEMUFile *f, QEMUTimer *ts);
479void qemu_put_timer(QEMUFile *f, QEMUTimer *ts);
c4b1fcc0 480
6a00d601
FB
481void cpu_save(QEMUFile *f, void *opaque);
482int cpu_load(QEMUFile *f, void *opaque, int version_id);
483
83f64091
FB
484/* bottom halves */
485typedef struct QEMUBH QEMUBH;
486typedef void QEMUBHFunc(void *opaque);
487
488QEMUBH *qemu_bh_new(QEMUBHFunc *cb, void *opaque);
489void qemu_bh_schedule(QEMUBH *bh);
490void qemu_bh_cancel(QEMUBH *bh);
491void qemu_bh_delete(QEMUBH *bh);
492void qemu_bh_poll(void);
493
fc01f7e7
FB
494/* block.c */
495typedef struct BlockDriverState BlockDriverState;
ea2384d3
FB
496typedef struct BlockDriver BlockDriver;
497
498extern BlockDriver bdrv_raw;
499extern BlockDriver bdrv_cow;
500extern BlockDriver bdrv_qcow;
501extern BlockDriver bdrv_vmdk;
3c56521b 502extern BlockDriver bdrv_cloop;
585d0ed9 503extern BlockDriver bdrv_dmg;
a8753c34 504extern BlockDriver bdrv_bochs;
6a0f9e82 505extern BlockDriver bdrv_vpc;
de167e41 506extern BlockDriver bdrv_vvfat;
ea2384d3 507
83f64091
FB
508#define BDRV_O_RDONLY 0x0000
509#define BDRV_O_RDWR 0x0002
510#define BDRV_O_ACCESS 0x0003
511#define BDRV_O_CREAT 0x0004 /* create an empty file */
512#define BDRV_O_SNAPSHOT 0x0008 /* open the file read only and save writes in a snapshot */
513#define BDRV_O_FILE 0x0010 /* open as a raw file (do not try to
514 use a disk image format on top of
515 it (default for
516 bdrv_file_open()) */
517
ea2384d3
FB
518void bdrv_init(void);
519BlockDriver *bdrv_find_format(const char *format_name);
520int bdrv_create(BlockDriver *drv,
521 const char *filename, int64_t size_in_sectors,
522 const char *backing_file, int flags);
c4b1fcc0
FB
523BlockDriverState *bdrv_new(const char *device_name);
524void bdrv_delete(BlockDriverState *bs);
83f64091
FB
525int bdrv_file_open(BlockDriverState **pbs, const char *filename, int flags);
526int bdrv_open(BlockDriverState *bs, const char *filename, int flags);
527int bdrv_open2(BlockDriverState *bs, const char *filename, int flags,
ea2384d3 528 BlockDriver *drv);
fc01f7e7
FB
529void bdrv_close(BlockDriverState *bs);
530int bdrv_read(BlockDriverState *bs, int64_t sector_num,
531 uint8_t *buf, int nb_sectors);
532int bdrv_write(BlockDriverState *bs, int64_t sector_num,
533 const uint8_t *buf, int nb_sectors);
83f64091
FB
534int bdrv_pread(BlockDriverState *bs, int64_t offset,
535 void *buf, int count);
536int bdrv_pwrite(BlockDriverState *bs, int64_t offset,
537 const void *buf, int count);
538int bdrv_truncate(BlockDriverState *bs, int64_t offset);
539int64_t bdrv_getlength(BlockDriverState *bs);
fc01f7e7 540void bdrv_get_geometry(BlockDriverState *bs, int64_t *nb_sectors_ptr);
33e3963e 541int bdrv_commit(BlockDriverState *bs);
77fef8c1 542void bdrv_set_boot_sector(BlockDriverState *bs, const uint8_t *data, int size);
83f64091
FB
543/* async block I/O */
544typedef struct BlockDriverAIOCB BlockDriverAIOCB;
545typedef void BlockDriverCompletionFunc(void *opaque, int ret);
546
547BlockDriverAIOCB *bdrv_aio_new(BlockDriverState *bs);
548int bdrv_aio_read(BlockDriverAIOCB *acb, int64_t sector_num,
549 uint8_t *buf, int nb_sectors,
550 BlockDriverCompletionFunc *cb, void *opaque);
551int bdrv_aio_write(BlockDriverAIOCB *acb, int64_t sector_num,
552 const uint8_t *buf, int nb_sectors,
553 BlockDriverCompletionFunc *cb, void *opaque);
554void bdrv_aio_cancel(BlockDriverAIOCB *acb);
555void bdrv_aio_delete(BlockDriverAIOCB *acb);
556
557void qemu_aio_init(void);
558void qemu_aio_poll(void);
559void qemu_aio_wait_start(void);
560void qemu_aio_wait(void);
561void qemu_aio_wait_end(void);
562
7a6cba61
PB
563/* Ensure contents are flushed to disk. */
564void bdrv_flush(BlockDriverState *bs);
33e3963e 565
c4b1fcc0
FB
566#define BDRV_TYPE_HD 0
567#define BDRV_TYPE_CDROM 1
568#define BDRV_TYPE_FLOPPY 2
46d4767d
FB
569#define BIOS_ATA_TRANSLATION_AUTO 0
570#define BIOS_ATA_TRANSLATION_NONE 1
571#define BIOS_ATA_TRANSLATION_LBA 2
c4b1fcc0
FB
572
573void bdrv_set_geometry_hint(BlockDriverState *bs,
574 int cyls, int heads, int secs);
575void bdrv_set_type_hint(BlockDriverState *bs, int type);
46d4767d 576void bdrv_set_translation_hint(BlockDriverState *bs, int translation);
c4b1fcc0
FB
577void bdrv_get_geometry_hint(BlockDriverState *bs,
578 int *pcyls, int *pheads, int *psecs);
579int bdrv_get_type_hint(BlockDriverState *bs);
46d4767d 580int bdrv_get_translation_hint(BlockDriverState *bs);
c4b1fcc0
FB
581int bdrv_is_removable(BlockDriverState *bs);
582int bdrv_is_read_only(BlockDriverState *bs);
583int bdrv_is_inserted(BlockDriverState *bs);
584int bdrv_is_locked(BlockDriverState *bs);
585void bdrv_set_locked(BlockDriverState *bs, int locked);
586void bdrv_set_change_cb(BlockDriverState *bs,
587 void (*change_cb)(void *opaque), void *opaque);
ea2384d3 588void bdrv_get_format(BlockDriverState *bs, char *buf, int buf_size);
c4b1fcc0
FB
589void bdrv_info(void);
590BlockDriverState *bdrv_find(const char *name);
82c643ff 591void bdrv_iterate(void (*it)(void *opaque, const char *name), void *opaque);
ea2384d3
FB
592int bdrv_is_encrypted(BlockDriverState *bs);
593int bdrv_set_key(BlockDriverState *bs, const char *key);
594void bdrv_iterate_format(void (*it)(void *opaque, const char *name),
595 void *opaque);
596const char *bdrv_get_device_name(BlockDriverState *bs);
c4b1fcc0 597
ea2384d3
FB
598int qcow_get_cluster_size(BlockDriverState *bs);
599int qcow_compress_cluster(BlockDriverState *bs, int64_t sector_num,
600 const uint8_t *buf);
83f64091
FB
601void bdrv_get_backing_filename(BlockDriverState *bs,
602 char *filename, int filename_size);
603
604int path_is_absolute(const char *path);
605void path_combine(char *dest, int dest_size,
606 const char *base_path,
607 const char *filename);
ea2384d3
FB
608
609#ifndef QEMU_TOOL
54fa5af5
FB
610
611typedef void QEMUMachineInitFunc(int ram_size, int vga_ram_size,
612 int boot_device,
613 DisplayState *ds, const char **fd_filename, int snapshot,
614 const char *kernel_filename, const char *kernel_cmdline,
615 const char *initrd_filename);
616
617typedef struct QEMUMachine {
618 const char *name;
619 const char *desc;
620 QEMUMachineInitFunc *init;
621 struct QEMUMachine *next;
622} QEMUMachine;
623
624int qemu_register_machine(QEMUMachine *m);
625
626typedef void SetIRQFunc(void *opaque, int irq_num, int level);
3de388f6 627typedef void IRQRequestFunc(void *opaque, int level);
54fa5af5 628
26aa7d72
FB
629/* ISA bus */
630
631extern target_phys_addr_t isa_mem_base;
632
633typedef void (IOPortWriteFunc)(void *opaque, uint32_t address, uint32_t data);
634typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address);
635
636int register_ioport_read(int start, int length, int size,
637 IOPortReadFunc *func, void *opaque);
638int register_ioport_write(int start, int length, int size,
639 IOPortWriteFunc *func, void *opaque);
69b91039
FB
640void isa_unassign_ioport(int start, int length);
641
642/* PCI bus */
643
69b91039
FB
644extern target_phys_addr_t pci_mem_base;
645
46e50e9d 646typedef struct PCIBus PCIBus;
69b91039
FB
647typedef struct PCIDevice PCIDevice;
648
649typedef void PCIConfigWriteFunc(PCIDevice *pci_dev,
650 uint32_t address, uint32_t data, int len);
651typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev,
652 uint32_t address, int len);
653typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num,
654 uint32_t addr, uint32_t size, int type);
655
656#define PCI_ADDRESS_SPACE_MEM 0x00
657#define PCI_ADDRESS_SPACE_IO 0x01
658#define PCI_ADDRESS_SPACE_MEM_PREFETCH 0x08
659
660typedef struct PCIIORegion {
5768f5ac 661 uint32_t addr; /* current PCI mapping address. -1 means not mapped */
69b91039
FB
662 uint32_t size;
663 uint8_t type;
664 PCIMapIORegionFunc *map_func;
665} PCIIORegion;
666
8a8696a3
FB
667#define PCI_ROM_SLOT 6
668#define PCI_NUM_REGIONS 7
502a5395
PB
669
670#define PCI_DEVICES_MAX 64
671
672#define PCI_VENDOR_ID 0x00 /* 16 bits */
673#define PCI_DEVICE_ID 0x02 /* 16 bits */
674#define PCI_COMMAND 0x04 /* 16 bits */
675#define PCI_COMMAND_IO 0x1 /* Enable response in I/O space */
676#define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */
677#define PCI_CLASS_DEVICE 0x0a /* Device class */
678#define PCI_INTERRUPT_LINE 0x3c /* 8 bits */
679#define PCI_INTERRUPT_PIN 0x3d /* 8 bits */
680#define PCI_MIN_GNT 0x3e /* 8 bits */
681#define PCI_MAX_LAT 0x3f /* 8 bits */
682
69b91039
FB
683struct PCIDevice {
684 /* PCI config space */
685 uint8_t config[256];
686
687 /* the following fields are read only */
46e50e9d 688 PCIBus *bus;
69b91039
FB
689 int devfn;
690 char name[64];
8a8696a3 691 PCIIORegion io_regions[PCI_NUM_REGIONS];
69b91039
FB
692
693 /* do not access the following fields */
694 PCIConfigReadFunc *config_read;
695 PCIConfigWriteFunc *config_write;
502a5395 696 /* ??? This is a PC-specific hack, and should be removed. */
5768f5ac 697 int irq_index;
69b91039
FB
698};
699
46e50e9d
FB
700PCIDevice *pci_register_device(PCIBus *bus, const char *name,
701 int instance_size, int devfn,
69b91039
FB
702 PCIConfigReadFunc *config_read,
703 PCIConfigWriteFunc *config_write);
704
705void pci_register_io_region(PCIDevice *pci_dev, int region_num,
706 uint32_t size, int type,
707 PCIMapIORegionFunc *map_func);
708
5768f5ac
FB
709void pci_set_irq(PCIDevice *pci_dev, int irq_num, int level);
710
711uint32_t pci_default_read_config(PCIDevice *d,
712 uint32_t address, int len);
713void pci_default_write_config(PCIDevice *d,
714 uint32_t address, uint32_t val, int len);
30ca2aab
FB
715void generic_pci_save(QEMUFile* f, void *opaque);
716int generic_pci_load(QEMUFile* f, void *opaque, int version_id);
5768f5ac 717
502a5395
PB
718typedef void (*pci_set_irq_fn)(PCIDevice *pci_dev, void *pic,
719 int irq_num, int level);
720PCIBus *pci_register_bus(pci_set_irq_fn set_irq, void *pic, int devfn_min);
721
722void pci_nic_init(PCIBus *bus, NICInfo *nd);
723void pci_data_write(void *opaque, uint32_t addr, uint32_t val, int len);
724uint32_t pci_data_read(void *opaque, uint32_t addr, int len);
725int pci_bus_num(PCIBus *s);
726void pci_for_each_device(void (*fn)(PCIDevice *d));
9995c51f 727
5768f5ac 728void pci_info(void);
26aa7d72 729
502a5395 730/* prep_pci.c */
46e50e9d 731PCIBus *pci_prep_init(void);
77d4bc34 732
502a5395
PB
733/* grackle_pci.c */
734PCIBus *pci_grackle_init(uint32_t base, void *pic);
735
736/* unin_pci.c */
737PCIBus *pci_pmac_init(void *pic);
738
739/* apb_pci.c */
740PCIBus *pci_apb_init(target_ulong special_base, target_ulong mem_base,
741 void *pic);
742
743PCIBus *pci_vpb_init(void *pic);
744
745/* piix_pci.c */
746PCIBus *i440fx_init(void);
747int piix3_init(PCIBus *bus);
748void pci_bios_init(void);
a41b2ff2 749
28b9b5af
FB
750/* openpic.c */
751typedef struct openpic_t openpic_t;
54fa5af5 752void openpic_set_irq(void *opaque, int n_IRQ, int level);
7668a27f
FB
753openpic_t *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus,
754 CPUState **envp);
28b9b5af 755
54fa5af5
FB
756/* heathrow_pic.c */
757typedef struct HeathrowPICS HeathrowPICS;
758void heathrow_pic_set_irq(void *opaque, int num, int level);
759HeathrowPICS *heathrow_pic_init(int *pmem_index);
760
6a36d84e
FB
761#ifdef HAS_AUDIO
762struct soundhw {
763 const char *name;
764 const char *descr;
765 int enabled;
766 int isa;
767 union {
768 int (*init_isa) (AudioState *s);
769 int (*init_pci) (PCIBus *bus, AudioState *s);
770 } init;
771};
772
773extern struct soundhw soundhw[];
774#endif
775
313aa567
FB
776/* vga.c */
777
74a14f22 778#define VGA_RAM_SIZE (8192 * 1024)
313aa567 779
82c643ff 780struct DisplayState {
313aa567
FB
781 uint8_t *data;
782 int linesize;
783 int depth;
d3079cd2 784 int bgr; /* BGR color order instead of RGB. Only valid for depth == 32 */
82c643ff
FB
785 int width;
786 int height;
24236869
FB
787 void *opaque;
788
313aa567
FB
789 void (*dpy_update)(struct DisplayState *s, int x, int y, int w, int h);
790 void (*dpy_resize)(struct DisplayState *s, int w, int h);
791 void (*dpy_refresh)(struct DisplayState *s);
24236869 792 void (*dpy_copy)(struct DisplayState *s, int src_x, int src_y, int dst_x, int dst_y, int w, int h);
82c643ff 793};
313aa567
FB
794
795static inline void dpy_update(DisplayState *s, int x, int y, int w, int h)
796{
797 s->dpy_update(s, x, y, w, h);
798}
799
800static inline void dpy_resize(DisplayState *s, int w, int h)
801{
802 s->dpy_resize(s, w, h);
803}
804
46e50e9d 805int vga_initialize(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
d5295253
FB
806 unsigned long vga_ram_offset, int vga_ram_size,
807 unsigned long vga_bios_offset, int vga_bios_size);
313aa567 808
d6bfa22f 809/* cirrus_vga.c */
46e50e9d 810void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
d6bfa22f 811 unsigned long vga_ram_offset, int vga_ram_size);
d6bfa22f
FB
812void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
813 unsigned long vga_ram_offset, int vga_ram_size);
814
313aa567 815/* sdl.c */
d63d307f 816void sdl_display_init(DisplayState *ds, int full_screen);
313aa567 817
da4dbf74
FB
818/* cocoa.m */
819void cocoa_display_init(DisplayState *ds, int full_screen);
820
24236869
FB
821/* vnc.c */
822void vnc_display_init(DisplayState *ds, int display);
823
5391d806
FB
824/* ide.c */
825#define MAX_DISKS 4
826
827extern BlockDriverState *bs_table[MAX_DISKS];
828
69b91039
FB
829void isa_ide_init(int iobase, int iobase2, int irq,
830 BlockDriverState *hd0, BlockDriverState *hd1);
54fa5af5
FB
831void pci_cmd646_ide_init(PCIBus *bus, BlockDriverState **hd_table,
832 int secondary_ide_enabled);
502a5395 833void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn);
28b9b5af 834int pmac_ide_init (BlockDriverState **hd_table,
54fa5af5 835 SetIRQFunc *set_irq, void *irq_opaque, int irq);
5391d806 836
2e5d83bb
PB
837/* cdrom.c */
838int cdrom_read_toc(int nb_sectors, uint8_t *buf, int msf, int start_track);
839int cdrom_read_toc_raw(int nb_sectors, uint8_t *buf, int msf, int session_num);
840
1d14ffa9 841/* es1370.c */
c0fe3827 842int es1370_init (PCIBus *bus, AudioState *s);
1d14ffa9 843
fb065187 844/* sb16.c */
c0fe3827 845int SB16_init (AudioState *s);
fb065187
FB
846
847/* adlib.c */
c0fe3827 848int Adlib_init (AudioState *s);
fb065187
FB
849
850/* gus.c */
c0fe3827 851int GUS_init (AudioState *s);
27503323
FB
852
853/* dma.c */
85571bc7 854typedef int (*DMA_transfer_handler) (void *opaque, int nchan, int pos, int size);
27503323 855int DMA_get_channel_mode (int nchan);
85571bc7
FB
856int DMA_read_memory (int nchan, void *buf, int pos, int size);
857int DMA_write_memory (int nchan, void *buf, int pos, int size);
27503323
FB
858void DMA_hold_DREQ (int nchan);
859void DMA_release_DREQ (int nchan);
16f62432 860void DMA_schedule(int nchan);
27503323 861void DMA_run (void);
28b9b5af 862void DMA_init (int high_page_enable);
27503323 863void DMA_register_channel (int nchan,
85571bc7
FB
864 DMA_transfer_handler transfer_handler,
865 void *opaque);
7138fcfb
FB
866/* fdc.c */
867#define MAX_FD 2
868extern BlockDriverState *fd_table[MAX_FD];
869
baca51fa
FB
870typedef struct fdctrl_t fdctrl_t;
871
872fdctrl_t *fdctrl_init (int irq_lvl, int dma_chann, int mem_mapped,
873 uint32_t io_base,
874 BlockDriverState **fds);
875int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num);
7138fcfb 876
80cabfad
FB
877/* ne2000.c */
878
7c9d8e07
FB
879void isa_ne2000_init(int base, int irq, NICInfo *nd);
880void pci_ne2000_init(PCIBus *bus, NICInfo *nd);
80cabfad 881
a41b2ff2
PB
882/* rtl8139.c */
883
884void pci_rtl8139_init(PCIBus *bus, NICInfo *nd);
885
e3c2613f
FB
886/* pcnet.c */
887
888void pci_pcnet_init(PCIBus *bus, NICInfo *nd);
889
80cabfad
FB
890/* pckbd.c */
891
80cabfad
FB
892void kbd_init(void);
893
894/* mc146818rtc.c */
895
8a7ddc38 896typedef struct RTCState RTCState;
80cabfad 897
8a7ddc38
FB
898RTCState *rtc_init(int base, int irq);
899void rtc_set_memory(RTCState *s, int addr, int val);
900void rtc_set_date(RTCState *s, const struct tm *tm);
80cabfad
FB
901
902/* serial.c */
903
c4b1fcc0 904typedef struct SerialState SerialState;
e5d13e2f
FB
905SerialState *serial_init(SetIRQFunc *set_irq, void *opaque,
906 int base, int irq, CharDriverState *chr);
907SerialState *serial_mm_init (SetIRQFunc *set_irq, void *opaque,
908 target_ulong base, int it_shift,
909 int irq, CharDriverState *chr);
80cabfad 910
6508fe59
FB
911/* parallel.c */
912
913typedef struct ParallelState ParallelState;
914ParallelState *parallel_init(int base, int irq, CharDriverState *chr);
915
80cabfad
FB
916/* i8259.c */
917
3de388f6
FB
918typedef struct PicState2 PicState2;
919extern PicState2 *isa_pic;
80cabfad 920void pic_set_irq(int irq, int level);
54fa5af5 921void pic_set_irq_new(void *opaque, int irq, int level);
3de388f6 922PicState2 *pic_init(IRQRequestFunc *irq_request, void *irq_request_opaque);
d592d303
FB
923void pic_set_alt_irq_func(PicState2 *s, SetIRQFunc *alt_irq_func,
924 void *alt_irq_opaque);
3de388f6
FB
925int pic_read_irq(PicState2 *s);
926void pic_update_irq(PicState2 *s);
927uint32_t pic_intack_read(PicState2 *s);
c20709aa 928void pic_info(void);
4a0fb71e 929void irq_info(void);
80cabfad 930
c27004ec 931/* APIC */
d592d303
FB
932typedef struct IOAPICState IOAPICState;
933
c27004ec
FB
934int apic_init(CPUState *env);
935int apic_get_interrupt(CPUState *env);
d592d303
FB
936IOAPICState *ioapic_init(void);
937void ioapic_set_irq(void *opaque, int vector, int level);
c27004ec 938
80cabfad
FB
939/* i8254.c */
940
941#define PIT_FREQ 1193182
942
ec844b96
FB
943typedef struct PITState PITState;
944
945PITState *pit_init(int base, int irq);
946void pit_set_gate(PITState *pit, int channel, int val);
947int pit_get_gate(PITState *pit, int channel);
fd06c375
FB
948int pit_get_initial_count(PITState *pit, int channel);
949int pit_get_mode(PITState *pit, int channel);
ec844b96 950int pit_get_out(PITState *pit, int channel, int64_t current_time);
80cabfad 951
fd06c375
FB
952/* pcspk.c */
953void pcspk_init(PITState *);
954int pcspk_audio_init(AudioState *);
955
6515b203
FB
956/* acpi.c */
957extern int acpi_enabled;
502a5395 958void piix4_pm_init(PCIBus *bus, int devfn);
6515b203
FB
959void acpi_bios_init(void);
960
80cabfad 961/* pc.c */
54fa5af5 962extern QEMUMachine pc_machine;
3dbbdc25 963extern QEMUMachine isapc_machine;
52ca8d6a 964extern int fd_bootchk;
80cabfad 965
6a00d601
FB
966void ioport_set_a20(int enable);
967int ioport_get_a20(void);
968
26aa7d72 969/* ppc.c */
54fa5af5
FB
970extern QEMUMachine prep_machine;
971extern QEMUMachine core99_machine;
972extern QEMUMachine heathrow_machine;
973
6af0bf9c
FB
974/* mips_r4k.c */
975extern QEMUMachine mips_machine;
976
27c7ca7e
FB
977/* shix.c */
978extern QEMUMachine shix_machine;
979
8cc43fef
FB
980#ifdef TARGET_PPC
981ppc_tb_t *cpu_ppc_tb_init (CPUState *env, uint32_t freq);
982#endif
64201201 983void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val);
77d4bc34
FB
984
985extern CPUWriteMemoryFunc *PPC_io_write[];
986extern CPUReadMemoryFunc *PPC_io_read[];
54fa5af5 987void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val);
26aa7d72 988
e95c8d51 989/* sun4m.c */
54fa5af5 990extern QEMUMachine sun4m_machine;
e80cfcfc 991uint32_t iommu_translate(uint32_t addr);
ba3c64fb 992void pic_set_irq_cpu(int irq, int level, unsigned int cpu);
e95c8d51
FB
993
994/* iommu.c */
e80cfcfc
FB
995void *iommu_init(uint32_t addr);
996uint32_t iommu_translate_local(void *opaque, uint32_t addr);
e95c8d51
FB
997
998/* lance.c */
7c9d8e07 999void lance_init(NICInfo *nd, int irq, uint32_t leaddr, uint32_t ledaddr);
e95c8d51
FB
1000
1001/* tcx.c */
95219897 1002void tcx_init(DisplayState *ds, uint32_t addr, uint8_t *vram_base,
6f7e9aec 1003 unsigned long vram_offset, int vram_size, int width, int height);
e80cfcfc
FB
1004
1005/* slavio_intctl.c */
1006void *slavio_intctl_init();
ba3c64fb 1007void slavio_intctl_set_cpu(void *opaque, unsigned int cpu, CPUState *env);
e80cfcfc
FB
1008void slavio_pic_info(void *opaque);
1009void slavio_irq_info(void *opaque);
1010void slavio_pic_set_irq(void *opaque, int irq, int level);
ba3c64fb 1011void slavio_pic_set_irq_cpu(void *opaque, int irq, int level, unsigned int cpu);
e95c8d51 1012
5fe141fd
FB
1013/* loader.c */
1014int get_image_size(const char *filename);
1015int load_image(const char *filename, uint8_t *addr);
9ee3c029 1016int load_elf(const char *filename, int64_t virt_to_phys_addend, uint64_t *pentry);
e80cfcfc
FB
1017int load_aout(const char *filename, uint8_t *addr);
1018
1019/* slavio_timer.c */
ba3c64fb 1020void slavio_timer_init(uint32_t addr, int irq, int mode, unsigned int cpu);
8d5f07fa 1021
e80cfcfc
FB
1022/* slavio_serial.c */
1023SerialState *slavio_serial_init(int base, int irq, CharDriverState *chr1, CharDriverState *chr2);
1024void slavio_serial_ms_kbd_init(int base, int irq);
e95c8d51 1025
3475187d
FB
1026/* slavio_misc.c */
1027void *slavio_misc_init(uint32_t base, int irq);
1028void slavio_set_power_fail(void *opaque, int power_failing);
1029
6f7e9aec
FB
1030/* esp.c */
1031void esp_init(BlockDriverState **bd, int irq, uint32_t espaddr, uint32_t espdaddr);
1032
3475187d
FB
1033/* sun4u.c */
1034extern QEMUMachine sun4u_machine;
1035
64201201
FB
1036/* NVRAM helpers */
1037#include "hw/m48t59.h"
1038
1039void NVRAM_set_byte (m48t59_t *nvram, uint32_t addr, uint8_t value);
1040uint8_t NVRAM_get_byte (m48t59_t *nvram, uint32_t addr);
1041void NVRAM_set_word (m48t59_t *nvram, uint32_t addr, uint16_t value);
1042uint16_t NVRAM_get_word (m48t59_t *nvram, uint32_t addr);
1043void NVRAM_set_lword (m48t59_t *nvram, uint32_t addr, uint32_t value);
1044uint32_t NVRAM_get_lword (m48t59_t *nvram, uint32_t addr);
1045void NVRAM_set_string (m48t59_t *nvram, uint32_t addr,
1046 const unsigned char *str, uint32_t max);
1047int NVRAM_get_string (m48t59_t *nvram, uint8_t *dst, uint16_t addr, int max);
1048void NVRAM_set_crc (m48t59_t *nvram, uint32_t addr,
1049 uint32_t start, uint32_t count);
1050int PPC_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size,
1051 const unsigned char *arch,
1052 uint32_t RAM_size, int boot_device,
1053 uint32_t kernel_image, uint32_t kernel_size,
28b9b5af 1054 const char *cmdline,
64201201 1055 uint32_t initrd_image, uint32_t initrd_size,
28b9b5af
FB
1056 uint32_t NVRAM_image,
1057 int width, int height, int depth);
64201201 1058
63066f4f
FB
1059/* adb.c */
1060
1061#define MAX_ADB_DEVICES 16
1062
e2733d20 1063#define ADB_MAX_OUT_LEN 16
63066f4f 1064
e2733d20 1065typedef struct ADBDevice ADBDevice;
63066f4f 1066
e2733d20
FB
1067/* buf = NULL means polling */
1068typedef int ADBDeviceRequest(ADBDevice *d, uint8_t *buf_out,
1069 const uint8_t *buf, int len);
12c28fed
FB
1070typedef int ADBDeviceReset(ADBDevice *d);
1071
63066f4f
FB
1072struct ADBDevice {
1073 struct ADBBusState *bus;
1074 int devaddr;
1075 int handler;
e2733d20 1076 ADBDeviceRequest *devreq;
12c28fed 1077 ADBDeviceReset *devreset;
63066f4f
FB
1078 void *opaque;
1079};
1080
1081typedef struct ADBBusState {
1082 ADBDevice devices[MAX_ADB_DEVICES];
1083 int nb_devices;
e2733d20 1084 int poll_index;
63066f4f
FB
1085} ADBBusState;
1086
e2733d20
FB
1087int adb_request(ADBBusState *s, uint8_t *buf_out,
1088 const uint8_t *buf, int len);
1089int adb_poll(ADBBusState *s, uint8_t *buf_out);
63066f4f
FB
1090
1091ADBDevice *adb_register_device(ADBBusState *s, int devaddr,
e2733d20 1092 ADBDeviceRequest *devreq,
12c28fed 1093 ADBDeviceReset *devreset,
63066f4f
FB
1094 void *opaque);
1095void adb_kbd_init(ADBBusState *bus);
1096void adb_mouse_init(ADBBusState *bus);
1097
1098/* cuda.c */
1099
1100extern ADBBusState adb_bus;
54fa5af5 1101int cuda_init(SetIRQFunc *set_irq, void *irq_opaque, int irq);
63066f4f 1102
bb36d470
FB
1103#include "hw/usb.h"
1104
a594cfbf
FB
1105/* usb ports of the VM */
1106
0d92ed30
PB
1107void qemu_register_usb_port(USBPort *port, void *opaque, int index,
1108 usb_attachfn attach);
a594cfbf 1109
0d92ed30 1110#define VM_USB_HUB_SIZE 8
a594cfbf
FB
1111
1112void do_usb_add(const char *devname);
1113void do_usb_del(const char *devname);
1114void usb_info(void);
1115
2e5d83bb
PB
1116/* scsi-disk.c */
1117typedef struct SCSIDevice SCSIDevice;
1118typedef void (*scsi_completionfn)(void *, uint32_t, int);
1119
1120SCSIDevice *scsi_disk_init(BlockDriverState *bdrv,
1121 scsi_completionfn completion,
1122 void *opaque);
1123void scsi_disk_destroy(SCSIDevice *s);
1124
0fc5c15a 1125int32_t scsi_send_command(SCSIDevice *s, uint32_t tag, uint8_t *buf, int lun);
2e5d83bb
PB
1126int scsi_read_data(SCSIDevice *s, uint8_t *data, uint32_t len);
1127int scsi_write_data(SCSIDevice *s, uint8_t *data, uint32_t len);
1128
7d8406be
PB
1129/* lsi53c895a.c */
1130void lsi_scsi_attach(void *opaque, BlockDriverState *bd, int id);
1131void *lsi_scsi_init(PCIBus *bus, int devfn);
1132
b5ff1b31 1133/* integratorcp.c */
40f137e1
PB
1134extern QEMUMachine integratorcp926_machine;
1135extern QEMUMachine integratorcp1026_machine;
b5ff1b31 1136
cdbdb648
PB
1137/* versatilepb.c */
1138extern QEMUMachine versatilepb_machine;
16406950 1139extern QEMUMachine versatileab_machine;
cdbdb648 1140
daa57963
FB
1141/* ps2.c */
1142void *ps2_kbd_init(void (*update_irq)(void *, int), void *update_arg);
1143void *ps2_mouse_init(void (*update_irq)(void *, int), void *update_arg);
1144void ps2_write_mouse(void *, int val);
1145void ps2_write_keyboard(void *, int val);
1146uint32_t ps2_read_data(void *);
1147void ps2_queue(void *, int b);
f94f5d71 1148void ps2_keyboard_set_translation(void *opaque, int mode);
daa57963 1149
80337b66
FB
1150/* smc91c111.c */
1151void smc91c111_init(NICInfo *, uint32_t, void *, int);
1152
bdd5003a 1153/* pl110.c */
95219897 1154void *pl110_init(DisplayState *ds, uint32_t base, void *pic, int irq, int);
bdd5003a 1155
cdbdb648
PB
1156/* pl011.c */
1157void pl011_init(uint32_t base, void *pic, int irq, CharDriverState *chr);
1158
1159/* pl050.c */
1160void pl050_init(uint32_t base, void *pic, int irq, int is_mouse);
1161
1162/* pl080.c */
1163void *pl080_init(uint32_t base, void *pic, int irq);
1164
1165/* pl190.c */
1166void *pl190_init(uint32_t base, void *parent, int irq, int fiq);
1167
1168/* arm-timer.c */
1169void sp804_init(uint32_t base, void *pic, int irq);
1170void icp_pit_init(uint32_t base, void *pic, int irq);
1171
16406950
PB
1172/* arm_boot.c */
1173
1174void arm_load_kernel(int ram_size, const char *kernel_filename,
1175 const char *kernel_cmdline, const char *initrd_filename,
1176 int board_id);
1177
27c7ca7e
FB
1178/* sh7750.c */
1179struct SH7750State;
1180
008a8818 1181struct SH7750State *sh7750_init(CPUState * cpu);
27c7ca7e
FB
1182
1183typedef struct {
1184 /* The callback will be triggered if any of the designated lines change */
1185 uint16_t portamask_trigger;
1186 uint16_t portbmask_trigger;
1187 /* Return 0 if no action was taken */
1188 int (*port_change_cb) (uint16_t porta, uint16_t portb,
1189 uint16_t * periph_pdtra,
1190 uint16_t * periph_portdira,
1191 uint16_t * periph_pdtrb,
1192 uint16_t * periph_portdirb);
1193} sh7750_io_device;
1194
1195int sh7750_register_io_device(struct SH7750State *s,
1196 sh7750_io_device * device);
1197/* tc58128.c */
1198int tc58128_init(struct SH7750State *s, char *zone1, char *zone2);
1199
29133e9a
FB
1200/* NOR flash devices */
1201typedef struct pflash_t pflash_t;
1202
1203pflash_t *pflash_register (target_ulong base, ram_addr_t off,
1204 BlockDriverState *bs,
1205 target_ulong sector_len, int nb_blocs, int width,
1206 uint16_t id0, uint16_t id1,
1207 uint16_t id2, uint16_t id3);
1208
ea2384d3
FB
1209#endif /* defined(QEMU_TOOL) */
1210
c4b1fcc0 1211/* monitor.c */
82c643ff 1212void monitor_init(CharDriverState *hd, int show_banner);
ea2384d3
FB
1213void term_puts(const char *str);
1214void term_vprintf(const char *fmt, va_list ap);
40c3bac3 1215void term_printf(const char *fmt, ...) __attribute__ ((__format__ (__printf__, 1, 2)));
c4b1fcc0
FB
1216void term_flush(void);
1217void term_print_help(void);
ea2384d3
FB
1218void monitor_readline(const char *prompt, int is_password,
1219 char *buf, int buf_size);
1220
1221/* readline.c */
1222typedef void ReadLineFunc(void *opaque, const char *str);
1223
1224extern int completion_index;
1225void add_completion(const char *str);
1226void readline_handle_byte(int ch);
1227void readline_find_completion(const char *cmdline);
1228const char *readline_get_history(unsigned int index);
1229void readline_start(const char *prompt, int is_password,
1230 ReadLineFunc *readline_func, void *opaque);
c4b1fcc0 1231
5e6ad6f9
FB
1232void kqemu_record_dump(void);
1233
fc01f7e7 1234#endif /* VL_H */