]> git.proxmox.com Git - qemu.git/blame - vl.h
MIPS FPU fixes (Daniel Jacobowitz).
[qemu.git] / vl.h
CommitLineData
fc01f7e7
FB
1/*
2 * QEMU System Emulator header
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24#ifndef VL_H
25#define VL_H
26
67b915a5
FB
27/* we put basic includes here to avoid repeating them in device drivers */
28#include <stdlib.h>
29#include <stdio.h>
30#include <stdarg.h>
31#include <string.h>
32#include <inttypes.h>
85571bc7 33#include <limits.h>
8a7ddc38 34#include <time.h>
67b915a5
FB
35#include <ctype.h>
36#include <errno.h>
37#include <unistd.h>
38#include <fcntl.h>
7d3505c5 39#include <sys/stat.h>
67b915a5
FB
40
41#ifndef O_LARGEFILE
42#define O_LARGEFILE 0
43#endif
40c3bac3
FB
44#ifndef O_BINARY
45#define O_BINARY 0
46#endif
67b915a5
FB
47
48#ifdef _WIN32
a18e524a 49#include <windows.h>
ac62f715 50#define fsync _commit
57d1a2b6
FB
51#define lseek _lseeki64
52#define ENOTSUP 4096
19cb3738 53#define ENOMEDIUM 4097
beac80cd
FB
54extern int qemu_ftruncate64(int, int64_t);
55#define ftruncate qemu_ftruncate64
56
57d1a2b6
FB
57
58static inline char *realpath(const char *path, char *resolved_path)
59{
60 _fullpath(resolved_path, path, _MAX_PATH);
61 return resolved_path;
62}
ec3757de
FB
63
64#define PRId64 "I64d"
26a76461
FB
65#define PRIx64 "I64x"
66#define PRIu64 "I64u"
67#define PRIo64 "I64o"
67b915a5 68#endif
8a7ddc38 69
ea2384d3
FB
70#ifdef QEMU_TOOL
71
72/* we use QEMU_TOOL in the command line tools which do not depend on
73 the target CPU type */
74#include "config-host.h"
75#include <setjmp.h>
76#include "osdep.h"
77#include "bswap.h"
78
79#else
80
4f209290 81#include "audio/audio.h"
16f62432 82#include "cpu.h"
1fddef4b 83#include "gdbstub.h"
16f62432 84
ea2384d3
FB
85#endif /* !defined(QEMU_TOOL) */
86
67b915a5
FB
87#ifndef glue
88#define xglue(x, y) x ## y
89#define glue(x, y) xglue(x, y)
90#define stringify(s) tostring(s)
91#define tostring(s) #s
92#endif
93
24236869
FB
94#ifndef MIN
95#define MIN(a, b) (((a) < (b)) ? (a) : (b))
96#endif
97#ifndef MAX
98#define MAX(a, b) (((a) > (b)) ? (a) : (b))
99#endif
100
33e3963e 101/* vl.c */
80cabfad 102uint64_t muldiv64(uint64_t a, uint32_t b, uint32_t c);
313aa567 103
80cabfad
FB
104void hw_error(const char *fmt, ...);
105
80cabfad
FB
106extern const char *bios_dir;
107
108void pstrcpy(char *buf, int buf_size, const char *str);
109char *pstrcat(char *buf, int buf_size, const char *s);
82c643ff 110int strstart(const char *str, const char *val, const char **ptr);
c4b1fcc0 111
8a7ddc38
FB
112extern int vm_running;
113
0bd48850
FB
114typedef struct vm_change_state_entry VMChangeStateEntry;
115typedef void VMChangeStateHandler(void *opaque, int running);
8a7ddc38
FB
116typedef void VMStopHandler(void *opaque, int reason);
117
0bd48850
FB
118VMChangeStateEntry *qemu_add_vm_change_state_handler(VMChangeStateHandler *cb,
119 void *opaque);
120void qemu_del_vm_change_state_handler(VMChangeStateEntry *e);
121
8a7ddc38
FB
122int qemu_add_vm_stop_handler(VMStopHandler *cb, void *opaque);
123void qemu_del_vm_stop_handler(VMStopHandler *cb, void *opaque);
124
125void vm_start(void);
126void vm_stop(int reason);
127
bb0c6722
FB
128typedef void QEMUResetHandler(void *opaque);
129
130void qemu_register_reset(QEMUResetHandler *func, void *opaque);
131void qemu_system_reset_request(void);
132void qemu_system_shutdown_request(void);
3475187d
FB
133void qemu_system_powerdown_request(void);
134#if !defined(TARGET_SPARC)
135// Please implement a power failure function to signal the OS
136#define qemu_system_powerdown() do{}while(0)
137#else
138void qemu_system_powerdown(void);
139#endif
bb0c6722 140
ea2384d3
FB
141void main_loop_wait(int timeout);
142
0ced6589
FB
143extern int ram_size;
144extern int bios_size;
ee22c2f7 145extern int rtc_utc;
1f04275e 146extern int cirrus_vga_enabled;
28b9b5af
FB
147extern int graphic_width;
148extern int graphic_height;
149extern int graphic_depth;
3d11d0eb 150extern const char *keyboard_layout;
d993e026 151extern int kqemu_allowed;
a09db21f 152extern int win2k_install_hack;
bb36d470 153extern int usb_enabled;
6a00d601 154extern int smp_cpus;
0ced6589
FB
155
156/* XXX: make it dynamic */
75956cf0 157#if defined (TARGET_PPC) || defined (TARGET_SPARC64)
d5295253 158#define BIOS_SIZE ((512 + 32) * 1024)
6af0bf9c
FB
159#elif defined(TARGET_MIPS)
160#define BIOS_SIZE (128 * 1024)
0ced6589 161#else
7587cf44 162#define BIOS_SIZE ((256 + 64) * 1024)
0ced6589 163#endif
aaaa7df6 164
63066f4f
FB
165/* keyboard/mouse support */
166
167#define MOUSE_EVENT_LBUTTON 0x01
168#define MOUSE_EVENT_RBUTTON 0x02
169#define MOUSE_EVENT_MBUTTON 0x04
170
171typedef void QEMUPutKBDEvent(void *opaque, int keycode);
172typedef void QEMUPutMouseEvent(void *opaque, int dx, int dy, int dz, int buttons_state);
173
174void qemu_add_kbd_event_handler(QEMUPutKBDEvent *func, void *opaque);
09b26c5e 175void qemu_add_mouse_event_handler(QEMUPutMouseEvent *func, void *opaque, int absolute);
63066f4f
FB
176
177void kbd_put_keycode(int keycode);
178void kbd_mouse_event(int dx, int dy, int dz, int buttons_state);
09b26c5e 179int kbd_mouse_is_absolute(void);
63066f4f 180
82c643ff
FB
181/* keysym is a unicode code except for special keys (see QEMU_KEY_xxx
182 constants) */
183#define QEMU_KEY_ESC1(c) ((c) | 0xe100)
184#define QEMU_KEY_BACKSPACE 0x007f
185#define QEMU_KEY_UP QEMU_KEY_ESC1('A')
186#define QEMU_KEY_DOWN QEMU_KEY_ESC1('B')
187#define QEMU_KEY_RIGHT QEMU_KEY_ESC1('C')
188#define QEMU_KEY_LEFT QEMU_KEY_ESC1('D')
189#define QEMU_KEY_HOME QEMU_KEY_ESC1(1)
190#define QEMU_KEY_END QEMU_KEY_ESC1(4)
191#define QEMU_KEY_PAGEUP QEMU_KEY_ESC1(5)
192#define QEMU_KEY_PAGEDOWN QEMU_KEY_ESC1(6)
193#define QEMU_KEY_DELETE QEMU_KEY_ESC1(3)
194
195#define QEMU_KEY_CTRL_UP 0xe400
196#define QEMU_KEY_CTRL_DOWN 0xe401
197#define QEMU_KEY_CTRL_LEFT 0xe402
198#define QEMU_KEY_CTRL_RIGHT 0xe403
199#define QEMU_KEY_CTRL_HOME 0xe404
200#define QEMU_KEY_CTRL_END 0xe405
201#define QEMU_KEY_CTRL_PAGEUP 0xe406
202#define QEMU_KEY_CTRL_PAGEDOWN 0xe407
203
204void kbd_put_keysym(int keysym);
205
c20709aa
FB
206/* async I/O support */
207
208typedef void IOReadHandler(void *opaque, const uint8_t *buf, int size);
209typedef int IOCanRWHandler(void *opaque);
7c9d8e07 210typedef void IOHandler(void *opaque);
c20709aa 211
7c9d8e07
FB
212int qemu_set_fd_handler2(int fd,
213 IOCanRWHandler *fd_read_poll,
214 IOHandler *fd_read,
215 IOHandler *fd_write,
216 void *opaque);
217int qemu_set_fd_handler(int fd,
218 IOHandler *fd_read,
219 IOHandler *fd_write,
220 void *opaque);
c20709aa 221
f331110f
FB
222/* Polling handling */
223
224/* return TRUE if no sleep should be done afterwards */
225typedef int PollingFunc(void *opaque);
226
227int qemu_add_polling_cb(PollingFunc *func, void *opaque);
228void qemu_del_polling_cb(PollingFunc *func, void *opaque);
229
a18e524a
FB
230#ifdef _WIN32
231/* Wait objects handling */
232typedef void WaitObjectFunc(void *opaque);
233
234int qemu_add_wait_object(HANDLE handle, WaitObjectFunc *func, void *opaque);
235void qemu_del_wait_object(HANDLE handle, WaitObjectFunc *func, void *opaque);
236#endif
237
82c643ff
FB
238/* character device */
239
240#define CHR_EVENT_BREAK 0 /* serial break char */
ea2384d3 241#define CHR_EVENT_FOCUS 1 /* focus to this terminal (modal input needed) */
82c643ff 242
2122c51a
FB
243
244
245#define CHR_IOCTL_SERIAL_SET_PARAMS 1
246typedef struct {
247 int speed;
248 int parity;
249 int data_bits;
250 int stop_bits;
251} QEMUSerialSetParams;
252
253#define CHR_IOCTL_SERIAL_SET_BREAK 2
254
255#define CHR_IOCTL_PP_READ_DATA 3
256#define CHR_IOCTL_PP_WRITE_DATA 4
257#define CHR_IOCTL_PP_READ_CONTROL 5
258#define CHR_IOCTL_PP_WRITE_CONTROL 6
259#define CHR_IOCTL_PP_READ_STATUS 7
260
82c643ff
FB
261typedef void IOEventHandler(void *opaque, int event);
262
263typedef struct CharDriverState {
264 int (*chr_write)(struct CharDriverState *s, const uint8_t *buf, int len);
265 void (*chr_add_read_handler)(struct CharDriverState *s,
266 IOCanRWHandler *fd_can_read,
267 IOReadHandler *fd_read, void *opaque);
2122c51a 268 int (*chr_ioctl)(struct CharDriverState *s, int cmd, void *arg);
82c643ff 269 IOEventHandler *chr_event;
eb45f5fe 270 void (*chr_send_event)(struct CharDriverState *chr, int event);
f331110f 271 void (*chr_close)(struct CharDriverState *chr);
82c643ff
FB
272 void *opaque;
273} CharDriverState;
274
275void qemu_chr_printf(CharDriverState *s, const char *fmt, ...);
276int qemu_chr_write(CharDriverState *s, const uint8_t *buf, int len);
ea2384d3 277void qemu_chr_send_event(CharDriverState *s, int event);
82c643ff
FB
278void qemu_chr_add_read_handler(CharDriverState *s,
279 IOCanRWHandler *fd_can_read,
280 IOReadHandler *fd_read, void *opaque);
281void qemu_chr_add_event_handler(CharDriverState *s, IOEventHandler *chr_event);
2122c51a 282int qemu_chr_ioctl(CharDriverState *s, int cmd, void *arg);
f8d179e3 283
82c643ff
FB
284/* consoles */
285
286typedef struct DisplayState DisplayState;
287typedef struct TextConsole TextConsole;
288
95219897
PB
289typedef void (*vga_hw_update_ptr)(void *);
290typedef void (*vga_hw_invalidate_ptr)(void *);
291typedef void (*vga_hw_screen_dump_ptr)(void *, const char *);
292
293TextConsole *graphic_console_init(DisplayState *ds, vga_hw_update_ptr update,
294 vga_hw_invalidate_ptr invalidate,
295 vga_hw_screen_dump_ptr screen_dump,
296 void *opaque);
297void vga_hw_update(void);
298void vga_hw_invalidate(void);
299void vga_hw_screen_dump(const char *filename);
300
301int is_graphic_console(void);
82c643ff
FB
302CharDriverState *text_console_init(DisplayState *ds);
303void console_select(unsigned int index);
304
8d11df9e
FB
305/* serial ports */
306
307#define MAX_SERIAL_PORTS 4
308
309extern CharDriverState *serial_hds[MAX_SERIAL_PORTS];
310
6508fe59
FB
311/* parallel ports */
312
313#define MAX_PARALLEL_PORTS 3
314
315extern CharDriverState *parallel_hds[MAX_PARALLEL_PORTS];
316
7c9d8e07
FB
317/* VLANs support */
318
319typedef struct VLANClientState VLANClientState;
320
321struct VLANClientState {
322 IOReadHandler *fd_read;
d861b05e
PB
323 /* Packets may still be sent if this returns zero. It's used to
324 rate-limit the slirp code. */
325 IOCanRWHandler *fd_can_read;
7c9d8e07
FB
326 void *opaque;
327 struct VLANClientState *next;
328 struct VLANState *vlan;
329 char info_str[256];
330};
331
332typedef struct VLANState {
333 int id;
334 VLANClientState *first_client;
335 struct VLANState *next;
336} VLANState;
337
338VLANState *qemu_find_vlan(int id);
339VLANClientState *qemu_new_vlan_client(VLANState *vlan,
d861b05e
PB
340 IOReadHandler *fd_read,
341 IOCanRWHandler *fd_can_read,
342 void *opaque);
343int qemu_can_send_packet(VLANClientState *vc);
7c9d8e07 344void qemu_send_packet(VLANClientState *vc, const uint8_t *buf, int size);
d861b05e 345void qemu_handler_true(void *opaque);
7c9d8e07
FB
346
347void do_info_network(void);
348
7fb843f8
FB
349/* TAP win32 */
350int tap_win32_init(VLANState *vlan, const char *ifname);
7fb843f8 351
7c9d8e07 352/* NIC info */
c4b1fcc0
FB
353
354#define MAX_NICS 8
355
7c9d8e07 356typedef struct NICInfo {
c4b1fcc0 357 uint8_t macaddr[6];
a41b2ff2 358 const char *model;
7c9d8e07
FB
359 VLANState *vlan;
360} NICInfo;
c4b1fcc0
FB
361
362extern int nb_nics;
7c9d8e07 363extern NICInfo nd_table[MAX_NICS];
8a7ddc38
FB
364
365/* timers */
366
367typedef struct QEMUClock QEMUClock;
368typedef struct QEMUTimer QEMUTimer;
369typedef void QEMUTimerCB(void *opaque);
370
371/* The real time clock should be used only for stuff which does not
372 change the virtual machine state, as it is run even if the virtual
69b91039 373 machine is stopped. The real time clock has a frequency of 1000
8a7ddc38
FB
374 Hz. */
375extern QEMUClock *rt_clock;
376
e80cfcfc 377/* The virtual clock is only run during the emulation. It is stopped
8a7ddc38
FB
378 when the virtual machine is stopped. Virtual timers use a high
379 precision clock, usually cpu cycles (use ticks_per_sec). */
380extern QEMUClock *vm_clock;
381
382int64_t qemu_get_clock(QEMUClock *clock);
383
384QEMUTimer *qemu_new_timer(QEMUClock *clock, QEMUTimerCB *cb, void *opaque);
385void qemu_free_timer(QEMUTimer *ts);
386void qemu_del_timer(QEMUTimer *ts);
387void qemu_mod_timer(QEMUTimer *ts, int64_t expire_time);
388int qemu_timer_pending(QEMUTimer *ts);
389
390extern int64_t ticks_per_sec;
391extern int pit_min_timer_count;
392
1dce7c3c 393int64_t cpu_get_ticks(void);
8a7ddc38
FB
394void cpu_enable_ticks(void);
395void cpu_disable_ticks(void);
396
397/* VM Load/Save */
398
faea38e7 399typedef struct QEMUFile QEMUFile;
8a7ddc38 400
faea38e7
FB
401QEMUFile *qemu_fopen(const char *filename, const char *mode);
402void qemu_fflush(QEMUFile *f);
403void qemu_fclose(QEMUFile *f);
8a7ddc38
FB
404void qemu_put_buffer(QEMUFile *f, const uint8_t *buf, int size);
405void qemu_put_byte(QEMUFile *f, int v);
406void qemu_put_be16(QEMUFile *f, unsigned int v);
407void qemu_put_be32(QEMUFile *f, unsigned int v);
408void qemu_put_be64(QEMUFile *f, uint64_t v);
409int qemu_get_buffer(QEMUFile *f, uint8_t *buf, int size);
410int qemu_get_byte(QEMUFile *f);
411unsigned int qemu_get_be16(QEMUFile *f);
412unsigned int qemu_get_be32(QEMUFile *f);
413uint64_t qemu_get_be64(QEMUFile *f);
414
415static inline void qemu_put_be64s(QEMUFile *f, const uint64_t *pv)
416{
417 qemu_put_be64(f, *pv);
418}
419
420static inline void qemu_put_be32s(QEMUFile *f, const uint32_t *pv)
421{
422 qemu_put_be32(f, *pv);
423}
424
425static inline void qemu_put_be16s(QEMUFile *f, const uint16_t *pv)
426{
427 qemu_put_be16(f, *pv);
428}
429
430static inline void qemu_put_8s(QEMUFile *f, const uint8_t *pv)
431{
432 qemu_put_byte(f, *pv);
433}
434
435static inline void qemu_get_be64s(QEMUFile *f, uint64_t *pv)
436{
437 *pv = qemu_get_be64(f);
438}
439
440static inline void qemu_get_be32s(QEMUFile *f, uint32_t *pv)
441{
442 *pv = qemu_get_be32(f);
443}
444
445static inline void qemu_get_be16s(QEMUFile *f, uint16_t *pv)
446{
447 *pv = qemu_get_be16(f);
448}
449
450static inline void qemu_get_8s(QEMUFile *f, uint8_t *pv)
451{
452 *pv = qemu_get_byte(f);
453}
454
c27004ec
FB
455#if TARGET_LONG_BITS == 64
456#define qemu_put_betl qemu_put_be64
457#define qemu_get_betl qemu_get_be64
458#define qemu_put_betls qemu_put_be64s
459#define qemu_get_betls qemu_get_be64s
460#else
461#define qemu_put_betl qemu_put_be32
462#define qemu_get_betl qemu_get_be32
463#define qemu_put_betls qemu_put_be32s
464#define qemu_get_betls qemu_get_be32s
465#endif
466
8a7ddc38
FB
467int64_t qemu_ftell(QEMUFile *f);
468int64_t qemu_fseek(QEMUFile *f, int64_t pos, int whence);
469
470typedef void SaveStateHandler(QEMUFile *f, void *opaque);
471typedef int LoadStateHandler(QEMUFile *f, void *opaque, int version_id);
472
8a7ddc38
FB
473int register_savevm(const char *idstr,
474 int instance_id,
475 int version_id,
476 SaveStateHandler *save_state,
477 LoadStateHandler *load_state,
478 void *opaque);
479void qemu_get_timer(QEMUFile *f, QEMUTimer *ts);
480void qemu_put_timer(QEMUFile *f, QEMUTimer *ts);
c4b1fcc0 481
6a00d601
FB
482void cpu_save(QEMUFile *f, void *opaque);
483int cpu_load(QEMUFile *f, void *opaque, int version_id);
484
faea38e7
FB
485void do_savevm(const char *name);
486void do_loadvm(const char *name);
487void do_delvm(const char *name);
488void do_info_snapshots(void);
489
83f64091
FB
490/* bottom halves */
491typedef struct QEMUBH QEMUBH;
492typedef void QEMUBHFunc(void *opaque);
493
494QEMUBH *qemu_bh_new(QEMUBHFunc *cb, void *opaque);
495void qemu_bh_schedule(QEMUBH *bh);
496void qemu_bh_cancel(QEMUBH *bh);
497void qemu_bh_delete(QEMUBH *bh);
6eb5733a 498int qemu_bh_poll(void);
83f64091 499
fc01f7e7
FB
500/* block.c */
501typedef struct BlockDriverState BlockDriverState;
ea2384d3
FB
502typedef struct BlockDriver BlockDriver;
503
504extern BlockDriver bdrv_raw;
19cb3738 505extern BlockDriver bdrv_host_device;
ea2384d3
FB
506extern BlockDriver bdrv_cow;
507extern BlockDriver bdrv_qcow;
508extern BlockDriver bdrv_vmdk;
3c56521b 509extern BlockDriver bdrv_cloop;
585d0ed9 510extern BlockDriver bdrv_dmg;
a8753c34 511extern BlockDriver bdrv_bochs;
6a0f9e82 512extern BlockDriver bdrv_vpc;
de167e41 513extern BlockDriver bdrv_vvfat;
faea38e7
FB
514extern BlockDriver bdrv_qcow2;
515
516typedef struct BlockDriverInfo {
517 /* in bytes, 0 if irrelevant */
518 int cluster_size;
519 /* offset at which the VM state can be saved (0 if not possible) */
520 int64_t vm_state_offset;
521} BlockDriverInfo;
522
523typedef struct QEMUSnapshotInfo {
524 char id_str[128]; /* unique snapshot id */
525 /* the following fields are informative. They are not needed for
526 the consistency of the snapshot */
527 char name[256]; /* user choosen name */
528 uint32_t vm_state_size; /* VM state info size */
529 uint32_t date_sec; /* UTC date of the snapshot */
530 uint32_t date_nsec;
531 uint64_t vm_clock_nsec; /* VM clock relative to boot */
532} QEMUSnapshotInfo;
ea2384d3 533
83f64091
FB
534#define BDRV_O_RDONLY 0x0000
535#define BDRV_O_RDWR 0x0002
536#define BDRV_O_ACCESS 0x0003
537#define BDRV_O_CREAT 0x0004 /* create an empty file */
538#define BDRV_O_SNAPSHOT 0x0008 /* open the file read only and save writes in a snapshot */
539#define BDRV_O_FILE 0x0010 /* open as a raw file (do not try to
540 use a disk image format on top of
541 it (default for
542 bdrv_file_open()) */
543
ea2384d3
FB
544void bdrv_init(void);
545BlockDriver *bdrv_find_format(const char *format_name);
546int bdrv_create(BlockDriver *drv,
547 const char *filename, int64_t size_in_sectors,
548 const char *backing_file, int flags);
c4b1fcc0
FB
549BlockDriverState *bdrv_new(const char *device_name);
550void bdrv_delete(BlockDriverState *bs);
83f64091
FB
551int bdrv_file_open(BlockDriverState **pbs, const char *filename, int flags);
552int bdrv_open(BlockDriverState *bs, const char *filename, int flags);
553int bdrv_open2(BlockDriverState *bs, const char *filename, int flags,
ea2384d3 554 BlockDriver *drv);
fc01f7e7
FB
555void bdrv_close(BlockDriverState *bs);
556int bdrv_read(BlockDriverState *bs, int64_t sector_num,
557 uint8_t *buf, int nb_sectors);
558int bdrv_write(BlockDriverState *bs, int64_t sector_num,
559 const uint8_t *buf, int nb_sectors);
83f64091
FB
560int bdrv_pread(BlockDriverState *bs, int64_t offset,
561 void *buf, int count);
562int bdrv_pwrite(BlockDriverState *bs, int64_t offset,
563 const void *buf, int count);
564int bdrv_truncate(BlockDriverState *bs, int64_t offset);
565int64_t bdrv_getlength(BlockDriverState *bs);
fc01f7e7 566void bdrv_get_geometry(BlockDriverState *bs, int64_t *nb_sectors_ptr);
33e3963e 567int bdrv_commit(BlockDriverState *bs);
77fef8c1 568void bdrv_set_boot_sector(BlockDriverState *bs, const uint8_t *data, int size);
83f64091
FB
569/* async block I/O */
570typedef struct BlockDriverAIOCB BlockDriverAIOCB;
571typedef void BlockDriverCompletionFunc(void *opaque, int ret);
572
ce1a14dc
PB
573BlockDriverAIOCB *bdrv_aio_read(BlockDriverState *bs, int64_t sector_num,
574 uint8_t *buf, int nb_sectors,
575 BlockDriverCompletionFunc *cb, void *opaque);
576BlockDriverAIOCB *bdrv_aio_write(BlockDriverState *bs, int64_t sector_num,
577 const uint8_t *buf, int nb_sectors,
578 BlockDriverCompletionFunc *cb, void *opaque);
83f64091 579void bdrv_aio_cancel(BlockDriverAIOCB *acb);
83f64091
FB
580
581void qemu_aio_init(void);
582void qemu_aio_poll(void);
6192bc37 583void qemu_aio_flush(void);
83f64091
FB
584void qemu_aio_wait_start(void);
585void qemu_aio_wait(void);
586void qemu_aio_wait_end(void);
587
7a6cba61
PB
588/* Ensure contents are flushed to disk. */
589void bdrv_flush(BlockDriverState *bs);
33e3963e 590
c4b1fcc0
FB
591#define BDRV_TYPE_HD 0
592#define BDRV_TYPE_CDROM 1
593#define BDRV_TYPE_FLOPPY 2
46d4767d
FB
594#define BIOS_ATA_TRANSLATION_AUTO 0
595#define BIOS_ATA_TRANSLATION_NONE 1
596#define BIOS_ATA_TRANSLATION_LBA 2
c4b1fcc0
FB
597
598void bdrv_set_geometry_hint(BlockDriverState *bs,
599 int cyls, int heads, int secs);
600void bdrv_set_type_hint(BlockDriverState *bs, int type);
46d4767d 601void bdrv_set_translation_hint(BlockDriverState *bs, int translation);
c4b1fcc0
FB
602void bdrv_get_geometry_hint(BlockDriverState *bs,
603 int *pcyls, int *pheads, int *psecs);
604int bdrv_get_type_hint(BlockDriverState *bs);
46d4767d 605int bdrv_get_translation_hint(BlockDriverState *bs);
c4b1fcc0
FB
606int bdrv_is_removable(BlockDriverState *bs);
607int bdrv_is_read_only(BlockDriverState *bs);
608int bdrv_is_inserted(BlockDriverState *bs);
19cb3738 609int bdrv_media_changed(BlockDriverState *bs);
c4b1fcc0
FB
610int bdrv_is_locked(BlockDriverState *bs);
611void bdrv_set_locked(BlockDriverState *bs, int locked);
19cb3738 612void bdrv_eject(BlockDriverState *bs, int eject_flag);
c4b1fcc0
FB
613void bdrv_set_change_cb(BlockDriverState *bs,
614 void (*change_cb)(void *opaque), void *opaque);
ea2384d3 615void bdrv_get_format(BlockDriverState *bs, char *buf, int buf_size);
c4b1fcc0
FB
616void bdrv_info(void);
617BlockDriverState *bdrv_find(const char *name);
82c643ff 618void bdrv_iterate(void (*it)(void *opaque, const char *name), void *opaque);
ea2384d3
FB
619int bdrv_is_encrypted(BlockDriverState *bs);
620int bdrv_set_key(BlockDriverState *bs, const char *key);
621void bdrv_iterate_format(void (*it)(void *opaque, const char *name),
622 void *opaque);
623const char *bdrv_get_device_name(BlockDriverState *bs);
faea38e7
FB
624int bdrv_write_compressed(BlockDriverState *bs, int64_t sector_num,
625 const uint8_t *buf, int nb_sectors);
626int bdrv_get_info(BlockDriverState *bs, BlockDriverInfo *bdi);
c4b1fcc0 627
83f64091
FB
628void bdrv_get_backing_filename(BlockDriverState *bs,
629 char *filename, int filename_size);
faea38e7
FB
630int bdrv_snapshot_create(BlockDriverState *bs,
631 QEMUSnapshotInfo *sn_info);
632int bdrv_snapshot_goto(BlockDriverState *bs,
633 const char *snapshot_id);
634int bdrv_snapshot_delete(BlockDriverState *bs, const char *snapshot_id);
635int bdrv_snapshot_list(BlockDriverState *bs,
636 QEMUSnapshotInfo **psn_info);
637char *bdrv_snapshot_dump(char *buf, int buf_size, QEMUSnapshotInfo *sn);
638
639char *get_human_readable_size(char *buf, int buf_size, int64_t size);
83f64091
FB
640int path_is_absolute(const char *path);
641void path_combine(char *dest, int dest_size,
642 const char *base_path,
643 const char *filename);
ea2384d3
FB
644
645#ifndef QEMU_TOOL
54fa5af5
FB
646
647typedef void QEMUMachineInitFunc(int ram_size, int vga_ram_size,
648 int boot_device,
649 DisplayState *ds, const char **fd_filename, int snapshot,
650 const char *kernel_filename, const char *kernel_cmdline,
651 const char *initrd_filename);
652
653typedef struct QEMUMachine {
654 const char *name;
655 const char *desc;
656 QEMUMachineInitFunc *init;
657 struct QEMUMachine *next;
658} QEMUMachine;
659
660int qemu_register_machine(QEMUMachine *m);
661
662typedef void SetIRQFunc(void *opaque, int irq_num, int level);
3de388f6 663typedef void IRQRequestFunc(void *opaque, int level);
54fa5af5 664
26aa7d72
FB
665/* ISA bus */
666
667extern target_phys_addr_t isa_mem_base;
668
669typedef void (IOPortWriteFunc)(void *opaque, uint32_t address, uint32_t data);
670typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address);
671
672int register_ioport_read(int start, int length, int size,
673 IOPortReadFunc *func, void *opaque);
674int register_ioport_write(int start, int length, int size,
675 IOPortWriteFunc *func, void *opaque);
69b91039
FB
676void isa_unassign_ioport(int start, int length);
677
aef445bd
PB
678void isa_mmio_init(target_phys_addr_t base, target_phys_addr_t size);
679
69b91039
FB
680/* PCI bus */
681
69b91039
FB
682extern target_phys_addr_t pci_mem_base;
683
46e50e9d 684typedef struct PCIBus PCIBus;
69b91039
FB
685typedef struct PCIDevice PCIDevice;
686
687typedef void PCIConfigWriteFunc(PCIDevice *pci_dev,
688 uint32_t address, uint32_t data, int len);
689typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev,
690 uint32_t address, int len);
691typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num,
692 uint32_t addr, uint32_t size, int type);
693
694#define PCI_ADDRESS_SPACE_MEM 0x00
695#define PCI_ADDRESS_SPACE_IO 0x01
696#define PCI_ADDRESS_SPACE_MEM_PREFETCH 0x08
697
698typedef struct PCIIORegion {
5768f5ac 699 uint32_t addr; /* current PCI mapping address. -1 means not mapped */
69b91039
FB
700 uint32_t size;
701 uint8_t type;
702 PCIMapIORegionFunc *map_func;
703} PCIIORegion;
704
8a8696a3
FB
705#define PCI_ROM_SLOT 6
706#define PCI_NUM_REGIONS 7
502a5395
PB
707
708#define PCI_DEVICES_MAX 64
709
710#define PCI_VENDOR_ID 0x00 /* 16 bits */
711#define PCI_DEVICE_ID 0x02 /* 16 bits */
712#define PCI_COMMAND 0x04 /* 16 bits */
713#define PCI_COMMAND_IO 0x1 /* Enable response in I/O space */
714#define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */
715#define PCI_CLASS_DEVICE 0x0a /* Device class */
716#define PCI_INTERRUPT_LINE 0x3c /* 8 bits */
717#define PCI_INTERRUPT_PIN 0x3d /* 8 bits */
718#define PCI_MIN_GNT 0x3e /* 8 bits */
719#define PCI_MAX_LAT 0x3f /* 8 bits */
720
69b91039
FB
721struct PCIDevice {
722 /* PCI config space */
723 uint8_t config[256];
724
725 /* the following fields are read only */
46e50e9d 726 PCIBus *bus;
69b91039
FB
727 int devfn;
728 char name[64];
8a8696a3 729 PCIIORegion io_regions[PCI_NUM_REGIONS];
69b91039
FB
730
731 /* do not access the following fields */
732 PCIConfigReadFunc *config_read;
733 PCIConfigWriteFunc *config_write;
502a5395 734 /* ??? This is a PC-specific hack, and should be removed. */
5768f5ac 735 int irq_index;
d2b59317
PB
736
737 /* Current IRQ levels. Used internally by the generic PCI code. */
738 int irq_state[4];
69b91039
FB
739};
740
46e50e9d
FB
741PCIDevice *pci_register_device(PCIBus *bus, const char *name,
742 int instance_size, int devfn,
69b91039
FB
743 PCIConfigReadFunc *config_read,
744 PCIConfigWriteFunc *config_write);
745
746void pci_register_io_region(PCIDevice *pci_dev, int region_num,
747 uint32_t size, int type,
748 PCIMapIORegionFunc *map_func);
749
5768f5ac
FB
750void pci_set_irq(PCIDevice *pci_dev, int irq_num, int level);
751
752uint32_t pci_default_read_config(PCIDevice *d,
753 uint32_t address, int len);
754void pci_default_write_config(PCIDevice *d,
755 uint32_t address, uint32_t val, int len);
89b6b508
FB
756void pci_device_save(PCIDevice *s, QEMUFile *f);
757int pci_device_load(PCIDevice *s, QEMUFile *f);
5768f5ac 758
d2b59317
PB
759typedef void (*pci_set_irq_fn)(void *pic, int irq_num, int level);
760typedef int (*pci_map_irq_fn)(PCIDevice *pci_dev, int irq_num);
761PCIBus *pci_register_bus(pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
80b3ada7 762 void *pic, int devfn_min, int nirq);
502a5395
PB
763
764void pci_nic_init(PCIBus *bus, NICInfo *nd);
765void pci_data_write(void *opaque, uint32_t addr, uint32_t val, int len);
766uint32_t pci_data_read(void *opaque, uint32_t addr, int len);
767int pci_bus_num(PCIBus *s);
80b3ada7 768void pci_for_each_device(int bus_num, void (*fn)(PCIDevice *d));
9995c51f 769
5768f5ac 770void pci_info(void);
80b3ada7
PB
771PCIBus *pci_bridge_init(PCIBus *bus, int devfn, uint32_t id,
772 pci_map_irq_fn map_irq, const char *name);
26aa7d72 773
502a5395 774/* prep_pci.c */
46e50e9d 775PCIBus *pci_prep_init(void);
77d4bc34 776
502a5395
PB
777/* grackle_pci.c */
778PCIBus *pci_grackle_init(uint32_t base, void *pic);
779
780/* unin_pci.c */
781PCIBus *pci_pmac_init(void *pic);
782
783/* apb_pci.c */
784PCIBus *pci_apb_init(target_ulong special_base, target_ulong mem_base,
785 void *pic);
786
e69954b9 787PCIBus *pci_vpb_init(void *pic, int irq, int realview);
502a5395
PB
788
789/* piix_pci.c */
f00fc47c
FB
790PCIBus *i440fx_init(PCIDevice **pi440fx_state);
791void i440fx_set_smm(PCIDevice *d, int val);
502a5395 792int piix3_init(PCIBus *bus);
f00fc47c 793void i440fx_init_memory_mappings(PCIDevice *d);
a41b2ff2 794
28b9b5af
FB
795/* openpic.c */
796typedef struct openpic_t openpic_t;
54fa5af5 797void openpic_set_irq(void *opaque, int n_IRQ, int level);
7668a27f
FB
798openpic_t *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus,
799 CPUState **envp);
28b9b5af 800
54fa5af5
FB
801/* heathrow_pic.c */
802typedef struct HeathrowPICS HeathrowPICS;
803void heathrow_pic_set_irq(void *opaque, int num, int level);
804HeathrowPICS *heathrow_pic_init(int *pmem_index);
805
6a36d84e
FB
806#ifdef HAS_AUDIO
807struct soundhw {
808 const char *name;
809 const char *descr;
810 int enabled;
811 int isa;
812 union {
813 int (*init_isa) (AudioState *s);
814 int (*init_pci) (PCIBus *bus, AudioState *s);
815 } init;
816};
817
818extern struct soundhw soundhw[];
819#endif
820
313aa567
FB
821/* vga.c */
822
74a14f22 823#define VGA_RAM_SIZE (8192 * 1024)
313aa567 824
82c643ff 825struct DisplayState {
313aa567
FB
826 uint8_t *data;
827 int linesize;
828 int depth;
d3079cd2 829 int bgr; /* BGR color order instead of RGB. Only valid for depth == 32 */
82c643ff
FB
830 int width;
831 int height;
24236869
FB
832 void *opaque;
833
313aa567
FB
834 void (*dpy_update)(struct DisplayState *s, int x, int y, int w, int h);
835 void (*dpy_resize)(struct DisplayState *s, int w, int h);
836 void (*dpy_refresh)(struct DisplayState *s);
24236869 837 void (*dpy_copy)(struct DisplayState *s, int src_x, int src_y, int dst_x, int dst_y, int w, int h);
82c643ff 838};
313aa567
FB
839
840static inline void dpy_update(DisplayState *s, int x, int y, int w, int h)
841{
842 s->dpy_update(s, x, y, w, h);
843}
844
845static inline void dpy_resize(DisplayState *s, int w, int h)
846{
847 s->dpy_resize(s, w, h);
848}
849
89b6b508
FB
850int isa_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
851 unsigned long vga_ram_offset, int vga_ram_size);
852int pci_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
853 unsigned long vga_ram_offset, int vga_ram_size,
854 unsigned long vga_bios_offset, int vga_bios_size);
313aa567 855
d6bfa22f 856/* cirrus_vga.c */
46e50e9d 857void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
d6bfa22f 858 unsigned long vga_ram_offset, int vga_ram_size);
d6bfa22f
FB
859void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
860 unsigned long vga_ram_offset, int vga_ram_size);
861
313aa567 862/* sdl.c */
d63d307f 863void sdl_display_init(DisplayState *ds, int full_screen);
313aa567 864
da4dbf74
FB
865/* cocoa.m */
866void cocoa_display_init(DisplayState *ds, int full_screen);
867
24236869
FB
868/* vnc.c */
869void vnc_display_init(DisplayState *ds, int display);
870
5391d806
FB
871/* ide.c */
872#define MAX_DISKS 4
873
faea38e7 874extern BlockDriverState *bs_table[MAX_DISKS + 1];
5391d806 875
69b91039
FB
876void isa_ide_init(int iobase, int iobase2, int irq,
877 BlockDriverState *hd0, BlockDriverState *hd1);
54fa5af5
FB
878void pci_cmd646_ide_init(PCIBus *bus, BlockDriverState **hd_table,
879 int secondary_ide_enabled);
502a5395 880void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn);
28b9b5af 881int pmac_ide_init (BlockDriverState **hd_table,
54fa5af5 882 SetIRQFunc *set_irq, void *irq_opaque, int irq);
5391d806 883
2e5d83bb
PB
884/* cdrom.c */
885int cdrom_read_toc(int nb_sectors, uint8_t *buf, int msf, int start_track);
886int cdrom_read_toc_raw(int nb_sectors, uint8_t *buf, int msf, int session_num);
887
1d14ffa9 888/* es1370.c */
c0fe3827 889int es1370_init (PCIBus *bus, AudioState *s);
1d14ffa9 890
fb065187 891/* sb16.c */
c0fe3827 892int SB16_init (AudioState *s);
fb065187
FB
893
894/* adlib.c */
c0fe3827 895int Adlib_init (AudioState *s);
fb065187
FB
896
897/* gus.c */
c0fe3827 898int GUS_init (AudioState *s);
27503323
FB
899
900/* dma.c */
85571bc7 901typedef int (*DMA_transfer_handler) (void *opaque, int nchan, int pos, int size);
27503323 902int DMA_get_channel_mode (int nchan);
85571bc7
FB
903int DMA_read_memory (int nchan, void *buf, int pos, int size);
904int DMA_write_memory (int nchan, void *buf, int pos, int size);
27503323
FB
905void DMA_hold_DREQ (int nchan);
906void DMA_release_DREQ (int nchan);
16f62432 907void DMA_schedule(int nchan);
27503323 908void DMA_run (void);
28b9b5af 909void DMA_init (int high_page_enable);
27503323 910void DMA_register_channel (int nchan,
85571bc7
FB
911 DMA_transfer_handler transfer_handler,
912 void *opaque);
7138fcfb
FB
913/* fdc.c */
914#define MAX_FD 2
915extern BlockDriverState *fd_table[MAX_FD];
916
baca51fa
FB
917typedef struct fdctrl_t fdctrl_t;
918
919fdctrl_t *fdctrl_init (int irq_lvl, int dma_chann, int mem_mapped,
920 uint32_t io_base,
921 BlockDriverState **fds);
922int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num);
7138fcfb 923
80cabfad
FB
924/* ne2000.c */
925
7c9d8e07
FB
926void isa_ne2000_init(int base, int irq, NICInfo *nd);
927void pci_ne2000_init(PCIBus *bus, NICInfo *nd);
80cabfad 928
a41b2ff2
PB
929/* rtl8139.c */
930
931void pci_rtl8139_init(PCIBus *bus, NICInfo *nd);
932
e3c2613f
FB
933/* pcnet.c */
934
935void pci_pcnet_init(PCIBus *bus, NICInfo *nd);
67e999be
FB
936void pcnet_h_reset(void *opaque);
937void *lance_init(NICInfo *nd, uint32_t leaddr, void *dma_opaque);
938
e3c2613f 939
80cabfad
FB
940/* pckbd.c */
941
80cabfad
FB
942void kbd_init(void);
943
944/* mc146818rtc.c */
945
8a7ddc38 946typedef struct RTCState RTCState;
80cabfad 947
8a7ddc38
FB
948RTCState *rtc_init(int base, int irq);
949void rtc_set_memory(RTCState *s, int addr, int val);
950void rtc_set_date(RTCState *s, const struct tm *tm);
80cabfad
FB
951
952/* serial.c */
953
c4b1fcc0 954typedef struct SerialState SerialState;
e5d13e2f
FB
955SerialState *serial_init(SetIRQFunc *set_irq, void *opaque,
956 int base, int irq, CharDriverState *chr);
957SerialState *serial_mm_init (SetIRQFunc *set_irq, void *opaque,
958 target_ulong base, int it_shift,
959 int irq, CharDriverState *chr);
80cabfad 960
6508fe59
FB
961/* parallel.c */
962
963typedef struct ParallelState ParallelState;
964ParallelState *parallel_init(int base, int irq, CharDriverState *chr);
965
80cabfad
FB
966/* i8259.c */
967
3de388f6
FB
968typedef struct PicState2 PicState2;
969extern PicState2 *isa_pic;
80cabfad 970void pic_set_irq(int irq, int level);
54fa5af5 971void pic_set_irq_new(void *opaque, int irq, int level);
3de388f6 972PicState2 *pic_init(IRQRequestFunc *irq_request, void *irq_request_opaque);
d592d303
FB
973void pic_set_alt_irq_func(PicState2 *s, SetIRQFunc *alt_irq_func,
974 void *alt_irq_opaque);
3de388f6
FB
975int pic_read_irq(PicState2 *s);
976void pic_update_irq(PicState2 *s);
977uint32_t pic_intack_read(PicState2 *s);
c20709aa 978void pic_info(void);
4a0fb71e 979void irq_info(void);
80cabfad 980
c27004ec 981/* APIC */
d592d303
FB
982typedef struct IOAPICState IOAPICState;
983
c27004ec
FB
984int apic_init(CPUState *env);
985int apic_get_interrupt(CPUState *env);
d592d303
FB
986IOAPICState *ioapic_init(void);
987void ioapic_set_irq(void *opaque, int vector, int level);
c27004ec 988
80cabfad
FB
989/* i8254.c */
990
991#define PIT_FREQ 1193182
992
ec844b96
FB
993typedef struct PITState PITState;
994
995PITState *pit_init(int base, int irq);
996void pit_set_gate(PITState *pit, int channel, int val);
997int pit_get_gate(PITState *pit, int channel);
fd06c375
FB
998int pit_get_initial_count(PITState *pit, int channel);
999int pit_get_mode(PITState *pit, int channel);
ec844b96 1000int pit_get_out(PITState *pit, int channel, int64_t current_time);
80cabfad 1001
fd06c375
FB
1002/* pcspk.c */
1003void pcspk_init(PITState *);
1004int pcspk_audio_init(AudioState *);
1005
6515b203
FB
1006/* acpi.c */
1007extern int acpi_enabled;
502a5395 1008void piix4_pm_init(PCIBus *bus, int devfn);
6515b203
FB
1009void acpi_bios_init(void);
1010
80cabfad 1011/* pc.c */
54fa5af5 1012extern QEMUMachine pc_machine;
3dbbdc25 1013extern QEMUMachine isapc_machine;
52ca8d6a 1014extern int fd_bootchk;
80cabfad 1015
6a00d601
FB
1016void ioport_set_a20(int enable);
1017int ioport_get_a20(void);
1018
26aa7d72 1019/* ppc.c */
54fa5af5
FB
1020extern QEMUMachine prep_machine;
1021extern QEMUMachine core99_machine;
1022extern QEMUMachine heathrow_machine;
1023
6af0bf9c
FB
1024/* mips_r4k.c */
1025extern QEMUMachine mips_machine;
1026
27c7ca7e
FB
1027/* shix.c */
1028extern QEMUMachine shix_machine;
1029
8cc43fef
FB
1030#ifdef TARGET_PPC
1031ppc_tb_t *cpu_ppc_tb_init (CPUState *env, uint32_t freq);
1032#endif
64201201 1033void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val);
77d4bc34
FB
1034
1035extern CPUWriteMemoryFunc *PPC_io_write[];
1036extern CPUReadMemoryFunc *PPC_io_read[];
54fa5af5 1037void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val);
26aa7d72 1038
e95c8d51 1039/* sun4m.c */
54fa5af5 1040extern QEMUMachine sun4m_machine;
ba3c64fb 1041void pic_set_irq_cpu(int irq, int level, unsigned int cpu);
e95c8d51
FB
1042
1043/* iommu.c */
e80cfcfc 1044void *iommu_init(uint32_t addr);
67e999be 1045void sparc_iommu_memory_rw(void *opaque, target_phys_addr_t addr,
a917d384 1046 uint8_t *buf, int len, int is_write);
67e999be
FB
1047static inline void sparc_iommu_memory_read(void *opaque,
1048 target_phys_addr_t addr,
1049 uint8_t *buf, int len)
1050{
1051 sparc_iommu_memory_rw(opaque, addr, buf, len, 0);
1052}
e95c8d51 1053
67e999be
FB
1054static inline void sparc_iommu_memory_write(void *opaque,
1055 target_phys_addr_t addr,
1056 uint8_t *buf, int len)
1057{
1058 sparc_iommu_memory_rw(opaque, addr, buf, len, 1);
1059}
e95c8d51
FB
1060
1061/* tcx.c */
95219897 1062void tcx_init(DisplayState *ds, uint32_t addr, uint8_t *vram_base,
6f7e9aec 1063 unsigned long vram_offset, int vram_size, int width, int height);
e80cfcfc
FB
1064
1065/* slavio_intctl.c */
1066void *slavio_intctl_init();
ba3c64fb 1067void slavio_intctl_set_cpu(void *opaque, unsigned int cpu, CPUState *env);
e80cfcfc
FB
1068void slavio_pic_info(void *opaque);
1069void slavio_irq_info(void *opaque);
1070void slavio_pic_set_irq(void *opaque, int irq, int level);
ba3c64fb 1071void slavio_pic_set_irq_cpu(void *opaque, int irq, int level, unsigned int cpu);
e95c8d51 1072
5fe141fd
FB
1073/* loader.c */
1074int get_image_size(const char *filename);
1075int load_image(const char *filename, uint8_t *addr);
9ee3c029 1076int load_elf(const char *filename, int64_t virt_to_phys_addend, uint64_t *pentry);
e80cfcfc
FB
1077int load_aout(const char *filename, uint8_t *addr);
1078
1079/* slavio_timer.c */
ba3c64fb 1080void slavio_timer_init(uint32_t addr, int irq, int mode, unsigned int cpu);
8d5f07fa 1081
e80cfcfc
FB
1082/* slavio_serial.c */
1083SerialState *slavio_serial_init(int base, int irq, CharDriverState *chr1, CharDriverState *chr2);
1084void slavio_serial_ms_kbd_init(int base, int irq);
e95c8d51 1085
3475187d
FB
1086/* slavio_misc.c */
1087void *slavio_misc_init(uint32_t base, int irq);
1088void slavio_set_power_fail(void *opaque, int power_failing);
1089
6f7e9aec 1090/* esp.c */
67e999be
FB
1091void *esp_init(BlockDriverState **bd, uint32_t espaddr, void *dma_opaque);
1092void esp_reset(void *opaque);
1093
1094/* sparc32_dma.c */
1095void *sparc32_dma_init(uint32_t daddr, int espirq, int leirq, void *iommu,
1096 void *intctl);
1097void ledma_set_irq(void *opaque, int isr);
9b94dc32
FB
1098void ledma_memory_read(void *opaque, target_phys_addr_t addr,
1099 uint8_t *buf, int len, int do_bswap);
1100void ledma_memory_write(void *opaque, target_phys_addr_t addr,
1101 uint8_t *buf, int len, int do_bswap);
67e999be
FB
1102void espdma_raise_irq(void *opaque);
1103void espdma_clear_irq(void *opaque);
1104void espdma_memory_read(void *opaque, uint8_t *buf, int len);
1105void espdma_memory_write(void *opaque, uint8_t *buf, int len);
1106void sparc32_dma_set_reset_data(void *opaque, void *esp_opaque,
1107 void *lance_opaque);
6f7e9aec 1108
b8174937
FB
1109/* cs4231.c */
1110void cs_init(target_phys_addr_t base, int irq, void *intctl);
1111
3475187d
FB
1112/* sun4u.c */
1113extern QEMUMachine sun4u_machine;
1114
64201201
FB
1115/* NVRAM helpers */
1116#include "hw/m48t59.h"
1117
1118void NVRAM_set_byte (m48t59_t *nvram, uint32_t addr, uint8_t value);
1119uint8_t NVRAM_get_byte (m48t59_t *nvram, uint32_t addr);
1120void NVRAM_set_word (m48t59_t *nvram, uint32_t addr, uint16_t value);
1121uint16_t NVRAM_get_word (m48t59_t *nvram, uint32_t addr);
1122void NVRAM_set_lword (m48t59_t *nvram, uint32_t addr, uint32_t value);
1123uint32_t NVRAM_get_lword (m48t59_t *nvram, uint32_t addr);
1124void NVRAM_set_string (m48t59_t *nvram, uint32_t addr,
1125 const unsigned char *str, uint32_t max);
1126int NVRAM_get_string (m48t59_t *nvram, uint8_t *dst, uint16_t addr, int max);
1127void NVRAM_set_crc (m48t59_t *nvram, uint32_t addr,
1128 uint32_t start, uint32_t count);
1129int PPC_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size,
1130 const unsigned char *arch,
1131 uint32_t RAM_size, int boot_device,
1132 uint32_t kernel_image, uint32_t kernel_size,
28b9b5af 1133 const char *cmdline,
64201201 1134 uint32_t initrd_image, uint32_t initrd_size,
28b9b5af
FB
1135 uint32_t NVRAM_image,
1136 int width, int height, int depth);
64201201 1137
63066f4f
FB
1138/* adb.c */
1139
1140#define MAX_ADB_DEVICES 16
1141
e2733d20 1142#define ADB_MAX_OUT_LEN 16
63066f4f 1143
e2733d20 1144typedef struct ADBDevice ADBDevice;
63066f4f 1145
e2733d20
FB
1146/* buf = NULL means polling */
1147typedef int ADBDeviceRequest(ADBDevice *d, uint8_t *buf_out,
1148 const uint8_t *buf, int len);
12c28fed
FB
1149typedef int ADBDeviceReset(ADBDevice *d);
1150
63066f4f
FB
1151struct ADBDevice {
1152 struct ADBBusState *bus;
1153 int devaddr;
1154 int handler;
e2733d20 1155 ADBDeviceRequest *devreq;
12c28fed 1156 ADBDeviceReset *devreset;
63066f4f
FB
1157 void *opaque;
1158};
1159
1160typedef struct ADBBusState {
1161 ADBDevice devices[MAX_ADB_DEVICES];
1162 int nb_devices;
e2733d20 1163 int poll_index;
63066f4f
FB
1164} ADBBusState;
1165
e2733d20
FB
1166int adb_request(ADBBusState *s, uint8_t *buf_out,
1167 const uint8_t *buf, int len);
1168int adb_poll(ADBBusState *s, uint8_t *buf_out);
63066f4f
FB
1169
1170ADBDevice *adb_register_device(ADBBusState *s, int devaddr,
e2733d20 1171 ADBDeviceRequest *devreq,
12c28fed 1172 ADBDeviceReset *devreset,
63066f4f
FB
1173 void *opaque);
1174void adb_kbd_init(ADBBusState *bus);
1175void adb_mouse_init(ADBBusState *bus);
1176
1177/* cuda.c */
1178
1179extern ADBBusState adb_bus;
54fa5af5 1180int cuda_init(SetIRQFunc *set_irq, void *irq_opaque, int irq);
63066f4f 1181
bb36d470
FB
1182#include "hw/usb.h"
1183
a594cfbf
FB
1184/* usb ports of the VM */
1185
0d92ed30
PB
1186void qemu_register_usb_port(USBPort *port, void *opaque, int index,
1187 usb_attachfn attach);
a594cfbf 1188
0d92ed30 1189#define VM_USB_HUB_SIZE 8
a594cfbf
FB
1190
1191void do_usb_add(const char *devname);
1192void do_usb_del(const char *devname);
1193void usb_info(void);
1194
2e5d83bb 1195/* scsi-disk.c */
4d611c9a
PB
1196enum scsi_reason {
1197 SCSI_REASON_DONE, /* Command complete. */
1198 SCSI_REASON_DATA /* Transfer complete, more data required. */
1199};
1200
2e5d83bb 1201typedef struct SCSIDevice SCSIDevice;
a917d384
PB
1202typedef void (*scsi_completionfn)(void *opaque, int reason, uint32_t tag,
1203 uint32_t arg);
2e5d83bb
PB
1204
1205SCSIDevice *scsi_disk_init(BlockDriverState *bdrv,
a917d384 1206 int tcq,
2e5d83bb
PB
1207 scsi_completionfn completion,
1208 void *opaque);
1209void scsi_disk_destroy(SCSIDevice *s);
1210
0fc5c15a 1211int32_t scsi_send_command(SCSIDevice *s, uint32_t tag, uint8_t *buf, int lun);
4d611c9a
PB
1212/* SCSI data transfers are asynchrnonous. However, unlike the block IO
1213 layer the completion routine may be called directly by
1214 scsi_{read,write}_data. */
a917d384
PB
1215void scsi_read_data(SCSIDevice *s, uint32_t tag);
1216int scsi_write_data(SCSIDevice *s, uint32_t tag);
1217void scsi_cancel_io(SCSIDevice *s, uint32_t tag);
1218uint8_t *scsi_get_buf(SCSIDevice *s, uint32_t tag);
2e5d83bb 1219
7d8406be
PB
1220/* lsi53c895a.c */
1221void lsi_scsi_attach(void *opaque, BlockDriverState *bd, int id);
1222void *lsi_scsi_init(PCIBus *bus, int devfn);
1223
b5ff1b31 1224/* integratorcp.c */
40f137e1
PB
1225extern QEMUMachine integratorcp926_machine;
1226extern QEMUMachine integratorcp1026_machine;
b5ff1b31 1227
cdbdb648
PB
1228/* versatilepb.c */
1229extern QEMUMachine versatilepb_machine;
16406950 1230extern QEMUMachine versatileab_machine;
cdbdb648 1231
e69954b9
PB
1232/* realview.c */
1233extern QEMUMachine realview_machine;
1234
daa57963
FB
1235/* ps2.c */
1236void *ps2_kbd_init(void (*update_irq)(void *, int), void *update_arg);
1237void *ps2_mouse_init(void (*update_irq)(void *, int), void *update_arg);
1238void ps2_write_mouse(void *, int val);
1239void ps2_write_keyboard(void *, int val);
1240uint32_t ps2_read_data(void *);
1241void ps2_queue(void *, int b);
f94f5d71 1242void ps2_keyboard_set_translation(void *opaque, int mode);
daa57963 1243
80337b66
FB
1244/* smc91c111.c */
1245void smc91c111_init(NICInfo *, uint32_t, void *, int);
1246
bdd5003a 1247/* pl110.c */
95219897 1248void *pl110_init(DisplayState *ds, uint32_t base, void *pic, int irq, int);
bdd5003a 1249
cdbdb648
PB
1250/* pl011.c */
1251void pl011_init(uint32_t base, void *pic, int irq, CharDriverState *chr);
1252
1253/* pl050.c */
1254void pl050_init(uint32_t base, void *pic, int irq, int is_mouse);
1255
1256/* pl080.c */
e69954b9 1257void *pl080_init(uint32_t base, void *pic, int irq, int nchannels);
cdbdb648
PB
1258
1259/* pl190.c */
1260void *pl190_init(uint32_t base, void *parent, int irq, int fiq);
1261
1262/* arm-timer.c */
1263void sp804_init(uint32_t base, void *pic, int irq);
1264void icp_pit_init(uint32_t base, void *pic, int irq);
1265
e69954b9
PB
1266/* arm_sysctl.c */
1267void arm_sysctl_init(uint32_t base, uint32_t sys_id);
1268
1269/* arm_gic.c */
1270void *arm_gic_init(uint32_t base, void *parent, int parent_irq);
1271
16406950
PB
1272/* arm_boot.c */
1273
1274void arm_load_kernel(int ram_size, const char *kernel_filename,
1275 const char *kernel_cmdline, const char *initrd_filename,
1276 int board_id);
1277
27c7ca7e
FB
1278/* sh7750.c */
1279struct SH7750State;
1280
008a8818 1281struct SH7750State *sh7750_init(CPUState * cpu);
27c7ca7e
FB
1282
1283typedef struct {
1284 /* The callback will be triggered if any of the designated lines change */
1285 uint16_t portamask_trigger;
1286 uint16_t portbmask_trigger;
1287 /* Return 0 if no action was taken */
1288 int (*port_change_cb) (uint16_t porta, uint16_t portb,
1289 uint16_t * periph_pdtra,
1290 uint16_t * periph_portdira,
1291 uint16_t * periph_pdtrb,
1292 uint16_t * periph_portdirb);
1293} sh7750_io_device;
1294
1295int sh7750_register_io_device(struct SH7750State *s,
1296 sh7750_io_device * device);
1297/* tc58128.c */
1298int tc58128_init(struct SH7750State *s, char *zone1, char *zone2);
1299
29133e9a
FB
1300/* NOR flash devices */
1301typedef struct pflash_t pflash_t;
1302
1303pflash_t *pflash_register (target_ulong base, ram_addr_t off,
1304 BlockDriverState *bs,
1305 target_ulong sector_len, int nb_blocs, int width,
1306 uint16_t id0, uint16_t id1,
1307 uint16_t id2, uint16_t id3);
1308
ea2384d3
FB
1309#endif /* defined(QEMU_TOOL) */
1310
c4b1fcc0 1311/* monitor.c */
82c643ff 1312void monitor_init(CharDriverState *hd, int show_banner);
ea2384d3
FB
1313void term_puts(const char *str);
1314void term_vprintf(const char *fmt, va_list ap);
40c3bac3 1315void term_printf(const char *fmt, ...) __attribute__ ((__format__ (__printf__, 1, 2)));
c4b1fcc0
FB
1316void term_flush(void);
1317void term_print_help(void);
ea2384d3
FB
1318void monitor_readline(const char *prompt, int is_password,
1319 char *buf, int buf_size);
1320
1321/* readline.c */
1322typedef void ReadLineFunc(void *opaque, const char *str);
1323
1324extern int completion_index;
1325void add_completion(const char *str);
1326void readline_handle_byte(int ch);
1327void readline_find_completion(const char *cmdline);
1328const char *readline_get_history(unsigned int index);
1329void readline_start(const char *prompt, int is_password,
1330 ReadLineFunc *readline_func, void *opaque);
c4b1fcc0 1331
5e6ad6f9
FB
1332void kqemu_record_dump(void);
1333
fc01f7e7 1334#endif /* VL_H */