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Fix partial transfer bug.
[qemu.git] / vl.h
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1/*
2 * QEMU System Emulator header
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24#ifndef VL_H
25#define VL_H
26
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27/* we put basic includes here to avoid repeating them in device drivers */
28#include <stdlib.h>
29#include <stdio.h>
30#include <stdarg.h>
31#include <string.h>
32#include <inttypes.h>
85571bc7 33#include <limits.h>
8a7ddc38 34#include <time.h>
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35#include <ctype.h>
36#include <errno.h>
37#include <unistd.h>
38#include <fcntl.h>
7d3505c5 39#include <sys/stat.h>
fb065187 40#include "audio/audio.h"
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41
42#ifndef O_LARGEFILE
43#define O_LARGEFILE 0
44#endif
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45#ifndef O_BINARY
46#define O_BINARY 0
47#endif
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48
49#ifdef _WIN32
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50#define lseek _lseeki64
51#define ENOTSUP 4096
52/* XXX: find 64 bit version */
53#define ftruncate chsize
54
55static inline char *realpath(const char *path, char *resolved_path)
56{
57 _fullpath(resolved_path, path, _MAX_PATH);
58 return resolved_path;
59}
67b915a5 60#endif
8a7ddc38 61
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62#ifdef QEMU_TOOL
63
64/* we use QEMU_TOOL in the command line tools which do not depend on
65 the target CPU type */
66#include "config-host.h"
67#include <setjmp.h>
68#include "osdep.h"
69#include "bswap.h"
70
71#else
72
16f62432 73#include "cpu.h"
1fddef4b 74#include "gdbstub.h"
16f62432 75
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76#endif /* !defined(QEMU_TOOL) */
77
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78#ifndef glue
79#define xglue(x, y) x ## y
80#define glue(x, y) xglue(x, y)
81#define stringify(s) tostring(s)
82#define tostring(s) #s
83#endif
84
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85#ifndef MIN
86#define MIN(a, b) (((a) < (b)) ? (a) : (b))
87#endif
88#ifndef MAX
89#define MAX(a, b) (((a) > (b)) ? (a) : (b))
90#endif
91
33e3963e 92/* vl.c */
80cabfad 93uint64_t muldiv64(uint64_t a, uint32_t b, uint32_t c);
313aa567 94
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95void hw_error(const char *fmt, ...);
96
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97extern const char *bios_dir;
98
99void pstrcpy(char *buf, int buf_size, const char *str);
100char *pstrcat(char *buf, int buf_size, const char *s);
82c643ff 101int strstart(const char *str, const char *val, const char **ptr);
c4b1fcc0 102
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103extern int vm_running;
104
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105typedef struct vm_change_state_entry VMChangeStateEntry;
106typedef void VMChangeStateHandler(void *opaque, int running);
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107typedef void VMStopHandler(void *opaque, int reason);
108
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109VMChangeStateEntry *qemu_add_vm_change_state_handler(VMChangeStateHandler *cb,
110 void *opaque);
111void qemu_del_vm_change_state_handler(VMChangeStateEntry *e);
112
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113int qemu_add_vm_stop_handler(VMStopHandler *cb, void *opaque);
114void qemu_del_vm_stop_handler(VMStopHandler *cb, void *opaque);
115
116void vm_start(void);
117void vm_stop(int reason);
118
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119typedef void QEMUResetHandler(void *opaque);
120
121void qemu_register_reset(QEMUResetHandler *func, void *opaque);
122void qemu_system_reset_request(void);
123void qemu_system_shutdown_request(void);
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124void qemu_system_powerdown_request(void);
125#if !defined(TARGET_SPARC)
126// Please implement a power failure function to signal the OS
127#define qemu_system_powerdown() do{}while(0)
128#else
129void qemu_system_powerdown(void);
130#endif
bb0c6722 131
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132void main_loop_wait(int timeout);
133
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134extern int ram_size;
135extern int bios_size;
ee22c2f7 136extern int rtc_utc;
1f04275e 137extern int cirrus_vga_enabled;
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138extern int graphic_width;
139extern int graphic_height;
140extern int graphic_depth;
3d11d0eb 141extern const char *keyboard_layout;
d993e026 142extern int kqemu_allowed;
a09db21f 143extern int win2k_install_hack;
bb36d470 144extern int usb_enabled;
6a00d601 145extern int smp_cpus;
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146
147/* XXX: make it dynamic */
148#if defined (TARGET_PPC)
d5295253 149#define BIOS_SIZE ((512 + 32) * 1024)
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150#elif defined(TARGET_MIPS)
151#define BIOS_SIZE (128 * 1024)
0ced6589 152#else
7587cf44 153#define BIOS_SIZE ((256 + 64) * 1024)
0ced6589 154#endif
aaaa7df6 155
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156/* keyboard/mouse support */
157
158#define MOUSE_EVENT_LBUTTON 0x01
159#define MOUSE_EVENT_RBUTTON 0x02
160#define MOUSE_EVENT_MBUTTON 0x04
161
162typedef void QEMUPutKBDEvent(void *opaque, int keycode);
163typedef void QEMUPutMouseEvent(void *opaque, int dx, int dy, int dz, int buttons_state);
164
165void qemu_add_kbd_event_handler(QEMUPutKBDEvent *func, void *opaque);
09b26c5e 166void qemu_add_mouse_event_handler(QEMUPutMouseEvent *func, void *opaque, int absolute);
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167
168void kbd_put_keycode(int keycode);
169void kbd_mouse_event(int dx, int dy, int dz, int buttons_state);
09b26c5e 170int kbd_mouse_is_absolute(void);
63066f4f 171
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172/* keysym is a unicode code except for special keys (see QEMU_KEY_xxx
173 constants) */
174#define QEMU_KEY_ESC1(c) ((c) | 0xe100)
175#define QEMU_KEY_BACKSPACE 0x007f
176#define QEMU_KEY_UP QEMU_KEY_ESC1('A')
177#define QEMU_KEY_DOWN QEMU_KEY_ESC1('B')
178#define QEMU_KEY_RIGHT QEMU_KEY_ESC1('C')
179#define QEMU_KEY_LEFT QEMU_KEY_ESC1('D')
180#define QEMU_KEY_HOME QEMU_KEY_ESC1(1)
181#define QEMU_KEY_END QEMU_KEY_ESC1(4)
182#define QEMU_KEY_PAGEUP QEMU_KEY_ESC1(5)
183#define QEMU_KEY_PAGEDOWN QEMU_KEY_ESC1(6)
184#define QEMU_KEY_DELETE QEMU_KEY_ESC1(3)
185
186#define QEMU_KEY_CTRL_UP 0xe400
187#define QEMU_KEY_CTRL_DOWN 0xe401
188#define QEMU_KEY_CTRL_LEFT 0xe402
189#define QEMU_KEY_CTRL_RIGHT 0xe403
190#define QEMU_KEY_CTRL_HOME 0xe404
191#define QEMU_KEY_CTRL_END 0xe405
192#define QEMU_KEY_CTRL_PAGEUP 0xe406
193#define QEMU_KEY_CTRL_PAGEDOWN 0xe407
194
195void kbd_put_keysym(int keysym);
196
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197/* async I/O support */
198
199typedef void IOReadHandler(void *opaque, const uint8_t *buf, int size);
200typedef int IOCanRWHandler(void *opaque);
7c9d8e07 201typedef void IOHandler(void *opaque);
c20709aa 202
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203int qemu_set_fd_handler2(int fd,
204 IOCanRWHandler *fd_read_poll,
205 IOHandler *fd_read,
206 IOHandler *fd_write,
207 void *opaque);
208int qemu_set_fd_handler(int fd,
209 IOHandler *fd_read,
210 IOHandler *fd_write,
211 void *opaque);
c20709aa 212
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213/* Polling handling */
214
215/* return TRUE if no sleep should be done afterwards */
216typedef int PollingFunc(void *opaque);
217
218int qemu_add_polling_cb(PollingFunc *func, void *opaque);
219void qemu_del_polling_cb(PollingFunc *func, void *opaque);
220
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221/* character device */
222
223#define CHR_EVENT_BREAK 0 /* serial break char */
ea2384d3 224#define CHR_EVENT_FOCUS 1 /* focus to this terminal (modal input needed) */
82c643ff 225
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226
227
228#define CHR_IOCTL_SERIAL_SET_PARAMS 1
229typedef struct {
230 int speed;
231 int parity;
232 int data_bits;
233 int stop_bits;
234} QEMUSerialSetParams;
235
236#define CHR_IOCTL_SERIAL_SET_BREAK 2
237
238#define CHR_IOCTL_PP_READ_DATA 3
239#define CHR_IOCTL_PP_WRITE_DATA 4
240#define CHR_IOCTL_PP_READ_CONTROL 5
241#define CHR_IOCTL_PP_WRITE_CONTROL 6
242#define CHR_IOCTL_PP_READ_STATUS 7
243
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244typedef void IOEventHandler(void *opaque, int event);
245
246typedef struct CharDriverState {
247 int (*chr_write)(struct CharDriverState *s, const uint8_t *buf, int len);
248 void (*chr_add_read_handler)(struct CharDriverState *s,
249 IOCanRWHandler *fd_can_read,
250 IOReadHandler *fd_read, void *opaque);
2122c51a 251 int (*chr_ioctl)(struct CharDriverState *s, int cmd, void *arg);
82c643ff 252 IOEventHandler *chr_event;
eb45f5fe 253 void (*chr_send_event)(struct CharDriverState *chr, int event);
f331110f 254 void (*chr_close)(struct CharDriverState *chr);
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255 void *opaque;
256} CharDriverState;
257
258void qemu_chr_printf(CharDriverState *s, const char *fmt, ...);
259int qemu_chr_write(CharDriverState *s, const uint8_t *buf, int len);
ea2384d3 260void qemu_chr_send_event(CharDriverState *s, int event);
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261void qemu_chr_add_read_handler(CharDriverState *s,
262 IOCanRWHandler *fd_can_read,
263 IOReadHandler *fd_read, void *opaque);
264void qemu_chr_add_event_handler(CharDriverState *s, IOEventHandler *chr_event);
2122c51a 265int qemu_chr_ioctl(CharDriverState *s, int cmd, void *arg);
f8d179e3 266
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267/* consoles */
268
269typedef struct DisplayState DisplayState;
270typedef struct TextConsole TextConsole;
271
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272typedef void (*vga_hw_update_ptr)(void *);
273typedef void (*vga_hw_invalidate_ptr)(void *);
274typedef void (*vga_hw_screen_dump_ptr)(void *, const char *);
275
276TextConsole *graphic_console_init(DisplayState *ds, vga_hw_update_ptr update,
277 vga_hw_invalidate_ptr invalidate,
278 vga_hw_screen_dump_ptr screen_dump,
279 void *opaque);
280void vga_hw_update(void);
281void vga_hw_invalidate(void);
282void vga_hw_screen_dump(const char *filename);
283
284int is_graphic_console(void);
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285CharDriverState *text_console_init(DisplayState *ds);
286void console_select(unsigned int index);
287
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288/* serial ports */
289
290#define MAX_SERIAL_PORTS 4
291
292extern CharDriverState *serial_hds[MAX_SERIAL_PORTS];
293
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294/* parallel ports */
295
296#define MAX_PARALLEL_PORTS 3
297
298extern CharDriverState *parallel_hds[MAX_PARALLEL_PORTS];
299
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300/* VLANs support */
301
302typedef struct VLANClientState VLANClientState;
303
304struct VLANClientState {
305 IOReadHandler *fd_read;
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306 /* Packets may still be sent if this returns zero. It's used to
307 rate-limit the slirp code. */
308 IOCanRWHandler *fd_can_read;
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309 void *opaque;
310 struct VLANClientState *next;
311 struct VLANState *vlan;
312 char info_str[256];
313};
314
315typedef struct VLANState {
316 int id;
317 VLANClientState *first_client;
318 struct VLANState *next;
319} VLANState;
320
321VLANState *qemu_find_vlan(int id);
322VLANClientState *qemu_new_vlan_client(VLANState *vlan,
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323 IOReadHandler *fd_read,
324 IOCanRWHandler *fd_can_read,
325 void *opaque);
326int qemu_can_send_packet(VLANClientState *vc);
7c9d8e07 327void qemu_send_packet(VLANClientState *vc, const uint8_t *buf, int size);
d861b05e 328void qemu_handler_true(void *opaque);
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329
330void do_info_network(void);
331
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332/* TAP win32 */
333int tap_win32_init(VLANState *vlan, const char *ifname);
334void tap_win32_poll(void);
335
7c9d8e07 336/* NIC info */
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337
338#define MAX_NICS 8
339
7c9d8e07 340typedef struct NICInfo {
c4b1fcc0 341 uint8_t macaddr[6];
a41b2ff2 342 const char *model;
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343 VLANState *vlan;
344} NICInfo;
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345
346extern int nb_nics;
7c9d8e07 347extern NICInfo nd_table[MAX_NICS];
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348
349/* timers */
350
351typedef struct QEMUClock QEMUClock;
352typedef struct QEMUTimer QEMUTimer;
353typedef void QEMUTimerCB(void *opaque);
354
355/* The real time clock should be used only for stuff which does not
356 change the virtual machine state, as it is run even if the virtual
69b91039 357 machine is stopped. The real time clock has a frequency of 1000
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358 Hz. */
359extern QEMUClock *rt_clock;
360
e80cfcfc 361/* The virtual clock is only run during the emulation. It is stopped
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362 when the virtual machine is stopped. Virtual timers use a high
363 precision clock, usually cpu cycles (use ticks_per_sec). */
364extern QEMUClock *vm_clock;
365
366int64_t qemu_get_clock(QEMUClock *clock);
367
368QEMUTimer *qemu_new_timer(QEMUClock *clock, QEMUTimerCB *cb, void *opaque);
369void qemu_free_timer(QEMUTimer *ts);
370void qemu_del_timer(QEMUTimer *ts);
371void qemu_mod_timer(QEMUTimer *ts, int64_t expire_time);
372int qemu_timer_pending(QEMUTimer *ts);
373
374extern int64_t ticks_per_sec;
375extern int pit_min_timer_count;
376
377void cpu_enable_ticks(void);
378void cpu_disable_ticks(void);
379
380/* VM Load/Save */
381
382typedef FILE QEMUFile;
383
384void qemu_put_buffer(QEMUFile *f, const uint8_t *buf, int size);
385void qemu_put_byte(QEMUFile *f, int v);
386void qemu_put_be16(QEMUFile *f, unsigned int v);
387void qemu_put_be32(QEMUFile *f, unsigned int v);
388void qemu_put_be64(QEMUFile *f, uint64_t v);
389int qemu_get_buffer(QEMUFile *f, uint8_t *buf, int size);
390int qemu_get_byte(QEMUFile *f);
391unsigned int qemu_get_be16(QEMUFile *f);
392unsigned int qemu_get_be32(QEMUFile *f);
393uint64_t qemu_get_be64(QEMUFile *f);
394
395static inline void qemu_put_be64s(QEMUFile *f, const uint64_t *pv)
396{
397 qemu_put_be64(f, *pv);
398}
399
400static inline void qemu_put_be32s(QEMUFile *f, const uint32_t *pv)
401{
402 qemu_put_be32(f, *pv);
403}
404
405static inline void qemu_put_be16s(QEMUFile *f, const uint16_t *pv)
406{
407 qemu_put_be16(f, *pv);
408}
409
410static inline void qemu_put_8s(QEMUFile *f, const uint8_t *pv)
411{
412 qemu_put_byte(f, *pv);
413}
414
415static inline void qemu_get_be64s(QEMUFile *f, uint64_t *pv)
416{
417 *pv = qemu_get_be64(f);
418}
419
420static inline void qemu_get_be32s(QEMUFile *f, uint32_t *pv)
421{
422 *pv = qemu_get_be32(f);
423}
424
425static inline void qemu_get_be16s(QEMUFile *f, uint16_t *pv)
426{
427 *pv = qemu_get_be16(f);
428}
429
430static inline void qemu_get_8s(QEMUFile *f, uint8_t *pv)
431{
432 *pv = qemu_get_byte(f);
433}
434
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435#if TARGET_LONG_BITS == 64
436#define qemu_put_betl qemu_put_be64
437#define qemu_get_betl qemu_get_be64
438#define qemu_put_betls qemu_put_be64s
439#define qemu_get_betls qemu_get_be64s
440#else
441#define qemu_put_betl qemu_put_be32
442#define qemu_get_betl qemu_get_be32
443#define qemu_put_betls qemu_put_be32s
444#define qemu_get_betls qemu_get_be32s
445#endif
446
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447int64_t qemu_ftell(QEMUFile *f);
448int64_t qemu_fseek(QEMUFile *f, int64_t pos, int whence);
449
450typedef void SaveStateHandler(QEMUFile *f, void *opaque);
451typedef int LoadStateHandler(QEMUFile *f, void *opaque, int version_id);
452
453int qemu_loadvm(const char *filename);
454int qemu_savevm(const char *filename);
455int register_savevm(const char *idstr,
456 int instance_id,
457 int version_id,
458 SaveStateHandler *save_state,
459 LoadStateHandler *load_state,
460 void *opaque);
461void qemu_get_timer(QEMUFile *f, QEMUTimer *ts);
462void qemu_put_timer(QEMUFile *f, QEMUTimer *ts);
c4b1fcc0 463
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464void cpu_save(QEMUFile *f, void *opaque);
465int cpu_load(QEMUFile *f, void *opaque, int version_id);
466
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467/* block.c */
468typedef struct BlockDriverState BlockDriverState;
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469typedef struct BlockDriver BlockDriver;
470
471extern BlockDriver bdrv_raw;
472extern BlockDriver bdrv_cow;
473extern BlockDriver bdrv_qcow;
474extern BlockDriver bdrv_vmdk;
3c56521b 475extern BlockDriver bdrv_cloop;
585d0ed9 476extern BlockDriver bdrv_dmg;
a8753c34 477extern BlockDriver bdrv_bochs;
6a0f9e82 478extern BlockDriver bdrv_vpc;
de167e41 479extern BlockDriver bdrv_vvfat;
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480
481void bdrv_init(void);
482BlockDriver *bdrv_find_format(const char *format_name);
483int bdrv_create(BlockDriver *drv,
484 const char *filename, int64_t size_in_sectors,
485 const char *backing_file, int flags);
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486BlockDriverState *bdrv_new(const char *device_name);
487void bdrv_delete(BlockDriverState *bs);
488int bdrv_open(BlockDriverState *bs, const char *filename, int snapshot);
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489int bdrv_open2(BlockDriverState *bs, const char *filename, int snapshot,
490 BlockDriver *drv);
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491void bdrv_close(BlockDriverState *bs);
492int bdrv_read(BlockDriverState *bs, int64_t sector_num,
493 uint8_t *buf, int nb_sectors);
494int bdrv_write(BlockDriverState *bs, int64_t sector_num,
495 const uint8_t *buf, int nb_sectors);
496void bdrv_get_geometry(BlockDriverState *bs, int64_t *nb_sectors_ptr);
33e3963e 497int bdrv_commit(BlockDriverState *bs);
77fef8c1 498void bdrv_set_boot_sector(BlockDriverState *bs, const uint8_t *data, int size);
33e3963e 499
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500#define BDRV_TYPE_HD 0
501#define BDRV_TYPE_CDROM 1
502#define BDRV_TYPE_FLOPPY 2
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503#define BIOS_ATA_TRANSLATION_AUTO 0
504#define BIOS_ATA_TRANSLATION_NONE 1
505#define BIOS_ATA_TRANSLATION_LBA 2
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506
507void bdrv_set_geometry_hint(BlockDriverState *bs,
508 int cyls, int heads, int secs);
509void bdrv_set_type_hint(BlockDriverState *bs, int type);
46d4767d 510void bdrv_set_translation_hint(BlockDriverState *bs, int translation);
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511void bdrv_get_geometry_hint(BlockDriverState *bs,
512 int *pcyls, int *pheads, int *psecs);
513int bdrv_get_type_hint(BlockDriverState *bs);
46d4767d 514int bdrv_get_translation_hint(BlockDriverState *bs);
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515int bdrv_is_removable(BlockDriverState *bs);
516int bdrv_is_read_only(BlockDriverState *bs);
517int bdrv_is_inserted(BlockDriverState *bs);
518int bdrv_is_locked(BlockDriverState *bs);
519void bdrv_set_locked(BlockDriverState *bs, int locked);
520void bdrv_set_change_cb(BlockDriverState *bs,
521 void (*change_cb)(void *opaque), void *opaque);
ea2384d3 522void bdrv_get_format(BlockDriverState *bs, char *buf, int buf_size);
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523void bdrv_info(void);
524BlockDriverState *bdrv_find(const char *name);
82c643ff 525void bdrv_iterate(void (*it)(void *opaque, const char *name), void *opaque);
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526int bdrv_is_encrypted(BlockDriverState *bs);
527int bdrv_set_key(BlockDriverState *bs, const char *key);
528void bdrv_iterate_format(void (*it)(void *opaque, const char *name),
529 void *opaque);
530const char *bdrv_get_device_name(BlockDriverState *bs);
c4b1fcc0 531
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532int qcow_get_cluster_size(BlockDriverState *bs);
533int qcow_compress_cluster(BlockDriverState *bs, int64_t sector_num,
534 const uint8_t *buf);
535
536#ifndef QEMU_TOOL
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537
538typedef void QEMUMachineInitFunc(int ram_size, int vga_ram_size,
539 int boot_device,
540 DisplayState *ds, const char **fd_filename, int snapshot,
541 const char *kernel_filename, const char *kernel_cmdline,
542 const char *initrd_filename);
543
544typedef struct QEMUMachine {
545 const char *name;
546 const char *desc;
547 QEMUMachineInitFunc *init;
548 struct QEMUMachine *next;
549} QEMUMachine;
550
551int qemu_register_machine(QEMUMachine *m);
552
553typedef void SetIRQFunc(void *opaque, int irq_num, int level);
3de388f6 554typedef void IRQRequestFunc(void *opaque, int level);
54fa5af5 555
26aa7d72
FB
556/* ISA bus */
557
558extern target_phys_addr_t isa_mem_base;
559
560typedef void (IOPortWriteFunc)(void *opaque, uint32_t address, uint32_t data);
561typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address);
562
563int register_ioport_read(int start, int length, int size,
564 IOPortReadFunc *func, void *opaque);
565int register_ioport_write(int start, int length, int size,
566 IOPortWriteFunc *func, void *opaque);
69b91039
FB
567void isa_unassign_ioport(int start, int length);
568
569/* PCI bus */
570
69b91039
FB
571extern target_phys_addr_t pci_mem_base;
572
46e50e9d 573typedef struct PCIBus PCIBus;
69b91039
FB
574typedef struct PCIDevice PCIDevice;
575
576typedef void PCIConfigWriteFunc(PCIDevice *pci_dev,
577 uint32_t address, uint32_t data, int len);
578typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev,
579 uint32_t address, int len);
580typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num,
581 uint32_t addr, uint32_t size, int type);
582
583#define PCI_ADDRESS_SPACE_MEM 0x00
584#define PCI_ADDRESS_SPACE_IO 0x01
585#define PCI_ADDRESS_SPACE_MEM_PREFETCH 0x08
586
587typedef struct PCIIORegion {
5768f5ac 588 uint32_t addr; /* current PCI mapping address. -1 means not mapped */
69b91039
FB
589 uint32_t size;
590 uint8_t type;
591 PCIMapIORegionFunc *map_func;
592} PCIIORegion;
593
8a8696a3
FB
594#define PCI_ROM_SLOT 6
595#define PCI_NUM_REGIONS 7
502a5395
PB
596
597#define PCI_DEVICES_MAX 64
598
599#define PCI_VENDOR_ID 0x00 /* 16 bits */
600#define PCI_DEVICE_ID 0x02 /* 16 bits */
601#define PCI_COMMAND 0x04 /* 16 bits */
602#define PCI_COMMAND_IO 0x1 /* Enable response in I/O space */
603#define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */
604#define PCI_CLASS_DEVICE 0x0a /* Device class */
605#define PCI_INTERRUPT_LINE 0x3c /* 8 bits */
606#define PCI_INTERRUPT_PIN 0x3d /* 8 bits */
607#define PCI_MIN_GNT 0x3e /* 8 bits */
608#define PCI_MAX_LAT 0x3f /* 8 bits */
609
69b91039
FB
610struct PCIDevice {
611 /* PCI config space */
612 uint8_t config[256];
613
614 /* the following fields are read only */
46e50e9d 615 PCIBus *bus;
69b91039
FB
616 int devfn;
617 char name[64];
8a8696a3 618 PCIIORegion io_regions[PCI_NUM_REGIONS];
69b91039
FB
619
620 /* do not access the following fields */
621 PCIConfigReadFunc *config_read;
622 PCIConfigWriteFunc *config_write;
502a5395 623 /* ??? This is a PC-specific hack, and should be removed. */
5768f5ac 624 int irq_index;
69b91039
FB
625};
626
46e50e9d
FB
627PCIDevice *pci_register_device(PCIBus *bus, const char *name,
628 int instance_size, int devfn,
69b91039
FB
629 PCIConfigReadFunc *config_read,
630 PCIConfigWriteFunc *config_write);
631
632void pci_register_io_region(PCIDevice *pci_dev, int region_num,
633 uint32_t size, int type,
634 PCIMapIORegionFunc *map_func);
635
5768f5ac
FB
636void pci_set_irq(PCIDevice *pci_dev, int irq_num, int level);
637
638uint32_t pci_default_read_config(PCIDevice *d,
639 uint32_t address, int len);
640void pci_default_write_config(PCIDevice *d,
641 uint32_t address, uint32_t val, int len);
30ca2aab
FB
642void generic_pci_save(QEMUFile* f, void *opaque);
643int generic_pci_load(QEMUFile* f, void *opaque, int version_id);
5768f5ac 644
502a5395
PB
645typedef void (*pci_set_irq_fn)(PCIDevice *pci_dev, void *pic,
646 int irq_num, int level);
647PCIBus *pci_register_bus(pci_set_irq_fn set_irq, void *pic, int devfn_min);
648
649void pci_nic_init(PCIBus *bus, NICInfo *nd);
650void pci_data_write(void *opaque, uint32_t addr, uint32_t val, int len);
651uint32_t pci_data_read(void *opaque, uint32_t addr, int len);
652int pci_bus_num(PCIBus *s);
653void pci_for_each_device(void (*fn)(PCIDevice *d));
9995c51f 654
5768f5ac 655void pci_info(void);
26aa7d72 656
502a5395 657/* prep_pci.c */
46e50e9d 658PCIBus *pci_prep_init(void);
77d4bc34 659
502a5395
PB
660/* grackle_pci.c */
661PCIBus *pci_grackle_init(uint32_t base, void *pic);
662
663/* unin_pci.c */
664PCIBus *pci_pmac_init(void *pic);
665
666/* apb_pci.c */
667PCIBus *pci_apb_init(target_ulong special_base, target_ulong mem_base,
668 void *pic);
669
670PCIBus *pci_vpb_init(void *pic);
671
672/* piix_pci.c */
673PCIBus *i440fx_init(void);
674int piix3_init(PCIBus *bus);
675void pci_bios_init(void);
a41b2ff2 676
28b9b5af
FB
677/* openpic.c */
678typedef struct openpic_t openpic_t;
54fa5af5 679void openpic_set_irq(void *opaque, int n_IRQ, int level);
7668a27f
FB
680openpic_t *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus,
681 CPUState **envp);
28b9b5af 682
54fa5af5
FB
683/* heathrow_pic.c */
684typedef struct HeathrowPICS HeathrowPICS;
685void heathrow_pic_set_irq(void *opaque, int num, int level);
686HeathrowPICS *heathrow_pic_init(int *pmem_index);
687
6a36d84e
FB
688#ifdef HAS_AUDIO
689struct soundhw {
690 const char *name;
691 const char *descr;
692 int enabled;
693 int isa;
694 union {
695 int (*init_isa) (AudioState *s);
696 int (*init_pci) (PCIBus *bus, AudioState *s);
697 } init;
698};
699
700extern struct soundhw soundhw[];
701#endif
702
313aa567
FB
703/* vga.c */
704
4fa0f5d2 705#define VGA_RAM_SIZE (4096 * 1024)
313aa567 706
82c643ff 707struct DisplayState {
313aa567
FB
708 uint8_t *data;
709 int linesize;
710 int depth;
d3079cd2 711 int bgr; /* BGR color order instead of RGB. Only valid for depth == 32 */
82c643ff
FB
712 int width;
713 int height;
24236869
FB
714 void *opaque;
715
313aa567
FB
716 void (*dpy_update)(struct DisplayState *s, int x, int y, int w, int h);
717 void (*dpy_resize)(struct DisplayState *s, int w, int h);
718 void (*dpy_refresh)(struct DisplayState *s);
24236869 719 void (*dpy_copy)(struct DisplayState *s, int src_x, int src_y, int dst_x, int dst_y, int w, int h);
82c643ff 720};
313aa567
FB
721
722static inline void dpy_update(DisplayState *s, int x, int y, int w, int h)
723{
724 s->dpy_update(s, x, y, w, h);
725}
726
727static inline void dpy_resize(DisplayState *s, int w, int h)
728{
729 s->dpy_resize(s, w, h);
730}
731
46e50e9d 732int vga_initialize(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
d5295253
FB
733 unsigned long vga_ram_offset, int vga_ram_size,
734 unsigned long vga_bios_offset, int vga_bios_size);
313aa567 735
d6bfa22f 736/* cirrus_vga.c */
46e50e9d 737void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
d6bfa22f 738 unsigned long vga_ram_offset, int vga_ram_size);
d6bfa22f
FB
739void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
740 unsigned long vga_ram_offset, int vga_ram_size);
741
313aa567 742/* sdl.c */
d63d307f 743void sdl_display_init(DisplayState *ds, int full_screen);
313aa567 744
da4dbf74
FB
745/* cocoa.m */
746void cocoa_display_init(DisplayState *ds, int full_screen);
747
24236869
FB
748/* vnc.c */
749void vnc_display_init(DisplayState *ds, int display);
750
5391d806
FB
751/* ide.c */
752#define MAX_DISKS 4
753
754extern BlockDriverState *bs_table[MAX_DISKS];
755
69b91039
FB
756void isa_ide_init(int iobase, int iobase2, int irq,
757 BlockDriverState *hd0, BlockDriverState *hd1);
54fa5af5
FB
758void pci_cmd646_ide_init(PCIBus *bus, BlockDriverState **hd_table,
759 int secondary_ide_enabled);
502a5395 760void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn);
28b9b5af 761int pmac_ide_init (BlockDriverState **hd_table,
54fa5af5 762 SetIRQFunc *set_irq, void *irq_opaque, int irq);
5391d806 763
2e5d83bb
PB
764/* cdrom.c */
765int cdrom_read_toc(int nb_sectors, uint8_t *buf, int msf, int start_track);
766int cdrom_read_toc_raw(int nb_sectors, uint8_t *buf, int msf, int session_num);
767
1d14ffa9 768/* es1370.c */
c0fe3827 769int es1370_init (PCIBus *bus, AudioState *s);
1d14ffa9 770
fb065187 771/* sb16.c */
c0fe3827 772int SB16_init (AudioState *s);
fb065187
FB
773
774/* adlib.c */
c0fe3827 775int Adlib_init (AudioState *s);
fb065187
FB
776
777/* gus.c */
c0fe3827 778int GUS_init (AudioState *s);
27503323
FB
779
780/* dma.c */
85571bc7 781typedef int (*DMA_transfer_handler) (void *opaque, int nchan, int pos, int size);
27503323 782int DMA_get_channel_mode (int nchan);
85571bc7
FB
783int DMA_read_memory (int nchan, void *buf, int pos, int size);
784int DMA_write_memory (int nchan, void *buf, int pos, int size);
27503323
FB
785void DMA_hold_DREQ (int nchan);
786void DMA_release_DREQ (int nchan);
16f62432 787void DMA_schedule(int nchan);
27503323 788void DMA_run (void);
28b9b5af 789void DMA_init (int high_page_enable);
27503323 790void DMA_register_channel (int nchan,
85571bc7
FB
791 DMA_transfer_handler transfer_handler,
792 void *opaque);
7138fcfb
FB
793/* fdc.c */
794#define MAX_FD 2
795extern BlockDriverState *fd_table[MAX_FD];
796
baca51fa
FB
797typedef struct fdctrl_t fdctrl_t;
798
799fdctrl_t *fdctrl_init (int irq_lvl, int dma_chann, int mem_mapped,
800 uint32_t io_base,
801 BlockDriverState **fds);
802int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num);
7138fcfb 803
80cabfad
FB
804/* ne2000.c */
805
7c9d8e07
FB
806void isa_ne2000_init(int base, int irq, NICInfo *nd);
807void pci_ne2000_init(PCIBus *bus, NICInfo *nd);
80cabfad 808
a41b2ff2
PB
809/* rtl8139.c */
810
811void pci_rtl8139_init(PCIBus *bus, NICInfo *nd);
812
80cabfad
FB
813/* pckbd.c */
814
80cabfad
FB
815void kbd_init(void);
816
817/* mc146818rtc.c */
818
8a7ddc38 819typedef struct RTCState RTCState;
80cabfad 820
8a7ddc38
FB
821RTCState *rtc_init(int base, int irq);
822void rtc_set_memory(RTCState *s, int addr, int val);
823void rtc_set_date(RTCState *s, const struct tm *tm);
80cabfad
FB
824
825/* serial.c */
826
c4b1fcc0 827typedef struct SerialState SerialState;
e5d13e2f
FB
828SerialState *serial_init(SetIRQFunc *set_irq, void *opaque,
829 int base, int irq, CharDriverState *chr);
830SerialState *serial_mm_init (SetIRQFunc *set_irq, void *opaque,
831 target_ulong base, int it_shift,
832 int irq, CharDriverState *chr);
80cabfad 833
6508fe59
FB
834/* parallel.c */
835
836typedef struct ParallelState ParallelState;
837ParallelState *parallel_init(int base, int irq, CharDriverState *chr);
838
80cabfad
FB
839/* i8259.c */
840
3de388f6
FB
841typedef struct PicState2 PicState2;
842extern PicState2 *isa_pic;
80cabfad 843void pic_set_irq(int irq, int level);
54fa5af5 844void pic_set_irq_new(void *opaque, int irq, int level);
3de388f6 845PicState2 *pic_init(IRQRequestFunc *irq_request, void *irq_request_opaque);
d592d303
FB
846void pic_set_alt_irq_func(PicState2 *s, SetIRQFunc *alt_irq_func,
847 void *alt_irq_opaque);
3de388f6
FB
848int pic_read_irq(PicState2 *s);
849void pic_update_irq(PicState2 *s);
850uint32_t pic_intack_read(PicState2 *s);
c20709aa 851void pic_info(void);
4a0fb71e 852void irq_info(void);
80cabfad 853
c27004ec 854/* APIC */
d592d303
FB
855typedef struct IOAPICState IOAPICState;
856
c27004ec
FB
857int apic_init(CPUState *env);
858int apic_get_interrupt(CPUState *env);
d592d303
FB
859IOAPICState *ioapic_init(void);
860void ioapic_set_irq(void *opaque, int vector, int level);
c27004ec 861
80cabfad
FB
862/* i8254.c */
863
864#define PIT_FREQ 1193182
865
ec844b96
FB
866typedef struct PITState PITState;
867
868PITState *pit_init(int base, int irq);
869void pit_set_gate(PITState *pit, int channel, int val);
870int pit_get_gate(PITState *pit, int channel);
fd06c375
FB
871int pit_get_initial_count(PITState *pit, int channel);
872int pit_get_mode(PITState *pit, int channel);
ec844b96 873int pit_get_out(PITState *pit, int channel, int64_t current_time);
80cabfad 874
fd06c375
FB
875/* pcspk.c */
876void pcspk_init(PITState *);
877int pcspk_audio_init(AudioState *);
878
6515b203
FB
879/* acpi.c */
880extern int acpi_enabled;
502a5395 881void piix4_pm_init(PCIBus *bus, int devfn);
6515b203
FB
882void acpi_bios_init(void);
883
80cabfad 884/* pc.c */
54fa5af5 885extern QEMUMachine pc_machine;
3dbbdc25 886extern QEMUMachine isapc_machine;
80cabfad 887
6a00d601
FB
888void ioport_set_a20(int enable);
889int ioport_get_a20(void);
890
26aa7d72 891/* ppc.c */
54fa5af5
FB
892extern QEMUMachine prep_machine;
893extern QEMUMachine core99_machine;
894extern QEMUMachine heathrow_machine;
895
6af0bf9c
FB
896/* mips_r4k.c */
897extern QEMUMachine mips_machine;
898
27c7ca7e
FB
899/* shix.c */
900extern QEMUMachine shix_machine;
901
8cc43fef
FB
902#ifdef TARGET_PPC
903ppc_tb_t *cpu_ppc_tb_init (CPUState *env, uint32_t freq);
904#endif
64201201 905void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val);
77d4bc34
FB
906
907extern CPUWriteMemoryFunc *PPC_io_write[];
908extern CPUReadMemoryFunc *PPC_io_read[];
54fa5af5 909void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val);
26aa7d72 910
e95c8d51 911/* sun4m.c */
54fa5af5 912extern QEMUMachine sun4m_machine;
e80cfcfc 913uint32_t iommu_translate(uint32_t addr);
ba3c64fb 914void pic_set_irq_cpu(int irq, int level, unsigned int cpu);
e95c8d51
FB
915
916/* iommu.c */
e80cfcfc
FB
917void *iommu_init(uint32_t addr);
918uint32_t iommu_translate_local(void *opaque, uint32_t addr);
e95c8d51
FB
919
920/* lance.c */
7c9d8e07 921void lance_init(NICInfo *nd, int irq, uint32_t leaddr, uint32_t ledaddr);
e95c8d51
FB
922
923/* tcx.c */
95219897 924void tcx_init(DisplayState *ds, uint32_t addr, uint8_t *vram_base,
6f7e9aec 925 unsigned long vram_offset, int vram_size, int width, int height);
e80cfcfc
FB
926
927/* slavio_intctl.c */
928void *slavio_intctl_init();
ba3c64fb 929void slavio_intctl_set_cpu(void *opaque, unsigned int cpu, CPUState *env);
e80cfcfc
FB
930void slavio_pic_info(void *opaque);
931void slavio_irq_info(void *opaque);
932void slavio_pic_set_irq(void *opaque, int irq, int level);
ba3c64fb 933void slavio_pic_set_irq_cpu(void *opaque, int irq, int level, unsigned int cpu);
e95c8d51 934
5fe141fd
FB
935/* loader.c */
936int get_image_size(const char *filename);
937int load_image(const char *filename, uint8_t *addr);
9ee3c029 938int load_elf(const char *filename, int64_t virt_to_phys_addend, uint64_t *pentry);
e80cfcfc
FB
939int load_aout(const char *filename, uint8_t *addr);
940
941/* slavio_timer.c */
ba3c64fb 942void slavio_timer_init(uint32_t addr, int irq, int mode, unsigned int cpu);
8d5f07fa 943
e80cfcfc
FB
944/* slavio_serial.c */
945SerialState *slavio_serial_init(int base, int irq, CharDriverState *chr1, CharDriverState *chr2);
946void slavio_serial_ms_kbd_init(int base, int irq);
e95c8d51 947
3475187d
FB
948/* slavio_misc.c */
949void *slavio_misc_init(uint32_t base, int irq);
950void slavio_set_power_fail(void *opaque, int power_failing);
951
6f7e9aec
FB
952/* esp.c */
953void esp_init(BlockDriverState **bd, int irq, uint32_t espaddr, uint32_t espdaddr);
954
3475187d
FB
955/* sun4u.c */
956extern QEMUMachine sun4u_machine;
957
64201201
FB
958/* NVRAM helpers */
959#include "hw/m48t59.h"
960
961void NVRAM_set_byte (m48t59_t *nvram, uint32_t addr, uint8_t value);
962uint8_t NVRAM_get_byte (m48t59_t *nvram, uint32_t addr);
963void NVRAM_set_word (m48t59_t *nvram, uint32_t addr, uint16_t value);
964uint16_t NVRAM_get_word (m48t59_t *nvram, uint32_t addr);
965void NVRAM_set_lword (m48t59_t *nvram, uint32_t addr, uint32_t value);
966uint32_t NVRAM_get_lword (m48t59_t *nvram, uint32_t addr);
967void NVRAM_set_string (m48t59_t *nvram, uint32_t addr,
968 const unsigned char *str, uint32_t max);
969int NVRAM_get_string (m48t59_t *nvram, uint8_t *dst, uint16_t addr, int max);
970void NVRAM_set_crc (m48t59_t *nvram, uint32_t addr,
971 uint32_t start, uint32_t count);
972int PPC_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size,
973 const unsigned char *arch,
974 uint32_t RAM_size, int boot_device,
975 uint32_t kernel_image, uint32_t kernel_size,
28b9b5af 976 const char *cmdline,
64201201 977 uint32_t initrd_image, uint32_t initrd_size,
28b9b5af
FB
978 uint32_t NVRAM_image,
979 int width, int height, int depth);
64201201 980
63066f4f
FB
981/* adb.c */
982
983#define MAX_ADB_DEVICES 16
984
e2733d20 985#define ADB_MAX_OUT_LEN 16
63066f4f 986
e2733d20 987typedef struct ADBDevice ADBDevice;
63066f4f 988
e2733d20
FB
989/* buf = NULL means polling */
990typedef int ADBDeviceRequest(ADBDevice *d, uint8_t *buf_out,
991 const uint8_t *buf, int len);
12c28fed
FB
992typedef int ADBDeviceReset(ADBDevice *d);
993
63066f4f
FB
994struct ADBDevice {
995 struct ADBBusState *bus;
996 int devaddr;
997 int handler;
e2733d20 998 ADBDeviceRequest *devreq;
12c28fed 999 ADBDeviceReset *devreset;
63066f4f
FB
1000 void *opaque;
1001};
1002
1003typedef struct ADBBusState {
1004 ADBDevice devices[MAX_ADB_DEVICES];
1005 int nb_devices;
e2733d20 1006 int poll_index;
63066f4f
FB
1007} ADBBusState;
1008
e2733d20
FB
1009int adb_request(ADBBusState *s, uint8_t *buf_out,
1010 const uint8_t *buf, int len);
1011int adb_poll(ADBBusState *s, uint8_t *buf_out);
63066f4f
FB
1012
1013ADBDevice *adb_register_device(ADBBusState *s, int devaddr,
e2733d20 1014 ADBDeviceRequest *devreq,
12c28fed 1015 ADBDeviceReset *devreset,
63066f4f
FB
1016 void *opaque);
1017void adb_kbd_init(ADBBusState *bus);
1018void adb_mouse_init(ADBBusState *bus);
1019
1020/* cuda.c */
1021
1022extern ADBBusState adb_bus;
54fa5af5 1023int cuda_init(SetIRQFunc *set_irq, void *irq_opaque, int irq);
63066f4f 1024
bb36d470
FB
1025#include "hw/usb.h"
1026
a594cfbf
FB
1027/* usb ports of the VM */
1028
0d92ed30
PB
1029void qemu_register_usb_port(USBPort *port, void *opaque, int index,
1030 usb_attachfn attach);
a594cfbf 1031
0d92ed30 1032#define VM_USB_HUB_SIZE 8
a594cfbf
FB
1033
1034void do_usb_add(const char *devname);
1035void do_usb_del(const char *devname);
1036void usb_info(void);
1037
2e5d83bb
PB
1038/* scsi-disk.c */
1039typedef struct SCSIDevice SCSIDevice;
1040typedef void (*scsi_completionfn)(void *, uint32_t, int);
1041
1042SCSIDevice *scsi_disk_init(BlockDriverState *bdrv,
1043 scsi_completionfn completion,
1044 void *opaque);
1045void scsi_disk_destroy(SCSIDevice *s);
1046
1047int32_t scsi_send_command(SCSIDevice *s, uint32_t tag, uint8_t *buf);
1048int scsi_read_data(SCSIDevice *s, uint8_t *data, uint32_t len);
1049int scsi_write_data(SCSIDevice *s, uint8_t *data, uint32_t len);
1050
b5ff1b31 1051/* integratorcp.c */
40f137e1
PB
1052extern QEMUMachine integratorcp926_machine;
1053extern QEMUMachine integratorcp1026_machine;
b5ff1b31 1054
cdbdb648
PB
1055/* versatilepb.c */
1056extern QEMUMachine versatilepb_machine;
16406950 1057extern QEMUMachine versatileab_machine;
cdbdb648 1058
daa57963
FB
1059/* ps2.c */
1060void *ps2_kbd_init(void (*update_irq)(void *, int), void *update_arg);
1061void *ps2_mouse_init(void (*update_irq)(void *, int), void *update_arg);
1062void ps2_write_mouse(void *, int val);
1063void ps2_write_keyboard(void *, int val);
1064uint32_t ps2_read_data(void *);
1065void ps2_queue(void *, int b);
f94f5d71 1066void ps2_keyboard_set_translation(void *opaque, int mode);
daa57963 1067
80337b66
FB
1068/* smc91c111.c */
1069void smc91c111_init(NICInfo *, uint32_t, void *, int);
1070
bdd5003a 1071/* pl110.c */
95219897 1072void *pl110_init(DisplayState *ds, uint32_t base, void *pic, int irq, int);
bdd5003a 1073
cdbdb648
PB
1074/* pl011.c */
1075void pl011_init(uint32_t base, void *pic, int irq, CharDriverState *chr);
1076
1077/* pl050.c */
1078void pl050_init(uint32_t base, void *pic, int irq, int is_mouse);
1079
1080/* pl080.c */
1081void *pl080_init(uint32_t base, void *pic, int irq);
1082
1083/* pl190.c */
1084void *pl190_init(uint32_t base, void *parent, int irq, int fiq);
1085
1086/* arm-timer.c */
1087void sp804_init(uint32_t base, void *pic, int irq);
1088void icp_pit_init(uint32_t base, void *pic, int irq);
1089
16406950
PB
1090/* arm_boot.c */
1091
1092void arm_load_kernel(int ram_size, const char *kernel_filename,
1093 const char *kernel_cmdline, const char *initrd_filename,
1094 int board_id);
1095
27c7ca7e
FB
1096/* sh7750.c */
1097struct SH7750State;
1098
008a8818 1099struct SH7750State *sh7750_init(CPUState * cpu);
27c7ca7e
FB
1100
1101typedef struct {
1102 /* The callback will be triggered if any of the designated lines change */
1103 uint16_t portamask_trigger;
1104 uint16_t portbmask_trigger;
1105 /* Return 0 if no action was taken */
1106 int (*port_change_cb) (uint16_t porta, uint16_t portb,
1107 uint16_t * periph_pdtra,
1108 uint16_t * periph_portdira,
1109 uint16_t * periph_pdtrb,
1110 uint16_t * periph_portdirb);
1111} sh7750_io_device;
1112
1113int sh7750_register_io_device(struct SH7750State *s,
1114 sh7750_io_device * device);
1115/* tc58128.c */
1116int tc58128_init(struct SH7750State *s, char *zone1, char *zone2);
1117
ea2384d3
FB
1118#endif /* defined(QEMU_TOOL) */
1119
c4b1fcc0 1120/* monitor.c */
82c643ff 1121void monitor_init(CharDriverState *hd, int show_banner);
ea2384d3
FB
1122void term_puts(const char *str);
1123void term_vprintf(const char *fmt, va_list ap);
40c3bac3 1124void term_printf(const char *fmt, ...) __attribute__ ((__format__ (__printf__, 1, 2)));
c4b1fcc0
FB
1125void term_flush(void);
1126void term_print_help(void);
ea2384d3
FB
1127void monitor_readline(const char *prompt, int is_password,
1128 char *buf, int buf_size);
1129
1130/* readline.c */
1131typedef void ReadLineFunc(void *opaque, const char *str);
1132
1133extern int completion_index;
1134void add_completion(const char *str);
1135void readline_handle_byte(int ch);
1136void readline_find_completion(const char *cmdline);
1137const char *readline_get_history(unsigned int index);
1138void readline_start(const char *prompt, int is_password,
1139 ReadLineFunc *readline_func, void *opaque);
c4b1fcc0 1140
5e6ad6f9
FB
1141void kqemu_record_dump(void);
1142
fc01f7e7 1143#endif /* VL_H */