]> git.proxmox.com Git - qemu.git/blame - vl.h
fix crash when closing windows (Frediano Ziglio)
[qemu.git] / vl.h
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fc01f7e7
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1/*
2 * QEMU System Emulator header
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24#ifndef VL_H
25#define VL_H
26
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27/* we put basic includes here to avoid repeating them in device drivers */
28#include <stdlib.h>
29#include <stdio.h>
30#include <stdarg.h>
31#include <string.h>
32#include <inttypes.h>
85571bc7 33#include <limits.h>
8a7ddc38 34#include <time.h>
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35#include <ctype.h>
36#include <errno.h>
37#include <unistd.h>
38#include <fcntl.h>
7d3505c5 39#include <sys/stat.h>
fb065187 40#include "audio/audio.h"
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41
42#ifndef O_LARGEFILE
43#define O_LARGEFILE 0
44#endif
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45#ifndef O_BINARY
46#define O_BINARY 0
47#endif
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48
49#ifdef _WIN32
a18e524a 50#include <windows.h>
ac62f715 51#define fsync _commit
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52#define lseek _lseeki64
53#define ENOTSUP 4096
54/* XXX: find 64 bit version */
55#define ftruncate chsize
56
57static inline char *realpath(const char *path, char *resolved_path)
58{
59 _fullpath(resolved_path, path, _MAX_PATH);
60 return resolved_path;
61}
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62
63#define PRId64 "I64d"
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64#define PRIx64 "I64x"
65#define PRIu64 "I64u"
66#define PRIo64 "I64o"
67b915a5 67#endif
8a7ddc38 68
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69#ifdef QEMU_TOOL
70
71/* we use QEMU_TOOL in the command line tools which do not depend on
72 the target CPU type */
73#include "config-host.h"
74#include <setjmp.h>
75#include "osdep.h"
76#include "bswap.h"
77
78#else
79
16f62432 80#include "cpu.h"
1fddef4b 81#include "gdbstub.h"
16f62432 82
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83#endif /* !defined(QEMU_TOOL) */
84
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85#ifndef glue
86#define xglue(x, y) x ## y
87#define glue(x, y) xglue(x, y)
88#define stringify(s) tostring(s)
89#define tostring(s) #s
90#endif
91
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92#ifndef MIN
93#define MIN(a, b) (((a) < (b)) ? (a) : (b))
94#endif
95#ifndef MAX
96#define MAX(a, b) (((a) > (b)) ? (a) : (b))
97#endif
98
33e3963e 99/* vl.c */
80cabfad 100uint64_t muldiv64(uint64_t a, uint32_t b, uint32_t c);
313aa567 101
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102void hw_error(const char *fmt, ...);
103
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104extern const char *bios_dir;
105
106void pstrcpy(char *buf, int buf_size, const char *str);
107char *pstrcat(char *buf, int buf_size, const char *s);
82c643ff 108int strstart(const char *str, const char *val, const char **ptr);
c4b1fcc0 109
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110extern int vm_running;
111
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112typedef struct vm_change_state_entry VMChangeStateEntry;
113typedef void VMChangeStateHandler(void *opaque, int running);
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114typedef void VMStopHandler(void *opaque, int reason);
115
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116VMChangeStateEntry *qemu_add_vm_change_state_handler(VMChangeStateHandler *cb,
117 void *opaque);
118void qemu_del_vm_change_state_handler(VMChangeStateEntry *e);
119
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120int qemu_add_vm_stop_handler(VMStopHandler *cb, void *opaque);
121void qemu_del_vm_stop_handler(VMStopHandler *cb, void *opaque);
122
123void vm_start(void);
124void vm_stop(int reason);
125
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126typedef void QEMUResetHandler(void *opaque);
127
128void qemu_register_reset(QEMUResetHandler *func, void *opaque);
129void qemu_system_reset_request(void);
130void qemu_system_shutdown_request(void);
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131void qemu_system_powerdown_request(void);
132#if !defined(TARGET_SPARC)
133// Please implement a power failure function to signal the OS
134#define qemu_system_powerdown() do{}while(0)
135#else
136void qemu_system_powerdown(void);
137#endif
bb0c6722 138
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139void main_loop_wait(int timeout);
140
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141extern int ram_size;
142extern int bios_size;
ee22c2f7 143extern int rtc_utc;
1f04275e 144extern int cirrus_vga_enabled;
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145extern int graphic_width;
146extern int graphic_height;
147extern int graphic_depth;
3d11d0eb 148extern const char *keyboard_layout;
d993e026 149extern int kqemu_allowed;
a09db21f 150extern int win2k_install_hack;
bb36d470 151extern int usb_enabled;
6a00d601 152extern int smp_cpus;
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153
154/* XXX: make it dynamic */
75956cf0 155#if defined (TARGET_PPC) || defined (TARGET_SPARC64)
d5295253 156#define BIOS_SIZE ((512 + 32) * 1024)
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157#elif defined(TARGET_MIPS)
158#define BIOS_SIZE (128 * 1024)
0ced6589 159#else
7587cf44 160#define BIOS_SIZE ((256 + 64) * 1024)
0ced6589 161#endif
aaaa7df6 162
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163/* keyboard/mouse support */
164
165#define MOUSE_EVENT_LBUTTON 0x01
166#define MOUSE_EVENT_RBUTTON 0x02
167#define MOUSE_EVENT_MBUTTON 0x04
168
169typedef void QEMUPutKBDEvent(void *opaque, int keycode);
170typedef void QEMUPutMouseEvent(void *opaque, int dx, int dy, int dz, int buttons_state);
171
172void qemu_add_kbd_event_handler(QEMUPutKBDEvent *func, void *opaque);
09b26c5e 173void qemu_add_mouse_event_handler(QEMUPutMouseEvent *func, void *opaque, int absolute);
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174
175void kbd_put_keycode(int keycode);
176void kbd_mouse_event(int dx, int dy, int dz, int buttons_state);
09b26c5e 177int kbd_mouse_is_absolute(void);
63066f4f 178
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179/* keysym is a unicode code except for special keys (see QEMU_KEY_xxx
180 constants) */
181#define QEMU_KEY_ESC1(c) ((c) | 0xe100)
182#define QEMU_KEY_BACKSPACE 0x007f
183#define QEMU_KEY_UP QEMU_KEY_ESC1('A')
184#define QEMU_KEY_DOWN QEMU_KEY_ESC1('B')
185#define QEMU_KEY_RIGHT QEMU_KEY_ESC1('C')
186#define QEMU_KEY_LEFT QEMU_KEY_ESC1('D')
187#define QEMU_KEY_HOME QEMU_KEY_ESC1(1)
188#define QEMU_KEY_END QEMU_KEY_ESC1(4)
189#define QEMU_KEY_PAGEUP QEMU_KEY_ESC1(5)
190#define QEMU_KEY_PAGEDOWN QEMU_KEY_ESC1(6)
191#define QEMU_KEY_DELETE QEMU_KEY_ESC1(3)
192
193#define QEMU_KEY_CTRL_UP 0xe400
194#define QEMU_KEY_CTRL_DOWN 0xe401
195#define QEMU_KEY_CTRL_LEFT 0xe402
196#define QEMU_KEY_CTRL_RIGHT 0xe403
197#define QEMU_KEY_CTRL_HOME 0xe404
198#define QEMU_KEY_CTRL_END 0xe405
199#define QEMU_KEY_CTRL_PAGEUP 0xe406
200#define QEMU_KEY_CTRL_PAGEDOWN 0xe407
201
202void kbd_put_keysym(int keysym);
203
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204/* async I/O support */
205
206typedef void IOReadHandler(void *opaque, const uint8_t *buf, int size);
207typedef int IOCanRWHandler(void *opaque);
7c9d8e07 208typedef void IOHandler(void *opaque);
c20709aa 209
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210int qemu_set_fd_handler2(int fd,
211 IOCanRWHandler *fd_read_poll,
212 IOHandler *fd_read,
213 IOHandler *fd_write,
214 void *opaque);
215int qemu_set_fd_handler(int fd,
216 IOHandler *fd_read,
217 IOHandler *fd_write,
218 void *opaque);
c20709aa 219
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220/* Polling handling */
221
222/* return TRUE if no sleep should be done afterwards */
223typedef int PollingFunc(void *opaque);
224
225int qemu_add_polling_cb(PollingFunc *func, void *opaque);
226void qemu_del_polling_cb(PollingFunc *func, void *opaque);
227
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228#ifdef _WIN32
229/* Wait objects handling */
230typedef void WaitObjectFunc(void *opaque);
231
232int qemu_add_wait_object(HANDLE handle, WaitObjectFunc *func, void *opaque);
233void qemu_del_wait_object(HANDLE handle, WaitObjectFunc *func, void *opaque);
234#endif
235
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236/* character device */
237
238#define CHR_EVENT_BREAK 0 /* serial break char */
ea2384d3 239#define CHR_EVENT_FOCUS 1 /* focus to this terminal (modal input needed) */
82c643ff 240
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241
242
243#define CHR_IOCTL_SERIAL_SET_PARAMS 1
244typedef struct {
245 int speed;
246 int parity;
247 int data_bits;
248 int stop_bits;
249} QEMUSerialSetParams;
250
251#define CHR_IOCTL_SERIAL_SET_BREAK 2
252
253#define CHR_IOCTL_PP_READ_DATA 3
254#define CHR_IOCTL_PP_WRITE_DATA 4
255#define CHR_IOCTL_PP_READ_CONTROL 5
256#define CHR_IOCTL_PP_WRITE_CONTROL 6
257#define CHR_IOCTL_PP_READ_STATUS 7
258
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259typedef void IOEventHandler(void *opaque, int event);
260
261typedef struct CharDriverState {
262 int (*chr_write)(struct CharDriverState *s, const uint8_t *buf, int len);
263 void (*chr_add_read_handler)(struct CharDriverState *s,
264 IOCanRWHandler *fd_can_read,
265 IOReadHandler *fd_read, void *opaque);
2122c51a 266 int (*chr_ioctl)(struct CharDriverState *s, int cmd, void *arg);
82c643ff 267 IOEventHandler *chr_event;
eb45f5fe 268 void (*chr_send_event)(struct CharDriverState *chr, int event);
f331110f 269 void (*chr_close)(struct CharDriverState *chr);
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270 void *opaque;
271} CharDriverState;
272
273void qemu_chr_printf(CharDriverState *s, const char *fmt, ...);
274int qemu_chr_write(CharDriverState *s, const uint8_t *buf, int len);
ea2384d3 275void qemu_chr_send_event(CharDriverState *s, int event);
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276void qemu_chr_add_read_handler(CharDriverState *s,
277 IOCanRWHandler *fd_can_read,
278 IOReadHandler *fd_read, void *opaque);
279void qemu_chr_add_event_handler(CharDriverState *s, IOEventHandler *chr_event);
2122c51a 280int qemu_chr_ioctl(CharDriverState *s, int cmd, void *arg);
f8d179e3 281
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282/* consoles */
283
284typedef struct DisplayState DisplayState;
285typedef struct TextConsole TextConsole;
286
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287typedef void (*vga_hw_update_ptr)(void *);
288typedef void (*vga_hw_invalidate_ptr)(void *);
289typedef void (*vga_hw_screen_dump_ptr)(void *, const char *);
290
291TextConsole *graphic_console_init(DisplayState *ds, vga_hw_update_ptr update,
292 vga_hw_invalidate_ptr invalidate,
293 vga_hw_screen_dump_ptr screen_dump,
294 void *opaque);
295void vga_hw_update(void);
296void vga_hw_invalidate(void);
297void vga_hw_screen_dump(const char *filename);
298
299int is_graphic_console(void);
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300CharDriverState *text_console_init(DisplayState *ds);
301void console_select(unsigned int index);
302
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303/* serial ports */
304
305#define MAX_SERIAL_PORTS 4
306
307extern CharDriverState *serial_hds[MAX_SERIAL_PORTS];
308
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309/* parallel ports */
310
311#define MAX_PARALLEL_PORTS 3
312
313extern CharDriverState *parallel_hds[MAX_PARALLEL_PORTS];
314
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315/* VLANs support */
316
317typedef struct VLANClientState VLANClientState;
318
319struct VLANClientState {
320 IOReadHandler *fd_read;
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321 /* Packets may still be sent if this returns zero. It's used to
322 rate-limit the slirp code. */
323 IOCanRWHandler *fd_can_read;
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324 void *opaque;
325 struct VLANClientState *next;
326 struct VLANState *vlan;
327 char info_str[256];
328};
329
330typedef struct VLANState {
331 int id;
332 VLANClientState *first_client;
333 struct VLANState *next;
334} VLANState;
335
336VLANState *qemu_find_vlan(int id);
337VLANClientState *qemu_new_vlan_client(VLANState *vlan,
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338 IOReadHandler *fd_read,
339 IOCanRWHandler *fd_can_read,
340 void *opaque);
341int qemu_can_send_packet(VLANClientState *vc);
7c9d8e07 342void qemu_send_packet(VLANClientState *vc, const uint8_t *buf, int size);
d861b05e 343void qemu_handler_true(void *opaque);
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344
345void do_info_network(void);
346
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347/* TAP win32 */
348int tap_win32_init(VLANState *vlan, const char *ifname);
349void tap_win32_poll(void);
350
7c9d8e07 351/* NIC info */
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352
353#define MAX_NICS 8
354
7c9d8e07 355typedef struct NICInfo {
c4b1fcc0 356 uint8_t macaddr[6];
a41b2ff2 357 const char *model;
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358 VLANState *vlan;
359} NICInfo;
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360
361extern int nb_nics;
7c9d8e07 362extern NICInfo nd_table[MAX_NICS];
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363
364/* timers */
365
366typedef struct QEMUClock QEMUClock;
367typedef struct QEMUTimer QEMUTimer;
368typedef void QEMUTimerCB(void *opaque);
369
370/* The real time clock should be used only for stuff which does not
371 change the virtual machine state, as it is run even if the virtual
69b91039 372 machine is stopped. The real time clock has a frequency of 1000
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373 Hz. */
374extern QEMUClock *rt_clock;
375
e80cfcfc 376/* The virtual clock is only run during the emulation. It is stopped
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377 when the virtual machine is stopped. Virtual timers use a high
378 precision clock, usually cpu cycles (use ticks_per_sec). */
379extern QEMUClock *vm_clock;
380
381int64_t qemu_get_clock(QEMUClock *clock);
382
383QEMUTimer *qemu_new_timer(QEMUClock *clock, QEMUTimerCB *cb, void *opaque);
384void qemu_free_timer(QEMUTimer *ts);
385void qemu_del_timer(QEMUTimer *ts);
386void qemu_mod_timer(QEMUTimer *ts, int64_t expire_time);
387int qemu_timer_pending(QEMUTimer *ts);
388
389extern int64_t ticks_per_sec;
390extern int pit_min_timer_count;
391
392void cpu_enable_ticks(void);
393void cpu_disable_ticks(void);
394
395/* VM Load/Save */
396
397typedef FILE QEMUFile;
398
399void qemu_put_buffer(QEMUFile *f, const uint8_t *buf, int size);
400void qemu_put_byte(QEMUFile *f, int v);
401void qemu_put_be16(QEMUFile *f, unsigned int v);
402void qemu_put_be32(QEMUFile *f, unsigned int v);
403void qemu_put_be64(QEMUFile *f, uint64_t v);
404int qemu_get_buffer(QEMUFile *f, uint8_t *buf, int size);
405int qemu_get_byte(QEMUFile *f);
406unsigned int qemu_get_be16(QEMUFile *f);
407unsigned int qemu_get_be32(QEMUFile *f);
408uint64_t qemu_get_be64(QEMUFile *f);
409
410static inline void qemu_put_be64s(QEMUFile *f, const uint64_t *pv)
411{
412 qemu_put_be64(f, *pv);
413}
414
415static inline void qemu_put_be32s(QEMUFile *f, const uint32_t *pv)
416{
417 qemu_put_be32(f, *pv);
418}
419
420static inline void qemu_put_be16s(QEMUFile *f, const uint16_t *pv)
421{
422 qemu_put_be16(f, *pv);
423}
424
425static inline void qemu_put_8s(QEMUFile *f, const uint8_t *pv)
426{
427 qemu_put_byte(f, *pv);
428}
429
430static inline void qemu_get_be64s(QEMUFile *f, uint64_t *pv)
431{
432 *pv = qemu_get_be64(f);
433}
434
435static inline void qemu_get_be32s(QEMUFile *f, uint32_t *pv)
436{
437 *pv = qemu_get_be32(f);
438}
439
440static inline void qemu_get_be16s(QEMUFile *f, uint16_t *pv)
441{
442 *pv = qemu_get_be16(f);
443}
444
445static inline void qemu_get_8s(QEMUFile *f, uint8_t *pv)
446{
447 *pv = qemu_get_byte(f);
448}
449
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450#if TARGET_LONG_BITS == 64
451#define qemu_put_betl qemu_put_be64
452#define qemu_get_betl qemu_get_be64
453#define qemu_put_betls qemu_put_be64s
454#define qemu_get_betls qemu_get_be64s
455#else
456#define qemu_put_betl qemu_put_be32
457#define qemu_get_betl qemu_get_be32
458#define qemu_put_betls qemu_put_be32s
459#define qemu_get_betls qemu_get_be32s
460#endif
461
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462int64_t qemu_ftell(QEMUFile *f);
463int64_t qemu_fseek(QEMUFile *f, int64_t pos, int whence);
464
465typedef void SaveStateHandler(QEMUFile *f, void *opaque);
466typedef int LoadStateHandler(QEMUFile *f, void *opaque, int version_id);
467
468int qemu_loadvm(const char *filename);
469int qemu_savevm(const char *filename);
470int register_savevm(const char *idstr,
471 int instance_id,
472 int version_id,
473 SaveStateHandler *save_state,
474 LoadStateHandler *load_state,
475 void *opaque);
476void qemu_get_timer(QEMUFile *f, QEMUTimer *ts);
477void qemu_put_timer(QEMUFile *f, QEMUTimer *ts);
c4b1fcc0 478
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479void cpu_save(QEMUFile *f, void *opaque);
480int cpu_load(QEMUFile *f, void *opaque, int version_id);
481
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482/* block.c */
483typedef struct BlockDriverState BlockDriverState;
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484typedef struct BlockDriver BlockDriver;
485
486extern BlockDriver bdrv_raw;
487extern BlockDriver bdrv_cow;
488extern BlockDriver bdrv_qcow;
489extern BlockDriver bdrv_vmdk;
3c56521b 490extern BlockDriver bdrv_cloop;
585d0ed9 491extern BlockDriver bdrv_dmg;
a8753c34 492extern BlockDriver bdrv_bochs;
6a0f9e82 493extern BlockDriver bdrv_vpc;
de167e41 494extern BlockDriver bdrv_vvfat;
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495
496void bdrv_init(void);
497BlockDriver *bdrv_find_format(const char *format_name);
498int bdrv_create(BlockDriver *drv,
499 const char *filename, int64_t size_in_sectors,
500 const char *backing_file, int flags);
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501BlockDriverState *bdrv_new(const char *device_name);
502void bdrv_delete(BlockDriverState *bs);
503int bdrv_open(BlockDriverState *bs, const char *filename, int snapshot);
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504int bdrv_open2(BlockDriverState *bs, const char *filename, int snapshot,
505 BlockDriver *drv);
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506void bdrv_close(BlockDriverState *bs);
507int bdrv_read(BlockDriverState *bs, int64_t sector_num,
508 uint8_t *buf, int nb_sectors);
509int bdrv_write(BlockDriverState *bs, int64_t sector_num,
510 const uint8_t *buf, int nb_sectors);
511void bdrv_get_geometry(BlockDriverState *bs, int64_t *nb_sectors_ptr);
33e3963e 512int bdrv_commit(BlockDriverState *bs);
77fef8c1 513void bdrv_set_boot_sector(BlockDriverState *bs, const uint8_t *data, int size);
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514/* Ensure contents are flushed to disk. */
515void bdrv_flush(BlockDriverState *bs);
33e3963e 516
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517#define BDRV_TYPE_HD 0
518#define BDRV_TYPE_CDROM 1
519#define BDRV_TYPE_FLOPPY 2
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520#define BIOS_ATA_TRANSLATION_AUTO 0
521#define BIOS_ATA_TRANSLATION_NONE 1
522#define BIOS_ATA_TRANSLATION_LBA 2
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523
524void bdrv_set_geometry_hint(BlockDriverState *bs,
525 int cyls, int heads, int secs);
526void bdrv_set_type_hint(BlockDriverState *bs, int type);
46d4767d 527void bdrv_set_translation_hint(BlockDriverState *bs, int translation);
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528void bdrv_get_geometry_hint(BlockDriverState *bs,
529 int *pcyls, int *pheads, int *psecs);
530int bdrv_get_type_hint(BlockDriverState *bs);
46d4767d 531int bdrv_get_translation_hint(BlockDriverState *bs);
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532int bdrv_is_removable(BlockDriverState *bs);
533int bdrv_is_read_only(BlockDriverState *bs);
534int bdrv_is_inserted(BlockDriverState *bs);
535int bdrv_is_locked(BlockDriverState *bs);
536void bdrv_set_locked(BlockDriverState *bs, int locked);
537void bdrv_set_change_cb(BlockDriverState *bs,
538 void (*change_cb)(void *opaque), void *opaque);
ea2384d3 539void bdrv_get_format(BlockDriverState *bs, char *buf, int buf_size);
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540void bdrv_info(void);
541BlockDriverState *bdrv_find(const char *name);
82c643ff 542void bdrv_iterate(void (*it)(void *opaque, const char *name), void *opaque);
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543int bdrv_is_encrypted(BlockDriverState *bs);
544int bdrv_set_key(BlockDriverState *bs, const char *key);
545void bdrv_iterate_format(void (*it)(void *opaque, const char *name),
546 void *opaque);
547const char *bdrv_get_device_name(BlockDriverState *bs);
c4b1fcc0 548
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549int qcow_get_cluster_size(BlockDriverState *bs);
550int qcow_compress_cluster(BlockDriverState *bs, int64_t sector_num,
551 const uint8_t *buf);
552
553#ifndef QEMU_TOOL
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554
555typedef void QEMUMachineInitFunc(int ram_size, int vga_ram_size,
556 int boot_device,
557 DisplayState *ds, const char **fd_filename, int snapshot,
558 const char *kernel_filename, const char *kernel_cmdline,
559 const char *initrd_filename);
560
561typedef struct QEMUMachine {
562 const char *name;
563 const char *desc;
564 QEMUMachineInitFunc *init;
565 struct QEMUMachine *next;
566} QEMUMachine;
567
568int qemu_register_machine(QEMUMachine *m);
569
570typedef void SetIRQFunc(void *opaque, int irq_num, int level);
3de388f6 571typedef void IRQRequestFunc(void *opaque, int level);
54fa5af5 572
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573/* ISA bus */
574
575extern target_phys_addr_t isa_mem_base;
576
577typedef void (IOPortWriteFunc)(void *opaque, uint32_t address, uint32_t data);
578typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address);
579
580int register_ioport_read(int start, int length, int size,
581 IOPortReadFunc *func, void *opaque);
582int register_ioport_write(int start, int length, int size,
583 IOPortWriteFunc *func, void *opaque);
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584void isa_unassign_ioport(int start, int length);
585
586/* PCI bus */
587
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588extern target_phys_addr_t pci_mem_base;
589
46e50e9d 590typedef struct PCIBus PCIBus;
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591typedef struct PCIDevice PCIDevice;
592
593typedef void PCIConfigWriteFunc(PCIDevice *pci_dev,
594 uint32_t address, uint32_t data, int len);
595typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev,
596 uint32_t address, int len);
597typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num,
598 uint32_t addr, uint32_t size, int type);
599
600#define PCI_ADDRESS_SPACE_MEM 0x00
601#define PCI_ADDRESS_SPACE_IO 0x01
602#define PCI_ADDRESS_SPACE_MEM_PREFETCH 0x08
603
604typedef struct PCIIORegion {
5768f5ac 605 uint32_t addr; /* current PCI mapping address. -1 means not mapped */
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606 uint32_t size;
607 uint8_t type;
608 PCIMapIORegionFunc *map_func;
609} PCIIORegion;
610
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611#define PCI_ROM_SLOT 6
612#define PCI_NUM_REGIONS 7
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613
614#define PCI_DEVICES_MAX 64
615
616#define PCI_VENDOR_ID 0x00 /* 16 bits */
617#define PCI_DEVICE_ID 0x02 /* 16 bits */
618#define PCI_COMMAND 0x04 /* 16 bits */
619#define PCI_COMMAND_IO 0x1 /* Enable response in I/O space */
620#define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */
621#define PCI_CLASS_DEVICE 0x0a /* Device class */
622#define PCI_INTERRUPT_LINE 0x3c /* 8 bits */
623#define PCI_INTERRUPT_PIN 0x3d /* 8 bits */
624#define PCI_MIN_GNT 0x3e /* 8 bits */
625#define PCI_MAX_LAT 0x3f /* 8 bits */
626
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627struct PCIDevice {
628 /* PCI config space */
629 uint8_t config[256];
630
631 /* the following fields are read only */
46e50e9d 632 PCIBus *bus;
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633 int devfn;
634 char name[64];
8a8696a3 635 PCIIORegion io_regions[PCI_NUM_REGIONS];
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636
637 /* do not access the following fields */
638 PCIConfigReadFunc *config_read;
639 PCIConfigWriteFunc *config_write;
502a5395 640 /* ??? This is a PC-specific hack, and should be removed. */
5768f5ac 641 int irq_index;
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642};
643
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644PCIDevice *pci_register_device(PCIBus *bus, const char *name,
645 int instance_size, int devfn,
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646 PCIConfigReadFunc *config_read,
647 PCIConfigWriteFunc *config_write);
648
649void pci_register_io_region(PCIDevice *pci_dev, int region_num,
650 uint32_t size, int type,
651 PCIMapIORegionFunc *map_func);
652
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653void pci_set_irq(PCIDevice *pci_dev, int irq_num, int level);
654
655uint32_t pci_default_read_config(PCIDevice *d,
656 uint32_t address, int len);
657void pci_default_write_config(PCIDevice *d,
658 uint32_t address, uint32_t val, int len);
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659void generic_pci_save(QEMUFile* f, void *opaque);
660int generic_pci_load(QEMUFile* f, void *opaque, int version_id);
5768f5ac 661
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662typedef void (*pci_set_irq_fn)(PCIDevice *pci_dev, void *pic,
663 int irq_num, int level);
664PCIBus *pci_register_bus(pci_set_irq_fn set_irq, void *pic, int devfn_min);
665
666void pci_nic_init(PCIBus *bus, NICInfo *nd);
667void pci_data_write(void *opaque, uint32_t addr, uint32_t val, int len);
668uint32_t pci_data_read(void *opaque, uint32_t addr, int len);
669int pci_bus_num(PCIBus *s);
670void pci_for_each_device(void (*fn)(PCIDevice *d));
9995c51f 671
5768f5ac 672void pci_info(void);
26aa7d72 673
502a5395 674/* prep_pci.c */
46e50e9d 675PCIBus *pci_prep_init(void);
77d4bc34 676
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677/* grackle_pci.c */
678PCIBus *pci_grackle_init(uint32_t base, void *pic);
679
680/* unin_pci.c */
681PCIBus *pci_pmac_init(void *pic);
682
683/* apb_pci.c */
684PCIBus *pci_apb_init(target_ulong special_base, target_ulong mem_base,
685 void *pic);
686
687PCIBus *pci_vpb_init(void *pic);
688
689/* piix_pci.c */
690PCIBus *i440fx_init(void);
691int piix3_init(PCIBus *bus);
692void pci_bios_init(void);
a41b2ff2 693
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694/* openpic.c */
695typedef struct openpic_t openpic_t;
54fa5af5 696void openpic_set_irq(void *opaque, int n_IRQ, int level);
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697openpic_t *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus,
698 CPUState **envp);
28b9b5af 699
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700/* heathrow_pic.c */
701typedef struct HeathrowPICS HeathrowPICS;
702void heathrow_pic_set_irq(void *opaque, int num, int level);
703HeathrowPICS *heathrow_pic_init(int *pmem_index);
704
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705#ifdef HAS_AUDIO
706struct soundhw {
707 const char *name;
708 const char *descr;
709 int enabled;
710 int isa;
711 union {
712 int (*init_isa) (AudioState *s);
713 int (*init_pci) (PCIBus *bus, AudioState *s);
714 } init;
715};
716
717extern struct soundhw soundhw[];
718#endif
719
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720/* vga.c */
721
74a14f22 722#define VGA_RAM_SIZE (8192 * 1024)
313aa567 723
82c643ff 724struct DisplayState {
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725 uint8_t *data;
726 int linesize;
727 int depth;
d3079cd2 728 int bgr; /* BGR color order instead of RGB. Only valid for depth == 32 */
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729 int width;
730 int height;
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731 void *opaque;
732
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733 void (*dpy_update)(struct DisplayState *s, int x, int y, int w, int h);
734 void (*dpy_resize)(struct DisplayState *s, int w, int h);
735 void (*dpy_refresh)(struct DisplayState *s);
24236869 736 void (*dpy_copy)(struct DisplayState *s, int src_x, int src_y, int dst_x, int dst_y, int w, int h);
82c643ff 737};
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738
739static inline void dpy_update(DisplayState *s, int x, int y, int w, int h)
740{
741 s->dpy_update(s, x, y, w, h);
742}
743
744static inline void dpy_resize(DisplayState *s, int w, int h)
745{
746 s->dpy_resize(s, w, h);
747}
748
46e50e9d 749int vga_initialize(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
d5295253
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750 unsigned long vga_ram_offset, int vga_ram_size,
751 unsigned long vga_bios_offset, int vga_bios_size);
313aa567 752
d6bfa22f 753/* cirrus_vga.c */
46e50e9d 754void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
d6bfa22f 755 unsigned long vga_ram_offset, int vga_ram_size);
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756void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
757 unsigned long vga_ram_offset, int vga_ram_size);
758
313aa567 759/* sdl.c */
d63d307f 760void sdl_display_init(DisplayState *ds, int full_screen);
313aa567 761
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762/* cocoa.m */
763void cocoa_display_init(DisplayState *ds, int full_screen);
764
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765/* vnc.c */
766void vnc_display_init(DisplayState *ds, int display);
767
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768/* ide.c */
769#define MAX_DISKS 4
770
771extern BlockDriverState *bs_table[MAX_DISKS];
772
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773void isa_ide_init(int iobase, int iobase2, int irq,
774 BlockDriverState *hd0, BlockDriverState *hd1);
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775void pci_cmd646_ide_init(PCIBus *bus, BlockDriverState **hd_table,
776 int secondary_ide_enabled);
502a5395 777void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn);
28b9b5af 778int pmac_ide_init (BlockDriverState **hd_table,
54fa5af5 779 SetIRQFunc *set_irq, void *irq_opaque, int irq);
5391d806 780
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781/* cdrom.c */
782int cdrom_read_toc(int nb_sectors, uint8_t *buf, int msf, int start_track);
783int cdrom_read_toc_raw(int nb_sectors, uint8_t *buf, int msf, int session_num);
784
1d14ffa9 785/* es1370.c */
c0fe3827 786int es1370_init (PCIBus *bus, AudioState *s);
1d14ffa9 787
fb065187 788/* sb16.c */
c0fe3827 789int SB16_init (AudioState *s);
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790
791/* adlib.c */
c0fe3827 792int Adlib_init (AudioState *s);
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793
794/* gus.c */
c0fe3827 795int GUS_init (AudioState *s);
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796
797/* dma.c */
85571bc7 798typedef int (*DMA_transfer_handler) (void *opaque, int nchan, int pos, int size);
27503323 799int DMA_get_channel_mode (int nchan);
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800int DMA_read_memory (int nchan, void *buf, int pos, int size);
801int DMA_write_memory (int nchan, void *buf, int pos, int size);
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802void DMA_hold_DREQ (int nchan);
803void DMA_release_DREQ (int nchan);
16f62432 804void DMA_schedule(int nchan);
27503323 805void DMA_run (void);
28b9b5af 806void DMA_init (int high_page_enable);
27503323 807void DMA_register_channel (int nchan,
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808 DMA_transfer_handler transfer_handler,
809 void *opaque);
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810/* fdc.c */
811#define MAX_FD 2
812extern BlockDriverState *fd_table[MAX_FD];
813
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814typedef struct fdctrl_t fdctrl_t;
815
816fdctrl_t *fdctrl_init (int irq_lvl, int dma_chann, int mem_mapped,
817 uint32_t io_base,
818 BlockDriverState **fds);
819int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num);
7138fcfb 820
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821/* ne2000.c */
822
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823void isa_ne2000_init(int base, int irq, NICInfo *nd);
824void pci_ne2000_init(PCIBus *bus, NICInfo *nd);
80cabfad 825
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826/* rtl8139.c */
827
828void pci_rtl8139_init(PCIBus *bus, NICInfo *nd);
829
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830/* pckbd.c */
831
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832void kbd_init(void);
833
834/* mc146818rtc.c */
835
8a7ddc38 836typedef struct RTCState RTCState;
80cabfad 837
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838RTCState *rtc_init(int base, int irq);
839void rtc_set_memory(RTCState *s, int addr, int val);
840void rtc_set_date(RTCState *s, const struct tm *tm);
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841
842/* serial.c */
843
c4b1fcc0 844typedef struct SerialState SerialState;
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845SerialState *serial_init(SetIRQFunc *set_irq, void *opaque,
846 int base, int irq, CharDriverState *chr);
847SerialState *serial_mm_init (SetIRQFunc *set_irq, void *opaque,
848 target_ulong base, int it_shift,
849 int irq, CharDriverState *chr);
80cabfad 850
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851/* parallel.c */
852
853typedef struct ParallelState ParallelState;
854ParallelState *parallel_init(int base, int irq, CharDriverState *chr);
855
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856/* i8259.c */
857
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858typedef struct PicState2 PicState2;
859extern PicState2 *isa_pic;
80cabfad 860void pic_set_irq(int irq, int level);
54fa5af5 861void pic_set_irq_new(void *opaque, int irq, int level);
3de388f6 862PicState2 *pic_init(IRQRequestFunc *irq_request, void *irq_request_opaque);
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863void pic_set_alt_irq_func(PicState2 *s, SetIRQFunc *alt_irq_func,
864 void *alt_irq_opaque);
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865int pic_read_irq(PicState2 *s);
866void pic_update_irq(PicState2 *s);
867uint32_t pic_intack_read(PicState2 *s);
c20709aa 868void pic_info(void);
4a0fb71e 869void irq_info(void);
80cabfad 870
c27004ec 871/* APIC */
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872typedef struct IOAPICState IOAPICState;
873
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874int apic_init(CPUState *env);
875int apic_get_interrupt(CPUState *env);
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876IOAPICState *ioapic_init(void);
877void ioapic_set_irq(void *opaque, int vector, int level);
c27004ec 878
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879/* i8254.c */
880
881#define PIT_FREQ 1193182
882
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883typedef struct PITState PITState;
884
885PITState *pit_init(int base, int irq);
886void pit_set_gate(PITState *pit, int channel, int val);
887int pit_get_gate(PITState *pit, int channel);
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888int pit_get_initial_count(PITState *pit, int channel);
889int pit_get_mode(PITState *pit, int channel);
ec844b96 890int pit_get_out(PITState *pit, int channel, int64_t current_time);
80cabfad 891
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892/* pcspk.c */
893void pcspk_init(PITState *);
894int pcspk_audio_init(AudioState *);
895
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896/* acpi.c */
897extern int acpi_enabled;
502a5395 898void piix4_pm_init(PCIBus *bus, int devfn);
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899void acpi_bios_init(void);
900
80cabfad 901/* pc.c */
54fa5af5 902extern QEMUMachine pc_machine;
3dbbdc25 903extern QEMUMachine isapc_machine;
52ca8d6a 904extern int fd_bootchk;
80cabfad 905
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906void ioport_set_a20(int enable);
907int ioport_get_a20(void);
908
26aa7d72 909/* ppc.c */
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910extern QEMUMachine prep_machine;
911extern QEMUMachine core99_machine;
912extern QEMUMachine heathrow_machine;
913
6af0bf9c
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914/* mips_r4k.c */
915extern QEMUMachine mips_machine;
916
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917/* shix.c */
918extern QEMUMachine shix_machine;
919
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920#ifdef TARGET_PPC
921ppc_tb_t *cpu_ppc_tb_init (CPUState *env, uint32_t freq);
922#endif
64201201 923void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val);
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924
925extern CPUWriteMemoryFunc *PPC_io_write[];
926extern CPUReadMemoryFunc *PPC_io_read[];
54fa5af5 927void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val);
26aa7d72 928
e95c8d51 929/* sun4m.c */
54fa5af5 930extern QEMUMachine sun4m_machine;
e80cfcfc 931uint32_t iommu_translate(uint32_t addr);
ba3c64fb 932void pic_set_irq_cpu(int irq, int level, unsigned int cpu);
e95c8d51
FB
933
934/* iommu.c */
e80cfcfc
FB
935void *iommu_init(uint32_t addr);
936uint32_t iommu_translate_local(void *opaque, uint32_t addr);
e95c8d51
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937
938/* lance.c */
7c9d8e07 939void lance_init(NICInfo *nd, int irq, uint32_t leaddr, uint32_t ledaddr);
e95c8d51
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940
941/* tcx.c */
95219897 942void tcx_init(DisplayState *ds, uint32_t addr, uint8_t *vram_base,
6f7e9aec 943 unsigned long vram_offset, int vram_size, int width, int height);
e80cfcfc
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944
945/* slavio_intctl.c */
946void *slavio_intctl_init();
ba3c64fb 947void slavio_intctl_set_cpu(void *opaque, unsigned int cpu, CPUState *env);
e80cfcfc
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948void slavio_pic_info(void *opaque);
949void slavio_irq_info(void *opaque);
950void slavio_pic_set_irq(void *opaque, int irq, int level);
ba3c64fb 951void slavio_pic_set_irq_cpu(void *opaque, int irq, int level, unsigned int cpu);
e95c8d51 952
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953/* loader.c */
954int get_image_size(const char *filename);
955int load_image(const char *filename, uint8_t *addr);
9ee3c029 956int load_elf(const char *filename, int64_t virt_to_phys_addend, uint64_t *pentry);
e80cfcfc
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957int load_aout(const char *filename, uint8_t *addr);
958
959/* slavio_timer.c */
ba3c64fb 960void slavio_timer_init(uint32_t addr, int irq, int mode, unsigned int cpu);
8d5f07fa 961
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962/* slavio_serial.c */
963SerialState *slavio_serial_init(int base, int irq, CharDriverState *chr1, CharDriverState *chr2);
964void slavio_serial_ms_kbd_init(int base, int irq);
e95c8d51 965
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966/* slavio_misc.c */
967void *slavio_misc_init(uint32_t base, int irq);
968void slavio_set_power_fail(void *opaque, int power_failing);
969
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970/* esp.c */
971void esp_init(BlockDriverState **bd, int irq, uint32_t espaddr, uint32_t espdaddr);
972
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973/* sun4u.c */
974extern QEMUMachine sun4u_machine;
975
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976/* NVRAM helpers */
977#include "hw/m48t59.h"
978
979void NVRAM_set_byte (m48t59_t *nvram, uint32_t addr, uint8_t value);
980uint8_t NVRAM_get_byte (m48t59_t *nvram, uint32_t addr);
981void NVRAM_set_word (m48t59_t *nvram, uint32_t addr, uint16_t value);
982uint16_t NVRAM_get_word (m48t59_t *nvram, uint32_t addr);
983void NVRAM_set_lword (m48t59_t *nvram, uint32_t addr, uint32_t value);
984uint32_t NVRAM_get_lword (m48t59_t *nvram, uint32_t addr);
985void NVRAM_set_string (m48t59_t *nvram, uint32_t addr,
986 const unsigned char *str, uint32_t max);
987int NVRAM_get_string (m48t59_t *nvram, uint8_t *dst, uint16_t addr, int max);
988void NVRAM_set_crc (m48t59_t *nvram, uint32_t addr,
989 uint32_t start, uint32_t count);
990int PPC_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size,
991 const unsigned char *arch,
992 uint32_t RAM_size, int boot_device,
993 uint32_t kernel_image, uint32_t kernel_size,
28b9b5af 994 const char *cmdline,
64201201 995 uint32_t initrd_image, uint32_t initrd_size,
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996 uint32_t NVRAM_image,
997 int width, int height, int depth);
64201201 998
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999/* adb.c */
1000
1001#define MAX_ADB_DEVICES 16
1002
e2733d20 1003#define ADB_MAX_OUT_LEN 16
63066f4f 1004
e2733d20 1005typedef struct ADBDevice ADBDevice;
63066f4f 1006
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1007/* buf = NULL means polling */
1008typedef int ADBDeviceRequest(ADBDevice *d, uint8_t *buf_out,
1009 const uint8_t *buf, int len);
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1010typedef int ADBDeviceReset(ADBDevice *d);
1011
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1012struct ADBDevice {
1013 struct ADBBusState *bus;
1014 int devaddr;
1015 int handler;
e2733d20 1016 ADBDeviceRequest *devreq;
12c28fed 1017 ADBDeviceReset *devreset;
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1018 void *opaque;
1019};
1020
1021typedef struct ADBBusState {
1022 ADBDevice devices[MAX_ADB_DEVICES];
1023 int nb_devices;
e2733d20 1024 int poll_index;
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1025} ADBBusState;
1026
e2733d20
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1027int adb_request(ADBBusState *s, uint8_t *buf_out,
1028 const uint8_t *buf, int len);
1029int adb_poll(ADBBusState *s, uint8_t *buf_out);
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1030
1031ADBDevice *adb_register_device(ADBBusState *s, int devaddr,
e2733d20 1032 ADBDeviceRequest *devreq,
12c28fed 1033 ADBDeviceReset *devreset,
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1034 void *opaque);
1035void adb_kbd_init(ADBBusState *bus);
1036void adb_mouse_init(ADBBusState *bus);
1037
1038/* cuda.c */
1039
1040extern ADBBusState adb_bus;
54fa5af5 1041int cuda_init(SetIRQFunc *set_irq, void *irq_opaque, int irq);
63066f4f 1042
bb36d470
FB
1043#include "hw/usb.h"
1044
a594cfbf
FB
1045/* usb ports of the VM */
1046
0d92ed30
PB
1047void qemu_register_usb_port(USBPort *port, void *opaque, int index,
1048 usb_attachfn attach);
a594cfbf 1049
0d92ed30 1050#define VM_USB_HUB_SIZE 8
a594cfbf
FB
1051
1052void do_usb_add(const char *devname);
1053void do_usb_del(const char *devname);
1054void usb_info(void);
1055
2e5d83bb
PB
1056/* scsi-disk.c */
1057typedef struct SCSIDevice SCSIDevice;
1058typedef void (*scsi_completionfn)(void *, uint32_t, int);
1059
1060SCSIDevice *scsi_disk_init(BlockDriverState *bdrv,
1061 scsi_completionfn completion,
1062 void *opaque);
1063void scsi_disk_destroy(SCSIDevice *s);
1064
0fc5c15a 1065int32_t scsi_send_command(SCSIDevice *s, uint32_t tag, uint8_t *buf, int lun);
2e5d83bb
PB
1066int scsi_read_data(SCSIDevice *s, uint8_t *data, uint32_t len);
1067int scsi_write_data(SCSIDevice *s, uint8_t *data, uint32_t len);
1068
7d8406be
PB
1069/* lsi53c895a.c */
1070void lsi_scsi_attach(void *opaque, BlockDriverState *bd, int id);
1071void *lsi_scsi_init(PCIBus *bus, int devfn);
1072
b5ff1b31 1073/* integratorcp.c */
40f137e1
PB
1074extern QEMUMachine integratorcp926_machine;
1075extern QEMUMachine integratorcp1026_machine;
b5ff1b31 1076
cdbdb648
PB
1077/* versatilepb.c */
1078extern QEMUMachine versatilepb_machine;
16406950 1079extern QEMUMachine versatileab_machine;
cdbdb648 1080
daa57963
FB
1081/* ps2.c */
1082void *ps2_kbd_init(void (*update_irq)(void *, int), void *update_arg);
1083void *ps2_mouse_init(void (*update_irq)(void *, int), void *update_arg);
1084void ps2_write_mouse(void *, int val);
1085void ps2_write_keyboard(void *, int val);
1086uint32_t ps2_read_data(void *);
1087void ps2_queue(void *, int b);
f94f5d71 1088void ps2_keyboard_set_translation(void *opaque, int mode);
daa57963 1089
80337b66
FB
1090/* smc91c111.c */
1091void smc91c111_init(NICInfo *, uint32_t, void *, int);
1092
bdd5003a 1093/* pl110.c */
95219897 1094void *pl110_init(DisplayState *ds, uint32_t base, void *pic, int irq, int);
bdd5003a 1095
cdbdb648
PB
1096/* pl011.c */
1097void pl011_init(uint32_t base, void *pic, int irq, CharDriverState *chr);
1098
1099/* pl050.c */
1100void pl050_init(uint32_t base, void *pic, int irq, int is_mouse);
1101
1102/* pl080.c */
1103void *pl080_init(uint32_t base, void *pic, int irq);
1104
1105/* pl190.c */
1106void *pl190_init(uint32_t base, void *parent, int irq, int fiq);
1107
1108/* arm-timer.c */
1109void sp804_init(uint32_t base, void *pic, int irq);
1110void icp_pit_init(uint32_t base, void *pic, int irq);
1111
16406950
PB
1112/* arm_boot.c */
1113
1114void arm_load_kernel(int ram_size, const char *kernel_filename,
1115 const char *kernel_cmdline, const char *initrd_filename,
1116 int board_id);
1117
27c7ca7e
FB
1118/* sh7750.c */
1119struct SH7750State;
1120
008a8818 1121struct SH7750State *sh7750_init(CPUState * cpu);
27c7ca7e
FB
1122
1123typedef struct {
1124 /* The callback will be triggered if any of the designated lines change */
1125 uint16_t portamask_trigger;
1126 uint16_t portbmask_trigger;
1127 /* Return 0 if no action was taken */
1128 int (*port_change_cb) (uint16_t porta, uint16_t portb,
1129 uint16_t * periph_pdtra,
1130 uint16_t * periph_portdira,
1131 uint16_t * periph_pdtrb,
1132 uint16_t * periph_portdirb);
1133} sh7750_io_device;
1134
1135int sh7750_register_io_device(struct SH7750State *s,
1136 sh7750_io_device * device);
1137/* tc58128.c */
1138int tc58128_init(struct SH7750State *s, char *zone1, char *zone2);
1139
29133e9a
FB
1140/* NOR flash devices */
1141typedef struct pflash_t pflash_t;
1142
1143pflash_t *pflash_register (target_ulong base, ram_addr_t off,
1144 BlockDriverState *bs,
1145 target_ulong sector_len, int nb_blocs, int width,
1146 uint16_t id0, uint16_t id1,
1147 uint16_t id2, uint16_t id3);
1148
ea2384d3
FB
1149#endif /* defined(QEMU_TOOL) */
1150
c4b1fcc0 1151/* monitor.c */
82c643ff 1152void monitor_init(CharDriverState *hd, int show_banner);
ea2384d3
FB
1153void term_puts(const char *str);
1154void term_vprintf(const char *fmt, va_list ap);
40c3bac3 1155void term_printf(const char *fmt, ...) __attribute__ ((__format__ (__printf__, 1, 2)));
c4b1fcc0
FB
1156void term_flush(void);
1157void term_print_help(void);
ea2384d3
FB
1158void monitor_readline(const char *prompt, int is_password,
1159 char *buf, int buf_size);
1160
1161/* readline.c */
1162typedef void ReadLineFunc(void *opaque, const char *str);
1163
1164extern int completion_index;
1165void add_completion(const char *str);
1166void readline_handle_byte(int ch);
1167void readline_find_completion(const char *cmdline);
1168const char *readline_get_history(unsigned int index);
1169void readline_start(const char *prompt, int is_password,
1170 ReadLineFunc *readline_func, void *opaque);
c4b1fcc0 1171
5e6ad6f9
FB
1172void kqemu_record_dump(void);
1173
fc01f7e7 1174#endif /* VL_H */