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Commit | Line | Data |
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fc01f7e7 FB |
1 | /* |
2 | * QEMU System Emulator header | |
3 | * | |
4 | * Copyright (c) 2003 Fabrice Bellard | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
7 | * of this software and associated documentation files (the "Software"), to deal | |
8 | * in the Software without restriction, including without limitation the rights | |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 | * copies of the Software, and to permit persons to whom the Software is | |
11 | * furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
22 | * THE SOFTWARE. | |
23 | */ | |
24 | #ifndef VL_H | |
25 | #define VL_H | |
26 | ||
67b915a5 FB |
27 | /* we put basic includes here to avoid repeating them in device drivers */ |
28 | #include <stdlib.h> | |
29 | #include <stdio.h> | |
30 | #include <stdarg.h> | |
31 | #include <string.h> | |
32 | #include <inttypes.h> | |
8a7ddc38 | 33 | #include <time.h> |
67b915a5 FB |
34 | #include <ctype.h> |
35 | #include <errno.h> | |
36 | #include <unistd.h> | |
37 | #include <fcntl.h> | |
7d3505c5 | 38 | #include <sys/stat.h> |
67b915a5 FB |
39 | |
40 | #ifndef O_LARGEFILE | |
41 | #define O_LARGEFILE 0 | |
42 | #endif | |
40c3bac3 FB |
43 | #ifndef O_BINARY |
44 | #define O_BINARY 0 | |
45 | #endif | |
67b915a5 FB |
46 | |
47 | #ifdef _WIN32 | |
bfbc9133 | 48 | #define lseek64 _lseeki64 |
67b915a5 | 49 | #endif |
8a7ddc38 | 50 | |
16f62432 FB |
51 | #include "cpu.h" |
52 | ||
67b915a5 FB |
53 | #ifndef glue |
54 | #define xglue(x, y) x ## y | |
55 | #define glue(x, y) xglue(x, y) | |
56 | #define stringify(s) tostring(s) | |
57 | #define tostring(s) #s | |
58 | #endif | |
59 | ||
60 | #if defined(WORDS_BIGENDIAN) | |
61 | static inline uint32_t be32_to_cpu(uint32_t v) | |
62 | { | |
63 | return v; | |
64 | } | |
65 | ||
66 | static inline uint16_t be16_to_cpu(uint16_t v) | |
67 | { | |
68 | return v; | |
69 | } | |
70 | ||
165c6fc8 FB |
71 | static inline uint32_t cpu_to_be32(uint32_t v) |
72 | { | |
73 | return v; | |
74 | } | |
75 | ||
76 | static inline uint16_t cpu_to_be16(uint16_t v) | |
77 | { | |
78 | return v; | |
79 | } | |
80 | ||
67b915a5 FB |
81 | static inline uint32_t le32_to_cpu(uint32_t v) |
82 | { | |
83 | return bswap32(v); | |
84 | } | |
85 | ||
86 | static inline uint16_t le16_to_cpu(uint16_t v) | |
87 | { | |
88 | return bswap16(v); | |
89 | } | |
90 | ||
165c6fc8 FB |
91 | static inline uint32_t cpu_to_le32(uint32_t v) |
92 | { | |
93 | return bswap32(v); | |
94 | } | |
95 | ||
96 | static inline uint16_t cpu_to_le16(uint16_t v) | |
97 | { | |
98 | return bswap16(v); | |
99 | } | |
100 | ||
67b915a5 | 101 | #else |
165c6fc8 | 102 | |
67b915a5 FB |
103 | static inline uint32_t be32_to_cpu(uint32_t v) |
104 | { | |
105 | return bswap32(v); | |
106 | } | |
107 | ||
108 | static inline uint16_t be16_to_cpu(uint16_t v) | |
109 | { | |
110 | return bswap16(v); | |
111 | } | |
112 | ||
165c6fc8 FB |
113 | static inline uint32_t cpu_to_be32(uint32_t v) |
114 | { | |
115 | return bswap32(v); | |
116 | } | |
117 | ||
118 | static inline uint16_t cpu_to_be16(uint16_t v) | |
119 | { | |
120 | return bswap16(v); | |
121 | } | |
122 | ||
67b915a5 FB |
123 | static inline uint32_t le32_to_cpu(uint32_t v) |
124 | { | |
125 | return v; | |
126 | } | |
127 | ||
128 | static inline uint16_t le16_to_cpu(uint16_t v) | |
129 | { | |
130 | return v; | |
131 | } | |
165c6fc8 FB |
132 | |
133 | static inline uint32_t cpu_to_le32(uint32_t v) | |
134 | { | |
135 | return v; | |
136 | } | |
137 | ||
138 | static inline uint16_t cpu_to_le16(uint16_t v) | |
139 | { | |
140 | return v; | |
141 | } | |
67b915a5 FB |
142 | #endif |
143 | ||
eb26db16 FB |
144 | static inline void cpu_to_le16w(uint16_t *p, uint16_t v) |
145 | { | |
146 | *p = cpu_to_le16(v); | |
147 | } | |
148 | ||
149 | static inline void cpu_to_le32w(uint32_t *p, uint32_t v) | |
150 | { | |
151 | *p = cpu_to_le32(v); | |
152 | } | |
153 | ||
154 | static inline uint16_t le16_to_cpup(const uint16_t *p) | |
155 | { | |
156 | return le16_to_cpu(*p); | |
157 | } | |
158 | ||
159 | static inline uint32_t le32_to_cpup(const uint32_t *p) | |
160 | { | |
161 | return le32_to_cpu(*p); | |
162 | } | |
163 | ||
164 | /* unaligned versions (optimized for frequent unaligned accesses)*/ | |
165 | ||
166 | #if defined(__i386__) || defined(__powerpc__) | |
167 | ||
168 | #define cpu_to_le16wu(p, v) cpu_to_le16w(p, v) | |
169 | #define cpu_to_le32wu(p, v) cpu_to_le32w(p, v) | |
170 | #define le16_to_cpupu(p) le16_to_cpup(p) | |
171 | #define le32_to_cpupu(p) le32_to_cpup(p) | |
172 | ||
173 | #else | |
174 | ||
175 | static inline void cpu_to_le16wu(uint16_t *p, uint16_t v) | |
176 | { | |
177 | uint8_t *p1 = (uint8_t *)p; | |
178 | ||
179 | p1[0] = v; | |
180 | p1[1] = v >> 8; | |
181 | } | |
182 | ||
183 | static inline void cpu_to_le32wu(uint32_t *p, uint32_t v) | |
184 | { | |
185 | uint8_t *p1 = (uint8_t *)p; | |
186 | ||
187 | p1[0] = v; | |
188 | p1[1] = v >> 8; | |
189 | p1[2] = v >> 16; | |
190 | p1[3] = v >> 24; | |
191 | } | |
192 | ||
193 | static inline uint16_t le16_to_cpupu(const uint16_t *p) | |
194 | { | |
195 | const uint8_t *p1 = (const uint8_t *)p; | |
196 | return p1[0] | (p1[1] << 8); | |
197 | } | |
198 | ||
199 | static inline uint32_t le32_to_cpupu(const uint32_t *p) | |
200 | { | |
201 | const uint8_t *p1 = (const uint8_t *)p; | |
202 | return p1[0] | (p1[1] << 8) | (p1[2] << 16) | (p1[3] << 24); | |
203 | } | |
204 | ||
205 | #endif | |
67b915a5 | 206 | |
33e3963e | 207 | /* vl.c */ |
80cabfad | 208 | uint64_t muldiv64(uint64_t a, uint32_t b, uint32_t c); |
313aa567 | 209 | |
80cabfad FB |
210 | void hw_error(const char *fmt, ...); |
211 | ||
7587cf44 | 212 | int get_image_size(const char *filename); |
80cabfad FB |
213 | int load_image(const char *filename, uint8_t *addr); |
214 | extern const char *bios_dir; | |
215 | ||
216 | void pstrcpy(char *buf, int buf_size, const char *str); | |
217 | char *pstrcat(char *buf, int buf_size, const char *s); | |
82c643ff | 218 | int strstart(const char *str, const char *val, const char **ptr); |
c4b1fcc0 | 219 | |
8a7ddc38 FB |
220 | extern int vm_running; |
221 | ||
222 | typedef void VMStopHandler(void *opaque, int reason); | |
223 | ||
224 | int qemu_add_vm_stop_handler(VMStopHandler *cb, void *opaque); | |
225 | void qemu_del_vm_stop_handler(VMStopHandler *cb, void *opaque); | |
226 | ||
227 | void vm_start(void); | |
228 | void vm_stop(int reason); | |
229 | ||
bb0c6722 FB |
230 | typedef void QEMUResetHandler(void *opaque); |
231 | ||
232 | void qemu_register_reset(QEMUResetHandler *func, void *opaque); | |
233 | void qemu_system_reset_request(void); | |
234 | void qemu_system_shutdown_request(void); | |
235 | ||
aaaa7df6 | 236 | extern int audio_enabled; |
0ced6589 FB |
237 | extern int ram_size; |
238 | extern int bios_size; | |
ee22c2f7 | 239 | extern int rtc_utc; |
1f04275e | 240 | extern int cirrus_vga_enabled; |
28b9b5af FB |
241 | extern int graphic_width; |
242 | extern int graphic_height; | |
243 | extern int graphic_depth; | |
0ced6589 FB |
244 | |
245 | /* XXX: make it dynamic */ | |
246 | #if defined (TARGET_PPC) | |
247 | #define BIOS_SIZE (512 * 1024) | |
248 | #else | |
7587cf44 | 249 | #define BIOS_SIZE ((256 + 64) * 1024) |
0ced6589 | 250 | #endif |
aaaa7df6 | 251 | |
63066f4f FB |
252 | /* keyboard/mouse support */ |
253 | ||
254 | #define MOUSE_EVENT_LBUTTON 0x01 | |
255 | #define MOUSE_EVENT_RBUTTON 0x02 | |
256 | #define MOUSE_EVENT_MBUTTON 0x04 | |
257 | ||
258 | typedef void QEMUPutKBDEvent(void *opaque, int keycode); | |
259 | typedef void QEMUPutMouseEvent(void *opaque, int dx, int dy, int dz, int buttons_state); | |
260 | ||
261 | void qemu_add_kbd_event_handler(QEMUPutKBDEvent *func, void *opaque); | |
262 | void qemu_add_mouse_event_handler(QEMUPutMouseEvent *func, void *opaque); | |
263 | ||
264 | void kbd_put_keycode(int keycode); | |
265 | void kbd_mouse_event(int dx, int dy, int dz, int buttons_state); | |
266 | ||
82c643ff FB |
267 | /* keysym is a unicode code except for special keys (see QEMU_KEY_xxx |
268 | constants) */ | |
269 | #define QEMU_KEY_ESC1(c) ((c) | 0xe100) | |
270 | #define QEMU_KEY_BACKSPACE 0x007f | |
271 | #define QEMU_KEY_UP QEMU_KEY_ESC1('A') | |
272 | #define QEMU_KEY_DOWN QEMU_KEY_ESC1('B') | |
273 | #define QEMU_KEY_RIGHT QEMU_KEY_ESC1('C') | |
274 | #define QEMU_KEY_LEFT QEMU_KEY_ESC1('D') | |
275 | #define QEMU_KEY_HOME QEMU_KEY_ESC1(1) | |
276 | #define QEMU_KEY_END QEMU_KEY_ESC1(4) | |
277 | #define QEMU_KEY_PAGEUP QEMU_KEY_ESC1(5) | |
278 | #define QEMU_KEY_PAGEDOWN QEMU_KEY_ESC1(6) | |
279 | #define QEMU_KEY_DELETE QEMU_KEY_ESC1(3) | |
280 | ||
281 | #define QEMU_KEY_CTRL_UP 0xe400 | |
282 | #define QEMU_KEY_CTRL_DOWN 0xe401 | |
283 | #define QEMU_KEY_CTRL_LEFT 0xe402 | |
284 | #define QEMU_KEY_CTRL_RIGHT 0xe403 | |
285 | #define QEMU_KEY_CTRL_HOME 0xe404 | |
286 | #define QEMU_KEY_CTRL_END 0xe405 | |
287 | #define QEMU_KEY_CTRL_PAGEUP 0xe406 | |
288 | #define QEMU_KEY_CTRL_PAGEDOWN 0xe407 | |
289 | ||
290 | void kbd_put_keysym(int keysym); | |
291 | ||
c20709aa FB |
292 | /* async I/O support */ |
293 | ||
294 | typedef void IOReadHandler(void *opaque, const uint8_t *buf, int size); | |
295 | typedef int IOCanRWHandler(void *opaque); | |
296 | ||
297 | int qemu_add_fd_read_handler(int fd, IOCanRWHandler *fd_can_read, | |
298 | IOReadHandler *fd_read, void *opaque); | |
299 | void qemu_del_fd_read_handler(int fd); | |
300 | ||
82c643ff FB |
301 | /* character device */ |
302 | ||
303 | #define CHR_EVENT_BREAK 0 /* serial break char */ | |
304 | ||
305 | typedef void IOEventHandler(void *opaque, int event); | |
306 | ||
307 | typedef struct CharDriverState { | |
308 | int (*chr_write)(struct CharDriverState *s, const uint8_t *buf, int len); | |
309 | void (*chr_add_read_handler)(struct CharDriverState *s, | |
310 | IOCanRWHandler *fd_can_read, | |
311 | IOReadHandler *fd_read, void *opaque); | |
312 | IOEventHandler *chr_event; | |
313 | void *opaque; | |
314 | } CharDriverState; | |
315 | ||
316 | void qemu_chr_printf(CharDriverState *s, const char *fmt, ...); | |
317 | int qemu_chr_write(CharDriverState *s, const uint8_t *buf, int len); | |
318 | void qemu_chr_add_read_handler(CharDriverState *s, | |
319 | IOCanRWHandler *fd_can_read, | |
320 | IOReadHandler *fd_read, void *opaque); | |
321 | void qemu_chr_add_event_handler(CharDriverState *s, IOEventHandler *chr_event); | |
322 | ||
323 | CharDriverState *serial_hd; | |
324 | ||
325 | /* consoles */ | |
326 | ||
327 | typedef struct DisplayState DisplayState; | |
328 | typedef struct TextConsole TextConsole; | |
329 | ||
330 | extern TextConsole *vga_console; | |
331 | ||
332 | TextConsole *graphic_console_init(DisplayState *ds); | |
333 | int is_active_console(TextConsole *s); | |
334 | CharDriverState *text_console_init(DisplayState *ds); | |
335 | void console_select(unsigned int index); | |
336 | ||
c4b1fcc0 FB |
337 | /* network redirectors support */ |
338 | ||
339 | #define MAX_NICS 8 | |
340 | ||
341 | typedef struct NetDriverState { | |
c20709aa | 342 | int index; /* index number in QEMU */ |
c4b1fcc0 FB |
343 | uint8_t macaddr[6]; |
344 | char ifname[16]; | |
c20709aa FB |
345 | void (*send_packet)(struct NetDriverState *nd, |
346 | const uint8_t *buf, int size); | |
347 | void (*add_read_packet)(struct NetDriverState *nd, | |
348 | IOCanRWHandler *fd_can_read, | |
349 | IOReadHandler *fd_read, void *opaque); | |
350 | /* tun specific data */ | |
351 | int fd; | |
352 | /* slirp specific data */ | |
c4b1fcc0 FB |
353 | } NetDriverState; |
354 | ||
355 | extern int nb_nics; | |
356 | extern NetDriverState nd_table[MAX_NICS]; | |
357 | ||
c20709aa FB |
358 | void qemu_send_packet(NetDriverState *nd, const uint8_t *buf, int size); |
359 | void qemu_add_read_packet(NetDriverState *nd, IOCanRWHandler *fd_can_read, | |
360 | IOReadHandler *fd_read, void *opaque); | |
8a7ddc38 FB |
361 | |
362 | /* timers */ | |
363 | ||
364 | typedef struct QEMUClock QEMUClock; | |
365 | typedef struct QEMUTimer QEMUTimer; | |
366 | typedef void QEMUTimerCB(void *opaque); | |
367 | ||
368 | /* The real time clock should be used only for stuff which does not | |
369 | change the virtual machine state, as it is run even if the virtual | |
69b91039 | 370 | machine is stopped. The real time clock has a frequency of 1000 |
8a7ddc38 FB |
371 | Hz. */ |
372 | extern QEMUClock *rt_clock; | |
373 | ||
374 | /* Rge virtual clock is only run during the emulation. It is stopped | |
375 | when the virtual machine is stopped. Virtual timers use a high | |
376 | precision clock, usually cpu cycles (use ticks_per_sec). */ | |
377 | extern QEMUClock *vm_clock; | |
378 | ||
379 | int64_t qemu_get_clock(QEMUClock *clock); | |
380 | ||
381 | QEMUTimer *qemu_new_timer(QEMUClock *clock, QEMUTimerCB *cb, void *opaque); | |
382 | void qemu_free_timer(QEMUTimer *ts); | |
383 | void qemu_del_timer(QEMUTimer *ts); | |
384 | void qemu_mod_timer(QEMUTimer *ts, int64_t expire_time); | |
385 | int qemu_timer_pending(QEMUTimer *ts); | |
386 | ||
387 | extern int64_t ticks_per_sec; | |
388 | extern int pit_min_timer_count; | |
389 | ||
390 | void cpu_enable_ticks(void); | |
391 | void cpu_disable_ticks(void); | |
392 | ||
393 | /* VM Load/Save */ | |
394 | ||
395 | typedef FILE QEMUFile; | |
396 | ||
397 | void qemu_put_buffer(QEMUFile *f, const uint8_t *buf, int size); | |
398 | void qemu_put_byte(QEMUFile *f, int v); | |
399 | void qemu_put_be16(QEMUFile *f, unsigned int v); | |
400 | void qemu_put_be32(QEMUFile *f, unsigned int v); | |
401 | void qemu_put_be64(QEMUFile *f, uint64_t v); | |
402 | int qemu_get_buffer(QEMUFile *f, uint8_t *buf, int size); | |
403 | int qemu_get_byte(QEMUFile *f); | |
404 | unsigned int qemu_get_be16(QEMUFile *f); | |
405 | unsigned int qemu_get_be32(QEMUFile *f); | |
406 | uint64_t qemu_get_be64(QEMUFile *f); | |
407 | ||
408 | static inline void qemu_put_be64s(QEMUFile *f, const uint64_t *pv) | |
409 | { | |
410 | qemu_put_be64(f, *pv); | |
411 | } | |
412 | ||
413 | static inline void qemu_put_be32s(QEMUFile *f, const uint32_t *pv) | |
414 | { | |
415 | qemu_put_be32(f, *pv); | |
416 | } | |
417 | ||
418 | static inline void qemu_put_be16s(QEMUFile *f, const uint16_t *pv) | |
419 | { | |
420 | qemu_put_be16(f, *pv); | |
421 | } | |
422 | ||
423 | static inline void qemu_put_8s(QEMUFile *f, const uint8_t *pv) | |
424 | { | |
425 | qemu_put_byte(f, *pv); | |
426 | } | |
427 | ||
428 | static inline void qemu_get_be64s(QEMUFile *f, uint64_t *pv) | |
429 | { | |
430 | *pv = qemu_get_be64(f); | |
431 | } | |
432 | ||
433 | static inline void qemu_get_be32s(QEMUFile *f, uint32_t *pv) | |
434 | { | |
435 | *pv = qemu_get_be32(f); | |
436 | } | |
437 | ||
438 | static inline void qemu_get_be16s(QEMUFile *f, uint16_t *pv) | |
439 | { | |
440 | *pv = qemu_get_be16(f); | |
441 | } | |
442 | ||
443 | static inline void qemu_get_8s(QEMUFile *f, uint8_t *pv) | |
444 | { | |
445 | *pv = qemu_get_byte(f); | |
446 | } | |
447 | ||
448 | int64_t qemu_ftell(QEMUFile *f); | |
449 | int64_t qemu_fseek(QEMUFile *f, int64_t pos, int whence); | |
450 | ||
451 | typedef void SaveStateHandler(QEMUFile *f, void *opaque); | |
452 | typedef int LoadStateHandler(QEMUFile *f, void *opaque, int version_id); | |
453 | ||
454 | int qemu_loadvm(const char *filename); | |
455 | int qemu_savevm(const char *filename); | |
456 | int register_savevm(const char *idstr, | |
457 | int instance_id, | |
458 | int version_id, | |
459 | SaveStateHandler *save_state, | |
460 | LoadStateHandler *load_state, | |
461 | void *opaque); | |
462 | void qemu_get_timer(QEMUFile *f, QEMUTimer *ts); | |
463 | void qemu_put_timer(QEMUFile *f, QEMUTimer *ts); | |
c4b1fcc0 | 464 | |
fc01f7e7 FB |
465 | /* block.c */ |
466 | typedef struct BlockDriverState BlockDriverState; | |
467 | ||
c4b1fcc0 FB |
468 | BlockDriverState *bdrv_new(const char *device_name); |
469 | void bdrv_delete(BlockDriverState *bs); | |
470 | int bdrv_open(BlockDriverState *bs, const char *filename, int snapshot); | |
fc01f7e7 FB |
471 | void bdrv_close(BlockDriverState *bs); |
472 | int bdrv_read(BlockDriverState *bs, int64_t sector_num, | |
473 | uint8_t *buf, int nb_sectors); | |
474 | int bdrv_write(BlockDriverState *bs, int64_t sector_num, | |
475 | const uint8_t *buf, int nb_sectors); | |
476 | void bdrv_get_geometry(BlockDriverState *bs, int64_t *nb_sectors_ptr); | |
33e3963e | 477 | int bdrv_commit(BlockDriverState *bs); |
77fef8c1 | 478 | void bdrv_set_boot_sector(BlockDriverState *bs, const uint8_t *data, int size); |
33e3963e | 479 | |
c4b1fcc0 FB |
480 | #define BDRV_TYPE_HD 0 |
481 | #define BDRV_TYPE_CDROM 1 | |
482 | #define BDRV_TYPE_FLOPPY 2 | |
483 | ||
484 | void bdrv_set_geometry_hint(BlockDriverState *bs, | |
485 | int cyls, int heads, int secs); | |
486 | void bdrv_set_type_hint(BlockDriverState *bs, int type); | |
487 | void bdrv_get_geometry_hint(BlockDriverState *bs, | |
488 | int *pcyls, int *pheads, int *psecs); | |
489 | int bdrv_get_type_hint(BlockDriverState *bs); | |
490 | int bdrv_is_removable(BlockDriverState *bs); | |
491 | int bdrv_is_read_only(BlockDriverState *bs); | |
492 | int bdrv_is_inserted(BlockDriverState *bs); | |
493 | int bdrv_is_locked(BlockDriverState *bs); | |
494 | void bdrv_set_locked(BlockDriverState *bs, int locked); | |
495 | void bdrv_set_change_cb(BlockDriverState *bs, | |
496 | void (*change_cb)(void *opaque), void *opaque); | |
497 | ||
498 | void bdrv_info(void); | |
499 | BlockDriverState *bdrv_find(const char *name); | |
82c643ff | 500 | void bdrv_iterate(void (*it)(void *opaque, const char *name), void *opaque); |
c4b1fcc0 | 501 | |
26aa7d72 FB |
502 | /* ISA bus */ |
503 | ||
504 | extern target_phys_addr_t isa_mem_base; | |
505 | ||
506 | typedef void (IOPortWriteFunc)(void *opaque, uint32_t address, uint32_t data); | |
507 | typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address); | |
508 | ||
509 | int register_ioport_read(int start, int length, int size, | |
510 | IOPortReadFunc *func, void *opaque); | |
511 | int register_ioport_write(int start, int length, int size, | |
512 | IOPortWriteFunc *func, void *opaque); | |
69b91039 FB |
513 | void isa_unassign_ioport(int start, int length); |
514 | ||
515 | /* PCI bus */ | |
516 | ||
517 | extern int pci_enabled; | |
518 | ||
519 | extern target_phys_addr_t pci_mem_base; | |
520 | ||
46e50e9d | 521 | typedef struct PCIBus PCIBus; |
69b91039 FB |
522 | typedef struct PCIDevice PCIDevice; |
523 | ||
524 | typedef void PCIConfigWriteFunc(PCIDevice *pci_dev, | |
525 | uint32_t address, uint32_t data, int len); | |
526 | typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev, | |
527 | uint32_t address, int len); | |
528 | typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num, | |
529 | uint32_t addr, uint32_t size, int type); | |
530 | ||
531 | #define PCI_ADDRESS_SPACE_MEM 0x00 | |
532 | #define PCI_ADDRESS_SPACE_IO 0x01 | |
533 | #define PCI_ADDRESS_SPACE_MEM_PREFETCH 0x08 | |
534 | ||
535 | typedef struct PCIIORegion { | |
5768f5ac | 536 | uint32_t addr; /* current PCI mapping address. -1 means not mapped */ |
69b91039 FB |
537 | uint32_t size; |
538 | uint8_t type; | |
539 | PCIMapIORegionFunc *map_func; | |
540 | } PCIIORegion; | |
541 | ||
8a8696a3 FB |
542 | #define PCI_ROM_SLOT 6 |
543 | #define PCI_NUM_REGIONS 7 | |
69b91039 FB |
544 | struct PCIDevice { |
545 | /* PCI config space */ | |
546 | uint8_t config[256]; | |
547 | ||
548 | /* the following fields are read only */ | |
46e50e9d | 549 | PCIBus *bus; |
69b91039 FB |
550 | int devfn; |
551 | char name[64]; | |
8a8696a3 | 552 | PCIIORegion io_regions[PCI_NUM_REGIONS]; |
69b91039 FB |
553 | |
554 | /* do not access the following fields */ | |
555 | PCIConfigReadFunc *config_read; | |
556 | PCIConfigWriteFunc *config_write; | |
5768f5ac | 557 | int irq_index; |
69b91039 FB |
558 | }; |
559 | ||
46e50e9d FB |
560 | PCIDevice *pci_register_device(PCIBus *bus, const char *name, |
561 | int instance_size, int devfn, | |
69b91039 FB |
562 | PCIConfigReadFunc *config_read, |
563 | PCIConfigWriteFunc *config_write); | |
564 | ||
565 | void pci_register_io_region(PCIDevice *pci_dev, int region_num, | |
566 | uint32_t size, int type, | |
567 | PCIMapIORegionFunc *map_func); | |
568 | ||
5768f5ac FB |
569 | void pci_set_irq(PCIDevice *pci_dev, int irq_num, int level); |
570 | ||
571 | uint32_t pci_default_read_config(PCIDevice *d, | |
572 | uint32_t address, int len); | |
573 | void pci_default_write_config(PCIDevice *d, | |
574 | uint32_t address, uint32_t val, int len); | |
575 | ||
9995c51f FB |
576 | extern struct PIIX3State *piix3_state; |
577 | ||
46e50e9d FB |
578 | PCIBus *i440fx_init(void); |
579 | void piix3_init(PCIBus *bus); | |
69b91039 | 580 | void pci_bios_init(void); |
5768f5ac | 581 | void pci_info(void); |
26aa7d72 | 582 | |
77d4bc34 | 583 | /* temporary: will be moved in platform specific file */ |
46e50e9d FB |
584 | PCIBus *pci_prep_init(void); |
585 | struct openpic_t; | |
586 | void pci_pmac_set_openpic(PCIBus *bus, struct openpic_t *openpic); | |
587 | PCIBus *pci_pmac_init(void); | |
77d4bc34 | 588 | |
28b9b5af FB |
589 | /* openpic.c */ |
590 | typedef struct openpic_t openpic_t; | |
591 | void openpic_set_irq (openpic_t *opp, int n_IRQ, int level); | |
e2733d20 | 592 | openpic_t *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus); |
28b9b5af | 593 | |
313aa567 FB |
594 | /* vga.c */ |
595 | ||
4fa0f5d2 | 596 | #define VGA_RAM_SIZE (4096 * 1024) |
313aa567 | 597 | |
82c643ff | 598 | struct DisplayState { |
313aa567 FB |
599 | uint8_t *data; |
600 | int linesize; | |
601 | int depth; | |
82c643ff FB |
602 | int width; |
603 | int height; | |
313aa567 FB |
604 | void (*dpy_update)(struct DisplayState *s, int x, int y, int w, int h); |
605 | void (*dpy_resize)(struct DisplayState *s, int w, int h); | |
606 | void (*dpy_refresh)(struct DisplayState *s); | |
82c643ff | 607 | }; |
313aa567 FB |
608 | |
609 | static inline void dpy_update(DisplayState *s, int x, int y, int w, int h) | |
610 | { | |
611 | s->dpy_update(s, x, y, w, h); | |
612 | } | |
613 | ||
614 | static inline void dpy_resize(DisplayState *s, int w, int h) | |
615 | { | |
616 | s->dpy_resize(s, w, h); | |
617 | } | |
618 | ||
46e50e9d FB |
619 | int vga_initialize(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base, |
620 | unsigned long vga_ram_offset, int vga_ram_size); | |
313aa567 | 621 | void vga_update_display(void); |
ee38b4c8 | 622 | void vga_invalidate_display(void); |
59a983b9 | 623 | void vga_screen_dump(const char *filename); |
313aa567 | 624 | |
d6bfa22f | 625 | /* cirrus_vga.c */ |
46e50e9d | 626 | void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base, |
d6bfa22f | 627 | unsigned long vga_ram_offset, int vga_ram_size); |
d6bfa22f FB |
628 | void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base, |
629 | unsigned long vga_ram_offset, int vga_ram_size); | |
630 | ||
313aa567 FB |
631 | /* sdl.c */ |
632 | void sdl_display_init(DisplayState *ds); | |
633 | ||
5391d806 FB |
634 | /* ide.c */ |
635 | #define MAX_DISKS 4 | |
636 | ||
637 | extern BlockDriverState *bs_table[MAX_DISKS]; | |
638 | ||
69b91039 FB |
639 | void isa_ide_init(int iobase, int iobase2, int irq, |
640 | BlockDriverState *hd0, BlockDriverState *hd1); | |
46e50e9d FB |
641 | void pci_ide_init(PCIBus *bus, BlockDriverState **hd_table); |
642 | void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table); | |
28b9b5af FB |
643 | int pmac_ide_init (BlockDriverState **hd_table, |
644 | openpic_t *openpic, int irq); | |
5391d806 | 645 | |
27503323 FB |
646 | /* oss.c */ |
647 | typedef enum { | |
648 | AUD_FMT_U8, | |
649 | AUD_FMT_S8, | |
650 | AUD_FMT_U16, | |
651 | AUD_FMT_S16 | |
652 | } audfmt_e; | |
653 | ||
654 | void AUD_open (int rfreq, int rnchannels, audfmt_e rfmt); | |
655 | void AUD_reset (int rfreq, int rnchannels, audfmt_e rfmt); | |
656 | int AUD_write (void *in_buf, int size); | |
657 | void AUD_run (void); | |
658 | void AUD_adjust_estimate (int _leftover); | |
659 | int AUD_get_free (void); | |
660 | int AUD_get_live (void); | |
661 | int AUD_get_buffer_size (void); | |
662 | void AUD_init (void); | |
663 | ||
664 | /* dma.c */ | |
16f62432 | 665 | typedef int (*DMA_transfer_handler) (void *opaque, target_ulong addr, int size); |
27503323 FB |
666 | int DMA_get_channel_mode (int nchan); |
667 | void DMA_hold_DREQ (int nchan); | |
668 | void DMA_release_DREQ (int nchan); | |
16f62432 | 669 | void DMA_schedule(int nchan); |
27503323 | 670 | void DMA_run (void); |
28b9b5af | 671 | void DMA_init (int high_page_enable); |
27503323 | 672 | void DMA_register_channel (int nchan, |
16f62432 | 673 | DMA_transfer_handler transfer_handler, void *opaque); |
27503323 FB |
674 | |
675 | /* sb16.c */ | |
676 | void SB16_run (void); | |
677 | void SB16_init (void); | |
678 | ||
7138fcfb FB |
679 | /* fdc.c */ |
680 | #define MAX_FD 2 | |
681 | extern BlockDriverState *fd_table[MAX_FD]; | |
682 | ||
baca51fa FB |
683 | typedef struct fdctrl_t fdctrl_t; |
684 | ||
685 | fdctrl_t *fdctrl_init (int irq_lvl, int dma_chann, int mem_mapped, | |
686 | uint32_t io_base, | |
687 | BlockDriverState **fds); | |
688 | int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num); | |
7138fcfb | 689 | |
80cabfad FB |
690 | /* ne2000.c */ |
691 | ||
69b91039 | 692 | void isa_ne2000_init(int base, int irq, NetDriverState *nd); |
46e50e9d | 693 | void pci_ne2000_init(PCIBus *bus, NetDriverState *nd); |
80cabfad FB |
694 | |
695 | /* pckbd.c */ | |
696 | ||
80cabfad FB |
697 | void kbd_init(void); |
698 | ||
699 | /* mc146818rtc.c */ | |
700 | ||
8a7ddc38 | 701 | typedef struct RTCState RTCState; |
80cabfad | 702 | |
8a7ddc38 FB |
703 | RTCState *rtc_init(int base, int irq); |
704 | void rtc_set_memory(RTCState *s, int addr, int val); | |
705 | void rtc_set_date(RTCState *s, const struct tm *tm); | |
80cabfad FB |
706 | |
707 | /* serial.c */ | |
708 | ||
c4b1fcc0 | 709 | typedef struct SerialState SerialState; |
82c643ff | 710 | SerialState *serial_init(int base, int irq, CharDriverState *chr); |
80cabfad FB |
711 | |
712 | /* i8259.c */ | |
713 | ||
714 | void pic_set_irq(int irq, int level); | |
715 | void pic_init(void); | |
c5df018e | 716 | uint32_t pic_intack_read(CPUState *env); |
c20709aa | 717 | void pic_info(void); |
4a0fb71e | 718 | void irq_info(void); |
80cabfad FB |
719 | |
720 | /* i8254.c */ | |
721 | ||
722 | #define PIT_FREQ 1193182 | |
723 | ||
ec844b96 FB |
724 | typedef struct PITState PITState; |
725 | ||
726 | PITState *pit_init(int base, int irq); | |
727 | void pit_set_gate(PITState *pit, int channel, int val); | |
728 | int pit_get_gate(PITState *pit, int channel); | |
729 | int pit_get_out(PITState *pit, int channel, int64_t current_time); | |
80cabfad FB |
730 | |
731 | /* pc.c */ | |
732 | void pc_init(int ram_size, int vga_ram_size, int boot_device, | |
733 | DisplayState *ds, const char **fd_filename, int snapshot, | |
734 | const char *kernel_filename, const char *kernel_cmdline, | |
735 | const char *initrd_filename); | |
736 | ||
26aa7d72 FB |
737 | /* ppc.c */ |
738 | void ppc_init (int ram_size, int vga_ram_size, int boot_device, | |
739 | DisplayState *ds, const char **fd_filename, int snapshot, | |
740 | const char *kernel_filename, const char *kernel_cmdline, | |
741 | const char *initrd_filename); | |
77d4bc34 FB |
742 | void ppc_prep_init (int ram_size, int vga_ram_size, int boot_device, |
743 | DisplayState *ds, const char **fd_filename, int snapshot, | |
744 | const char *kernel_filename, const char *kernel_cmdline, | |
745 | const char *initrd_filename); | |
746 | void ppc_chrp_init(int ram_size, int vga_ram_size, int boot_device, | |
747 | DisplayState *ds, const char **fd_filename, int snapshot, | |
748 | const char *kernel_filename, const char *kernel_cmdline, | |
749 | const char *initrd_filename); | |
8cc43fef FB |
750 | #ifdef TARGET_PPC |
751 | ppc_tb_t *cpu_ppc_tb_init (CPUState *env, uint32_t freq); | |
752 | #endif | |
64201201 | 753 | void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val); |
77d4bc34 FB |
754 | |
755 | extern CPUWriteMemoryFunc *PPC_io_write[]; | |
756 | extern CPUReadMemoryFunc *PPC_io_read[]; | |
757 | extern int prep_enabled; | |
26aa7d72 | 758 | |
64201201 FB |
759 | /* NVRAM helpers */ |
760 | #include "hw/m48t59.h" | |
761 | ||
762 | void NVRAM_set_byte (m48t59_t *nvram, uint32_t addr, uint8_t value); | |
763 | uint8_t NVRAM_get_byte (m48t59_t *nvram, uint32_t addr); | |
764 | void NVRAM_set_word (m48t59_t *nvram, uint32_t addr, uint16_t value); | |
765 | uint16_t NVRAM_get_word (m48t59_t *nvram, uint32_t addr); | |
766 | void NVRAM_set_lword (m48t59_t *nvram, uint32_t addr, uint32_t value); | |
767 | uint32_t NVRAM_get_lword (m48t59_t *nvram, uint32_t addr); | |
768 | void NVRAM_set_string (m48t59_t *nvram, uint32_t addr, | |
769 | const unsigned char *str, uint32_t max); | |
770 | int NVRAM_get_string (m48t59_t *nvram, uint8_t *dst, uint16_t addr, int max); | |
771 | void NVRAM_set_crc (m48t59_t *nvram, uint32_t addr, | |
772 | uint32_t start, uint32_t count); | |
773 | int PPC_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size, | |
774 | const unsigned char *arch, | |
775 | uint32_t RAM_size, int boot_device, | |
776 | uint32_t kernel_image, uint32_t kernel_size, | |
28b9b5af | 777 | const char *cmdline, |
64201201 | 778 | uint32_t initrd_image, uint32_t initrd_size, |
28b9b5af FB |
779 | uint32_t NVRAM_image, |
780 | int width, int height, int depth); | |
64201201 | 781 | |
63066f4f FB |
782 | /* adb.c */ |
783 | ||
784 | #define MAX_ADB_DEVICES 16 | |
785 | ||
e2733d20 | 786 | #define ADB_MAX_OUT_LEN 16 |
63066f4f | 787 | |
e2733d20 | 788 | typedef struct ADBDevice ADBDevice; |
63066f4f | 789 | |
e2733d20 FB |
790 | /* buf = NULL means polling */ |
791 | typedef int ADBDeviceRequest(ADBDevice *d, uint8_t *buf_out, | |
792 | const uint8_t *buf, int len); | |
12c28fed FB |
793 | typedef int ADBDeviceReset(ADBDevice *d); |
794 | ||
63066f4f FB |
795 | struct ADBDevice { |
796 | struct ADBBusState *bus; | |
797 | int devaddr; | |
798 | int handler; | |
e2733d20 | 799 | ADBDeviceRequest *devreq; |
12c28fed | 800 | ADBDeviceReset *devreset; |
63066f4f FB |
801 | void *opaque; |
802 | }; | |
803 | ||
804 | typedef struct ADBBusState { | |
805 | ADBDevice devices[MAX_ADB_DEVICES]; | |
806 | int nb_devices; | |
e2733d20 | 807 | int poll_index; |
63066f4f FB |
808 | } ADBBusState; |
809 | ||
e2733d20 FB |
810 | int adb_request(ADBBusState *s, uint8_t *buf_out, |
811 | const uint8_t *buf, int len); | |
812 | int adb_poll(ADBBusState *s, uint8_t *buf_out); | |
63066f4f FB |
813 | |
814 | ADBDevice *adb_register_device(ADBBusState *s, int devaddr, | |
e2733d20 | 815 | ADBDeviceRequest *devreq, |
12c28fed | 816 | ADBDeviceReset *devreset, |
63066f4f FB |
817 | void *opaque); |
818 | void adb_kbd_init(ADBBusState *bus); | |
819 | void adb_mouse_init(ADBBusState *bus); | |
820 | ||
821 | /* cuda.c */ | |
822 | ||
823 | extern ADBBusState adb_bus; | |
28b9b5af | 824 | int cuda_init(openpic_t *openpic, int irq); |
63066f4f | 825 | |
c4b1fcc0 | 826 | /* monitor.c */ |
82c643ff | 827 | void monitor_init(CharDriverState *hd, int show_banner); |
40c3bac3 | 828 | void term_printf(const char *fmt, ...) __attribute__ ((__format__ (__printf__, 1, 2))); |
c4b1fcc0 FB |
829 | void term_flush(void); |
830 | void term_print_help(void); | |
831 | ||
8a7ddc38 FB |
832 | /* gdbstub.c */ |
833 | ||
834 | #define DEFAULT_GDBSTUB_PORT 1234 | |
835 | ||
836 | int gdbserver_start(int port); | |
837 | ||
fc01f7e7 | 838 | #endif /* VL_H */ |