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fc01f7e7 FB |
1 | /* |
2 | * QEMU System Emulator header | |
3 | * | |
4 | * Copyright (c) 2003 Fabrice Bellard | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
7 | * of this software and associated documentation files (the "Software"), to deal | |
8 | * in the Software without restriction, including without limitation the rights | |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 | * copies of the Software, and to permit persons to whom the Software is | |
11 | * furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
22 | * THE SOFTWARE. | |
23 | */ | |
24 | #ifndef VL_H | |
25 | #define VL_H | |
26 | ||
67b915a5 FB |
27 | /* we put basic includes here to avoid repeating them in device drivers */ |
28 | #include <stdlib.h> | |
29 | #include <stdio.h> | |
30 | #include <stdarg.h> | |
31 | #include <string.h> | |
32 | #include <inttypes.h> | |
85571bc7 | 33 | #include <limits.h> |
8a7ddc38 | 34 | #include <time.h> |
67b915a5 FB |
35 | #include <ctype.h> |
36 | #include <errno.h> | |
37 | #include <unistd.h> | |
38 | #include <fcntl.h> | |
7d3505c5 | 39 | #include <sys/stat.h> |
fb065187 | 40 | #include "audio/audio.h" |
67b915a5 FB |
41 | |
42 | #ifndef O_LARGEFILE | |
43 | #define O_LARGEFILE 0 | |
44 | #endif | |
40c3bac3 FB |
45 | #ifndef O_BINARY |
46 | #define O_BINARY 0 | |
47 | #endif | |
67b915a5 FB |
48 | |
49 | #ifdef _WIN32 | |
57d1a2b6 FB |
50 | #define lseek _lseeki64 |
51 | #define ENOTSUP 4096 | |
52 | /* XXX: find 64 bit version */ | |
53 | #define ftruncate chsize | |
54 | ||
55 | static inline char *realpath(const char *path, char *resolved_path) | |
56 | { | |
57 | _fullpath(resolved_path, path, _MAX_PATH); | |
58 | return resolved_path; | |
59 | } | |
67b915a5 | 60 | #endif |
8a7ddc38 | 61 | |
ea2384d3 FB |
62 | #ifdef QEMU_TOOL |
63 | ||
64 | /* we use QEMU_TOOL in the command line tools which do not depend on | |
65 | the target CPU type */ | |
66 | #include "config-host.h" | |
67 | #include <setjmp.h> | |
68 | #include "osdep.h" | |
69 | #include "bswap.h" | |
70 | ||
71 | #else | |
72 | ||
16f62432 | 73 | #include "cpu.h" |
1fddef4b | 74 | #include "gdbstub.h" |
16f62432 | 75 | |
ea2384d3 FB |
76 | #endif /* !defined(QEMU_TOOL) */ |
77 | ||
67b915a5 FB |
78 | #ifndef glue |
79 | #define xglue(x, y) x ## y | |
80 | #define glue(x, y) xglue(x, y) | |
81 | #define stringify(s) tostring(s) | |
82 | #define tostring(s) #s | |
83 | #endif | |
84 | ||
33e3963e | 85 | /* vl.c */ |
80cabfad | 86 | uint64_t muldiv64(uint64_t a, uint32_t b, uint32_t c); |
313aa567 | 87 | |
80cabfad FB |
88 | void hw_error(const char *fmt, ...); |
89 | ||
7587cf44 | 90 | int get_image_size(const char *filename); |
80cabfad FB |
91 | int load_image(const char *filename, uint8_t *addr); |
92 | extern const char *bios_dir; | |
93 | ||
94 | void pstrcpy(char *buf, int buf_size, const char *str); | |
95 | char *pstrcat(char *buf, int buf_size, const char *s); | |
82c643ff | 96 | int strstart(const char *str, const char *val, const char **ptr); |
c4b1fcc0 | 97 | |
8a7ddc38 FB |
98 | extern int vm_running; |
99 | ||
0bd48850 FB |
100 | typedef struct vm_change_state_entry VMChangeStateEntry; |
101 | typedef void VMChangeStateHandler(void *opaque, int running); | |
8a7ddc38 FB |
102 | typedef void VMStopHandler(void *opaque, int reason); |
103 | ||
0bd48850 FB |
104 | VMChangeStateEntry *qemu_add_vm_change_state_handler(VMChangeStateHandler *cb, |
105 | void *opaque); | |
106 | void qemu_del_vm_change_state_handler(VMChangeStateEntry *e); | |
107 | ||
8a7ddc38 FB |
108 | int qemu_add_vm_stop_handler(VMStopHandler *cb, void *opaque); |
109 | void qemu_del_vm_stop_handler(VMStopHandler *cb, void *opaque); | |
110 | ||
111 | void vm_start(void); | |
112 | void vm_stop(int reason); | |
113 | ||
bb0c6722 FB |
114 | typedef void QEMUResetHandler(void *opaque); |
115 | ||
116 | void qemu_register_reset(QEMUResetHandler *func, void *opaque); | |
117 | void qemu_system_reset_request(void); | |
118 | void qemu_system_shutdown_request(void); | |
3475187d FB |
119 | void qemu_system_powerdown_request(void); |
120 | #if !defined(TARGET_SPARC) | |
121 | // Please implement a power failure function to signal the OS | |
122 | #define qemu_system_powerdown() do{}while(0) | |
123 | #else | |
124 | void qemu_system_powerdown(void); | |
125 | #endif | |
bb0c6722 | 126 | |
ea2384d3 FB |
127 | void main_loop_wait(int timeout); |
128 | ||
aaaa7df6 | 129 | extern int audio_enabled; |
fb065187 FB |
130 | extern int sb16_enabled; |
131 | extern int adlib_enabled; | |
132 | extern int gus_enabled; | |
1d14ffa9 | 133 | extern int es1370_enabled; |
0ced6589 FB |
134 | extern int ram_size; |
135 | extern int bios_size; | |
ee22c2f7 | 136 | extern int rtc_utc; |
1f04275e | 137 | extern int cirrus_vga_enabled; |
28b9b5af FB |
138 | extern int graphic_width; |
139 | extern int graphic_height; | |
140 | extern int graphic_depth; | |
3d11d0eb | 141 | extern const char *keyboard_layout; |
d993e026 | 142 | extern int kqemu_allowed; |
a09db21f | 143 | extern int win2k_install_hack; |
bb36d470 | 144 | extern int usb_enabled; |
6a00d601 | 145 | extern int smp_cpus; |
0ced6589 FB |
146 | |
147 | /* XXX: make it dynamic */ | |
148 | #if defined (TARGET_PPC) | |
d5295253 | 149 | #define BIOS_SIZE ((512 + 32) * 1024) |
6af0bf9c FB |
150 | #elif defined(TARGET_MIPS) |
151 | #define BIOS_SIZE (128 * 1024) | |
0ced6589 | 152 | #else |
7587cf44 | 153 | #define BIOS_SIZE ((256 + 64) * 1024) |
0ced6589 | 154 | #endif |
aaaa7df6 | 155 | |
63066f4f FB |
156 | /* keyboard/mouse support */ |
157 | ||
158 | #define MOUSE_EVENT_LBUTTON 0x01 | |
159 | #define MOUSE_EVENT_RBUTTON 0x02 | |
160 | #define MOUSE_EVENT_MBUTTON 0x04 | |
161 | ||
162 | typedef void QEMUPutKBDEvent(void *opaque, int keycode); | |
163 | typedef void QEMUPutMouseEvent(void *opaque, int dx, int dy, int dz, int buttons_state); | |
164 | ||
165 | void qemu_add_kbd_event_handler(QEMUPutKBDEvent *func, void *opaque); | |
166 | void qemu_add_mouse_event_handler(QEMUPutMouseEvent *func, void *opaque); | |
167 | ||
168 | void kbd_put_keycode(int keycode); | |
169 | void kbd_mouse_event(int dx, int dy, int dz, int buttons_state); | |
170 | ||
82c643ff FB |
171 | /* keysym is a unicode code except for special keys (see QEMU_KEY_xxx |
172 | constants) */ | |
173 | #define QEMU_KEY_ESC1(c) ((c) | 0xe100) | |
174 | #define QEMU_KEY_BACKSPACE 0x007f | |
175 | #define QEMU_KEY_UP QEMU_KEY_ESC1('A') | |
176 | #define QEMU_KEY_DOWN QEMU_KEY_ESC1('B') | |
177 | #define QEMU_KEY_RIGHT QEMU_KEY_ESC1('C') | |
178 | #define QEMU_KEY_LEFT QEMU_KEY_ESC1('D') | |
179 | #define QEMU_KEY_HOME QEMU_KEY_ESC1(1) | |
180 | #define QEMU_KEY_END QEMU_KEY_ESC1(4) | |
181 | #define QEMU_KEY_PAGEUP QEMU_KEY_ESC1(5) | |
182 | #define QEMU_KEY_PAGEDOWN QEMU_KEY_ESC1(6) | |
183 | #define QEMU_KEY_DELETE QEMU_KEY_ESC1(3) | |
184 | ||
185 | #define QEMU_KEY_CTRL_UP 0xe400 | |
186 | #define QEMU_KEY_CTRL_DOWN 0xe401 | |
187 | #define QEMU_KEY_CTRL_LEFT 0xe402 | |
188 | #define QEMU_KEY_CTRL_RIGHT 0xe403 | |
189 | #define QEMU_KEY_CTRL_HOME 0xe404 | |
190 | #define QEMU_KEY_CTRL_END 0xe405 | |
191 | #define QEMU_KEY_CTRL_PAGEUP 0xe406 | |
192 | #define QEMU_KEY_CTRL_PAGEDOWN 0xe407 | |
193 | ||
194 | void kbd_put_keysym(int keysym); | |
195 | ||
c20709aa FB |
196 | /* async I/O support */ |
197 | ||
198 | typedef void IOReadHandler(void *opaque, const uint8_t *buf, int size); | |
199 | typedef int IOCanRWHandler(void *opaque); | |
7c9d8e07 | 200 | typedef void IOHandler(void *opaque); |
c20709aa | 201 | |
7c9d8e07 FB |
202 | int qemu_set_fd_handler2(int fd, |
203 | IOCanRWHandler *fd_read_poll, | |
204 | IOHandler *fd_read, | |
205 | IOHandler *fd_write, | |
206 | void *opaque); | |
207 | int qemu_set_fd_handler(int fd, | |
208 | IOHandler *fd_read, | |
209 | IOHandler *fd_write, | |
210 | void *opaque); | |
c20709aa | 211 | |
82c643ff FB |
212 | /* character device */ |
213 | ||
214 | #define CHR_EVENT_BREAK 0 /* serial break char */ | |
ea2384d3 | 215 | #define CHR_EVENT_FOCUS 1 /* focus to this terminal (modal input needed) */ |
82c643ff | 216 | |
2122c51a FB |
217 | |
218 | ||
219 | #define CHR_IOCTL_SERIAL_SET_PARAMS 1 | |
220 | typedef struct { | |
221 | int speed; | |
222 | int parity; | |
223 | int data_bits; | |
224 | int stop_bits; | |
225 | } QEMUSerialSetParams; | |
226 | ||
227 | #define CHR_IOCTL_SERIAL_SET_BREAK 2 | |
228 | ||
229 | #define CHR_IOCTL_PP_READ_DATA 3 | |
230 | #define CHR_IOCTL_PP_WRITE_DATA 4 | |
231 | #define CHR_IOCTL_PP_READ_CONTROL 5 | |
232 | #define CHR_IOCTL_PP_WRITE_CONTROL 6 | |
233 | #define CHR_IOCTL_PP_READ_STATUS 7 | |
234 | ||
82c643ff FB |
235 | typedef void IOEventHandler(void *opaque, int event); |
236 | ||
237 | typedef struct CharDriverState { | |
238 | int (*chr_write)(struct CharDriverState *s, const uint8_t *buf, int len); | |
239 | void (*chr_add_read_handler)(struct CharDriverState *s, | |
240 | IOCanRWHandler *fd_can_read, | |
241 | IOReadHandler *fd_read, void *opaque); | |
2122c51a | 242 | int (*chr_ioctl)(struct CharDriverState *s, int cmd, void *arg); |
82c643ff | 243 | IOEventHandler *chr_event; |
eb45f5fe | 244 | void (*chr_send_event)(struct CharDriverState *chr, int event); |
82c643ff FB |
245 | void *opaque; |
246 | } CharDriverState; | |
247 | ||
248 | void qemu_chr_printf(CharDriverState *s, const char *fmt, ...); | |
249 | int qemu_chr_write(CharDriverState *s, const uint8_t *buf, int len); | |
ea2384d3 | 250 | void qemu_chr_send_event(CharDriverState *s, int event); |
82c643ff FB |
251 | void qemu_chr_add_read_handler(CharDriverState *s, |
252 | IOCanRWHandler *fd_can_read, | |
253 | IOReadHandler *fd_read, void *opaque); | |
254 | void qemu_chr_add_event_handler(CharDriverState *s, IOEventHandler *chr_event); | |
2122c51a | 255 | int qemu_chr_ioctl(CharDriverState *s, int cmd, void *arg); |
f8d179e3 | 256 | |
82c643ff FB |
257 | /* consoles */ |
258 | ||
259 | typedef struct DisplayState DisplayState; | |
260 | typedef struct TextConsole TextConsole; | |
261 | ||
262 | extern TextConsole *vga_console; | |
263 | ||
264 | TextConsole *graphic_console_init(DisplayState *ds); | |
265 | int is_active_console(TextConsole *s); | |
266 | CharDriverState *text_console_init(DisplayState *ds); | |
267 | void console_select(unsigned int index); | |
268 | ||
8d11df9e FB |
269 | /* serial ports */ |
270 | ||
271 | #define MAX_SERIAL_PORTS 4 | |
272 | ||
273 | extern CharDriverState *serial_hds[MAX_SERIAL_PORTS]; | |
274 | ||
6508fe59 FB |
275 | /* parallel ports */ |
276 | ||
277 | #define MAX_PARALLEL_PORTS 3 | |
278 | ||
279 | extern CharDriverState *parallel_hds[MAX_PARALLEL_PORTS]; | |
280 | ||
7c9d8e07 FB |
281 | /* VLANs support */ |
282 | ||
283 | typedef struct VLANClientState VLANClientState; | |
284 | ||
285 | struct VLANClientState { | |
286 | IOReadHandler *fd_read; | |
287 | void *opaque; | |
288 | struct VLANClientState *next; | |
289 | struct VLANState *vlan; | |
290 | char info_str[256]; | |
291 | }; | |
292 | ||
293 | typedef struct VLANState { | |
294 | int id; | |
295 | VLANClientState *first_client; | |
296 | struct VLANState *next; | |
297 | } VLANState; | |
298 | ||
299 | VLANState *qemu_find_vlan(int id); | |
300 | VLANClientState *qemu_new_vlan_client(VLANState *vlan, | |
301 | IOReadHandler *fd_read, void *opaque); | |
302 | void qemu_send_packet(VLANClientState *vc, const uint8_t *buf, int size); | |
303 | ||
304 | void do_info_network(void); | |
305 | ||
306 | /* NIC info */ | |
c4b1fcc0 FB |
307 | |
308 | #define MAX_NICS 8 | |
309 | ||
7c9d8e07 | 310 | typedef struct NICInfo { |
c4b1fcc0 | 311 | uint8_t macaddr[6]; |
7c9d8e07 FB |
312 | VLANState *vlan; |
313 | } NICInfo; | |
c4b1fcc0 FB |
314 | |
315 | extern int nb_nics; | |
7c9d8e07 | 316 | extern NICInfo nd_table[MAX_NICS]; |
8a7ddc38 FB |
317 | |
318 | /* timers */ | |
319 | ||
320 | typedef struct QEMUClock QEMUClock; | |
321 | typedef struct QEMUTimer QEMUTimer; | |
322 | typedef void QEMUTimerCB(void *opaque); | |
323 | ||
324 | /* The real time clock should be used only for stuff which does not | |
325 | change the virtual machine state, as it is run even if the virtual | |
69b91039 | 326 | machine is stopped. The real time clock has a frequency of 1000 |
8a7ddc38 FB |
327 | Hz. */ |
328 | extern QEMUClock *rt_clock; | |
329 | ||
e80cfcfc | 330 | /* The virtual clock is only run during the emulation. It is stopped |
8a7ddc38 FB |
331 | when the virtual machine is stopped. Virtual timers use a high |
332 | precision clock, usually cpu cycles (use ticks_per_sec). */ | |
333 | extern QEMUClock *vm_clock; | |
334 | ||
335 | int64_t qemu_get_clock(QEMUClock *clock); | |
336 | ||
337 | QEMUTimer *qemu_new_timer(QEMUClock *clock, QEMUTimerCB *cb, void *opaque); | |
338 | void qemu_free_timer(QEMUTimer *ts); | |
339 | void qemu_del_timer(QEMUTimer *ts); | |
340 | void qemu_mod_timer(QEMUTimer *ts, int64_t expire_time); | |
341 | int qemu_timer_pending(QEMUTimer *ts); | |
342 | ||
343 | extern int64_t ticks_per_sec; | |
344 | extern int pit_min_timer_count; | |
345 | ||
346 | void cpu_enable_ticks(void); | |
347 | void cpu_disable_ticks(void); | |
348 | ||
349 | /* VM Load/Save */ | |
350 | ||
351 | typedef FILE QEMUFile; | |
352 | ||
353 | void qemu_put_buffer(QEMUFile *f, const uint8_t *buf, int size); | |
354 | void qemu_put_byte(QEMUFile *f, int v); | |
355 | void qemu_put_be16(QEMUFile *f, unsigned int v); | |
356 | void qemu_put_be32(QEMUFile *f, unsigned int v); | |
357 | void qemu_put_be64(QEMUFile *f, uint64_t v); | |
358 | int qemu_get_buffer(QEMUFile *f, uint8_t *buf, int size); | |
359 | int qemu_get_byte(QEMUFile *f); | |
360 | unsigned int qemu_get_be16(QEMUFile *f); | |
361 | unsigned int qemu_get_be32(QEMUFile *f); | |
362 | uint64_t qemu_get_be64(QEMUFile *f); | |
363 | ||
364 | static inline void qemu_put_be64s(QEMUFile *f, const uint64_t *pv) | |
365 | { | |
366 | qemu_put_be64(f, *pv); | |
367 | } | |
368 | ||
369 | static inline void qemu_put_be32s(QEMUFile *f, const uint32_t *pv) | |
370 | { | |
371 | qemu_put_be32(f, *pv); | |
372 | } | |
373 | ||
374 | static inline void qemu_put_be16s(QEMUFile *f, const uint16_t *pv) | |
375 | { | |
376 | qemu_put_be16(f, *pv); | |
377 | } | |
378 | ||
379 | static inline void qemu_put_8s(QEMUFile *f, const uint8_t *pv) | |
380 | { | |
381 | qemu_put_byte(f, *pv); | |
382 | } | |
383 | ||
384 | static inline void qemu_get_be64s(QEMUFile *f, uint64_t *pv) | |
385 | { | |
386 | *pv = qemu_get_be64(f); | |
387 | } | |
388 | ||
389 | static inline void qemu_get_be32s(QEMUFile *f, uint32_t *pv) | |
390 | { | |
391 | *pv = qemu_get_be32(f); | |
392 | } | |
393 | ||
394 | static inline void qemu_get_be16s(QEMUFile *f, uint16_t *pv) | |
395 | { | |
396 | *pv = qemu_get_be16(f); | |
397 | } | |
398 | ||
399 | static inline void qemu_get_8s(QEMUFile *f, uint8_t *pv) | |
400 | { | |
401 | *pv = qemu_get_byte(f); | |
402 | } | |
403 | ||
c27004ec FB |
404 | #if TARGET_LONG_BITS == 64 |
405 | #define qemu_put_betl qemu_put_be64 | |
406 | #define qemu_get_betl qemu_get_be64 | |
407 | #define qemu_put_betls qemu_put_be64s | |
408 | #define qemu_get_betls qemu_get_be64s | |
409 | #else | |
410 | #define qemu_put_betl qemu_put_be32 | |
411 | #define qemu_get_betl qemu_get_be32 | |
412 | #define qemu_put_betls qemu_put_be32s | |
413 | #define qemu_get_betls qemu_get_be32s | |
414 | #endif | |
415 | ||
8a7ddc38 FB |
416 | int64_t qemu_ftell(QEMUFile *f); |
417 | int64_t qemu_fseek(QEMUFile *f, int64_t pos, int whence); | |
418 | ||
419 | typedef void SaveStateHandler(QEMUFile *f, void *opaque); | |
420 | typedef int LoadStateHandler(QEMUFile *f, void *opaque, int version_id); | |
421 | ||
422 | int qemu_loadvm(const char *filename); | |
423 | int qemu_savevm(const char *filename); | |
424 | int register_savevm(const char *idstr, | |
425 | int instance_id, | |
426 | int version_id, | |
427 | SaveStateHandler *save_state, | |
428 | LoadStateHandler *load_state, | |
429 | void *opaque); | |
430 | void qemu_get_timer(QEMUFile *f, QEMUTimer *ts); | |
431 | void qemu_put_timer(QEMUFile *f, QEMUTimer *ts); | |
c4b1fcc0 | 432 | |
6a00d601 FB |
433 | void cpu_save(QEMUFile *f, void *opaque); |
434 | int cpu_load(QEMUFile *f, void *opaque, int version_id); | |
435 | ||
fc01f7e7 FB |
436 | /* block.c */ |
437 | typedef struct BlockDriverState BlockDriverState; | |
ea2384d3 FB |
438 | typedef struct BlockDriver BlockDriver; |
439 | ||
440 | extern BlockDriver bdrv_raw; | |
441 | extern BlockDriver bdrv_cow; | |
442 | extern BlockDriver bdrv_qcow; | |
443 | extern BlockDriver bdrv_vmdk; | |
3c56521b | 444 | extern BlockDriver bdrv_cloop; |
585d0ed9 | 445 | extern BlockDriver bdrv_dmg; |
a8753c34 | 446 | extern BlockDriver bdrv_bochs; |
6a0f9e82 | 447 | extern BlockDriver bdrv_vpc; |
de167e41 | 448 | extern BlockDriver bdrv_vvfat; |
ea2384d3 FB |
449 | |
450 | void bdrv_init(void); | |
451 | BlockDriver *bdrv_find_format(const char *format_name); | |
452 | int bdrv_create(BlockDriver *drv, | |
453 | const char *filename, int64_t size_in_sectors, | |
454 | const char *backing_file, int flags); | |
c4b1fcc0 FB |
455 | BlockDriverState *bdrv_new(const char *device_name); |
456 | void bdrv_delete(BlockDriverState *bs); | |
457 | int bdrv_open(BlockDriverState *bs, const char *filename, int snapshot); | |
ea2384d3 FB |
458 | int bdrv_open2(BlockDriverState *bs, const char *filename, int snapshot, |
459 | BlockDriver *drv); | |
fc01f7e7 FB |
460 | void bdrv_close(BlockDriverState *bs); |
461 | int bdrv_read(BlockDriverState *bs, int64_t sector_num, | |
462 | uint8_t *buf, int nb_sectors); | |
463 | int bdrv_write(BlockDriverState *bs, int64_t sector_num, | |
464 | const uint8_t *buf, int nb_sectors); | |
465 | void bdrv_get_geometry(BlockDriverState *bs, int64_t *nb_sectors_ptr); | |
33e3963e | 466 | int bdrv_commit(BlockDriverState *bs); |
77fef8c1 | 467 | void bdrv_set_boot_sector(BlockDriverState *bs, const uint8_t *data, int size); |
33e3963e | 468 | |
c4b1fcc0 FB |
469 | #define BDRV_TYPE_HD 0 |
470 | #define BDRV_TYPE_CDROM 1 | |
471 | #define BDRV_TYPE_FLOPPY 2 | |
46d4767d FB |
472 | #define BIOS_ATA_TRANSLATION_AUTO 0 |
473 | #define BIOS_ATA_TRANSLATION_NONE 1 | |
474 | #define BIOS_ATA_TRANSLATION_LBA 2 | |
c4b1fcc0 FB |
475 | |
476 | void bdrv_set_geometry_hint(BlockDriverState *bs, | |
477 | int cyls, int heads, int secs); | |
478 | void bdrv_set_type_hint(BlockDriverState *bs, int type); | |
46d4767d | 479 | void bdrv_set_translation_hint(BlockDriverState *bs, int translation); |
c4b1fcc0 FB |
480 | void bdrv_get_geometry_hint(BlockDriverState *bs, |
481 | int *pcyls, int *pheads, int *psecs); | |
482 | int bdrv_get_type_hint(BlockDriverState *bs); | |
46d4767d | 483 | int bdrv_get_translation_hint(BlockDriverState *bs); |
c4b1fcc0 FB |
484 | int bdrv_is_removable(BlockDriverState *bs); |
485 | int bdrv_is_read_only(BlockDriverState *bs); | |
486 | int bdrv_is_inserted(BlockDriverState *bs); | |
487 | int bdrv_is_locked(BlockDriverState *bs); | |
488 | void bdrv_set_locked(BlockDriverState *bs, int locked); | |
489 | void bdrv_set_change_cb(BlockDriverState *bs, | |
490 | void (*change_cb)(void *opaque), void *opaque); | |
ea2384d3 | 491 | void bdrv_get_format(BlockDriverState *bs, char *buf, int buf_size); |
c4b1fcc0 FB |
492 | void bdrv_info(void); |
493 | BlockDriverState *bdrv_find(const char *name); | |
82c643ff | 494 | void bdrv_iterate(void (*it)(void *opaque, const char *name), void *opaque); |
ea2384d3 FB |
495 | int bdrv_is_encrypted(BlockDriverState *bs); |
496 | int bdrv_set_key(BlockDriverState *bs, const char *key); | |
497 | void bdrv_iterate_format(void (*it)(void *opaque, const char *name), | |
498 | void *opaque); | |
499 | const char *bdrv_get_device_name(BlockDriverState *bs); | |
c4b1fcc0 | 500 | |
ea2384d3 FB |
501 | int qcow_get_cluster_size(BlockDriverState *bs); |
502 | int qcow_compress_cluster(BlockDriverState *bs, int64_t sector_num, | |
503 | const uint8_t *buf); | |
504 | ||
505 | #ifndef QEMU_TOOL | |
54fa5af5 FB |
506 | |
507 | typedef void QEMUMachineInitFunc(int ram_size, int vga_ram_size, | |
508 | int boot_device, | |
509 | DisplayState *ds, const char **fd_filename, int snapshot, | |
510 | const char *kernel_filename, const char *kernel_cmdline, | |
511 | const char *initrd_filename); | |
512 | ||
513 | typedef struct QEMUMachine { | |
514 | const char *name; | |
515 | const char *desc; | |
516 | QEMUMachineInitFunc *init; | |
517 | struct QEMUMachine *next; | |
518 | } QEMUMachine; | |
519 | ||
520 | int qemu_register_machine(QEMUMachine *m); | |
521 | ||
522 | typedef void SetIRQFunc(void *opaque, int irq_num, int level); | |
3de388f6 | 523 | typedef void IRQRequestFunc(void *opaque, int level); |
54fa5af5 | 524 | |
26aa7d72 FB |
525 | /* ISA bus */ |
526 | ||
527 | extern target_phys_addr_t isa_mem_base; | |
528 | ||
529 | typedef void (IOPortWriteFunc)(void *opaque, uint32_t address, uint32_t data); | |
530 | typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address); | |
531 | ||
532 | int register_ioport_read(int start, int length, int size, | |
533 | IOPortReadFunc *func, void *opaque); | |
534 | int register_ioport_write(int start, int length, int size, | |
535 | IOPortWriteFunc *func, void *opaque); | |
69b91039 FB |
536 | void isa_unassign_ioport(int start, int length); |
537 | ||
538 | /* PCI bus */ | |
539 | ||
69b91039 FB |
540 | extern target_phys_addr_t pci_mem_base; |
541 | ||
46e50e9d | 542 | typedef struct PCIBus PCIBus; |
69b91039 FB |
543 | typedef struct PCIDevice PCIDevice; |
544 | ||
545 | typedef void PCIConfigWriteFunc(PCIDevice *pci_dev, | |
546 | uint32_t address, uint32_t data, int len); | |
547 | typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev, | |
548 | uint32_t address, int len); | |
549 | typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num, | |
550 | uint32_t addr, uint32_t size, int type); | |
551 | ||
552 | #define PCI_ADDRESS_SPACE_MEM 0x00 | |
553 | #define PCI_ADDRESS_SPACE_IO 0x01 | |
554 | #define PCI_ADDRESS_SPACE_MEM_PREFETCH 0x08 | |
555 | ||
556 | typedef struct PCIIORegion { | |
5768f5ac | 557 | uint32_t addr; /* current PCI mapping address. -1 means not mapped */ |
69b91039 FB |
558 | uint32_t size; |
559 | uint8_t type; | |
560 | PCIMapIORegionFunc *map_func; | |
561 | } PCIIORegion; | |
562 | ||
8a8696a3 FB |
563 | #define PCI_ROM_SLOT 6 |
564 | #define PCI_NUM_REGIONS 7 | |
69b91039 FB |
565 | struct PCIDevice { |
566 | /* PCI config space */ | |
567 | uint8_t config[256]; | |
568 | ||
569 | /* the following fields are read only */ | |
46e50e9d | 570 | PCIBus *bus; |
69b91039 FB |
571 | int devfn; |
572 | char name[64]; | |
8a8696a3 | 573 | PCIIORegion io_regions[PCI_NUM_REGIONS]; |
69b91039 FB |
574 | |
575 | /* do not access the following fields */ | |
576 | PCIConfigReadFunc *config_read; | |
577 | PCIConfigWriteFunc *config_write; | |
5768f5ac | 578 | int irq_index; |
69b91039 FB |
579 | }; |
580 | ||
46e50e9d FB |
581 | PCIDevice *pci_register_device(PCIBus *bus, const char *name, |
582 | int instance_size, int devfn, | |
69b91039 FB |
583 | PCIConfigReadFunc *config_read, |
584 | PCIConfigWriteFunc *config_write); | |
585 | ||
586 | void pci_register_io_region(PCIDevice *pci_dev, int region_num, | |
587 | uint32_t size, int type, | |
588 | PCIMapIORegionFunc *map_func); | |
589 | ||
5768f5ac FB |
590 | void pci_set_irq(PCIDevice *pci_dev, int irq_num, int level); |
591 | ||
592 | uint32_t pci_default_read_config(PCIDevice *d, | |
593 | uint32_t address, int len); | |
594 | void pci_default_write_config(PCIDevice *d, | |
595 | uint32_t address, uint32_t val, int len); | |
30ca2aab FB |
596 | void generic_pci_save(QEMUFile* f, void *opaque); |
597 | int generic_pci_load(QEMUFile* f, void *opaque, int version_id); | |
5768f5ac | 598 | |
9995c51f FB |
599 | extern struct PIIX3State *piix3_state; |
600 | ||
46e50e9d FB |
601 | PCIBus *i440fx_init(void); |
602 | void piix3_init(PCIBus *bus); | |
69b91039 | 603 | void pci_bios_init(void); |
5768f5ac | 604 | void pci_info(void); |
26aa7d72 | 605 | |
77d4bc34 | 606 | /* temporary: will be moved in platform specific file */ |
54fa5af5 | 607 | void pci_set_pic(PCIBus *bus, SetIRQFunc *set_irq, void *irq_opaque); |
46e50e9d | 608 | PCIBus *pci_prep_init(void); |
54fa5af5 | 609 | PCIBus *pci_grackle_init(uint32_t base); |
46e50e9d | 610 | PCIBus *pci_pmac_init(void); |
83469015 | 611 | PCIBus *pci_apb_init(target_ulong special_base, target_ulong mem_base); |
77d4bc34 | 612 | |
28b9b5af FB |
613 | /* openpic.c */ |
614 | typedef struct openpic_t openpic_t; | |
54fa5af5 | 615 | void openpic_set_irq(void *opaque, int n_IRQ, int level); |
7668a27f FB |
616 | openpic_t *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus, |
617 | CPUState **envp); | |
28b9b5af | 618 | |
54fa5af5 FB |
619 | /* heathrow_pic.c */ |
620 | typedef struct HeathrowPICS HeathrowPICS; | |
621 | void heathrow_pic_set_irq(void *opaque, int num, int level); | |
622 | HeathrowPICS *heathrow_pic_init(int *pmem_index); | |
623 | ||
313aa567 FB |
624 | /* vga.c */ |
625 | ||
4fa0f5d2 | 626 | #define VGA_RAM_SIZE (4096 * 1024) |
313aa567 | 627 | |
82c643ff | 628 | struct DisplayState { |
313aa567 FB |
629 | uint8_t *data; |
630 | int linesize; | |
631 | int depth; | |
82c643ff FB |
632 | int width; |
633 | int height; | |
313aa567 FB |
634 | void (*dpy_update)(struct DisplayState *s, int x, int y, int w, int h); |
635 | void (*dpy_resize)(struct DisplayState *s, int w, int h); | |
636 | void (*dpy_refresh)(struct DisplayState *s); | |
82c643ff | 637 | }; |
313aa567 FB |
638 | |
639 | static inline void dpy_update(DisplayState *s, int x, int y, int w, int h) | |
640 | { | |
641 | s->dpy_update(s, x, y, w, h); | |
642 | } | |
643 | ||
644 | static inline void dpy_resize(DisplayState *s, int w, int h) | |
645 | { | |
646 | s->dpy_resize(s, w, h); | |
647 | } | |
648 | ||
46e50e9d | 649 | int vga_initialize(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base, |
d5295253 FB |
650 | unsigned long vga_ram_offset, int vga_ram_size, |
651 | unsigned long vga_bios_offset, int vga_bios_size); | |
313aa567 | 652 | void vga_update_display(void); |
ee38b4c8 | 653 | void vga_invalidate_display(void); |
59a983b9 | 654 | void vga_screen_dump(const char *filename); |
313aa567 | 655 | |
d6bfa22f | 656 | /* cirrus_vga.c */ |
46e50e9d | 657 | void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base, |
d6bfa22f | 658 | unsigned long vga_ram_offset, int vga_ram_size); |
d6bfa22f FB |
659 | void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base, |
660 | unsigned long vga_ram_offset, int vga_ram_size); | |
661 | ||
313aa567 | 662 | /* sdl.c */ |
d63d307f | 663 | void sdl_display_init(DisplayState *ds, int full_screen); |
313aa567 | 664 | |
da4dbf74 FB |
665 | /* cocoa.m */ |
666 | void cocoa_display_init(DisplayState *ds, int full_screen); | |
667 | ||
5391d806 FB |
668 | /* ide.c */ |
669 | #define MAX_DISKS 4 | |
670 | ||
671 | extern BlockDriverState *bs_table[MAX_DISKS]; | |
672 | ||
69b91039 FB |
673 | void isa_ide_init(int iobase, int iobase2, int irq, |
674 | BlockDriverState *hd0, BlockDriverState *hd1); | |
54fa5af5 FB |
675 | void pci_cmd646_ide_init(PCIBus *bus, BlockDriverState **hd_table, |
676 | int secondary_ide_enabled); | |
46e50e9d | 677 | void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table); |
28b9b5af | 678 | int pmac_ide_init (BlockDriverState **hd_table, |
54fa5af5 | 679 | SetIRQFunc *set_irq, void *irq_opaque, int irq); |
5391d806 | 680 | |
1d14ffa9 | 681 | /* es1370.c */ |
c0fe3827 | 682 | int es1370_init (PCIBus *bus, AudioState *s); |
1d14ffa9 | 683 | |
fb065187 | 684 | /* sb16.c */ |
c0fe3827 | 685 | int SB16_init (AudioState *s); |
fb065187 FB |
686 | |
687 | /* adlib.c */ | |
c0fe3827 | 688 | int Adlib_init (AudioState *s); |
fb065187 FB |
689 | |
690 | /* gus.c */ | |
c0fe3827 | 691 | int GUS_init (AudioState *s); |
27503323 FB |
692 | |
693 | /* dma.c */ | |
85571bc7 | 694 | typedef int (*DMA_transfer_handler) (void *opaque, int nchan, int pos, int size); |
27503323 | 695 | int DMA_get_channel_mode (int nchan); |
85571bc7 FB |
696 | int DMA_read_memory (int nchan, void *buf, int pos, int size); |
697 | int DMA_write_memory (int nchan, void *buf, int pos, int size); | |
27503323 FB |
698 | void DMA_hold_DREQ (int nchan); |
699 | void DMA_release_DREQ (int nchan); | |
16f62432 | 700 | void DMA_schedule(int nchan); |
27503323 | 701 | void DMA_run (void); |
28b9b5af | 702 | void DMA_init (int high_page_enable); |
27503323 | 703 | void DMA_register_channel (int nchan, |
85571bc7 FB |
704 | DMA_transfer_handler transfer_handler, |
705 | void *opaque); | |
7138fcfb FB |
706 | /* fdc.c */ |
707 | #define MAX_FD 2 | |
708 | extern BlockDriverState *fd_table[MAX_FD]; | |
709 | ||
baca51fa FB |
710 | typedef struct fdctrl_t fdctrl_t; |
711 | ||
712 | fdctrl_t *fdctrl_init (int irq_lvl, int dma_chann, int mem_mapped, | |
713 | uint32_t io_base, | |
714 | BlockDriverState **fds); | |
715 | int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num); | |
7138fcfb | 716 | |
80cabfad FB |
717 | /* ne2000.c */ |
718 | ||
7c9d8e07 FB |
719 | void isa_ne2000_init(int base, int irq, NICInfo *nd); |
720 | void pci_ne2000_init(PCIBus *bus, NICInfo *nd); | |
80cabfad FB |
721 | |
722 | /* pckbd.c */ | |
723 | ||
80cabfad FB |
724 | void kbd_init(void); |
725 | ||
726 | /* mc146818rtc.c */ | |
727 | ||
8a7ddc38 | 728 | typedef struct RTCState RTCState; |
80cabfad | 729 | |
8a7ddc38 FB |
730 | RTCState *rtc_init(int base, int irq); |
731 | void rtc_set_memory(RTCState *s, int addr, int val); | |
732 | void rtc_set_date(RTCState *s, const struct tm *tm); | |
80cabfad FB |
733 | |
734 | /* serial.c */ | |
735 | ||
c4b1fcc0 | 736 | typedef struct SerialState SerialState; |
e5d13e2f FB |
737 | SerialState *serial_init(SetIRQFunc *set_irq, void *opaque, |
738 | int base, int irq, CharDriverState *chr); | |
739 | SerialState *serial_mm_init (SetIRQFunc *set_irq, void *opaque, | |
740 | target_ulong base, int it_shift, | |
741 | int irq, CharDriverState *chr); | |
80cabfad | 742 | |
6508fe59 FB |
743 | /* parallel.c */ |
744 | ||
745 | typedef struct ParallelState ParallelState; | |
746 | ParallelState *parallel_init(int base, int irq, CharDriverState *chr); | |
747 | ||
80cabfad FB |
748 | /* i8259.c */ |
749 | ||
3de388f6 FB |
750 | typedef struct PicState2 PicState2; |
751 | extern PicState2 *isa_pic; | |
80cabfad | 752 | void pic_set_irq(int irq, int level); |
54fa5af5 | 753 | void pic_set_irq_new(void *opaque, int irq, int level); |
3de388f6 | 754 | PicState2 *pic_init(IRQRequestFunc *irq_request, void *irq_request_opaque); |
d592d303 FB |
755 | void pic_set_alt_irq_func(PicState2 *s, SetIRQFunc *alt_irq_func, |
756 | void *alt_irq_opaque); | |
3de388f6 FB |
757 | int pic_read_irq(PicState2 *s); |
758 | void pic_update_irq(PicState2 *s); | |
759 | uint32_t pic_intack_read(PicState2 *s); | |
c20709aa | 760 | void pic_info(void); |
4a0fb71e | 761 | void irq_info(void); |
80cabfad | 762 | |
c27004ec | 763 | /* APIC */ |
d592d303 FB |
764 | typedef struct IOAPICState IOAPICState; |
765 | ||
c27004ec FB |
766 | int apic_init(CPUState *env); |
767 | int apic_get_interrupt(CPUState *env); | |
d592d303 FB |
768 | IOAPICState *ioapic_init(void); |
769 | void ioapic_set_irq(void *opaque, int vector, int level); | |
c27004ec | 770 | |
80cabfad FB |
771 | /* i8254.c */ |
772 | ||
773 | #define PIT_FREQ 1193182 | |
774 | ||
ec844b96 FB |
775 | typedef struct PITState PITState; |
776 | ||
777 | PITState *pit_init(int base, int irq); | |
778 | void pit_set_gate(PITState *pit, int channel, int val); | |
779 | int pit_get_gate(PITState *pit, int channel); | |
780 | int pit_get_out(PITState *pit, int channel, int64_t current_time); | |
80cabfad FB |
781 | |
782 | /* pc.c */ | |
54fa5af5 | 783 | extern QEMUMachine pc_machine; |
3dbbdc25 | 784 | extern QEMUMachine isapc_machine; |
80cabfad | 785 | |
6a00d601 FB |
786 | void ioport_set_a20(int enable); |
787 | int ioport_get_a20(void); | |
788 | ||
26aa7d72 | 789 | /* ppc.c */ |
54fa5af5 FB |
790 | extern QEMUMachine prep_machine; |
791 | extern QEMUMachine core99_machine; | |
792 | extern QEMUMachine heathrow_machine; | |
793 | ||
6af0bf9c FB |
794 | /* mips_r4k.c */ |
795 | extern QEMUMachine mips_machine; | |
796 | ||
8cc43fef FB |
797 | #ifdef TARGET_PPC |
798 | ppc_tb_t *cpu_ppc_tb_init (CPUState *env, uint32_t freq); | |
799 | #endif | |
64201201 | 800 | void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val); |
77d4bc34 FB |
801 | |
802 | extern CPUWriteMemoryFunc *PPC_io_write[]; | |
803 | extern CPUReadMemoryFunc *PPC_io_read[]; | |
54fa5af5 | 804 | void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val); |
26aa7d72 | 805 | |
e95c8d51 | 806 | /* sun4m.c */ |
54fa5af5 | 807 | extern QEMUMachine sun4m_machine; |
e80cfcfc | 808 | uint32_t iommu_translate(uint32_t addr); |
e95c8d51 FB |
809 | |
810 | /* iommu.c */ | |
e80cfcfc FB |
811 | void *iommu_init(uint32_t addr); |
812 | uint32_t iommu_translate_local(void *opaque, uint32_t addr); | |
e95c8d51 FB |
813 | |
814 | /* lance.c */ | |
7c9d8e07 | 815 | void lance_init(NICInfo *nd, int irq, uint32_t leaddr, uint32_t ledaddr); |
e95c8d51 FB |
816 | |
817 | /* tcx.c */ | |
e80cfcfc | 818 | void *tcx_init(DisplayState *ds, uint32_t addr, uint8_t *vram_base, |
6f7e9aec | 819 | unsigned long vram_offset, int vram_size, int width, int height); |
e80cfcfc FB |
820 | void tcx_update_display(void *opaque); |
821 | void tcx_invalidate_display(void *opaque); | |
822 | void tcx_screen_dump(void *opaque, const char *filename); | |
823 | ||
824 | /* slavio_intctl.c */ | |
825 | void *slavio_intctl_init(); | |
826 | void slavio_pic_info(void *opaque); | |
827 | void slavio_irq_info(void *opaque); | |
828 | void slavio_pic_set_irq(void *opaque, int irq, int level); | |
e95c8d51 FB |
829 | |
830 | /* magic-load.c */ | |
e80cfcfc FB |
831 | int load_elf(const char *filename, uint8_t *addr); |
832 | int load_aout(const char *filename, uint8_t *addr); | |
833 | ||
834 | /* slavio_timer.c */ | |
835 | void slavio_timer_init(uint32_t addr1, int irq1, uint32_t addr2, int irq2); | |
8d5f07fa | 836 | |
e80cfcfc FB |
837 | /* slavio_serial.c */ |
838 | SerialState *slavio_serial_init(int base, int irq, CharDriverState *chr1, CharDriverState *chr2); | |
839 | void slavio_serial_ms_kbd_init(int base, int irq); | |
e95c8d51 | 840 | |
3475187d FB |
841 | /* slavio_misc.c */ |
842 | void *slavio_misc_init(uint32_t base, int irq); | |
843 | void slavio_set_power_fail(void *opaque, int power_failing); | |
844 | ||
6f7e9aec FB |
845 | /* esp.c */ |
846 | void esp_init(BlockDriverState **bd, int irq, uint32_t espaddr, uint32_t espdaddr); | |
847 | ||
3475187d FB |
848 | /* sun4u.c */ |
849 | extern QEMUMachine sun4u_machine; | |
850 | ||
64201201 FB |
851 | /* NVRAM helpers */ |
852 | #include "hw/m48t59.h" | |
853 | ||
854 | void NVRAM_set_byte (m48t59_t *nvram, uint32_t addr, uint8_t value); | |
855 | uint8_t NVRAM_get_byte (m48t59_t *nvram, uint32_t addr); | |
856 | void NVRAM_set_word (m48t59_t *nvram, uint32_t addr, uint16_t value); | |
857 | uint16_t NVRAM_get_word (m48t59_t *nvram, uint32_t addr); | |
858 | void NVRAM_set_lword (m48t59_t *nvram, uint32_t addr, uint32_t value); | |
859 | uint32_t NVRAM_get_lword (m48t59_t *nvram, uint32_t addr); | |
860 | void NVRAM_set_string (m48t59_t *nvram, uint32_t addr, | |
861 | const unsigned char *str, uint32_t max); | |
862 | int NVRAM_get_string (m48t59_t *nvram, uint8_t *dst, uint16_t addr, int max); | |
863 | void NVRAM_set_crc (m48t59_t *nvram, uint32_t addr, | |
864 | uint32_t start, uint32_t count); | |
865 | int PPC_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size, | |
866 | const unsigned char *arch, | |
867 | uint32_t RAM_size, int boot_device, | |
868 | uint32_t kernel_image, uint32_t kernel_size, | |
28b9b5af | 869 | const char *cmdline, |
64201201 | 870 | uint32_t initrd_image, uint32_t initrd_size, |
28b9b5af FB |
871 | uint32_t NVRAM_image, |
872 | int width, int height, int depth); | |
64201201 | 873 | |
63066f4f FB |
874 | /* adb.c */ |
875 | ||
876 | #define MAX_ADB_DEVICES 16 | |
877 | ||
e2733d20 | 878 | #define ADB_MAX_OUT_LEN 16 |
63066f4f | 879 | |
e2733d20 | 880 | typedef struct ADBDevice ADBDevice; |
63066f4f | 881 | |
e2733d20 FB |
882 | /* buf = NULL means polling */ |
883 | typedef int ADBDeviceRequest(ADBDevice *d, uint8_t *buf_out, | |
884 | const uint8_t *buf, int len); | |
12c28fed FB |
885 | typedef int ADBDeviceReset(ADBDevice *d); |
886 | ||
63066f4f FB |
887 | struct ADBDevice { |
888 | struct ADBBusState *bus; | |
889 | int devaddr; | |
890 | int handler; | |
e2733d20 | 891 | ADBDeviceRequest *devreq; |
12c28fed | 892 | ADBDeviceReset *devreset; |
63066f4f FB |
893 | void *opaque; |
894 | }; | |
895 | ||
896 | typedef struct ADBBusState { | |
897 | ADBDevice devices[MAX_ADB_DEVICES]; | |
898 | int nb_devices; | |
e2733d20 | 899 | int poll_index; |
63066f4f FB |
900 | } ADBBusState; |
901 | ||
e2733d20 FB |
902 | int adb_request(ADBBusState *s, uint8_t *buf_out, |
903 | const uint8_t *buf, int len); | |
904 | int adb_poll(ADBBusState *s, uint8_t *buf_out); | |
63066f4f FB |
905 | |
906 | ADBDevice *adb_register_device(ADBBusState *s, int devaddr, | |
e2733d20 | 907 | ADBDeviceRequest *devreq, |
12c28fed | 908 | ADBDeviceReset *devreset, |
63066f4f FB |
909 | void *opaque); |
910 | void adb_kbd_init(ADBBusState *bus); | |
911 | void adb_mouse_init(ADBBusState *bus); | |
912 | ||
913 | /* cuda.c */ | |
914 | ||
915 | extern ADBBusState adb_bus; | |
54fa5af5 | 916 | int cuda_init(SetIRQFunc *set_irq, void *irq_opaque, int irq); |
63066f4f | 917 | |
bb36d470 FB |
918 | #include "hw/usb.h" |
919 | ||
a594cfbf FB |
920 | /* usb ports of the VM */ |
921 | ||
922 | #define MAX_VM_USB_PORTS 8 | |
923 | ||
924 | extern USBPort *vm_usb_ports[MAX_VM_USB_PORTS]; | |
925 | extern USBDevice *vm_usb_hub; | |
926 | ||
927 | void do_usb_add(const char *devname); | |
928 | void do_usb_del(const char *devname); | |
929 | void usb_info(void); | |
930 | ||
ea2384d3 FB |
931 | #endif /* defined(QEMU_TOOL) */ |
932 | ||
c4b1fcc0 | 933 | /* monitor.c */ |
82c643ff | 934 | void monitor_init(CharDriverState *hd, int show_banner); |
ea2384d3 FB |
935 | void term_puts(const char *str); |
936 | void term_vprintf(const char *fmt, va_list ap); | |
40c3bac3 | 937 | void term_printf(const char *fmt, ...) __attribute__ ((__format__ (__printf__, 1, 2))); |
c4b1fcc0 FB |
938 | void term_flush(void); |
939 | void term_print_help(void); | |
ea2384d3 FB |
940 | void monitor_readline(const char *prompt, int is_password, |
941 | char *buf, int buf_size); | |
942 | ||
943 | /* readline.c */ | |
944 | typedef void ReadLineFunc(void *opaque, const char *str); | |
945 | ||
946 | extern int completion_index; | |
947 | void add_completion(const char *str); | |
948 | void readline_handle_byte(int ch); | |
949 | void readline_find_completion(const char *cmdline); | |
950 | const char *readline_get_history(unsigned int index); | |
951 | void readline_start(const char *prompt, int is_password, | |
952 | ReadLineFunc *readline_func, void *opaque); | |
c4b1fcc0 | 953 | |
5e6ad6f9 FB |
954 | void kqemu_record_dump(void); |
955 | ||
fc01f7e7 | 956 | #endif /* VL_H */ |