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fc01f7e7
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1/*
2 * QEMU System Emulator header
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24#ifndef VL_H
25#define VL_H
26
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27/* we put basic includes here to avoid repeating them in device drivers */
28#include <stdlib.h>
29#include <stdio.h>
30#include <stdarg.h>
31#include <string.h>
32#include <inttypes.h>
85571bc7 33#include <limits.h>
8a7ddc38 34#include <time.h>
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35#include <ctype.h>
36#include <errno.h>
37#include <unistd.h>
38#include <fcntl.h>
7d3505c5 39#include <sys/stat.h>
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40
41#ifndef O_LARGEFILE
42#define O_LARGEFILE 0
43#endif
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44#ifndef O_BINARY
45#define O_BINARY 0
46#endif
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47
48#ifdef _WIN32
a18e524a 49#include <windows.h>
ac62f715 50#define fsync _commit
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51#define lseek _lseeki64
52#define ENOTSUP 4096
19cb3738 53#define ENOMEDIUM 4097
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54extern int qemu_ftruncate64(int, int64_t);
55#define ftruncate qemu_ftruncate64
56
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57
58static inline char *realpath(const char *path, char *resolved_path)
59{
60 _fullpath(resolved_path, path, _MAX_PATH);
61 return resolved_path;
62}
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63
64#define PRId64 "I64d"
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65#define PRIx64 "I64x"
66#define PRIu64 "I64u"
67#define PRIo64 "I64o"
67b915a5 68#endif
8a7ddc38 69
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70#ifdef QEMU_TOOL
71
72/* we use QEMU_TOOL in the command line tools which do not depend on
73 the target CPU type */
74#include "config-host.h"
75#include <setjmp.h>
76#include "osdep.h"
77#include "bswap.h"
78
79#else
80
4f209290 81#include "audio/audio.h"
16f62432 82#include "cpu.h"
1fddef4b 83#include "gdbstub.h"
16f62432 84
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85#endif /* !defined(QEMU_TOOL) */
86
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87#ifndef glue
88#define xglue(x, y) x ## y
89#define glue(x, y) xglue(x, y)
90#define stringify(s) tostring(s)
91#define tostring(s) #s
92#endif
93
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94#ifndef MIN
95#define MIN(a, b) (((a) < (b)) ? (a) : (b))
96#endif
97#ifndef MAX
98#define MAX(a, b) (((a) > (b)) ? (a) : (b))
99#endif
100
33e3963e 101/* vl.c */
80cabfad 102uint64_t muldiv64(uint64_t a, uint32_t b, uint32_t c);
313aa567 103
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104void hw_error(const char *fmt, ...);
105
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106extern const char *bios_dir;
107
108void pstrcpy(char *buf, int buf_size, const char *str);
109char *pstrcat(char *buf, int buf_size, const char *s);
82c643ff 110int strstart(const char *str, const char *val, const char **ptr);
c4b1fcc0 111
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112extern int vm_running;
113
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114typedef struct vm_change_state_entry VMChangeStateEntry;
115typedef void VMChangeStateHandler(void *opaque, int running);
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116typedef void VMStopHandler(void *opaque, int reason);
117
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118VMChangeStateEntry *qemu_add_vm_change_state_handler(VMChangeStateHandler *cb,
119 void *opaque);
120void qemu_del_vm_change_state_handler(VMChangeStateEntry *e);
121
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122int qemu_add_vm_stop_handler(VMStopHandler *cb, void *opaque);
123void qemu_del_vm_stop_handler(VMStopHandler *cb, void *opaque);
124
125void vm_start(void);
126void vm_stop(int reason);
127
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128typedef void QEMUResetHandler(void *opaque);
129
130void qemu_register_reset(QEMUResetHandler *func, void *opaque);
131void qemu_system_reset_request(void);
132void qemu_system_shutdown_request(void);
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133void qemu_system_powerdown_request(void);
134#if !defined(TARGET_SPARC)
135// Please implement a power failure function to signal the OS
136#define qemu_system_powerdown() do{}while(0)
137#else
138void qemu_system_powerdown(void);
139#endif
bb0c6722 140
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141void main_loop_wait(int timeout);
142
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143extern int ram_size;
144extern int bios_size;
ee22c2f7 145extern int rtc_utc;
1f04275e 146extern int cirrus_vga_enabled;
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147extern int graphic_width;
148extern int graphic_height;
149extern int graphic_depth;
3d11d0eb 150extern const char *keyboard_layout;
d993e026 151extern int kqemu_allowed;
a09db21f 152extern int win2k_install_hack;
bb36d470 153extern int usb_enabled;
6a00d601 154extern int smp_cpus;
667accab 155extern int no_quit;
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156
157/* XXX: make it dynamic */
75956cf0 158#if defined (TARGET_PPC) || defined (TARGET_SPARC64)
d5295253 159#define BIOS_SIZE ((512 + 32) * 1024)
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160#elif defined(TARGET_MIPS)
161#define BIOS_SIZE (128 * 1024)
0ced6589 162#else
7587cf44 163#define BIOS_SIZE ((256 + 64) * 1024)
0ced6589 164#endif
aaaa7df6 165
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166/* keyboard/mouse support */
167
168#define MOUSE_EVENT_LBUTTON 0x01
169#define MOUSE_EVENT_RBUTTON 0x02
170#define MOUSE_EVENT_MBUTTON 0x04
171
172typedef void QEMUPutKBDEvent(void *opaque, int keycode);
173typedef void QEMUPutMouseEvent(void *opaque, int dx, int dy, int dz, int buttons_state);
174
175void qemu_add_kbd_event_handler(QEMUPutKBDEvent *func, void *opaque);
09b26c5e 176void qemu_add_mouse_event_handler(QEMUPutMouseEvent *func, void *opaque, int absolute);
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177
178void kbd_put_keycode(int keycode);
179void kbd_mouse_event(int dx, int dy, int dz, int buttons_state);
09b26c5e 180int kbd_mouse_is_absolute(void);
63066f4f 181
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182/* keysym is a unicode code except for special keys (see QEMU_KEY_xxx
183 constants) */
184#define QEMU_KEY_ESC1(c) ((c) | 0xe100)
185#define QEMU_KEY_BACKSPACE 0x007f
186#define QEMU_KEY_UP QEMU_KEY_ESC1('A')
187#define QEMU_KEY_DOWN QEMU_KEY_ESC1('B')
188#define QEMU_KEY_RIGHT QEMU_KEY_ESC1('C')
189#define QEMU_KEY_LEFT QEMU_KEY_ESC1('D')
190#define QEMU_KEY_HOME QEMU_KEY_ESC1(1)
191#define QEMU_KEY_END QEMU_KEY_ESC1(4)
192#define QEMU_KEY_PAGEUP QEMU_KEY_ESC1(5)
193#define QEMU_KEY_PAGEDOWN QEMU_KEY_ESC1(6)
194#define QEMU_KEY_DELETE QEMU_KEY_ESC1(3)
195
196#define QEMU_KEY_CTRL_UP 0xe400
197#define QEMU_KEY_CTRL_DOWN 0xe401
198#define QEMU_KEY_CTRL_LEFT 0xe402
199#define QEMU_KEY_CTRL_RIGHT 0xe403
200#define QEMU_KEY_CTRL_HOME 0xe404
201#define QEMU_KEY_CTRL_END 0xe405
202#define QEMU_KEY_CTRL_PAGEUP 0xe406
203#define QEMU_KEY_CTRL_PAGEDOWN 0xe407
204
205void kbd_put_keysym(int keysym);
206
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207/* async I/O support */
208
209typedef void IOReadHandler(void *opaque, const uint8_t *buf, int size);
210typedef int IOCanRWHandler(void *opaque);
7c9d8e07 211typedef void IOHandler(void *opaque);
c20709aa 212
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213int qemu_set_fd_handler2(int fd,
214 IOCanRWHandler *fd_read_poll,
215 IOHandler *fd_read,
216 IOHandler *fd_write,
217 void *opaque);
218int qemu_set_fd_handler(int fd,
219 IOHandler *fd_read,
220 IOHandler *fd_write,
221 void *opaque);
c20709aa 222
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223/* Polling handling */
224
225/* return TRUE if no sleep should be done afterwards */
226typedef int PollingFunc(void *opaque);
227
228int qemu_add_polling_cb(PollingFunc *func, void *opaque);
229void qemu_del_polling_cb(PollingFunc *func, void *opaque);
230
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231#ifdef _WIN32
232/* Wait objects handling */
233typedef void WaitObjectFunc(void *opaque);
234
235int qemu_add_wait_object(HANDLE handle, WaitObjectFunc *func, void *opaque);
236void qemu_del_wait_object(HANDLE handle, WaitObjectFunc *func, void *opaque);
237#endif
238
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239/* character device */
240
241#define CHR_EVENT_BREAK 0 /* serial break char */
ea2384d3 242#define CHR_EVENT_FOCUS 1 /* focus to this terminal (modal input needed) */
82c643ff 243
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244
245
246#define CHR_IOCTL_SERIAL_SET_PARAMS 1
247typedef struct {
248 int speed;
249 int parity;
250 int data_bits;
251 int stop_bits;
252} QEMUSerialSetParams;
253
254#define CHR_IOCTL_SERIAL_SET_BREAK 2
255
256#define CHR_IOCTL_PP_READ_DATA 3
257#define CHR_IOCTL_PP_WRITE_DATA 4
258#define CHR_IOCTL_PP_READ_CONTROL 5
259#define CHR_IOCTL_PP_WRITE_CONTROL 6
260#define CHR_IOCTL_PP_READ_STATUS 7
261
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262typedef void IOEventHandler(void *opaque, int event);
263
264typedef struct CharDriverState {
265 int (*chr_write)(struct CharDriverState *s, const uint8_t *buf, int len);
266 void (*chr_add_read_handler)(struct CharDriverState *s,
267 IOCanRWHandler *fd_can_read,
268 IOReadHandler *fd_read, void *opaque);
2122c51a 269 int (*chr_ioctl)(struct CharDriverState *s, int cmd, void *arg);
82c643ff 270 IOEventHandler *chr_event;
eb45f5fe 271 void (*chr_send_event)(struct CharDriverState *chr, int event);
f331110f 272 void (*chr_close)(struct CharDriverState *chr);
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273 void *opaque;
274} CharDriverState;
275
276void qemu_chr_printf(CharDriverState *s, const char *fmt, ...);
277int qemu_chr_write(CharDriverState *s, const uint8_t *buf, int len);
ea2384d3 278void qemu_chr_send_event(CharDriverState *s, int event);
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279void qemu_chr_add_read_handler(CharDriverState *s,
280 IOCanRWHandler *fd_can_read,
281 IOReadHandler *fd_read, void *opaque);
282void qemu_chr_add_event_handler(CharDriverState *s, IOEventHandler *chr_event);
2122c51a 283int qemu_chr_ioctl(CharDriverState *s, int cmd, void *arg);
f8d179e3 284
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285/* consoles */
286
287typedef struct DisplayState DisplayState;
288typedef struct TextConsole TextConsole;
289
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290typedef void (*vga_hw_update_ptr)(void *);
291typedef void (*vga_hw_invalidate_ptr)(void *);
292typedef void (*vga_hw_screen_dump_ptr)(void *, const char *);
293
294TextConsole *graphic_console_init(DisplayState *ds, vga_hw_update_ptr update,
295 vga_hw_invalidate_ptr invalidate,
296 vga_hw_screen_dump_ptr screen_dump,
297 void *opaque);
298void vga_hw_update(void);
299void vga_hw_invalidate(void);
300void vga_hw_screen_dump(const char *filename);
301
302int is_graphic_console(void);
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303CharDriverState *text_console_init(DisplayState *ds);
304void console_select(unsigned int index);
305
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306/* serial ports */
307
308#define MAX_SERIAL_PORTS 4
309
310extern CharDriverState *serial_hds[MAX_SERIAL_PORTS];
311
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312/* parallel ports */
313
314#define MAX_PARALLEL_PORTS 3
315
316extern CharDriverState *parallel_hds[MAX_PARALLEL_PORTS];
317
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318/* VLANs support */
319
320typedef struct VLANClientState VLANClientState;
321
322struct VLANClientState {
323 IOReadHandler *fd_read;
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324 /* Packets may still be sent if this returns zero. It's used to
325 rate-limit the slirp code. */
326 IOCanRWHandler *fd_can_read;
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327 void *opaque;
328 struct VLANClientState *next;
329 struct VLANState *vlan;
330 char info_str[256];
331};
332
333typedef struct VLANState {
334 int id;
335 VLANClientState *first_client;
336 struct VLANState *next;
337} VLANState;
338
339VLANState *qemu_find_vlan(int id);
340VLANClientState *qemu_new_vlan_client(VLANState *vlan,
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341 IOReadHandler *fd_read,
342 IOCanRWHandler *fd_can_read,
343 void *opaque);
344int qemu_can_send_packet(VLANClientState *vc);
7c9d8e07 345void qemu_send_packet(VLANClientState *vc, const uint8_t *buf, int size);
d861b05e 346void qemu_handler_true(void *opaque);
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347
348void do_info_network(void);
349
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350/* TAP win32 */
351int tap_win32_init(VLANState *vlan, const char *ifname);
7fb843f8 352
7c9d8e07 353/* NIC info */
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354
355#define MAX_NICS 8
356
7c9d8e07 357typedef struct NICInfo {
c4b1fcc0 358 uint8_t macaddr[6];
a41b2ff2 359 const char *model;
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360 VLANState *vlan;
361} NICInfo;
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362
363extern int nb_nics;
7c9d8e07 364extern NICInfo nd_table[MAX_NICS];
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365
366/* timers */
367
368typedef struct QEMUClock QEMUClock;
369typedef struct QEMUTimer QEMUTimer;
370typedef void QEMUTimerCB(void *opaque);
371
372/* The real time clock should be used only for stuff which does not
373 change the virtual machine state, as it is run even if the virtual
69b91039 374 machine is stopped. The real time clock has a frequency of 1000
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375 Hz. */
376extern QEMUClock *rt_clock;
377
e80cfcfc 378/* The virtual clock is only run during the emulation. It is stopped
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379 when the virtual machine is stopped. Virtual timers use a high
380 precision clock, usually cpu cycles (use ticks_per_sec). */
381extern QEMUClock *vm_clock;
382
383int64_t qemu_get_clock(QEMUClock *clock);
384
385QEMUTimer *qemu_new_timer(QEMUClock *clock, QEMUTimerCB *cb, void *opaque);
386void qemu_free_timer(QEMUTimer *ts);
387void qemu_del_timer(QEMUTimer *ts);
388void qemu_mod_timer(QEMUTimer *ts, int64_t expire_time);
389int qemu_timer_pending(QEMUTimer *ts);
390
391extern int64_t ticks_per_sec;
392extern int pit_min_timer_count;
393
1dce7c3c 394int64_t cpu_get_ticks(void);
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395void cpu_enable_ticks(void);
396void cpu_disable_ticks(void);
397
398/* VM Load/Save */
399
faea38e7 400typedef struct QEMUFile QEMUFile;
8a7ddc38 401
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402QEMUFile *qemu_fopen(const char *filename, const char *mode);
403void qemu_fflush(QEMUFile *f);
404void qemu_fclose(QEMUFile *f);
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405void qemu_put_buffer(QEMUFile *f, const uint8_t *buf, int size);
406void qemu_put_byte(QEMUFile *f, int v);
407void qemu_put_be16(QEMUFile *f, unsigned int v);
408void qemu_put_be32(QEMUFile *f, unsigned int v);
409void qemu_put_be64(QEMUFile *f, uint64_t v);
410int qemu_get_buffer(QEMUFile *f, uint8_t *buf, int size);
411int qemu_get_byte(QEMUFile *f);
412unsigned int qemu_get_be16(QEMUFile *f);
413unsigned int qemu_get_be32(QEMUFile *f);
414uint64_t qemu_get_be64(QEMUFile *f);
415
416static inline void qemu_put_be64s(QEMUFile *f, const uint64_t *pv)
417{
418 qemu_put_be64(f, *pv);
419}
420
421static inline void qemu_put_be32s(QEMUFile *f, const uint32_t *pv)
422{
423 qemu_put_be32(f, *pv);
424}
425
426static inline void qemu_put_be16s(QEMUFile *f, const uint16_t *pv)
427{
428 qemu_put_be16(f, *pv);
429}
430
431static inline void qemu_put_8s(QEMUFile *f, const uint8_t *pv)
432{
433 qemu_put_byte(f, *pv);
434}
435
436static inline void qemu_get_be64s(QEMUFile *f, uint64_t *pv)
437{
438 *pv = qemu_get_be64(f);
439}
440
441static inline void qemu_get_be32s(QEMUFile *f, uint32_t *pv)
442{
443 *pv = qemu_get_be32(f);
444}
445
446static inline void qemu_get_be16s(QEMUFile *f, uint16_t *pv)
447{
448 *pv = qemu_get_be16(f);
449}
450
451static inline void qemu_get_8s(QEMUFile *f, uint8_t *pv)
452{
453 *pv = qemu_get_byte(f);
454}
455
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456#if TARGET_LONG_BITS == 64
457#define qemu_put_betl qemu_put_be64
458#define qemu_get_betl qemu_get_be64
459#define qemu_put_betls qemu_put_be64s
460#define qemu_get_betls qemu_get_be64s
461#else
462#define qemu_put_betl qemu_put_be32
463#define qemu_get_betl qemu_get_be32
464#define qemu_put_betls qemu_put_be32s
465#define qemu_get_betls qemu_get_be32s
466#endif
467
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468int64_t qemu_ftell(QEMUFile *f);
469int64_t qemu_fseek(QEMUFile *f, int64_t pos, int whence);
470
471typedef void SaveStateHandler(QEMUFile *f, void *opaque);
472typedef int LoadStateHandler(QEMUFile *f, void *opaque, int version_id);
473
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474int register_savevm(const char *idstr,
475 int instance_id,
476 int version_id,
477 SaveStateHandler *save_state,
478 LoadStateHandler *load_state,
479 void *opaque);
480void qemu_get_timer(QEMUFile *f, QEMUTimer *ts);
481void qemu_put_timer(QEMUFile *f, QEMUTimer *ts);
c4b1fcc0 482
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483void cpu_save(QEMUFile *f, void *opaque);
484int cpu_load(QEMUFile *f, void *opaque, int version_id);
485
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486void do_savevm(const char *name);
487void do_loadvm(const char *name);
488void do_delvm(const char *name);
489void do_info_snapshots(void);
490
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491/* bottom halves */
492typedef struct QEMUBH QEMUBH;
493typedef void QEMUBHFunc(void *opaque);
494
495QEMUBH *qemu_bh_new(QEMUBHFunc *cb, void *opaque);
496void qemu_bh_schedule(QEMUBH *bh);
497void qemu_bh_cancel(QEMUBH *bh);
498void qemu_bh_delete(QEMUBH *bh);
6eb5733a 499int qemu_bh_poll(void);
83f64091 500
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501/* block.c */
502typedef struct BlockDriverState BlockDriverState;
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503typedef struct BlockDriver BlockDriver;
504
505extern BlockDriver bdrv_raw;
19cb3738 506extern BlockDriver bdrv_host_device;
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507extern BlockDriver bdrv_cow;
508extern BlockDriver bdrv_qcow;
509extern BlockDriver bdrv_vmdk;
3c56521b 510extern BlockDriver bdrv_cloop;
585d0ed9 511extern BlockDriver bdrv_dmg;
a8753c34 512extern BlockDriver bdrv_bochs;
6a0f9e82 513extern BlockDriver bdrv_vpc;
de167e41 514extern BlockDriver bdrv_vvfat;
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515extern BlockDriver bdrv_qcow2;
516
517typedef struct BlockDriverInfo {
518 /* in bytes, 0 if irrelevant */
519 int cluster_size;
520 /* offset at which the VM state can be saved (0 if not possible) */
521 int64_t vm_state_offset;
522} BlockDriverInfo;
523
524typedef struct QEMUSnapshotInfo {
525 char id_str[128]; /* unique snapshot id */
526 /* the following fields are informative. They are not needed for
527 the consistency of the snapshot */
528 char name[256]; /* user choosen name */
529 uint32_t vm_state_size; /* VM state info size */
530 uint32_t date_sec; /* UTC date of the snapshot */
531 uint32_t date_nsec;
532 uint64_t vm_clock_nsec; /* VM clock relative to boot */
533} QEMUSnapshotInfo;
ea2384d3 534
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535#define BDRV_O_RDONLY 0x0000
536#define BDRV_O_RDWR 0x0002
537#define BDRV_O_ACCESS 0x0003
538#define BDRV_O_CREAT 0x0004 /* create an empty file */
539#define BDRV_O_SNAPSHOT 0x0008 /* open the file read only and save writes in a snapshot */
540#define BDRV_O_FILE 0x0010 /* open as a raw file (do not try to
541 use a disk image format on top of
542 it (default for
543 bdrv_file_open()) */
544
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545void bdrv_init(void);
546BlockDriver *bdrv_find_format(const char *format_name);
547int bdrv_create(BlockDriver *drv,
548 const char *filename, int64_t size_in_sectors,
549 const char *backing_file, int flags);
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550BlockDriverState *bdrv_new(const char *device_name);
551void bdrv_delete(BlockDriverState *bs);
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552int bdrv_file_open(BlockDriverState **pbs, const char *filename, int flags);
553int bdrv_open(BlockDriverState *bs, const char *filename, int flags);
554int bdrv_open2(BlockDriverState *bs, const char *filename, int flags,
ea2384d3 555 BlockDriver *drv);
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556void bdrv_close(BlockDriverState *bs);
557int bdrv_read(BlockDriverState *bs, int64_t sector_num,
558 uint8_t *buf, int nb_sectors);
559int bdrv_write(BlockDriverState *bs, int64_t sector_num,
560 const uint8_t *buf, int nb_sectors);
83f64091
FB
561int bdrv_pread(BlockDriverState *bs, int64_t offset,
562 void *buf, int count);
563int bdrv_pwrite(BlockDriverState *bs, int64_t offset,
564 const void *buf, int count);
565int bdrv_truncate(BlockDriverState *bs, int64_t offset);
566int64_t bdrv_getlength(BlockDriverState *bs);
fc01f7e7 567void bdrv_get_geometry(BlockDriverState *bs, int64_t *nb_sectors_ptr);
33e3963e 568int bdrv_commit(BlockDriverState *bs);
77fef8c1 569void bdrv_set_boot_sector(BlockDriverState *bs, const uint8_t *data, int size);
83f64091
FB
570/* async block I/O */
571typedef struct BlockDriverAIOCB BlockDriverAIOCB;
572typedef void BlockDriverCompletionFunc(void *opaque, int ret);
573
ce1a14dc
PB
574BlockDriverAIOCB *bdrv_aio_read(BlockDriverState *bs, int64_t sector_num,
575 uint8_t *buf, int nb_sectors,
576 BlockDriverCompletionFunc *cb, void *opaque);
577BlockDriverAIOCB *bdrv_aio_write(BlockDriverState *bs, int64_t sector_num,
578 const uint8_t *buf, int nb_sectors,
579 BlockDriverCompletionFunc *cb, void *opaque);
83f64091 580void bdrv_aio_cancel(BlockDriverAIOCB *acb);
83f64091
FB
581
582void qemu_aio_init(void);
583void qemu_aio_poll(void);
6192bc37 584void qemu_aio_flush(void);
83f64091
FB
585void qemu_aio_wait_start(void);
586void qemu_aio_wait(void);
587void qemu_aio_wait_end(void);
588
7a6cba61
PB
589/* Ensure contents are flushed to disk. */
590void bdrv_flush(BlockDriverState *bs);
33e3963e 591
c4b1fcc0
FB
592#define BDRV_TYPE_HD 0
593#define BDRV_TYPE_CDROM 1
594#define BDRV_TYPE_FLOPPY 2
46d4767d
FB
595#define BIOS_ATA_TRANSLATION_AUTO 0
596#define BIOS_ATA_TRANSLATION_NONE 1
597#define BIOS_ATA_TRANSLATION_LBA 2
c4b1fcc0
FB
598
599void bdrv_set_geometry_hint(BlockDriverState *bs,
600 int cyls, int heads, int secs);
601void bdrv_set_type_hint(BlockDriverState *bs, int type);
46d4767d 602void bdrv_set_translation_hint(BlockDriverState *bs, int translation);
c4b1fcc0
FB
603void bdrv_get_geometry_hint(BlockDriverState *bs,
604 int *pcyls, int *pheads, int *psecs);
605int bdrv_get_type_hint(BlockDriverState *bs);
46d4767d 606int bdrv_get_translation_hint(BlockDriverState *bs);
c4b1fcc0
FB
607int bdrv_is_removable(BlockDriverState *bs);
608int bdrv_is_read_only(BlockDriverState *bs);
609int bdrv_is_inserted(BlockDriverState *bs);
19cb3738 610int bdrv_media_changed(BlockDriverState *bs);
c4b1fcc0
FB
611int bdrv_is_locked(BlockDriverState *bs);
612void bdrv_set_locked(BlockDriverState *bs, int locked);
19cb3738 613void bdrv_eject(BlockDriverState *bs, int eject_flag);
c4b1fcc0
FB
614void bdrv_set_change_cb(BlockDriverState *bs,
615 void (*change_cb)(void *opaque), void *opaque);
ea2384d3 616void bdrv_get_format(BlockDriverState *bs, char *buf, int buf_size);
c4b1fcc0
FB
617void bdrv_info(void);
618BlockDriverState *bdrv_find(const char *name);
82c643ff 619void bdrv_iterate(void (*it)(void *opaque, const char *name), void *opaque);
ea2384d3
FB
620int bdrv_is_encrypted(BlockDriverState *bs);
621int bdrv_set_key(BlockDriverState *bs, const char *key);
622void bdrv_iterate_format(void (*it)(void *opaque, const char *name),
623 void *opaque);
624const char *bdrv_get_device_name(BlockDriverState *bs);
faea38e7
FB
625int bdrv_write_compressed(BlockDriverState *bs, int64_t sector_num,
626 const uint8_t *buf, int nb_sectors);
627int bdrv_get_info(BlockDriverState *bs, BlockDriverInfo *bdi);
c4b1fcc0 628
83f64091
FB
629void bdrv_get_backing_filename(BlockDriverState *bs,
630 char *filename, int filename_size);
faea38e7
FB
631int bdrv_snapshot_create(BlockDriverState *bs,
632 QEMUSnapshotInfo *sn_info);
633int bdrv_snapshot_goto(BlockDriverState *bs,
634 const char *snapshot_id);
635int bdrv_snapshot_delete(BlockDriverState *bs, const char *snapshot_id);
636int bdrv_snapshot_list(BlockDriverState *bs,
637 QEMUSnapshotInfo **psn_info);
638char *bdrv_snapshot_dump(char *buf, int buf_size, QEMUSnapshotInfo *sn);
639
640char *get_human_readable_size(char *buf, int buf_size, int64_t size);
83f64091
FB
641int path_is_absolute(const char *path);
642void path_combine(char *dest, int dest_size,
643 const char *base_path,
644 const char *filename);
ea2384d3
FB
645
646#ifndef QEMU_TOOL
54fa5af5
FB
647
648typedef void QEMUMachineInitFunc(int ram_size, int vga_ram_size,
649 int boot_device,
650 DisplayState *ds, const char **fd_filename, int snapshot,
651 const char *kernel_filename, const char *kernel_cmdline,
652 const char *initrd_filename);
653
654typedef struct QEMUMachine {
655 const char *name;
656 const char *desc;
657 QEMUMachineInitFunc *init;
658 struct QEMUMachine *next;
659} QEMUMachine;
660
661int qemu_register_machine(QEMUMachine *m);
662
663typedef void SetIRQFunc(void *opaque, int irq_num, int level);
3de388f6 664typedef void IRQRequestFunc(void *opaque, int level);
54fa5af5 665
26aa7d72
FB
666/* ISA bus */
667
668extern target_phys_addr_t isa_mem_base;
669
670typedef void (IOPortWriteFunc)(void *opaque, uint32_t address, uint32_t data);
671typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address);
672
673int register_ioport_read(int start, int length, int size,
674 IOPortReadFunc *func, void *opaque);
675int register_ioport_write(int start, int length, int size,
676 IOPortWriteFunc *func, void *opaque);
69b91039
FB
677void isa_unassign_ioport(int start, int length);
678
aef445bd
PB
679void isa_mmio_init(target_phys_addr_t base, target_phys_addr_t size);
680
69b91039
FB
681/* PCI bus */
682
69b91039
FB
683extern target_phys_addr_t pci_mem_base;
684
46e50e9d 685typedef struct PCIBus PCIBus;
69b91039
FB
686typedef struct PCIDevice PCIDevice;
687
688typedef void PCIConfigWriteFunc(PCIDevice *pci_dev,
689 uint32_t address, uint32_t data, int len);
690typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev,
691 uint32_t address, int len);
692typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num,
693 uint32_t addr, uint32_t size, int type);
694
695#define PCI_ADDRESS_SPACE_MEM 0x00
696#define PCI_ADDRESS_SPACE_IO 0x01
697#define PCI_ADDRESS_SPACE_MEM_PREFETCH 0x08
698
699typedef struct PCIIORegion {
5768f5ac 700 uint32_t addr; /* current PCI mapping address. -1 means not mapped */
69b91039
FB
701 uint32_t size;
702 uint8_t type;
703 PCIMapIORegionFunc *map_func;
704} PCIIORegion;
705
8a8696a3
FB
706#define PCI_ROM_SLOT 6
707#define PCI_NUM_REGIONS 7
502a5395
PB
708
709#define PCI_DEVICES_MAX 64
710
711#define PCI_VENDOR_ID 0x00 /* 16 bits */
712#define PCI_DEVICE_ID 0x02 /* 16 bits */
713#define PCI_COMMAND 0x04 /* 16 bits */
714#define PCI_COMMAND_IO 0x1 /* Enable response in I/O space */
715#define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */
716#define PCI_CLASS_DEVICE 0x0a /* Device class */
717#define PCI_INTERRUPT_LINE 0x3c /* 8 bits */
718#define PCI_INTERRUPT_PIN 0x3d /* 8 bits */
719#define PCI_MIN_GNT 0x3e /* 8 bits */
720#define PCI_MAX_LAT 0x3f /* 8 bits */
721
69b91039
FB
722struct PCIDevice {
723 /* PCI config space */
724 uint8_t config[256];
725
726 /* the following fields are read only */
46e50e9d 727 PCIBus *bus;
69b91039
FB
728 int devfn;
729 char name[64];
8a8696a3 730 PCIIORegion io_regions[PCI_NUM_REGIONS];
69b91039
FB
731
732 /* do not access the following fields */
733 PCIConfigReadFunc *config_read;
734 PCIConfigWriteFunc *config_write;
502a5395 735 /* ??? This is a PC-specific hack, and should be removed. */
5768f5ac 736 int irq_index;
d2b59317
PB
737
738 /* Current IRQ levels. Used internally by the generic PCI code. */
739 int irq_state[4];
69b91039
FB
740};
741
46e50e9d
FB
742PCIDevice *pci_register_device(PCIBus *bus, const char *name,
743 int instance_size, int devfn,
69b91039
FB
744 PCIConfigReadFunc *config_read,
745 PCIConfigWriteFunc *config_write);
746
747void pci_register_io_region(PCIDevice *pci_dev, int region_num,
748 uint32_t size, int type,
749 PCIMapIORegionFunc *map_func);
750
5768f5ac
FB
751void pci_set_irq(PCIDevice *pci_dev, int irq_num, int level);
752
753uint32_t pci_default_read_config(PCIDevice *d,
754 uint32_t address, int len);
755void pci_default_write_config(PCIDevice *d,
756 uint32_t address, uint32_t val, int len);
89b6b508
FB
757void pci_device_save(PCIDevice *s, QEMUFile *f);
758int pci_device_load(PCIDevice *s, QEMUFile *f);
5768f5ac 759
d2b59317
PB
760typedef void (*pci_set_irq_fn)(void *pic, int irq_num, int level);
761typedef int (*pci_map_irq_fn)(PCIDevice *pci_dev, int irq_num);
762PCIBus *pci_register_bus(pci_set_irq_fn set_irq, pci_map_irq_fn map_irq,
80b3ada7 763 void *pic, int devfn_min, int nirq);
502a5395
PB
764
765void pci_nic_init(PCIBus *bus, NICInfo *nd);
766void pci_data_write(void *opaque, uint32_t addr, uint32_t val, int len);
767uint32_t pci_data_read(void *opaque, uint32_t addr, int len);
768int pci_bus_num(PCIBus *s);
80b3ada7 769void pci_for_each_device(int bus_num, void (*fn)(PCIDevice *d));
9995c51f 770
5768f5ac 771void pci_info(void);
80b3ada7
PB
772PCIBus *pci_bridge_init(PCIBus *bus, int devfn, uint32_t id,
773 pci_map_irq_fn map_irq, const char *name);
26aa7d72 774
502a5395 775/* prep_pci.c */
46e50e9d 776PCIBus *pci_prep_init(void);
77d4bc34 777
502a5395
PB
778/* grackle_pci.c */
779PCIBus *pci_grackle_init(uint32_t base, void *pic);
780
781/* unin_pci.c */
782PCIBus *pci_pmac_init(void *pic);
783
784/* apb_pci.c */
785PCIBus *pci_apb_init(target_ulong special_base, target_ulong mem_base,
786 void *pic);
787
e69954b9 788PCIBus *pci_vpb_init(void *pic, int irq, int realview);
502a5395
PB
789
790/* piix_pci.c */
f00fc47c
FB
791PCIBus *i440fx_init(PCIDevice **pi440fx_state);
792void i440fx_set_smm(PCIDevice *d, int val);
502a5395 793int piix3_init(PCIBus *bus);
f00fc47c 794void i440fx_init_memory_mappings(PCIDevice *d);
a41b2ff2 795
28b9b5af
FB
796/* openpic.c */
797typedef struct openpic_t openpic_t;
54fa5af5 798void openpic_set_irq(void *opaque, int n_IRQ, int level);
7668a27f
FB
799openpic_t *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus,
800 CPUState **envp);
28b9b5af 801
54fa5af5
FB
802/* heathrow_pic.c */
803typedef struct HeathrowPICS HeathrowPICS;
804void heathrow_pic_set_irq(void *opaque, int num, int level);
805HeathrowPICS *heathrow_pic_init(int *pmem_index);
806
6a36d84e
FB
807#ifdef HAS_AUDIO
808struct soundhw {
809 const char *name;
810 const char *descr;
811 int enabled;
812 int isa;
813 union {
814 int (*init_isa) (AudioState *s);
815 int (*init_pci) (PCIBus *bus, AudioState *s);
816 } init;
817};
818
819extern struct soundhw soundhw[];
820#endif
821
313aa567
FB
822/* vga.c */
823
74a14f22 824#define VGA_RAM_SIZE (8192 * 1024)
313aa567 825
82c643ff 826struct DisplayState {
313aa567
FB
827 uint8_t *data;
828 int linesize;
829 int depth;
d3079cd2 830 int bgr; /* BGR color order instead of RGB. Only valid for depth == 32 */
82c643ff
FB
831 int width;
832 int height;
24236869
FB
833 void *opaque;
834
313aa567
FB
835 void (*dpy_update)(struct DisplayState *s, int x, int y, int w, int h);
836 void (*dpy_resize)(struct DisplayState *s, int w, int h);
837 void (*dpy_refresh)(struct DisplayState *s);
24236869 838 void (*dpy_copy)(struct DisplayState *s, int src_x, int src_y, int dst_x, int dst_y, int w, int h);
82c643ff 839};
313aa567
FB
840
841static inline void dpy_update(DisplayState *s, int x, int y, int w, int h)
842{
843 s->dpy_update(s, x, y, w, h);
844}
845
846static inline void dpy_resize(DisplayState *s, int w, int h)
847{
848 s->dpy_resize(s, w, h);
849}
850
89b6b508
FB
851int isa_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
852 unsigned long vga_ram_offset, int vga_ram_size);
853int pci_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
854 unsigned long vga_ram_offset, int vga_ram_size,
855 unsigned long vga_bios_offset, int vga_bios_size);
313aa567 856
d6bfa22f 857/* cirrus_vga.c */
46e50e9d 858void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
d6bfa22f 859 unsigned long vga_ram_offset, int vga_ram_size);
d6bfa22f
FB
860void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
861 unsigned long vga_ram_offset, int vga_ram_size);
862
313aa567 863/* sdl.c */
d63d307f 864void sdl_display_init(DisplayState *ds, int full_screen);
313aa567 865
da4dbf74
FB
866/* cocoa.m */
867void cocoa_display_init(DisplayState *ds, int full_screen);
868
24236869
FB
869/* vnc.c */
870void vnc_display_init(DisplayState *ds, int display);
871
5391d806
FB
872/* ide.c */
873#define MAX_DISKS 4
874
faea38e7 875extern BlockDriverState *bs_table[MAX_DISKS + 1];
5391d806 876
69b91039
FB
877void isa_ide_init(int iobase, int iobase2, int irq,
878 BlockDriverState *hd0, BlockDriverState *hd1);
54fa5af5
FB
879void pci_cmd646_ide_init(PCIBus *bus, BlockDriverState **hd_table,
880 int secondary_ide_enabled);
502a5395 881void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn);
28b9b5af 882int pmac_ide_init (BlockDriverState **hd_table,
54fa5af5 883 SetIRQFunc *set_irq, void *irq_opaque, int irq);
5391d806 884
2e5d83bb
PB
885/* cdrom.c */
886int cdrom_read_toc(int nb_sectors, uint8_t *buf, int msf, int start_track);
887int cdrom_read_toc_raw(int nb_sectors, uint8_t *buf, int msf, int session_num);
888
1d14ffa9 889/* es1370.c */
c0fe3827 890int es1370_init (PCIBus *bus, AudioState *s);
1d14ffa9 891
fb065187 892/* sb16.c */
c0fe3827 893int SB16_init (AudioState *s);
fb065187
FB
894
895/* adlib.c */
c0fe3827 896int Adlib_init (AudioState *s);
fb065187
FB
897
898/* gus.c */
c0fe3827 899int GUS_init (AudioState *s);
27503323
FB
900
901/* dma.c */
85571bc7 902typedef int (*DMA_transfer_handler) (void *opaque, int nchan, int pos, int size);
27503323 903int DMA_get_channel_mode (int nchan);
85571bc7
FB
904int DMA_read_memory (int nchan, void *buf, int pos, int size);
905int DMA_write_memory (int nchan, void *buf, int pos, int size);
27503323
FB
906void DMA_hold_DREQ (int nchan);
907void DMA_release_DREQ (int nchan);
16f62432 908void DMA_schedule(int nchan);
27503323 909void DMA_run (void);
28b9b5af 910void DMA_init (int high_page_enable);
27503323 911void DMA_register_channel (int nchan,
85571bc7
FB
912 DMA_transfer_handler transfer_handler,
913 void *opaque);
7138fcfb
FB
914/* fdc.c */
915#define MAX_FD 2
916extern BlockDriverState *fd_table[MAX_FD];
917
baca51fa
FB
918typedef struct fdctrl_t fdctrl_t;
919
920fdctrl_t *fdctrl_init (int irq_lvl, int dma_chann, int mem_mapped,
921 uint32_t io_base,
922 BlockDriverState **fds);
923int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num);
7138fcfb 924
80cabfad
FB
925/* ne2000.c */
926
7c9d8e07
FB
927void isa_ne2000_init(int base, int irq, NICInfo *nd);
928void pci_ne2000_init(PCIBus *bus, NICInfo *nd);
80cabfad 929
a41b2ff2
PB
930/* rtl8139.c */
931
932void pci_rtl8139_init(PCIBus *bus, NICInfo *nd);
933
e3c2613f
FB
934/* pcnet.c */
935
936void pci_pcnet_init(PCIBus *bus, NICInfo *nd);
67e999be
FB
937void pcnet_h_reset(void *opaque);
938void *lance_init(NICInfo *nd, uint32_t leaddr, void *dma_opaque);
939
e3c2613f 940
80cabfad
FB
941/* pckbd.c */
942
80cabfad
FB
943void kbd_init(void);
944
945/* mc146818rtc.c */
946
8a7ddc38 947typedef struct RTCState RTCState;
80cabfad 948
8a7ddc38
FB
949RTCState *rtc_init(int base, int irq);
950void rtc_set_memory(RTCState *s, int addr, int val);
951void rtc_set_date(RTCState *s, const struct tm *tm);
80cabfad
FB
952
953/* serial.c */
954
c4b1fcc0 955typedef struct SerialState SerialState;
e5d13e2f
FB
956SerialState *serial_init(SetIRQFunc *set_irq, void *opaque,
957 int base, int irq, CharDriverState *chr);
958SerialState *serial_mm_init (SetIRQFunc *set_irq, void *opaque,
959 target_ulong base, int it_shift,
960 int irq, CharDriverState *chr);
80cabfad 961
6508fe59
FB
962/* parallel.c */
963
964typedef struct ParallelState ParallelState;
965ParallelState *parallel_init(int base, int irq, CharDriverState *chr);
966
80cabfad
FB
967/* i8259.c */
968
3de388f6
FB
969typedef struct PicState2 PicState2;
970extern PicState2 *isa_pic;
80cabfad 971void pic_set_irq(int irq, int level);
54fa5af5 972void pic_set_irq_new(void *opaque, int irq, int level);
3de388f6 973PicState2 *pic_init(IRQRequestFunc *irq_request, void *irq_request_opaque);
d592d303
FB
974void pic_set_alt_irq_func(PicState2 *s, SetIRQFunc *alt_irq_func,
975 void *alt_irq_opaque);
3de388f6
FB
976int pic_read_irq(PicState2 *s);
977void pic_update_irq(PicState2 *s);
978uint32_t pic_intack_read(PicState2 *s);
c20709aa 979void pic_info(void);
4a0fb71e 980void irq_info(void);
80cabfad 981
c27004ec 982/* APIC */
d592d303
FB
983typedef struct IOAPICState IOAPICState;
984
c27004ec
FB
985int apic_init(CPUState *env);
986int apic_get_interrupt(CPUState *env);
d592d303
FB
987IOAPICState *ioapic_init(void);
988void ioapic_set_irq(void *opaque, int vector, int level);
c27004ec 989
80cabfad
FB
990/* i8254.c */
991
992#define PIT_FREQ 1193182
993
ec844b96
FB
994typedef struct PITState PITState;
995
996PITState *pit_init(int base, int irq);
997void pit_set_gate(PITState *pit, int channel, int val);
998int pit_get_gate(PITState *pit, int channel);
fd06c375
FB
999int pit_get_initial_count(PITState *pit, int channel);
1000int pit_get_mode(PITState *pit, int channel);
ec844b96 1001int pit_get_out(PITState *pit, int channel, int64_t current_time);
80cabfad 1002
fd06c375
FB
1003/* pcspk.c */
1004void pcspk_init(PITState *);
1005int pcspk_audio_init(AudioState *);
1006
6515b203
FB
1007/* acpi.c */
1008extern int acpi_enabled;
502a5395 1009void piix4_pm_init(PCIBus *bus, int devfn);
6515b203
FB
1010void acpi_bios_init(void);
1011
80cabfad 1012/* pc.c */
54fa5af5 1013extern QEMUMachine pc_machine;
3dbbdc25 1014extern QEMUMachine isapc_machine;
52ca8d6a 1015extern int fd_bootchk;
80cabfad 1016
6a00d601
FB
1017void ioport_set_a20(int enable);
1018int ioport_get_a20(void);
1019
26aa7d72 1020/* ppc.c */
54fa5af5
FB
1021extern QEMUMachine prep_machine;
1022extern QEMUMachine core99_machine;
1023extern QEMUMachine heathrow_machine;
1024
6af0bf9c
FB
1025/* mips_r4k.c */
1026extern QEMUMachine mips_machine;
1027
e16fe40c
TS
1028/* mips_timer.c */
1029extern void cpu_mips_clock_init(CPUState *);
1030extern void cpu_mips_irqctrl_init (void);
1031
27c7ca7e
FB
1032/* shix.c */
1033extern QEMUMachine shix_machine;
1034
8cc43fef
FB
1035#ifdef TARGET_PPC
1036ppc_tb_t *cpu_ppc_tb_init (CPUState *env, uint32_t freq);
1037#endif
64201201 1038void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val);
77d4bc34
FB
1039
1040extern CPUWriteMemoryFunc *PPC_io_write[];
1041extern CPUReadMemoryFunc *PPC_io_read[];
54fa5af5 1042void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val);
26aa7d72 1043
e95c8d51 1044/* sun4m.c */
54fa5af5 1045extern QEMUMachine sun4m_machine;
ba3c64fb 1046void pic_set_irq_cpu(int irq, int level, unsigned int cpu);
e95c8d51
FB
1047
1048/* iommu.c */
e80cfcfc 1049void *iommu_init(uint32_t addr);
67e999be 1050void sparc_iommu_memory_rw(void *opaque, target_phys_addr_t addr,
a917d384 1051 uint8_t *buf, int len, int is_write);
67e999be
FB
1052static inline void sparc_iommu_memory_read(void *opaque,
1053 target_phys_addr_t addr,
1054 uint8_t *buf, int len)
1055{
1056 sparc_iommu_memory_rw(opaque, addr, buf, len, 0);
1057}
e95c8d51 1058
67e999be
FB
1059static inline void sparc_iommu_memory_write(void *opaque,
1060 target_phys_addr_t addr,
1061 uint8_t *buf, int len)
1062{
1063 sparc_iommu_memory_rw(opaque, addr, buf, len, 1);
1064}
e95c8d51
FB
1065
1066/* tcx.c */
95219897 1067void tcx_init(DisplayState *ds, uint32_t addr, uint8_t *vram_base,
6f7e9aec 1068 unsigned long vram_offset, int vram_size, int width, int height);
e80cfcfc
FB
1069
1070/* slavio_intctl.c */
1071void *slavio_intctl_init();
ba3c64fb 1072void slavio_intctl_set_cpu(void *opaque, unsigned int cpu, CPUState *env);
e80cfcfc
FB
1073void slavio_pic_info(void *opaque);
1074void slavio_irq_info(void *opaque);
1075void slavio_pic_set_irq(void *opaque, int irq, int level);
ba3c64fb 1076void slavio_pic_set_irq_cpu(void *opaque, int irq, int level, unsigned int cpu);
e95c8d51 1077
5fe141fd
FB
1078/* loader.c */
1079int get_image_size(const char *filename);
1080int load_image(const char *filename, uint8_t *addr);
9ee3c029 1081int load_elf(const char *filename, int64_t virt_to_phys_addend, uint64_t *pentry);
e80cfcfc
FB
1082int load_aout(const char *filename, uint8_t *addr);
1083
1084/* slavio_timer.c */
ba3c64fb 1085void slavio_timer_init(uint32_t addr, int irq, int mode, unsigned int cpu);
8d5f07fa 1086
e80cfcfc
FB
1087/* slavio_serial.c */
1088SerialState *slavio_serial_init(int base, int irq, CharDriverState *chr1, CharDriverState *chr2);
1089void slavio_serial_ms_kbd_init(int base, int irq);
e95c8d51 1090
3475187d
FB
1091/* slavio_misc.c */
1092void *slavio_misc_init(uint32_t base, int irq);
1093void slavio_set_power_fail(void *opaque, int power_failing);
1094
6f7e9aec 1095/* esp.c */
67e999be
FB
1096void *esp_init(BlockDriverState **bd, uint32_t espaddr, void *dma_opaque);
1097void esp_reset(void *opaque);
1098
1099/* sparc32_dma.c */
1100void *sparc32_dma_init(uint32_t daddr, int espirq, int leirq, void *iommu,
1101 void *intctl);
1102void ledma_set_irq(void *opaque, int isr);
9b94dc32
FB
1103void ledma_memory_read(void *opaque, target_phys_addr_t addr,
1104 uint8_t *buf, int len, int do_bswap);
1105void ledma_memory_write(void *opaque, target_phys_addr_t addr,
1106 uint8_t *buf, int len, int do_bswap);
67e999be
FB
1107void espdma_raise_irq(void *opaque);
1108void espdma_clear_irq(void *opaque);
1109void espdma_memory_read(void *opaque, uint8_t *buf, int len);
1110void espdma_memory_write(void *opaque, uint8_t *buf, int len);
1111void sparc32_dma_set_reset_data(void *opaque, void *esp_opaque,
1112 void *lance_opaque);
6f7e9aec 1113
b8174937
FB
1114/* cs4231.c */
1115void cs_init(target_phys_addr_t base, int irq, void *intctl);
1116
3475187d
FB
1117/* sun4u.c */
1118extern QEMUMachine sun4u_machine;
1119
64201201
FB
1120/* NVRAM helpers */
1121#include "hw/m48t59.h"
1122
1123void NVRAM_set_byte (m48t59_t *nvram, uint32_t addr, uint8_t value);
1124uint8_t NVRAM_get_byte (m48t59_t *nvram, uint32_t addr);
1125void NVRAM_set_word (m48t59_t *nvram, uint32_t addr, uint16_t value);
1126uint16_t NVRAM_get_word (m48t59_t *nvram, uint32_t addr);
1127void NVRAM_set_lword (m48t59_t *nvram, uint32_t addr, uint32_t value);
1128uint32_t NVRAM_get_lword (m48t59_t *nvram, uint32_t addr);
1129void NVRAM_set_string (m48t59_t *nvram, uint32_t addr,
1130 const unsigned char *str, uint32_t max);
1131int NVRAM_get_string (m48t59_t *nvram, uint8_t *dst, uint16_t addr, int max);
1132void NVRAM_set_crc (m48t59_t *nvram, uint32_t addr,
1133 uint32_t start, uint32_t count);
1134int PPC_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size,
1135 const unsigned char *arch,
1136 uint32_t RAM_size, int boot_device,
1137 uint32_t kernel_image, uint32_t kernel_size,
28b9b5af 1138 const char *cmdline,
64201201 1139 uint32_t initrd_image, uint32_t initrd_size,
28b9b5af
FB
1140 uint32_t NVRAM_image,
1141 int width, int height, int depth);
64201201 1142
63066f4f
FB
1143/* adb.c */
1144
1145#define MAX_ADB_DEVICES 16
1146
e2733d20 1147#define ADB_MAX_OUT_LEN 16
63066f4f 1148
e2733d20 1149typedef struct ADBDevice ADBDevice;
63066f4f 1150
e2733d20
FB
1151/* buf = NULL means polling */
1152typedef int ADBDeviceRequest(ADBDevice *d, uint8_t *buf_out,
1153 const uint8_t *buf, int len);
12c28fed
FB
1154typedef int ADBDeviceReset(ADBDevice *d);
1155
63066f4f
FB
1156struct ADBDevice {
1157 struct ADBBusState *bus;
1158 int devaddr;
1159 int handler;
e2733d20 1160 ADBDeviceRequest *devreq;
12c28fed 1161 ADBDeviceReset *devreset;
63066f4f
FB
1162 void *opaque;
1163};
1164
1165typedef struct ADBBusState {
1166 ADBDevice devices[MAX_ADB_DEVICES];
1167 int nb_devices;
e2733d20 1168 int poll_index;
63066f4f
FB
1169} ADBBusState;
1170
e2733d20
FB
1171int adb_request(ADBBusState *s, uint8_t *buf_out,
1172 const uint8_t *buf, int len);
1173int adb_poll(ADBBusState *s, uint8_t *buf_out);
63066f4f
FB
1174
1175ADBDevice *adb_register_device(ADBBusState *s, int devaddr,
e2733d20 1176 ADBDeviceRequest *devreq,
12c28fed 1177 ADBDeviceReset *devreset,
63066f4f
FB
1178 void *opaque);
1179void adb_kbd_init(ADBBusState *bus);
1180void adb_mouse_init(ADBBusState *bus);
1181
1182/* cuda.c */
1183
1184extern ADBBusState adb_bus;
54fa5af5 1185int cuda_init(SetIRQFunc *set_irq, void *irq_opaque, int irq);
63066f4f 1186
bb36d470
FB
1187#include "hw/usb.h"
1188
a594cfbf
FB
1189/* usb ports of the VM */
1190
0d92ed30
PB
1191void qemu_register_usb_port(USBPort *port, void *opaque, int index,
1192 usb_attachfn attach);
a594cfbf 1193
0d92ed30 1194#define VM_USB_HUB_SIZE 8
a594cfbf
FB
1195
1196void do_usb_add(const char *devname);
1197void do_usb_del(const char *devname);
1198void usb_info(void);
1199
2e5d83bb 1200/* scsi-disk.c */
4d611c9a
PB
1201enum scsi_reason {
1202 SCSI_REASON_DONE, /* Command complete. */
1203 SCSI_REASON_DATA /* Transfer complete, more data required. */
1204};
1205
2e5d83bb 1206typedef struct SCSIDevice SCSIDevice;
a917d384
PB
1207typedef void (*scsi_completionfn)(void *opaque, int reason, uint32_t tag,
1208 uint32_t arg);
2e5d83bb
PB
1209
1210SCSIDevice *scsi_disk_init(BlockDriverState *bdrv,
a917d384 1211 int tcq,
2e5d83bb
PB
1212 scsi_completionfn completion,
1213 void *opaque);
1214void scsi_disk_destroy(SCSIDevice *s);
1215
0fc5c15a 1216int32_t scsi_send_command(SCSIDevice *s, uint32_t tag, uint8_t *buf, int lun);
4d611c9a
PB
1217/* SCSI data transfers are asynchrnonous. However, unlike the block IO
1218 layer the completion routine may be called directly by
1219 scsi_{read,write}_data. */
a917d384
PB
1220void scsi_read_data(SCSIDevice *s, uint32_t tag);
1221int scsi_write_data(SCSIDevice *s, uint32_t tag);
1222void scsi_cancel_io(SCSIDevice *s, uint32_t tag);
1223uint8_t *scsi_get_buf(SCSIDevice *s, uint32_t tag);
2e5d83bb 1224
7d8406be
PB
1225/* lsi53c895a.c */
1226void lsi_scsi_attach(void *opaque, BlockDriverState *bd, int id);
1227void *lsi_scsi_init(PCIBus *bus, int devfn);
1228
b5ff1b31 1229/* integratorcp.c */
40f137e1
PB
1230extern QEMUMachine integratorcp926_machine;
1231extern QEMUMachine integratorcp1026_machine;
b5ff1b31 1232
cdbdb648
PB
1233/* versatilepb.c */
1234extern QEMUMachine versatilepb_machine;
16406950 1235extern QEMUMachine versatileab_machine;
cdbdb648 1236
e69954b9
PB
1237/* realview.c */
1238extern QEMUMachine realview_machine;
1239
daa57963
FB
1240/* ps2.c */
1241void *ps2_kbd_init(void (*update_irq)(void *, int), void *update_arg);
1242void *ps2_mouse_init(void (*update_irq)(void *, int), void *update_arg);
1243void ps2_write_mouse(void *, int val);
1244void ps2_write_keyboard(void *, int val);
1245uint32_t ps2_read_data(void *);
1246void ps2_queue(void *, int b);
f94f5d71 1247void ps2_keyboard_set_translation(void *opaque, int mode);
daa57963 1248
80337b66
FB
1249/* smc91c111.c */
1250void smc91c111_init(NICInfo *, uint32_t, void *, int);
1251
bdd5003a 1252/* pl110.c */
95219897 1253void *pl110_init(DisplayState *ds, uint32_t base, void *pic, int irq, int);
bdd5003a 1254
cdbdb648
PB
1255/* pl011.c */
1256void pl011_init(uint32_t base, void *pic, int irq, CharDriverState *chr);
1257
1258/* pl050.c */
1259void pl050_init(uint32_t base, void *pic, int irq, int is_mouse);
1260
1261/* pl080.c */
e69954b9 1262void *pl080_init(uint32_t base, void *pic, int irq, int nchannels);
cdbdb648
PB
1263
1264/* pl190.c */
1265void *pl190_init(uint32_t base, void *parent, int irq, int fiq);
1266
1267/* arm-timer.c */
1268void sp804_init(uint32_t base, void *pic, int irq);
1269void icp_pit_init(uint32_t base, void *pic, int irq);
1270
e69954b9
PB
1271/* arm_sysctl.c */
1272void arm_sysctl_init(uint32_t base, uint32_t sys_id);
1273
1274/* arm_gic.c */
1275void *arm_gic_init(uint32_t base, void *parent, int parent_irq);
1276
16406950
PB
1277/* arm_boot.c */
1278
1279void arm_load_kernel(int ram_size, const char *kernel_filename,
1280 const char *kernel_cmdline, const char *initrd_filename,
1281 int board_id);
1282
27c7ca7e
FB
1283/* sh7750.c */
1284struct SH7750State;
1285
008a8818 1286struct SH7750State *sh7750_init(CPUState * cpu);
27c7ca7e
FB
1287
1288typedef struct {
1289 /* The callback will be triggered if any of the designated lines change */
1290 uint16_t portamask_trigger;
1291 uint16_t portbmask_trigger;
1292 /* Return 0 if no action was taken */
1293 int (*port_change_cb) (uint16_t porta, uint16_t portb,
1294 uint16_t * periph_pdtra,
1295 uint16_t * periph_portdira,
1296 uint16_t * periph_pdtrb,
1297 uint16_t * periph_portdirb);
1298} sh7750_io_device;
1299
1300int sh7750_register_io_device(struct SH7750State *s,
1301 sh7750_io_device * device);
1302/* tc58128.c */
1303int tc58128_init(struct SH7750State *s, char *zone1, char *zone2);
1304
29133e9a
FB
1305/* NOR flash devices */
1306typedef struct pflash_t pflash_t;
1307
1308pflash_t *pflash_register (target_ulong base, ram_addr_t off,
1309 BlockDriverState *bs,
1310 target_ulong sector_len, int nb_blocs, int width,
1311 uint16_t id0, uint16_t id1,
1312 uint16_t id2, uint16_t id3);
1313
ea2384d3
FB
1314#endif /* defined(QEMU_TOOL) */
1315
c4b1fcc0 1316/* monitor.c */
82c643ff 1317void monitor_init(CharDriverState *hd, int show_banner);
ea2384d3
FB
1318void term_puts(const char *str);
1319void term_vprintf(const char *fmt, va_list ap);
40c3bac3 1320void term_printf(const char *fmt, ...) __attribute__ ((__format__ (__printf__, 1, 2)));
c4b1fcc0
FB
1321void term_flush(void);
1322void term_print_help(void);
ea2384d3
FB
1323void monitor_readline(const char *prompt, int is_password,
1324 char *buf, int buf_size);
1325
1326/* readline.c */
1327typedef void ReadLineFunc(void *opaque, const char *str);
1328
1329extern int completion_index;
1330void add_completion(const char *str);
1331void readline_handle_byte(int ch);
1332void readline_find_completion(const char *cmdline);
1333const char *readline_get_history(unsigned int index);
1334void readline_start(const char *prompt, int is_password,
1335 ReadLineFunc *readline_func, void *opaque);
c4b1fcc0 1336
5e6ad6f9
FB
1337void kqemu_record_dump(void);
1338
fc01f7e7 1339#endif /* VL_H */