]>
Commit | Line | Data |
---|---|---|
1 | /** @file\r | |
2 | Generic ARM implementation of TimerLib.h\r | |
3 | \r | |
4 | Copyright (c) 2011-2016, ARM Limited. All rights reserved.\r | |
5 | \r | |
6 | SPDX-License-Identifier: BSD-2-Clause-Patent\r | |
7 | \r | |
8 | **/\r | |
9 | \r | |
10 | \r | |
11 | #include <Base.h>\r | |
12 | #include <Library/ArmLib.h>\r | |
13 | #include <Library/BaseLib.h>\r | |
14 | #include <Library/TimerLib.h>\r | |
15 | #include <Library/DebugLib.h>\r | |
16 | #include <Library/PcdLib.h>\r | |
17 | #include <Library/ArmGenericTimerCounterLib.h>\r | |
18 | \r | |
19 | #define TICKS_PER_MICRO_SEC (PcdGet32 (PcdArmArchTimerFreqInHz)/1000000U)\r | |
20 | \r | |
21 | // Select appropriate multiply function for platform architecture.\r | |
22 | #ifdef MDE_CPU_ARM\r | |
23 | #define MultU64xN MultU64x32\r | |
24 | #else\r | |
25 | #define MultU64xN MultU64x64\r | |
26 | #endif\r | |
27 | \r | |
28 | \r | |
29 | RETURN_STATUS\r | |
30 | EFIAPI\r | |
31 | TimerConstructor (\r | |
32 | VOID\r | |
33 | )\r | |
34 | {\r | |
35 | //\r | |
36 | // Check if the ARM Generic Timer Extension is implemented.\r | |
37 | //\r | |
38 | if (ArmIsArchTimerImplemented ()) {\r | |
39 | \r | |
40 | //\r | |
41 | // Check if Architectural Timer frequency is pre-determined by the platform\r | |
42 | // (ie. nonzero).\r | |
43 | //\r | |
44 | if (PcdGet32 (PcdArmArchTimerFreqInHz) != 0) {\r | |
45 | //\r | |
46 | // Check if ticks/uS is not 0. The Architectural timer runs at constant\r | |
47 | // frequency, irrespective of CPU frequency. According to Generic Timer\r | |
48 | // Ref manual, lower bound of the frequency is in the range of 1-10MHz.\r | |
49 | //\r | |
50 | ASSERT (TICKS_PER_MICRO_SEC);\r | |
51 | \r | |
52 | #ifdef MDE_CPU_ARM\r | |
53 | //\r | |
54 | // Only set the frequency for ARMv7. We expect the secure firmware to\r | |
55 | // have already done it.\r | |
56 | // If the security extension is not implemented, set Timer Frequency\r | |
57 | // here.\r | |
58 | //\r | |
59 | if ((ArmReadIdPfr1 () & ARM_PFR1_SEC) == 0x0) {\r | |
60 | ArmGenericTimerSetTimerFreq (PcdGet32 (PcdArmArchTimerFreqInHz));\r | |
61 | }\r | |
62 | #endif\r | |
63 | }\r | |
64 | \r | |
65 | //\r | |
66 | // Architectural Timer Frequency must be set in Secure privileged\r | |
67 | // mode (if secure extension is supported).\r | |
68 | // If the reset value (0) is returned, just ASSERT.\r | |
69 | //\r | |
70 | ASSERT (ArmGenericTimerGetTimerFreq () != 0);\r | |
71 | \r | |
72 | } else {\r | |
73 | DEBUG ((EFI_D_ERROR, "ARM Architectural Timer is not available in the CPU, hence this library cannot be used.\n"));\r | |
74 | ASSERT (0);\r | |
75 | }\r | |
76 | \r | |
77 | return RETURN_SUCCESS;\r | |
78 | }\r | |
79 | \r | |
80 | /**\r | |
81 | A local utility function that returns the PCD value, if specified.\r | |
82 | Otherwise it defaults to ArmGenericTimerGetTimerFreq.\r | |
83 | \r | |
84 | @return The timer frequency.\r | |
85 | \r | |
86 | **/\r | |
87 | STATIC\r | |
88 | UINTN\r | |
89 | EFIAPI\r | |
90 | GetPlatformTimerFreq (\r | |
91 | )\r | |
92 | {\r | |
93 | UINTN TimerFreq;\r | |
94 | \r | |
95 | TimerFreq = PcdGet32 (PcdArmArchTimerFreqInHz);\r | |
96 | if (TimerFreq == 0) {\r | |
97 | TimerFreq = ArmGenericTimerGetTimerFreq ();\r | |
98 | }\r | |
99 | return TimerFreq;\r | |
100 | }\r | |
101 | \r | |
102 | \r | |
103 | /**\r | |
104 | Stalls the CPU for the number of microseconds specified by MicroSeconds.\r | |
105 | \r | |
106 | @param MicroSeconds The minimum number of microseconds to delay.\r | |
107 | \r | |
108 | @return The value of MicroSeconds input.\r | |
109 | \r | |
110 | **/\r | |
111 | UINTN\r | |
112 | EFIAPI\r | |
113 | MicroSecondDelay (\r | |
114 | IN UINTN MicroSeconds\r | |
115 | )\r | |
116 | {\r | |
117 | UINT64 TimerTicks64;\r | |
118 | UINT64 SystemCounterVal;\r | |
119 | \r | |
120 | // Calculate counter ticks that represent requested delay:\r | |
121 | // = MicroSeconds x TICKS_PER_MICRO_SEC\r | |
122 | // = MicroSeconds x Frequency.10^-6\r | |
123 | TimerTicks64 = DivU64x32 (\r | |
124 | MultU64xN (\r | |
125 | MicroSeconds,\r | |
126 | GetPlatformTimerFreq ()\r | |
127 | ),\r | |
128 | 1000000U\r | |
129 | );\r | |
130 | \r | |
131 | // Read System Counter value\r | |
132 | SystemCounterVal = ArmGenericTimerGetSystemCount ();\r | |
133 | \r | |
134 | TimerTicks64 += SystemCounterVal;\r | |
135 | \r | |
136 | // Wait until delay count expires.\r | |
137 | while (SystemCounterVal < TimerTicks64) {\r | |
138 | SystemCounterVal = ArmGenericTimerGetSystemCount ();\r | |
139 | }\r | |
140 | \r | |
141 | return MicroSeconds;\r | |
142 | }\r | |
143 | \r | |
144 | \r | |
145 | /**\r | |
146 | Stalls the CPU for at least the given number of nanoseconds.\r | |
147 | \r | |
148 | Stalls the CPU for the number of nanoseconds specified by NanoSeconds.\r | |
149 | \r | |
150 | When the timer frequency is 1MHz, each tick corresponds to 1 microsecond.\r | |
151 | Therefore, the nanosecond delay will be rounded up to the nearest 1 microsecond.\r | |
152 | \r | |
153 | @param NanoSeconds The minimum number of nanoseconds to delay.\r | |
154 | \r | |
155 | @return The value of NanoSeconds inputed.\r | |
156 | \r | |
157 | **/\r | |
158 | UINTN\r | |
159 | EFIAPI\r | |
160 | NanoSecondDelay (\r | |
161 | IN UINTN NanoSeconds\r | |
162 | )\r | |
163 | {\r | |
164 | UINTN MicroSeconds;\r | |
165 | \r | |
166 | // Round up to 1us Tick Number\r | |
167 | MicroSeconds = NanoSeconds / 1000;\r | |
168 | MicroSeconds += ((NanoSeconds % 1000) == 0) ? 0 : 1;\r | |
169 | \r | |
170 | MicroSecondDelay (MicroSeconds);\r | |
171 | \r | |
172 | return NanoSeconds;\r | |
173 | }\r | |
174 | \r | |
175 | /**\r | |
176 | Retrieves the current value of a 64-bit free running performance counter.\r | |
177 | \r | |
178 | The counter can either count up by 1 or count down by 1. If the physical\r | |
179 | performance counter counts by a larger increment, then the counter values\r | |
180 | must be translated. The properties of the counter can be retrieved from\r | |
181 | GetPerformanceCounterProperties().\r | |
182 | \r | |
183 | @return The current value of the free running performance counter.\r | |
184 | \r | |
185 | **/\r | |
186 | UINT64\r | |
187 | EFIAPI\r | |
188 | GetPerformanceCounter (\r | |
189 | VOID\r | |
190 | )\r | |
191 | {\r | |
192 | // Just return the value of system count\r | |
193 | return ArmGenericTimerGetSystemCount ();\r | |
194 | }\r | |
195 | \r | |
196 | /**\r | |
197 | Retrieves the 64-bit frequency in Hz and the range of performance counter\r | |
198 | values.\r | |
199 | \r | |
200 | If StartValue is not NULL, then the value that the performance counter starts\r | |
201 | with immediately after is it rolls over is returned in StartValue. If\r | |
202 | EndValue is not NULL, then the value that the performance counter end with\r | |
203 | immediately before it rolls over is returned in EndValue. The 64-bit\r | |
204 | frequency of the performance counter in Hz is always returned. If StartValue\r | |
205 | is less than EndValue, then the performance counter counts up. If StartValue\r | |
206 | is greater than EndValue, then the performance counter counts down. For\r | |
207 | example, a 64-bit free running counter that counts up would have a StartValue\r | |
208 | of 0 and an EndValue of 0xFFFFFFFFFFFFFFFF. A 24-bit free running counter\r | |
209 | that counts down would have a StartValue of 0xFFFFFF and an EndValue of 0.\r | |
210 | \r | |
211 | @param StartValue The value the performance counter starts with when it\r | |
212 | rolls over.\r | |
213 | @param EndValue The value that the performance counter ends with before\r | |
214 | it rolls over.\r | |
215 | \r | |
216 | @return The frequency in Hz.\r | |
217 | \r | |
218 | **/\r | |
219 | UINT64\r | |
220 | EFIAPI\r | |
221 | GetPerformanceCounterProperties (\r | |
222 | OUT UINT64 *StartValue, OPTIONAL\r | |
223 | OUT UINT64 *EndValue OPTIONAL\r | |
224 | )\r | |
225 | {\r | |
226 | if (StartValue != NULL) {\r | |
227 | // Timer starts at 0\r | |
228 | *StartValue = (UINT64)0ULL ;\r | |
229 | }\r | |
230 | \r | |
231 | if (EndValue != NULL) {\r | |
232 | // Timer counts up.\r | |
233 | *EndValue = 0xFFFFFFFFFFFFFFFFUL;\r | |
234 | }\r | |
235 | \r | |
236 | return (UINT64)ArmGenericTimerGetTimerFreq ();\r | |
237 | }\r | |
238 | \r | |
239 | /**\r | |
240 | Converts elapsed ticks of performance counter to time in nanoseconds.\r | |
241 | \r | |
242 | This function converts the elapsed ticks of running performance counter to\r | |
243 | time value in unit of nanoseconds.\r | |
244 | \r | |
245 | @param Ticks The number of elapsed ticks of running performance counter.\r | |
246 | \r | |
247 | @return The elapsed time in nanoseconds.\r | |
248 | \r | |
249 | **/\r | |
250 | UINT64\r | |
251 | EFIAPI\r | |
252 | GetTimeInNanoSecond (\r | |
253 | IN UINT64 Ticks\r | |
254 | )\r | |
255 | {\r | |
256 | UINT64 NanoSeconds;\r | |
257 | UINT32 Remainder;\r | |
258 | UINT32 TimerFreq;\r | |
259 | \r | |
260 | TimerFreq = GetPlatformTimerFreq ();\r | |
261 | //\r | |
262 | // Ticks\r | |
263 | // Time = --------- x 1,000,000,000\r | |
264 | // Frequency\r | |
265 | //\r | |
266 | NanoSeconds = MultU64xN (\r | |
267 | DivU64x32Remainder (\r | |
268 | Ticks,\r | |
269 | TimerFreq,\r | |
270 | &Remainder),\r | |
271 | 1000000000U\r | |
272 | );\r | |
273 | \r | |
274 | //\r | |
275 | // Frequency < 0x100000000, so Remainder < 0x100000000, then (Remainder * 1,000,000,000)\r | |
276 | // will not overflow 64-bit.\r | |
277 | //\r | |
278 | NanoSeconds += DivU64x32 (\r | |
279 | MultU64xN (\r | |
280 | (UINT64) Remainder,\r | |
281 | 1000000000U),\r | |
282 | TimerFreq\r | |
283 | );\r | |
284 | \r | |
285 | return NanoSeconds;\r | |
286 | }\r |