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1 | /** @file\r | |
2 | *\r | |
3 | * Copyright (c) 2011, ARM Limited. All rights reserved.\r | |
4 | * \r | |
5 | * This program and the accompanying materials \r | |
6 | * are licensed and made available under the terms and conditions of the BSD License \r | |
7 | * which accompanies this distribution. The full text of the license may be found at \r | |
8 | * http://opensource.org/licenses/bsd-license.php \r | |
9 | *\r | |
10 | * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r | |
11 | * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r | |
12 | *\r | |
13 | **/\r | |
14 | \r | |
15 | #include <Library/ArmPlatformLib.h>\r | |
16 | #include <Library/DebugLib.h>\r | |
17 | #include <Library/PcdLib.h>\r | |
18 | #include <Library/IoLib.h>\r | |
19 | #include <Library/MemoryAllocationLib.h>\r | |
20 | \r | |
21 | #include <ArmPlatform.h>\r | |
22 | \r | |
23 | // Number of Virtual Memory Map Descriptors without a Logic Tile\r | |
24 | #define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 6\r | |
25 | \r | |
26 | // DDR attributes\r | |
27 | #define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK\r | |
28 | #define DDR_ATTRIBUTES_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED\r | |
29 | #define DDR_ATTRIBUTES_SECURE_CACHED ARM_MEMORY_REGION_ATTRIBUTE_SECURE_WRITE_BACK\r | |
30 | #define DDR_ATTRIBUTES_SECURE_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_SECURE_UNCACHED_UNBUFFERED\r | |
31 | \r | |
32 | /**\r | |
33 | Return the Virtual Memory Map of your platform\r | |
34 | \r | |
35 | This Virtual Memory Map is used by MemoryInitPei Module to initialize the MMU on your platform.\r | |
36 | \r | |
37 | @param[out] VirtualMemoryMap Array of ARM_MEMORY_REGION_DESCRIPTOR describing a Physical-to-\r | |
38 | Virtual Memory mapping. This array must be ended by a zero-filled\r | |
39 | entry\r | |
40 | \r | |
41 | **/\r | |
42 | VOID\r | |
43 | ArmPlatformGetVirtualMemoryMap (\r | |
44 | IN ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap\r | |
45 | )\r | |
46 | {\r | |
47 | ARM_MEMORY_REGION_ATTRIBUTES CacheAttributes;\r | |
48 | BOOLEAN TrustzoneSupport;\r | |
49 | UINTN Index = 0;\r | |
50 | ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable;\r | |
51 | \r | |
52 | ASSERT(VirtualMemoryMap != NULL);\r | |
53 | \r | |
54 | VirtualMemoryTable = (ARM_MEMORY_REGION_DESCRIPTOR*)AllocatePages(EFI_SIZE_TO_PAGES (sizeof(ARM_MEMORY_REGION_DESCRIPTOR) * MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS));\r | |
55 | if (VirtualMemoryTable == NULL) {\r | |
56 | return;\r | |
57 | }\r | |
58 | \r | |
59 | // Check if SMC TZASC is enabled. If Trustzone not enabled then all the entries remain in Secure World.\r | |
60 | // As this value can be changed in the Board Configuration file, the UEFI firmware needs to work for both case\r | |
61 | TrustzoneSupport = PcdGetBool (PcdTrustzoneSupport);\r | |
62 | \r | |
63 | if (FeaturePcdGet(PcdCacheEnable) == TRUE) {\r | |
64 | CacheAttributes = (TrustzoneSupport ? DDR_ATTRIBUTES_CACHED : DDR_ATTRIBUTES_SECURE_CACHED);\r | |
65 | } else {\r | |
66 | CacheAttributes = (TrustzoneSupport ? DDR_ATTRIBUTES_UNCACHED : DDR_ATTRIBUTES_SECURE_UNCACHED);\r | |
67 | }\r | |
68 | \r | |
69 | if (FeaturePcdGet(PcdNorFlashRemapping) == FALSE) {\r | |
70 | // ReMap (Either NOR Flash or DRAM)\r | |
71 | VirtualMemoryTable[Index].PhysicalBase = ARM_VE_REMAP_BASE;\r | |
72 | VirtualMemoryTable[Index].VirtualBase = ARM_VE_REMAP_BASE;\r | |
73 | VirtualMemoryTable[Index].Length = ARM_VE_REMAP_SZ;\r | |
74 | VirtualMemoryTable[Index].Attributes = CacheAttributes;\r | |
75 | }\r | |
76 | \r | |
77 | // DDR\r | |
78 | VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_DRAM_BASE;\r | |
79 | VirtualMemoryTable[Index].VirtualBase = ARM_VE_DRAM_BASE;\r | |
80 | VirtualMemoryTable[Index].Length = ARM_VE_DRAM_SZ;\r | |
81 | VirtualMemoryTable[Index].Attributes = CacheAttributes;\r | |
82 | \r | |
83 | // SMC CS7\r | |
84 | VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_MB_ON_CHIP_PERIPH_BASE;\r | |
85 | VirtualMemoryTable[Index].VirtualBase = ARM_VE_SMB_MB_ON_CHIP_PERIPH_BASE;\r | |
86 | VirtualMemoryTable[Index].Length = ARM_VE_SMB_MB_ON_CHIP_PERIPH_SZ;\r | |
87 | VirtualMemoryTable[Index].Attributes = (TrustzoneSupport ? ARM_MEMORY_REGION_ATTRIBUTE_DEVICE : ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE);\r | |
88 | \r | |
89 | // SMB CS0-CS1 - NOR Flash 1 & 2\r | |
90 | VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_NOR0_BASE;\r | |
91 | VirtualMemoryTable[Index].VirtualBase = ARM_VE_SMB_NOR0_BASE;\r | |
92 | VirtualMemoryTable[Index].Length = ARM_VE_SMB_NOR0_SZ + ARM_VE_SMB_NOR1_SZ;\r | |
93 | VirtualMemoryTable[Index].Attributes = (TrustzoneSupport ? ARM_MEMORY_REGION_ATTRIBUTE_DEVICE : ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE);\r | |
94 | \r | |
95 | // SMB CS2 - SRAM\r | |
96 | VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_SRAM_BASE;\r | |
97 | VirtualMemoryTable[Index].VirtualBase = ARM_VE_SMB_SRAM_BASE;\r | |
98 | VirtualMemoryTable[Index].Length = ARM_VE_SMB_SRAM_SZ;\r | |
99 | VirtualMemoryTable[Index].Attributes = CacheAttributes;\r | |
100 | \r | |
101 | // SMB CS3-CS6 - Motherboard Peripherals\r | |
102 | VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_PERIPH_BASE;\r | |
103 | VirtualMemoryTable[Index].VirtualBase = ARM_VE_SMB_PERIPH_BASE;\r | |
104 | VirtualMemoryTable[Index].Length = ARM_VE_SMB_PERIPH_SZ;\r | |
105 | VirtualMemoryTable[Index].Attributes = (TrustzoneSupport ? ARM_MEMORY_REGION_ATTRIBUTE_DEVICE : ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE);\r | |
106 | \r | |
107 | // If a Logic Tile is connected to The ARM Versatile Express Motherboard\r | |
108 | if (MmioRead32(ARM_VE_SYS_PROCID1_REG) != 0) {\r | |
109 | VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_EXT_AXI_BASE;\r | |
110 | VirtualMemoryTable[Index].VirtualBase = ARM_VE_EXT_AXI_BASE;\r | |
111 | VirtualMemoryTable[Index].Length = ARM_VE_EXT_AXI_SZ;\r | |
112 | VirtualMemoryTable[Index].Attributes = (TrustzoneSupport ? ARM_MEMORY_REGION_ATTRIBUTE_DEVICE : ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE);\r | |
113 | \r | |
114 | ASSERT((Index + 1) == (MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS + 1));\r | |
115 | } else {\r | |
116 | ASSERT((Index + 1) == MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS);\r | |
117 | }\r | |
118 | \r | |
119 | // End of Table\r | |
120 | VirtualMemoryTable[++Index].PhysicalBase = 0;\r | |
121 | VirtualMemoryTable[Index].VirtualBase = 0;\r | |
122 | VirtualMemoryTable[Index].Length = 0;\r | |
123 | VirtualMemoryTable[Index].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)0;\r | |
124 | \r | |
125 | *VirtualMemoryMap = VirtualMemoryTable;\r | |
126 | }\r | |
127 | \r | |
128 | /**\r | |
129 | Return the EFI Memory Map provided by extension memory on your platform\r | |
130 | \r | |
131 | This EFI Memory Map of the System Memory is used by MemoryInitPei module to create the Resource\r | |
132 | Descriptor HOBs used by DXE core.\r | |
133 | \r | |
134 | @param[out] EfiMemoryMap Array of ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR describing an\r | |
135 | EFI Memory region. This array must be ended by a zero-filled entry\r | |
136 | \r | |
137 | **/\r | |
138 | EFI_STATUS\r | |
139 | ArmPlatformGetAdditionalSystemMemory (\r | |
140 | OUT ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR** EfiMemoryMap\r | |
141 | )\r | |
142 | {\r | |
143 | return EFI_UNSUPPORTED;\r | |
144 | }\r |