| | 1 | //\r |
| | 2 | // Copyright (c) 2011-2012, ARM Limited. All rights reserved.\r |
| | 3 | //\r |
| | 4 | // This program and the accompanying materials\r |
| | 5 | // are licensed and made available under the terms and conditions of the BSD License\r |
| | 6 | // which accompanies this distribution. The full text of the license may be found at\r |
| | 7 | // http://opensource.org/licenses/bsd-license.php\r |
| | 8 | //\r |
| | 9 | // THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r |
| | 10 | // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r |
| | 11 | //\r |
| | 12 | //\r |
| | 13 | \r |
| | 14 | #include <AsmMacroIoLib.h>\r |
| | 15 | #include <Base.h>\r |
| | 16 | #include <Library/PcdLib.h>\r |
| | 17 | #include <AutoGen.h>\r |
| | 18 | \r |
| | 19 | INCLUDE AsmMacroIoLib.inc\r |
| | 20 | \r |
| | 21 | IMPORT CEntryPoint\r |
| | 22 | IMPORT ArmReadMpidr\r |
| | 23 | IMPORT ArmIsMpCore\r |
| | 24 | EXPORT _ModuleEntryPoint\r |
| | 25 | \r |
| | 26 | PRESERVE8\r |
| | 27 | AREA PrePiCoreEntryPoint, CODE, READONLY\r |
| | 28 | \r |
| | 29 | StartupAddr DCD CEntryPoint\r |
| | 30 | \r |
| | 31 | _ModuleEntryPoint\r |
| | 32 | // Get ID of this CPU in Multicore system\r |
| | 33 | bl ArmReadMpidr\r |
| | 34 | LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCoreMask), r1)\r |
| | 35 | and r5, r0, r1\r |
| | 36 | \r |
| | 37 | _SetSVCMode\r |
| | 38 | // Enter SVC mode, Disable FIQ and IRQ\r |
| | 39 | mov r1, #0x13|0x80|0x40\r |
| | 40 | msr CPSR_c, r1\r |
| | 41 | \r |
| | 42 | // Check if we can install the stack at the top of the System Memory or if we need\r |
| | 43 | // to install the stacks at the bottom of the Firmware Device (case the FD is located\r |
| | 44 | // at the top of the DRAM)\r |
| | 45 | _SetupStackPosition\r |
| | 46 | // Compute Top of System Memory\r |
| | 47 | LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryBase), r1)\r |
| | 48 | LoadConstantToReg (FixedPcdGet32(PcdSystemMemorySize), r2)\r |
| | 49 | sub r2, r2, #1\r |
| | 50 | add r1, r1, r2 // r1 = SystemMemoryTop = PcdSystemMemoryBase + PcdSystemMemorySize\r |
| | 51 | \r |
| | 52 | // Calculate Top of the Firmware Device\r |
| | 53 | LoadConstantToReg (FixedPcdGet32(PcdFdBaseAddress), r2)\r |
| | 54 | LoadConstantToReg (FixedPcdGet32(PcdFdSize), r3)\r |
| | 55 | sub r3, r3, #1\r |
| | 56 | add r3, r3, r2 // r3 = FdTop = PcdFdBaseAddress + PcdFdSize\r |
| | 57 | \r |
| | 58 | // UEFI Memory Size (stacks are allocated in this region)\r |
| | 59 | LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryUefiRegionSize), r4)\r |
| | 60 | \r |
| | 61 | //\r |
| | 62 | // Reserve the memory for the UEFI region (contain stacks on its top)\r |
| | 63 | //\r |
| | 64 | \r |
| | 65 | // Calculate how much space there is between the top of the Firmware and the Top of the System Memory\r |
| | 66 | subs r0, r1, r3 // r0 = SystemMemoryTop - FdTop\r |
| | 67 | bmi _SetupStack // Jump if negative (FdTop > SystemMemoryTop). Case when the PrePi is in XIP memory outside of the DRAM\r |
| | 68 | cmp r0, r4\r |
| | 69 | bge _SetupStack\r |
| | 70 | \r |
| | 71 | // Case the top of stacks is the FdBaseAddress\r |
| | 72 | mov r1, r2\r |
| | 73 | \r |
| | 74 | _SetupStack\r |
| | 75 | // r1 contains the top of the stack (and the UEFI Memory)\r |
| | 76 | \r |
| | 77 | // Because the 'push' instruction is equivalent to 'stmdb' (decrement before), we need to increment\r |
| | 78 | // one to the top of the stack. We check if incrementing one does not overflow (case of DRAM at the\r |
| | 79 | // top of the memory space)\r |
| | 80 | adds r6, r1, #1\r |
| | 81 | bcs _SetupOverflowStack\r |
| | 82 | \r |
| | 83 | _SetupAlignedStack\r |
| | 84 | mov r1, r6\r |
| | 85 | b _GetBaseUefiMemory\r |
| | 86 | \r |
| | 87 | _SetupOverflowStack\r |
| | 88 | // Case memory at the top of the address space. Ensure the top of the stack is EFI_PAGE_SIZE\r |
| | 89 | // aligned (4KB)\r |
| | 90 | LoadConstantToReg (EFI_PAGE_MASK, r6)\r |
| | 91 | and r6, r6, r1\r |
| | 92 | sub r1, r1, r6\r |
| | 93 | \r |
| | 94 | _GetBaseUefiMemory\r |
| | 95 | // Calculate the Base of the UEFI Memory\r |
| | 96 | sub r6, r1, r4\r |
| | 97 | \r |
| | 98 | _GetStackBase\r |
| | 99 | // Compute Base of Normal stacks for CPU Cores\r |
| | 100 | // Is it MpCore system\r |
| | 101 | bl ArmIsMpCore\r |
| | 102 | cmp r0, #0\r |
| | 103 | // Case it is not an MP Core system. Just setup the primary core\r |
| | 104 | beq _SetupUnicoreStack\r |
| | 105 | \r |
| | 106 | _GetStackBaseMpCore\r |
| | 107 | // r1 = The top of the Mpcore Stacks\r |
| | 108 | // Stack for the primary core = PrimaryCoreStack\r |
| | 109 | LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)\r |
| | 110 | sub r7, r1, r2\r |
| | 111 | // Stack for the secondary core = Number of Cluster * (4 Core per cluster) * SecondaryStackSize\r |
| | 112 | LoadConstantToReg (FixedPcdGet32(PcdClusterCount), r2)\r |
| | 113 | lsl r2, r2, #2\r |
| | 114 | LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r3)\r |
| | 115 | mul r2, r2, r3\r |
| | 116 | sub r7, r7, r2\r |
| | 117 | \r |
| | 118 | // The base of the secondary Stacks = Top of Primary stack\r |
| | 119 | LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)\r |
| | 120 | add r1, r7, r2\r |
| | 121 | \r |
| | 122 | // r7 = The base of the MpCore Stacks\r |
| | 123 | // r1 = The base of the secondary Stacks = Top of the Primary stack\r |
| | 124 | \r |
| | 125 | // Is it the Primary Core ?\r |
| | 126 | LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r4)\r |
| | 127 | cmp r5, r4\r |
| | 128 | beq _SetupPrimaryCoreStack\r |
| | 129 | \r |
| | 130 | _SetupSecondaryCoreStack\r |
| | 131 | // r1 = The base of the secondary Stacks\r |
| | 132 | \r |
| | 133 | // Get the position of the cores (ClusterId * 4) + CoreId\r |
| | 134 | GetCorePositionInStack(r0, r5, r4)\r |
| | 135 | // The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack\r |
| | 136 | add r0, r0, #1\r |
| | 137 | // Get the offset for the Secondary Stack\r |
| | 138 | mul r0, r0, r3\r |
| | 139 | add sp, r1, r0\r |
| | 140 | \r |
| | 141 | bne _PrepareArguments\r |
| | 142 | \r |
| | 143 | _SetupPrimaryCoreStack\r |
| | 144 | // r1 = Top of the primary stack\r |
| | 145 | LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), r2)\r |
| | 146 | b _PreparePrimaryStack\r |
| | 147 | \r |
| | 148 | _SetupUnicoreStack\r |
| | 149 | // The top of the Unicore Stack is in r1\r |
| | 150 | LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), r2)\r |
| | 151 | LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r3)\r |
| | 152 | \r |
| | 153 | // Calculate the bottom of the primary stack (StackBase)\r |
| | 154 | sub r7, r1, r3\r |
| | 155 | \r |
| | 156 | _PreparePrimaryStack\r |
| | 157 | // The reserved space for global variable must be 8-bytes aligned for pushing\r |
| | 158 | // 64-bit variable on the stack\r |
| | 159 | SetPrimaryStack (r1, r2, r3)\r |
| | 160 | \r |
| | 161 | _PrepareArguments\r |
| | 162 | mov r0, r5\r |
| | 163 | mov r1, r6\r |
| | 164 | mov r2, r7\r |
| | 165 | mov r3, sp\r |
| | 166 | \r |
| | 167 | // Move sec startup address into a data register\r |
| | 168 | // Ensure we're jumping to FV version of the code (not boot remapped alias)\r |
| | 169 | ldr r4, StartupAddr\r |
| | 170 | \r |
| | 171 | // Jump to PrePiCore C code\r |
| | 172 | // r0 = MpId\r |
| | 173 | // r1 = UefiMemoryBase\r |
| | 174 | // r2 = StacksBase\r |
| | 175 | // r3 = GlobalVariableBase\r |
| | 176 | blx r4\r |
| | 177 | \r |
| | 178 | _NeverReturn\r |
| | 179 | b _NeverReturn\r |
| | 180 | \r |
| | 181 | END\r |
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