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ARM Packages: Replaced the macro GetCorePositionFromMpId() by the ArmPlatformGetCoreP...
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1//\r
2// Copyright (c) 2011-2013, ARM Limited. All rights reserved.\r
3// \r
4// This program and the accompanying materials \r
5// are licensed and made available under the terms and conditions of the BSD License \r
6// which accompanies this distribution. The full text of the license may be found at \r
7// http://opensource.org/licenses/bsd-license.php \r
8//\r
9// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
10// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
11//\r
12//\r
13\r
14#include <AutoGen.h>\r
15#include <AsmMacroIoLib.h>\r
16#include "SecInternal.h"\r
17\r
18 INCLUDE AsmMacroIoLib.inc\r
19 \r
20 IMPORT CEntryPoint\r
21 IMPORT ArmPlatformIsPrimaryCore\r
22 IMPORT ArmPlatformGetCorePosition\r
23 IMPORT ArmPlatformSecBootAction\r
24 IMPORT ArmPlatformSecBootMemoryInit\r
25 IMPORT ArmDisableInterrupts\r
26 IMPORT ArmDisableCachesAndMmu\r
27 IMPORT ArmReadMpidr\r
28 IMPORT ArmCallWFE\r
29 EXPORT _ModuleEntryPoint\r
30\r
31 PRESERVE8\r
32 AREA SecEntryPoint, CODE, READONLY\r
33 \r
34StartupAddr DCD CEntryPoint\r
35\r
36_ModuleEntryPoint FUNCTION\r
37 // First ensure all interrupts are disabled\r
38 bl ArmDisableInterrupts\r
39\r
40 // Ensure that the MMU and caches are off\r
41 bl ArmDisableCachesAndMmu\r
42\r
43 // By default, we are doing a cold boot\r
44 mov r10, #ARM_SEC_COLD_BOOT\r
45\r
46 // Jump to Platform Specific Boot Action function\r
47 blx ArmPlatformSecBootAction\r
48\r
49_IdentifyCpu \r
50 // Identify CPU ID\r
51 bl ArmReadMpidr\r
52 // Keep a copy of the MpId register value\r
53 mov r9, r0\r
54 \r
55 // Is it the Primary Core ?\r
56 bl ArmPlatformIsPrimaryCore\r
57 cmp r0, #1\r
58 // Only the primary core initialize the memory (SMC)\r
59 beq _InitMem\r
60 \r
61_WaitInitMem\r
62 // If we are not doing a cold boot in this case we should assume the Initial Memory to be already initialized\r
63 // Otherwise we have to wait the Primary Core to finish the initialization\r
64 cmp r10, #ARM_SEC_COLD_BOOT\r
65 bne _SetupSecondaryCoreStack\r
66\r
67 // Wait for the primary core to initialize the initial memory (event: BOOT_MEM_INIT)\r
68 bl ArmCallWFE\r
69 // Now the Init Mem is initialized, we setup the secondary core stacks\r
70 b _SetupSecondaryCoreStack\r
71 \r
72_InitMem\r
73 // If we are not doing a cold boot in this case we should assume the Initial Memory to be already initialized\r
74 cmp r10, #ARM_SEC_COLD_BOOT\r
75 bne _SetupPrimaryCoreStack\r
76\r
77 // Initialize Init Boot Memory\r
78 bl ArmPlatformSecBootMemoryInit\r
79 \r
80_SetupPrimaryCoreStack\r
81 // Get the top of the primary stacks (and the base of the secondary stacks)\r
82 LoadConstantToReg (FixedPcdGet32(PcdCPUCoresSecStackBase), r1)\r
83 LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecPrimaryStackSize), r2)\r
84 add r1, r1, r2\r
85\r
86 LoadConstantToReg (FixedPcdGet32(PcdSecGlobalVariableSize), r2)\r
87\r
88 // The reserved space for global variable must be 8-bytes aligned for pushing\r
89 // 64-bit variable on the stack\r
90 SetPrimaryStack (r1, r2, r3)\r
91 b _PrepareArguments\r
92\r
93_SetupSecondaryCoreStack\r
94 // Get the top of the primary stacks (and the base of the secondary stacks)\r
95 LoadConstantToReg (FixedPcdGet32(PcdCPUCoresSecStackBase), r1)\r
96 LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecPrimaryStackSize), r2)\r
97 add r6, r1, r2\r
98\r
99 // Get the Core Position\r
100 mov r0, r9\r
101 bl ArmPlatformGetCorePosition\r
102 // The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack\r
103 add r0, r0, #1\r
104\r
105 // StackOffset = CorePos * StackSize\r
106 LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecSecondaryStackSize), r2)\r
107 mul r0, r0, r2\r
108 // SP = StackBase + StackOffset\r
109 add sp, r6, r0\r
110\r
111_PrepareArguments\r
112 // Move sec startup address into a data register\r
113 // Ensure we're jumping to FV version of the code (not boot remapped alias)\r
114 ldr r3, StartupAddr\r
115 \r
116 // Jump to SEC C code\r
117 // r0 = mp_id\r
118 // r1 = Boot Mode\r
119 mov r0, r9\r
120 mov r1, r10\r
121 blx r3\r
122 ENDFUNC\r
123 \r
124_NeverReturn\r
125 b _NeverReturn\r
126 END\r