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1 | ;------------------------------------------------------------------------------\r | |
2 | ;\r | |
3 | ; Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>\r | |
4 | ; SPDX-License-Identifier: BSD-2-Clause-Patent\r | |
5 | ;\r | |
6 | ; Abstract:\r | |
7 | ;\r | |
8 | ; Entry point for the coreboot UEFI payload.\r | |
9 | ;\r | |
10 | ;------------------------------------------------------------------------------\r | |
11 | \r | |
12 | SECTION .text\r | |
13 | \r | |
14 | ; C Functions\r | |
15 | extern ASM_PFX(SecStartup)\r | |
16 | \r | |
17 | ; Pcds\r | |
18 | extern ASM_PFX(PcdGet32 (PcdPayloadFdMemBase))\r | |
19 | \r | |
20 | ;\r | |
21 | ; SecCore Entry Point\r | |
22 | ;\r | |
23 | ; Processor is in flat protected mode\r | |
24 | ;\r | |
25 | ; @param[in] EAX Initial value of the EAX register (BIST: Built-in Self Test)\r | |
26 | ; @param[in] DI 'BP': boot-strap processor, or 'AP': application processor\r | |
27 | ; @param[in] EBP Pointer to the start of the Boot Firmware Volume\r | |
28 | ;\r | |
29 | ; @return None This routine does not return\r | |
30 | ;\r | |
31 | global ASM_PFX(_ModuleEntryPoint)\r | |
32 | ASM_PFX(_ModuleEntryPoint):\r | |
33 | ;\r | |
34 | ; Disable all the interrupts\r | |
35 | ;\r | |
36 | cli\r | |
37 | ;\r | |
38 | ; Construct the temporary memory at 0x80000, length 0x10000\r | |
39 | ;\r | |
40 | mov esp, (BASE_512KB + SIZE_64KB)\r | |
41 | \r | |
42 | ;\r | |
43 | ; Pass BFV into the PEI Core\r | |
44 | ;\r | |
45 | push DWORD [ASM_PFX(PcdGet32 (PcdPayloadFdMemBase))]\r | |
46 | \r | |
47 | ;\r | |
48 | ; Pass stack base into the PEI Core\r | |
49 | ;\r | |
50 | push BASE_512KB\r | |
51 | \r | |
52 | ;\r | |
53 | ; Pass stack size into the PEI Core\r | |
54 | ;\r | |
55 | push SIZE_64KB\r | |
56 | \r | |
57 | ;\r | |
58 | ; Pass Control into the PEI Core\r | |
59 | ;\r | |
60 | call ASM_PFX(SecStartup)\r | |
61 | \r | |
62 | ;\r | |
63 | ; Should never return\r | |
64 | ;\r | |
65 | jmp $\r | |
66 | \r |