[mirror_edk2.git] / EdkCompatibilityPkg / Compatibility / PciCfgOnPciCfg2Thunk / PciCfgOnPciCfg2Thunk.c

/** @file\r
Module produce PciCfgPpi on top of PciCfgPpi2.\r
\r
PIWG's PI specification replaces Inte's EFI Specification 1.10.\r
EFI_PEI_PCI_CFG_PPI defined in Inte's EFI Specification 1.10 is replaced by\r
EFI_PEI_PCI_CFG2_PPI in PI 1.0.\r
This module produces PciCfgPpi on top of PciCfgPpi2. This module is used on platform when both of\r
these two conditions are true:\r
1) Framework module is present that consumes PCI CFG  AND\r
2) PI module is present that produces PCI CFG2 but not PCI CFG\r
\r
The Usage of this module is rare since EDK II module IntelFrameworkModulePkg\Universal\PcatSingleSegmentPciCfgPei\PcatSingleSegmentPciCfgPei.inf\r
that produce PCI CFG2 can also produce PCI CFG by setting Pcd Feature Flag gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdPciCfgDisable\r
to FALSE.\r
\r
\r
Copyright (c) 2006 - 2008 Intel Corporation. <BR>\r
All rights reserved. This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution.  The full text of the license may be found at\r
http://opensource.org/licenses/bsd-license.php\r
\r
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
Module Name:\r
**/\r
\r
#include <PiPei.h>\r
#include <Ppi/PciCfg.h>\r
#include <Ppi/PciCfg2.h>\r
#include <Library/DebugLib.h>\r
\r
//\r
// Function Prototypes\r
//\r
\r
/**\r
  Reads from a given location in the PCI configuration space.\r
\r
  @param  PeiServices                   An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
\r
  @param  This                              Pointer to local data for the interface.\r
\r
  @param  Width                           The width of the access. Enumerated in bytes.\r
                                                   See EFI_PEI_PCI_CFG_PPI_WIDTH above.\r
\r
  @param  Address                       The physical address of the access. The format of\r
                                                  the address is described by EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS.\r
\r
  @param  Buffer                           A pointer to the buffer of data..\r
\r
\r
  @retval EFI_SUCCESS                 The function completed successfully.\r
\r
  @retval EFI_DEVICE_ERROR        There was a problem with the transaction.\r
\r
  @retval EFI_DEVICE_NOT_READY  The device is not capable of supporting the operation at this\r
                                                    time.\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
PciCfgRead (\r
  IN EFI_PEI_SERVICES             **PeiServices,\r
  IN EFI_PEI_PCI_CFG_PPI          *This,\r
  IN EFI_PEI_PCI_CFG_PPI_WIDTH    Width,\r
  IN UINT64                       Address,\r
  IN OUT VOID                     *Buffer\r
  );\r
\r
/**\r
  Write to a given location in the PCI configuration space.\r
\r
  @param  PeiServices                   An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
\r
  @param  This                              Pointer to local data for the interface.\r
\r
  @param  Width                            The width of the access. Enumerated in bytes.\r
                                                    See EFI_PEI_PCI_CFG_PPI_WIDTH above.\r
\r
  @param  Address                         The physical address of the access. The format of\r
                                                    the address is described by EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS.\r
\r
  @param  Buffer                            A pointer to the buffer of data..\r
\r
\r
  @retval EFI_SUCCESS                   The function completed successfully.\r
\r
  @retval EFI_DEVICE_ERROR          There was a problem with the transaction.\r
\r
  @retval EFI_DEVICE_NOT_READY  The device is not capable of supporting the operation at this\r
                                                     time.\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
PciCfgWrite (\r
  IN EFI_PEI_SERVICES             **PeiServices,\r
  IN EFI_PEI_PCI_CFG_PPI          *This,\r
  IN EFI_PEI_PCI_CFG_PPI_WIDTH    Width,\r
  IN UINT64                       Address,\r
  IN OUT VOID                     *Buffer\r
  );\r
\r
/**\r
  PCI read-modify-write operation.\r
\r
  @param  PeiServices                     An indirect pointer to the PEI Services Table\r
                                                      published by the PEI Foundation.\r
\r
  @param  This                                Pointer to local data for the interface.\r
\r
  @param  Width                             The width of the access. Enumerated in bytes. Type\r
                                                      EFI_PEI_PCI_CFG_PPI_WIDTH is defined in Read().\r
\r
  @param  Address                           The physical address of the access.\r
\r
  @param  SetBits                            Points to value to bitwise-OR with the read configuration value.\r
                                                      The size of the value is determined by Width.\r
\r
  @param  ClearBits                         Points to the value to negate and bitwise-AND with the read configuration value.\r
                                                      The size of the value is determined by Width.\r
\r
\r
  @retval EFI_SUCCESS                   The function completed successfully.\r
\r
  @retval EFI_DEVICE_ERROR          There was a problem with the transaction.\r
\r
  @retval EFI_DEVICE_NOT_READY  The device is not capable of supporting\r
                                                    the operation at this time.\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
PciCfgModify (\r
  IN EFI_PEI_SERVICES             **PeiServices,\r
  IN EFI_PEI_PCI_CFG_PPI          *This,\r
  IN EFI_PEI_PCI_CFG_PPI_WIDTH    Width,\r
  IN UINT64                       Address,\r
  IN UINTN                        SetBits,\r
  IN UINTN                        ClearBits\r
  );\r
\r
//\r
// Module globals\r
//\r
EFI_PEI_PCI_CFG_PPI mPciCfgPpi = {\r
  PciCfgRead,\r
  PciCfgWrite,\r
  PciCfgModify,\r
};\r
\r
EFI_PEI_PPI_DESCRIPTOR     mPpiListPciCfg = {\r
  (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),\r
  &gEfiPciCfgPpiInServiceTableGuid,\r
  &mPciCfgPpi\r
};\r
\r
/**\r
\r
  Standard PEIM entry point.\r
\r
  @param FfsHeadher   The FFS file header\r
  @param PeiServices   General purpose services available to every PEIM.\r
\r
\r
  @retval EFI_SUCCESS if the interface could be successfully\r
                                    installed\r
\r
--*/\r
EFI_STATUS\r
EFIAPI\r
PeimInitializePciCfg (\r
  IN EFI_PEI_FILE_HANDLE     FfsHeader,\r
  IN CONST EFI_PEI_SERVICES  **PeiServices\r
  )\r
{\r
  //\r
  // Publish the PciCfgToPciCfg2 Thunk capability to other modules\r
  //\r
  return (*PeiServices)->InstallPpi (PeiServices, &mPpiListPciCfg);\r
}\r
\r
/**\r
  Reads from a given location in the PCI configuration space.\r
\r
  @param  PeiServices                   An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
\r
  @param  This                              Pointer to local data for the interface.\r
\r
  @param  Width                           The width of the access. Enumerated in bytes.\r
                                                   See EFI_PEI_PCI_CFG_PPI_WIDTH above.\r
\r
  @param  Address                       The physical address of the access. The format of\r
                                                  the address is described by EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS.\r
\r
  @param  Buffer                           A pointer to the buffer of data..\r
\r
\r
  @retval EFI_SUCCESS                 The function completed successfully.\r
\r
  @retval EFI_DEVICE_ERROR        There was a problem with the transaction.\r
\r
  @retval EFI_DEVICE_NOT_READY  The device is not capable of supporting the operation at this\r
                                                    time.\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
PciCfgRead (\r
  IN EFI_PEI_SERVICES             **PeiServices,\r
  IN EFI_PEI_PCI_CFG_PPI          *This,\r
  IN EFI_PEI_PCI_CFG_PPI_WIDTH    Width,\r
  IN UINT64                       Address,\r
  IN OUT VOID                     *Buffer\r
  )\r
{\r
  EFI_PEI_PCI_CFG2_PPI  *PciCfg2;\r
\r
  PciCfg2 = (*PeiServices)->PciCfg;\r
\r
  return PciCfg2->Read ((CONST EFI_PEI_SERVICES **)PeiServices, PciCfg2, Width, Address, Buffer);\r
}\r
\r
\r
/**\r
  Write to a given location in the PCI configuration space.\r
\r
  @param  PeiServices                   An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
\r
  @param  This                              Pointer to local data for the interface.\r
\r
  @param  Width                            The width of the access. Enumerated in bytes.\r
                                                    See EFI_PEI_PCI_CFG_PPI_WIDTH above.\r
\r
  @param  Address                         The physical address of the access. The format of\r
                                                    the address is described by EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS.\r
\r
  @param  Buffer                            A pointer to the buffer of data..\r
\r
\r
  @retval EFI_SUCCESS                   The function completed successfully.\r
\r
  @retval EFI_DEVICE_ERROR          There was a problem with the transaction.\r
\r
  @retval EFI_DEVICE_NOT_READY  The device is not capable of supporting the operation at this\r
                                                     time.\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
PciCfgWrite (\r
  IN EFI_PEI_SERVICES             **PeiServices,\r
  IN EFI_PEI_PCI_CFG_PPI          *This,\r
  IN EFI_PEI_PCI_CFG_PPI_WIDTH    Width,\r
  IN UINT64                       Address,\r
  IN OUT VOID                     *Buffer\r
  )\r
{\r
  EFI_PEI_PCI_CFG2_PPI  *PciCfg2;\r
\r
  PciCfg2 = (*PeiServices)->PciCfg;\r
\r
  return PciCfg2->Write ((CONST EFI_PEI_SERVICES **)PeiServices, PciCfg2, Width, Address, Buffer);\r
}\r
\r
/**\r
  PCI read-modify-write operation.\r
\r
  @param  PeiServices                     An indirect pointer to the PEI Services Table\r
                                                      published by the PEI Foundation.\r
\r
  @param  This                                Pointer to local data for the interface.\r
\r
  @param  Width                             The width of the access. Enumerated in bytes. Type\r
                                                      EFI_PEI_PCI_CFG_PPI_WIDTH is defined in Read().\r
\r
  @param  Address                           The physical address of the access.\r
\r
  @param  SetBits                            Points to value to bitwise-OR with the read configuration value.\r
                                                      The size of the value is determined by Width.\r
\r
  @param  ClearBits                         Points to the value to negate and bitwise-AND with the read configuration value.\r
                                                      The size of the value is determined by Width.\r
\r
\r
  @retval EFI_SUCCESS                   The function completed successfully.\r
\r
  @retval EFI_DEVICE_ERROR          There was a problem with the transaction.\r
\r
  @retval EFI_DEVICE_NOT_READY  The device is not capable of supporting\r
                                                    the operation at this time.\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
PciCfgModify (\r
  IN EFI_PEI_SERVICES             **PeiServices,\r
  IN EFI_PEI_PCI_CFG_PPI          *This,\r
  IN EFI_PEI_PCI_CFG_PPI_WIDTH    Width,\r
  IN UINT64                       Address,\r
  IN UINTN                        SetBits,\r
  IN UINTN                        ClearBits\r
  )\r
{\r
  EFI_PEI_PCI_CFG2_PPI  *PciCfg2;\r
\r
  PciCfg2 = (*PeiServices)->PciCfg;\r
\r
  return PciCfg2->Modify ((CONST EFI_PEI_SERVICES **)PeiServices, PciCfg2, Width, Address, &SetBits, &ClearBits);\r
}\r
Commit	Line	Data
	1	/** @file\r
	2	Module produce PciCfgPpi on top of PciCfgPpi2.\r
	3	\r
	4	PIWG's PI specification replaces Inte's EFI Specification 1.10.\r
	5	EFI_PEI_PCI_CFG_PPI defined in Inte's EFI Specification 1.10 is replaced by\r
	6	EFI_PEI_PCI_CFG2_PPI in PI 1.0.\r
	7	This module produces PciCfgPpi on top of PciCfgPpi2. This module is used on platform when both of\r
	8	these two conditions are true:\r
	9	1) Framework module is present that consumes PCI CFG AND\r
	10	2) PI module is present that produces PCI CFG2 but not PCI CFG\r
	11	\r
	12	The Usage of this module is rare since EDK II module IntelFrameworkModulePkg\Universal\PcatSingleSegmentPciCfgPei\PcatSingleSegmentPciCfgPei.inf\r
	13	that produce PCI CFG2 can also produce PCI CFG by setting Pcd Feature Flag gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdPciCfgDisable\r
	14	to FALSE.\r
	15	\r
	16	\r
	17	Copyright (c) 2006 - 2008 Intel Corporation. <BR>\r
	18	All rights reserved. This program and the accompanying materials\r
	19	are licensed and made available under the terms and conditions of the BSD License\r
	20	which accompanies this distribution. The full text of the license may be found at\r
	21	http://opensource.org/licenses/bsd-license.php\r
	22	\r
	23	THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
	24	WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
	25	Module Name:\r
	26	**/\r
	27	\r
	28	#include <PiPei.h>\r
	29	#include <Ppi/PciCfg.h>\r
	30	#include <Ppi/PciCfg2.h>\r
	31	#include <Library/DebugLib.h>\r
	32	\r
	33	//\r
	34	// Function Prototypes\r
	35	//\r
	36	\r
	37	/**\r
	38	Reads from a given location in the PCI configuration space.\r
	39	\r
	40	@param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
	41	\r
	42	@param This Pointer to local data for the interface.\r
	43	\r
	44	@param Width The width of the access. Enumerated in bytes.\r
	45	See EFI_PEI_PCI_CFG_PPI_WIDTH above.\r
	46	\r
	47	@param Address The physical address of the access. The format of\r
	48	the address is described by EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS.\r
	49	\r
	50	@param Buffer A pointer to the buffer of data..\r
	51	\r
	52	\r
	53	@retval EFI_SUCCESS The function completed successfully.\r
	54	\r
	55	@retval EFI_DEVICE_ERROR There was a problem with the transaction.\r
	56	\r
	57	@retval EFI_DEVICE_NOT_READY The device is not capable of supporting the operation at this\r
	58	time.\r
	59	\r
	60	**/\r
	61	EFI_STATUS\r
	62	EFIAPI\r
	63	PciCfgRead (\r
	64	IN EFI_PEI_SERVICES **PeiServices,\r
	65	IN EFI_PEI_PCI_CFG_PPI *This,\r
	66	IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r
	67	IN UINT64 Address,\r
	68	IN OUT VOID *Buffer\r
	69	);\r
	70	\r
	71	/**\r
	72	Write to a given location in the PCI configuration space.\r
	73	\r
	74	@param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
	75	\r
	76	@param This Pointer to local data for the interface.\r
	77	\r
	78	@param Width The width of the access. Enumerated in bytes.\r
	79	See EFI_PEI_PCI_CFG_PPI_WIDTH above.\r
	80	\r
	81	@param Address The physical address of the access. The format of\r
	82	the address is described by EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS.\r
	83	\r
	84	@param Buffer A pointer to the buffer of data..\r
	85	\r
	86	\r
	87	@retval EFI_SUCCESS The function completed successfully.\r
	88	\r
	89	@retval EFI_DEVICE_ERROR There was a problem with the transaction.\r
	90	\r
	91	@retval EFI_DEVICE_NOT_READY The device is not capable of supporting the operation at this\r
	92	time.\r
	93	\r
	94	**/\r
	95	EFI_STATUS\r
	96	EFIAPI\r
	97	PciCfgWrite (\r
	98	IN EFI_PEI_SERVICES **PeiServices,\r
	99	IN EFI_PEI_PCI_CFG_PPI *This,\r
	100	IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r
	101	IN UINT64 Address,\r
	102	IN OUT VOID *Buffer\r
	103	);\r
	104	\r
	105	/**\r
	106	PCI read-modify-write operation.\r
	107	\r
	108	@param PeiServices An indirect pointer to the PEI Services Table\r
	109	published by the PEI Foundation.\r
	110	\r
	111	@param This Pointer to local data for the interface.\r
	112	\r
	113	@param Width The width of the access. Enumerated in bytes. Type\r
	114	EFI_PEI_PCI_CFG_PPI_WIDTH is defined in Read().\r
	115	\r
	116	@param Address The physical address of the access.\r
	117	\r
	118	@param SetBits Points to value to bitwise-OR with the read configuration value.\r
	119	The size of the value is determined by Width.\r
	120	\r
	121	@param ClearBits Points to the value to negate and bitwise-AND with the read configuration value.\r
	122	The size of the value is determined by Width.\r
	123	\r
	124	\r
	125	@retval EFI_SUCCESS The function completed successfully.\r
	126	\r
	127	@retval EFI_DEVICE_ERROR There was a problem with the transaction.\r
	128	\r
	129	@retval EFI_DEVICE_NOT_READY The device is not capable of supporting\r
	130	the operation at this time.\r
	131	\r
	132	**/\r
	133	EFI_STATUS\r
	134	EFIAPI\r
	135	PciCfgModify (\r
	136	IN EFI_PEI_SERVICES **PeiServices,\r
	137	IN EFI_PEI_PCI_CFG_PPI *This,\r
	138	IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r
	139	IN UINT64 Address,\r
	140	IN UINTN SetBits,\r
	141	IN UINTN ClearBits\r
	142	);\r
	143	\r
	144	//\r
	145	// Module globals\r
	146	//\r
	147	EFI_PEI_PCI_CFG_PPI mPciCfgPpi = {\r
	148	PciCfgRead,\r
	149	PciCfgWrite,\r
	150	PciCfgModify,\r
	151	};\r
	152	\r
	153	EFI_PEI_PPI_DESCRIPTOR mPpiListPciCfg = {\r
	154	(EFI_PEI_PPI_DESCRIPTOR_PPI \| EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),\r
	155	&gEfiPciCfgPpiInServiceTableGuid,\r
	156	&mPciCfgPpi\r
	157	};\r
	158	\r
	159	/**\r
	160	\r
	161	Standard PEIM entry point.\r
	162	\r
	163	@param FfsHeadher The FFS file header\r
	164	@param PeiServices General purpose services available to every PEIM.\r
	165	\r
	166	\r
	167	@retval EFI_SUCCESS if the interface could be successfully\r
	168	installed\r
	169	\r
	170	--*/\r
	171	EFI_STATUS\r
	172	EFIAPI\r
	173	PeimInitializePciCfg (\r
	174	IN EFI_PEI_FILE_HANDLE FfsHeader,\r
	175	IN CONST EFI_PEI_SERVICES **PeiServices\r
	176	)\r
	177	{\r
	178	//\r
	179	// Publish the PciCfgToPciCfg2 Thunk capability to other modules\r
	180	//\r
	181	return (*PeiServices)->InstallPpi (PeiServices, &mPpiListPciCfg);\r
	182	}\r
	183	\r
	184	/**\r
	185	Reads from a given location in the PCI configuration space.\r
	186	\r
	187	@param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
	188	\r
	189	@param This Pointer to local data for the interface.\r
	190	\r
	191	@param Width The width of the access. Enumerated in bytes.\r
	192	See EFI_PEI_PCI_CFG_PPI_WIDTH above.\r
	193	\r
	194	@param Address The physical address of the access. The format of\r
	195	the address is described by EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS.\r
	196	\r
	197	@param Buffer A pointer to the buffer of data..\r
	198	\r
	199	\r
	200	@retval EFI_SUCCESS The function completed successfully.\r
	201	\r
	202	@retval EFI_DEVICE_ERROR There was a problem with the transaction.\r
	203	\r
	204	@retval EFI_DEVICE_NOT_READY The device is not capable of supporting the operation at this\r
	205	time.\r
	206	\r
	207	**/\r
	208	EFI_STATUS\r
	209	EFIAPI\r
	210	PciCfgRead (\r
	211	IN EFI_PEI_SERVICES **PeiServices,\r
	212	IN EFI_PEI_PCI_CFG_PPI *This,\r
	213	IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r
	214	IN UINT64 Address,\r
	215	IN OUT VOID *Buffer\r
	216	)\r
	217	{\r
	218	EFI_PEI_PCI_CFG2_PPI *PciCfg2;\r
	219	\r
	220	PciCfg2 = (*PeiServices)->PciCfg;\r
	221	\r
	222	return PciCfg2->Read ((CONST EFI_PEI_SERVICES **)PeiServices, PciCfg2, Width, Address, Buffer);\r
	223	}\r
	224	\r
	225	\r
	226	/**\r
	227	Write to a given location in the PCI configuration space.\r
	228	\r
	229	@param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
	230	\r
	231	@param This Pointer to local data for the interface.\r
	232	\r
	233	@param Width The width of the access. Enumerated in bytes.\r
	234	See EFI_PEI_PCI_CFG_PPI_WIDTH above.\r
	235	\r
	236	@param Address The physical address of the access. The format of\r
	237	the address is described by EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS.\r
	238	\r
	239	@param Buffer A pointer to the buffer of data..\r
	240	\r
	241	\r
	242	@retval EFI_SUCCESS The function completed successfully.\r
	243	\r
	244	@retval EFI_DEVICE_ERROR There was a problem with the transaction.\r
	245	\r
	246	@retval EFI_DEVICE_NOT_READY The device is not capable of supporting the operation at this\r
	247	time.\r
	248	\r
	249	**/\r
	250	EFI_STATUS\r
	251	EFIAPI\r
	252	PciCfgWrite (\r
	253	IN EFI_PEI_SERVICES **PeiServices,\r
	254	IN EFI_PEI_PCI_CFG_PPI *This,\r
	255	IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r
	256	IN UINT64 Address,\r
	257	IN OUT VOID *Buffer\r
	258	)\r
	259	{\r
	260	EFI_PEI_PCI_CFG2_PPI *PciCfg2;\r
	261	\r
	262	PciCfg2 = (*PeiServices)->PciCfg;\r
	263	\r
	264	return PciCfg2->Write ((CONST EFI_PEI_SERVICES **)PeiServices, PciCfg2, Width, Address, Buffer);\r
	265	}\r
	266	\r
	267	/**\r
	268	PCI read-modify-write operation.\r
	269	\r
	270	@param PeiServices An indirect pointer to the PEI Services Table\r
	271	published by the PEI Foundation.\r
	272	\r
	273	@param This Pointer to local data for the interface.\r
	274	\r
	275	@param Width The width of the access. Enumerated in bytes. Type\r
	276	EFI_PEI_PCI_CFG_PPI_WIDTH is defined in Read().\r
	277	\r
	278	@param Address The physical address of the access.\r
	279	\r
	280	@param SetBits Points to value to bitwise-OR with the read configuration value.\r
	281	The size of the value is determined by Width.\r
	282	\r
	283	@param ClearBits Points to the value to negate and bitwise-AND with the read configuration value.\r
	284	The size of the value is determined by Width.\r
	285	\r
	286	\r
	287	@retval EFI_SUCCESS The function completed successfully.\r
	288	\r
	289	@retval EFI_DEVICE_ERROR There was a problem with the transaction.\r
	290	\r
	291	@retval EFI_DEVICE_NOT_READY The device is not capable of supporting\r
	292	the operation at this time.\r
	293	\r
	294	**/\r
	295	EFI_STATUS\r
	296	EFIAPI\r
	297	PciCfgModify (\r
	298	IN EFI_PEI_SERVICES **PeiServices,\r
	299	IN EFI_PEI_PCI_CFG_PPI *This,\r
	300	IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r
	301	IN UINT64 Address,\r
	302	IN UINTN SetBits,\r
	303	IN UINTN ClearBits\r
	304	)\r
	305	{\r
	306	EFI_PEI_PCI_CFG2_PPI *PciCfg2;\r
	307	\r
	308	PciCfg2 = (*PeiServices)->PciCfg;\r
	309	\r
	310	return PciCfg2->Modify ((CONST EFI_PEI_SERVICES **)PeiServices, PciCfg2, Width, Address, &SetBits, &ClearBits);\r
	311	}\r