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1/** @file\r
2Module produce PciCfgPpi on top of PciCfgPpi2.\r
3\r
4PIWG's PI specification replaces Inte's EFI Specification 1.10.\r
5EFI_PEI_PCI_CFG_PPI defined in Inte's EFI Specification 1.10 is replaced by\r
6EFI_PEI_PCI_CFG2_PPI in PI 1.0.\r
7This module produces PciCfgPpi on top of PciCfgPpi2. This module is used on platform when both of\r
8these two conditions are true:\r
91) Framework module is present that consumes PCI CFG AND\r
102) PI module is present that produces PCI CFG2 but not PCI CFG\r
11\r
12The Usage of this module is rare since EDK II module IntelFrameworkModulePkg\Universal\PcatSingleSegmentPciCfgPei\PcatSingleSegmentPciCfgPei.inf\r
13that produce PCI CFG2 can also produce PCI CFG by setting Pcd Feature Flag gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdPciCfgDisable\r
14to FALSE.\r
15\r
16\r
17Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>\r
18This program and the accompanying materials\r
19are licensed and made available under the terms and conditions of the BSD License\r
20which accompanies this distribution. The full text of the license may be found at\r
21http://opensource.org/licenses/bsd-license.php\r
22\r
23THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
24WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
25Module Name:\r
26**/\r
27\r
28#include <PiPei.h>\r
29#include <Ppi/PciCfg.h>\r
30#include <Ppi/PciCfg2.h>\r
31#include <Library/DebugLib.h>\r
32\r
33//\r
34// Function Prototypes\r
35//\r
36\r
37/**\r
38 Reads from a given location in the PCI configuration space.\r
39\r
40 @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
41\r
42 @param This Pointer to local data for the interface.\r
43\r
44 @param Width The width of the access. Enumerated in bytes.\r
45 See EFI_PEI_PCI_CFG_PPI_WIDTH above.\r
46\r
47 @param Address The physical address of the access. The format of\r
48 the address is described by EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS.\r
49\r
50 @param Buffer A pointer to the buffer of data..\r
51\r
52\r
53 @retval EFI_SUCCESS The function completed successfully.\r
54\r
55 @retval EFI_DEVICE_ERROR There was a problem with the transaction.\r
56\r
57 @retval EFI_DEVICE_NOT_READY The device is not capable of supporting the operation at this\r
58 time.\r
59\r
60**/\r
61EFI_STATUS\r
62EFIAPI\r
63PciCfgRead (\r
64 IN EFI_PEI_SERVICES **PeiServices,\r
65 IN EFI_PEI_PCI_CFG_PPI *This,\r
66 IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r
67 IN UINT64 Address,\r
68 IN OUT VOID *Buffer\r
69 );\r
70\r
71/**\r
72 Write to a given location in the PCI configuration space.\r
73\r
74 @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
75\r
76 @param This Pointer to local data for the interface.\r
77\r
78 @param Width The width of the access. Enumerated in bytes.\r
79 See EFI_PEI_PCI_CFG_PPI_WIDTH above.\r
80\r
81 @param Address The physical address of the access. The format of\r
82 the address is described by EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS.\r
83\r
84 @param Buffer A pointer to the buffer of data..\r
85\r
86\r
87 @retval EFI_SUCCESS The function completed successfully.\r
88\r
89 @retval EFI_DEVICE_ERROR There was a problem with the transaction.\r
90\r
91 @retval EFI_DEVICE_NOT_READY The device is not capable of supporting the operation at this\r
92 time.\r
93\r
94**/\r
95EFI_STATUS\r
96EFIAPI\r
97PciCfgWrite (\r
98 IN EFI_PEI_SERVICES **PeiServices,\r
99 IN EFI_PEI_PCI_CFG_PPI *This,\r
100 IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r
101 IN UINT64 Address,\r
102 IN OUT VOID *Buffer\r
103 );\r
104\r
105/**\r
106 PCI read-modify-write operation.\r
107\r
108 @param PeiServices An indirect pointer to the PEI Services Table\r
109 published by the PEI Foundation.\r
110\r
111 @param This Pointer to local data for the interface.\r
112\r
113 @param Width The width of the access. Enumerated in bytes. Type\r
114 EFI_PEI_PCI_CFG_PPI_WIDTH is defined in Read().\r
115\r
116 @param Address The physical address of the access.\r
117\r
118 @param SetBits Points to value to bitwise-OR with the read configuration value.\r
119 The size of the value is determined by Width.\r
120\r
121 @param ClearBits Points to the value to negate and bitwise-AND with the read configuration value.\r
122 The size of the value is determined by Width.\r
123\r
124\r
125 @retval EFI_SUCCESS The function completed successfully.\r
126\r
127 @retval EFI_DEVICE_ERROR There was a problem with the transaction.\r
128\r
129 @retval EFI_DEVICE_NOT_READY The device is not capable of supporting\r
130 the operation at this time.\r
131\r
132**/\r
133EFI_STATUS\r
134EFIAPI\r
135PciCfgModify (\r
136 IN EFI_PEI_SERVICES **PeiServices,\r
137 IN EFI_PEI_PCI_CFG_PPI *This,\r
138 IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r
139 IN UINT64 Address,\r
140 IN UINTN SetBits,\r
141 IN UINTN ClearBits\r
142 );\r
143\r
144//\r
145// Module globals\r
146//\r
147EFI_PEI_PCI_CFG_PPI mPciCfgPpi = {\r
148 PciCfgRead,\r
149 PciCfgWrite,\r
150 PciCfgModify,\r
151};\r
152\r
153EFI_PEI_PPI_DESCRIPTOR mPpiListPciCfg = {\r
154 (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),\r
155 &gEfiPciCfgPpiInServiceTableGuid,\r
156 &mPciCfgPpi\r
157};\r
158\r
159/**\r
160\r
161 Standard PEIM entry point.\r
162\r
163 @param FileHandle Handle of the file being invoked.\r
164 @param PeiServices General purpose services available to every PEIM.\r
165\r
166 @retval EFI_SUCCESS The interface could be successfully installed.\r
167\r
168**/\r
169EFI_STATUS\r
170EFIAPI\r
171PeimInitializePciCfg (\r
172 IN EFI_PEI_FILE_HANDLE FileHandle,\r
173 IN CONST EFI_PEI_SERVICES **PeiServices\r
174 )\r
175{\r
176 //\r
177 // Publish the PciCfgToPciCfg2 Thunk capability to other modules\r
178 //\r
179 return (*PeiServices)->InstallPpi (PeiServices, &mPpiListPciCfg);\r
180}\r
181\r
182/**\r
183 Reads from a given location in the PCI configuration space.\r
184\r
185 @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
186\r
187 @param This Pointer to local data for the interface.\r
188\r
189 @param Width The width of the access. Enumerated in bytes.\r
190 See EFI_PEI_PCI_CFG_PPI_WIDTH above.\r
191\r
192 @param Address The physical address of the access. The format of\r
193 the address is described by EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS.\r
194\r
195 @param Buffer A pointer to the buffer of data..\r
196\r
197\r
198 @retval EFI_SUCCESS The function completed successfully.\r
199\r
200 @retval EFI_DEVICE_ERROR There was a problem with the transaction.\r
201\r
202 @retval EFI_DEVICE_NOT_READY The device is not capable of supporting the operation at this\r
203 time.\r
204\r
205**/\r
206EFI_STATUS\r
207EFIAPI\r
208PciCfgRead (\r
209 IN EFI_PEI_SERVICES **PeiServices,\r
210 IN EFI_PEI_PCI_CFG_PPI *This,\r
211 IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r
212 IN UINT64 Address,\r
213 IN OUT VOID *Buffer\r
214 )\r
215{\r
216 EFI_PEI_PCI_CFG2_PPI *PciCfg2;\r
217\r
218 PciCfg2 = (*PeiServices)->PciCfg;\r
219\r
220 return PciCfg2->Read ((CONST EFI_PEI_SERVICES **)PeiServices, PciCfg2, Width, Address, Buffer);\r
221}\r
222\r
223\r
224/**\r
225 Write to a given location in the PCI configuration space.\r
226\r
227 @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
228\r
229 @param This Pointer to local data for the interface.\r
230\r
231 @param Width The width of the access. Enumerated in bytes.\r
232 See EFI_PEI_PCI_CFG_PPI_WIDTH above.\r
233\r
234 @param Address The physical address of the access. The format of\r
235 the address is described by EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS.\r
236\r
237 @param Buffer A pointer to the buffer of data..\r
238\r
239\r
240 @retval EFI_SUCCESS The function completed successfully.\r
241\r
242 @retval EFI_DEVICE_ERROR There was a problem with the transaction.\r
243\r
244 @retval EFI_DEVICE_NOT_READY The device is not capable of supporting the operation at this\r
245 time.\r
246\r
247**/\r
248EFI_STATUS\r
249EFIAPI\r
250PciCfgWrite (\r
251 IN EFI_PEI_SERVICES **PeiServices,\r
252 IN EFI_PEI_PCI_CFG_PPI *This,\r
253 IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r
254 IN UINT64 Address,\r
255 IN OUT VOID *Buffer\r
256 )\r
257{\r
258 EFI_PEI_PCI_CFG2_PPI *PciCfg2;\r
259\r
260 PciCfg2 = (*PeiServices)->PciCfg;\r
261\r
262 return PciCfg2->Write ((CONST EFI_PEI_SERVICES **)PeiServices, PciCfg2, Width, Address, Buffer);\r
263}\r
264\r
265/**\r
266 PCI read-modify-write operation.\r
267\r
268 @param PeiServices An indirect pointer to the PEI Services Table\r
269 published by the PEI Foundation.\r
270\r
271 @param This Pointer to local data for the interface.\r
272\r
273 @param Width The width of the access. Enumerated in bytes. Type\r
274 EFI_PEI_PCI_CFG_PPI_WIDTH is defined in Read().\r
275\r
276 @param Address The physical address of the access.\r
277\r
278 @param SetBits Points to value to bitwise-OR with the read configuration value.\r
279 The size of the value is determined by Width.\r
280\r
281 @param ClearBits Points to the value to negate and bitwise-AND with the read configuration value.\r
282 The size of the value is determined by Width.\r
283\r
284\r
285 @retval EFI_SUCCESS The function completed successfully.\r
286\r
287 @retval EFI_DEVICE_ERROR There was a problem with the transaction.\r
288\r
289 @retval EFI_DEVICE_NOT_READY The device is not capable of supporting\r
290 the operation at this time.\r
291\r
292**/\r
293EFI_STATUS\r
294EFIAPI\r
295PciCfgModify (\r
296 IN EFI_PEI_SERVICES **PeiServices,\r
297 IN EFI_PEI_PCI_CFG_PPI *This,\r
298 IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r
299 IN UINT64 Address,\r
300 IN UINTN SetBits,\r
301 IN UINTN ClearBits\r
302 )\r
303{\r
304 EFI_PEI_PCI_CFG2_PPI *PciCfg2;\r
305\r
306 PciCfg2 = (*PeiServices)->PciCfg;\r
307\r
308 return PciCfg2->Modify ((CONST EFI_PEI_SERVICES **)PeiServices, PciCfg2, Width, Address, &SetBits, &ClearBits);\r
309}\r