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1## @file\r
2# Provides drivers and definitions to support fsp in EDKII bios.\r
3#\r
4# Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>\r
5# This program and the accompanying materials are licensed and made available under\r
6# the terms and conditions of the BSD License that accompanies this distribution.\r
7# The full text of the license may be found at\r
8# http://opensource.org/licenses/bsd-license.php.\r
9#\r
10# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
11# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
12#\r
13##\r
14\r
15[Defines]\r
16 DEC_SPECIFICATION = 0x00010005\r
17 PACKAGE_NAME = IntelFspWrapperPkg\r
18 PACKAGE_GUID = 99101BB6-6DE1-4537-85A3-FD6B594F7468\r
19 PACKAGE_VERSION = 0.1\r
20\r
21[Includes]\r
22 Include\r
23\r
24[LibraryClasses]\r
25 ## @libraryclass Provide FSP API related function.\r
26 FspApiLib|Include/Library/FspApiLib.h\r
27\r
28 ## @libraryclass Provide FSP hob process related function.\r
29 FspHobProcessLib|Include/Library/FspHobProcessLib.h\r
30\r
31 ## @libraryclass Provide FSP platform information related function.\r
32 FspPlatformInfoLib|Include/Library/FspPlatformInfoLib.h\r
33\r
34 ## @libraryclass Provide FSP wrapper platform sec related function.\r
35 FspPlatformSecLib|Include/Library/FspPlatformSecLib.h\r
36\r
37[Guids]\r
38 #\r
39 # GUID defined in package\r
40 #\r
41 gFspWrapperTokenSpaceGuid = {0x2bc1c74a, 0x122f, 0x40b2, { 0xb2, 0x23, 0x8, 0x2b, 0x74, 0x65, 0x22, 0x5d } }\r
42\r
43[Ppis]\r
44 gFspInitDonePpiGuid = { 0xf5ef05e4, 0xd538, 0x4774, { 0x8f, 0x1b, 0xe9, 0x77, 0x30, 0x11, 0xe0, 0x38 } }\r
45 gTopOfTemporaryRamPpiGuid = { 0x2f3962b2, 0x57c5, 0x44ec, { 0x9e, 0xfc, 0xa6, 0x9f, 0xd3, 0x02, 0x03, 0x2b } }\r
46\r
47[Protocols]\r
48\r
49################################################################################\r
50#\r
51# PCD Declarations section - list of all PCDs Declared by this Package\r
52# Only this package should be providing the\r
53# declaration, other packages should not.\r
54#\r
55################################################################################\r
56[PcdsFixedAtBuild, PcdsPatchableInModule]\r
57 ## Provides the memory mapped base address of the BIOS CodeCache Flash Device.\r
58 gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheAddress|0xFFE00000|UINT32|0x10000001\r
59 ## Provides the size of the BIOS Flash Device.\r
60 gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheSize|0x00200000|UINT32|0x10000002\r
61\r
62 ## Indicates the base address of the factory FSP binary.\r
63 gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase|0xFFF80000|UINT32|0x10000003\r
64 ## Indicates the base address of the updatable FSP binary to support Dual FSP.\r
65 # There could be two FSP images at different locations in a flash - \r
66 # one factory version (default) and updatable version (updatable).\r
67 # TempRamInit, FspMemoryInit and TempRamExit are always executed from factory version.\r
68 # FspSiliconInit and NotifyPhase can be executed from updatable version if it is available,\r
69 # FspSiliconInit and NotifyPhase are executed from factory version if there is no updateable version,\r
70 # PcdFlashFvFspBase is base address of factory FSP, and PcdFlashFvSecondFspBase\r
71 # is base address of updatable FSP. If PcdFlashFvSecondFspBase is 0, that means\r
72 # there is no updatable FSP.\r
73 gFspWrapperTokenSpaceGuid.PcdFlashFvSecondFspBase|0x00000000|UINT32|0x10000008\r
74 ## Provides the size of the factory FSP binary.\r
75 gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize|0x00048000|UINT32|0x10000004\r
76 ## Provides the size of the updatable FSP binary to support Dual FSP.\r
77 gFspWrapperTokenSpaceGuid.PcdFlashFvSecondFspSize|0x00000000|UINT32|0x10000009\r
78\r
79 ## Indicates the base address of the first Microcode Patch in the Microcode Region\r
80 gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress|0x0|UINT64|0x10000005\r
81 gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize|0x0|UINT64|0x10000006\r
82 ## Indicates the offset of the Cpu Microcode.\r
83 gFspWrapperTokenSpaceGuid.PcdFlashMicroCodeOffset|0x90|UINT32|0x10000007\r
84\r
85 ##\r
86 # Maximum number of Ppi is provided by SecCore.\r
87 ##\r
88 gFspWrapperTokenSpaceGuid.PcdSecCoreMaxPpiSupported|0x6|UINT32|0x20000001\r
89\r
90 # This is MAX UPD region size\r
91 gFspWrapperTokenSpaceGuid.PcdMaxUpdRegionSize|0x200|UINT32|0x30000001\r
92\r
93 ## Stack size in the temporary RAM.\r
94 # 0 means half of TemporaryRamSize.\r
95 gFspWrapperTokenSpaceGuid.PcdPeiTemporaryRamStackSize|0|UINT32|0x40000001\r
96\r
97 # This is temporary DRAM base and size for StackTop in FspInit\r
98 gFspWrapperTokenSpaceGuid.PcdTemporaryRamBase|0x00080000|UINT32|0x40000002\r
99 gFspWrapperTokenSpaceGuid.PcdTemporaryRamSize|0x00010000|UINT32|0x40000003\r
100\r
101 ## Indicate the PEI memory size platform want to report\r
102 gFspWrapperTokenSpaceGuid.PcdPeiMinMemSize|0x1800000|UINT32|0x40000004\r
103 ## Indicate the PEI memory size platform want to report\r
104 gFspWrapperTokenSpaceGuid.PcdPeiRecoveryMinMemSize|0x3000000|UINT32|0x40000005\r
105\r
106 ## PcdFspApiVersion is to determine wrapper calling mechanism\r
107 # - FSP_API_REVISION_1 1\r
108 # - FSP_API_REVISION_2 2\r
109 gFspWrapperTokenSpaceGuid.PcdFspApiVersion|0x02|UINT8|0x00001000\r