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1 | /** @file\r | |
2 | The default version of EFI_PEI_PCI_CFG2_PPI support published by PeiServices in\r | |
3 | PeiCore initialization phase.\r | |
4 | \r | |
5 | EFI_PEI_PCI_CFG2_PPI is installed by the PEIM which supports a PCI root bridge.\r | |
6 | When PeiCore is started, the default version of EFI_PEI_PCI_CFG2_PPI will be assigned\r | |
7 | to PeiServices table.\r | |
8 | \r | |
9 | Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.<BR>\r | |
10 | This program and the accompanying materials\r | |
11 | are licensed and made available under the terms and conditions of the BSD License\r | |
12 | which accompanies this distribution. The full text of the license may be found at\r | |
13 | http://opensource.org/licenses/bsd-license.php\r | |
14 | \r | |
15 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
16 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
17 | \r | |
18 | **/\r | |
19 | \r | |
20 | #include "PeiMain.h"\r | |
21 | \r | |
22 | ///\r | |
23 | /// This default instance of EFI_PEI_PCI_CFG2_PPI install assigned to EFI_PEI_SERVICE.PciCfg\r | |
24 | /// when PeiCore's initialization.\r | |
25 | ///\r | |
26 | EFI_PEI_PCI_CFG2_PPI gPeiDefaultPciCfg2Ppi = {\r | |
27 | PeiDefaultPciCfg2Read,\r | |
28 | PeiDefaultPciCfg2Write,\r | |
29 | PeiDefaultPciCfg2Modify\r | |
30 | };\r | |
31 | \r | |
32 | /**\r | |
33 | Reads from a given location in the PCI configuration space.\r | |
34 | \r | |
35 | If the EFI_PEI_PCI_CFG2_PPI is not installed by platform/chipset PEIM, then\r | |
36 | return EFI_NOT_YET_AVAILABLE.\r | |
37 | \r | |
38 | @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r | |
39 | @param This Pointer to local data for the interface.\r | |
40 | @param Width The width of the access. Enumerated in bytes.\r | |
41 | See EFI_PEI_PCI_CFG_PPI_WIDTH above.\r | |
42 | @param Address The physical address of the access. The format of\r | |
43 | the address is described by EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS.\r | |
44 | @param Buffer A pointer to the buffer of data.\r | |
45 | \r | |
46 | @retval EFI_SUCCESS The function completed successfully.\r | |
47 | @retval EFI_INVALID_PARAMETER The invalid access width.\r | |
48 | @retval EFI_NOT_YET_AVAILABLE If the EFI_PEI_PCI_CFG2_PPI is not installed by platform/chipset PEIM.\r | |
49 | \r | |
50 | **/\r | |
51 | EFI_STATUS\r | |
52 | EFIAPI\r | |
53 | PeiDefaultPciCfg2Read (\r | |
54 | IN CONST EFI_PEI_SERVICES **PeiServices,\r | |
55 | IN CONST EFI_PEI_PCI_CFG2_PPI *This,\r | |
56 | IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r | |
57 | IN UINT64 Address,\r | |
58 | IN OUT VOID *Buffer\r | |
59 | )\r | |
60 | {\r | |
61 | return EFI_NOT_AVAILABLE_YET;\r | |
62 | }\r | |
63 | \r | |
64 | /**\r | |
65 | Write to a given location in the PCI configuration space.\r | |
66 | \r | |
67 | If the EFI_PEI_PCI_CFG2_PPI is not installed by platform/chipset PEIM, then\r | |
68 | return EFI_NOT_YET_AVAILABLE.\r | |
69 | \r | |
70 | @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r | |
71 | @param This Pointer to local data for the interface.\r | |
72 | @param Width The width of the access. Enumerated in bytes.\r | |
73 | See EFI_PEI_PCI_CFG_PPI_WIDTH above.\r | |
74 | @param Address The physical address of the access. The format of\r | |
75 | the address is described by EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS.\r | |
76 | @param Buffer A pointer to the buffer of data.\r | |
77 | \r | |
78 | @retval EFI_SUCCESS The function completed successfully.\r | |
79 | @retval EFI_INVALID_PARAMETER The invalid access width.\r | |
80 | @retval EFI_NOT_YET_AVAILABLE If the EFI_PEI_PCI_CFG2_PPI is not installed by platform/chipset PEIM.\r | |
81 | **/\r | |
82 | EFI_STATUS\r | |
83 | EFIAPI\r | |
84 | PeiDefaultPciCfg2Write (\r | |
85 | IN CONST EFI_PEI_SERVICES **PeiServices,\r | |
86 | IN CONST EFI_PEI_PCI_CFG2_PPI *This,\r | |
87 | IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r | |
88 | IN UINT64 Address,\r | |
89 | IN OUT VOID *Buffer\r | |
90 | )\r | |
91 | {\r | |
92 | return EFI_NOT_AVAILABLE_YET;\r | |
93 | }\r | |
94 | \r | |
95 | /**\r | |
96 | This function performs a read-modify-write operation on the contents from a given\r | |
97 | location in the PCI configuration space.\r | |
98 | If the EFI_PEI_PCI_CFG2_PPI is not installed by platform/chipset PEIM, then\r | |
99 | return EFI_NOT_YET_AVAILABLE.\r | |
100 | \r | |
101 | @param PeiServices An indirect pointer to the PEI Services Table\r | |
102 | published by the PEI Foundation.\r | |
103 | @param This Pointer to local data for the interface.\r | |
104 | @param Width The width of the access. Enumerated in bytes. Type\r | |
105 | EFI_PEI_PCI_CFG_PPI_WIDTH is defined in Read().\r | |
106 | @param Address The physical address of the access.\r | |
107 | @param SetBits Points to value to bitwise-OR with the read configuration value.\r | |
108 | The size of the value is determined by Width.\r | |
109 | @param ClearBits Points to the value to negate and bitwise-AND with the read configuration value.\r | |
110 | The size of the value is determined by Width.\r | |
111 | \r | |
112 | @retval EFI_SUCCESS The function completed successfully.\r | |
113 | @retval EFI_INVALID_PARAMETER The invalid access width.\r | |
114 | @retval EFI_NOT_YET_AVAILABLE If the EFI_PEI_PCI_CFG2_PPI is not installed by platform/chipset PEIM.\r | |
115 | **/\r | |
116 | EFI_STATUS\r | |
117 | EFIAPI\r | |
118 | PeiDefaultPciCfg2Modify (\r | |
119 | IN CONST EFI_PEI_SERVICES **PeiServices,\r | |
120 | IN CONST EFI_PEI_PCI_CFG2_PPI *This,\r | |
121 | IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r | |
122 | IN UINT64 Address,\r | |
123 | IN VOID *SetBits,\r | |
124 | IN VOID *ClearBits\r | |
125 | )\r | |
126 | {\r | |
127 | return EFI_NOT_AVAILABLE_YET;\r | |
128 | }\r |