]>
Commit | Line | Data |
---|---|---|
1 | /** @file\r | |
2 | EFI SMM Access PPI definition.\r | |
3 | \r | |
4 | This PPI is used to control the visibility of the SMRAM on the platform.\r | |
5 | It abstracts the location and characteristics of SMRAM. The expectation is\r | |
6 | that the north bridge or memory controller would publish this PPI.\r | |
7 | \r | |
8 | The principal functionality found in the memory controller includes the following:\r | |
9 | - Exposing the SMRAM to all non-SMM agents, or the "open" state\r | |
10 | - Shrouding the SMRAM to all but the SMM agents, or the "closed" state\r | |
11 | - Preserving the system integrity, or "locking" the SMRAM, such that the settings cannot be\r | |
12 | perturbed by either boot service or runtime agents\r | |
13 | \r | |
14 | Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.<BR>\r | |
15 | \r | |
16 | SPDX-License-Identifier: BSD-2-Clause-Patent\r | |
17 | \r | |
18 | **/\r | |
19 | \r | |
20 | #ifndef _SMM_ACCESS_PPI_H_\r | |
21 | #define _SMM_ACCESS_PPI_H_\r | |
22 | \r | |
23 | #define PEI_SMM_ACCESS_PPI_GUID \\r | |
24 | { 0x268f33a9, 0xcccd, 0x48be, { 0x88, 0x17, 0x86, 0x5, 0x3a, 0xc3, 0x2e, 0xd6 }}\r | |
25 | \r | |
26 | typedef struct _PEI_SMM_ACCESS_PPI PEI_SMM_ACCESS_PPI;\r | |
27 | \r | |
28 | /**\r | |
29 | Opens the SMRAM area to be accessible by a PEIM driver.\r | |
30 | \r | |
31 | This function "opens" SMRAM so that it is visible while not inside of SMM. The function should\r | |
32 | return EFI_UNSUPPORTED if the hardware does not support hiding of SMRAM. The function\r | |
33 | should return EFI_DEVICE_ERROR if the SMRAM configuration is locked.\r | |
34 | \r | |
35 | @param PeiServices General purpose services available to every PEIM.\r | |
36 | @param This The pointer to the SMM Access Interface.\r | |
37 | @param DescriptorIndex The region of SMRAM to Open.\r | |
38 | \r | |
39 | @retval EFI_SUCCESS The region was successfully opened.\r | |
40 | @retval EFI_DEVICE_ERROR The region could not be opened because locked by chipset.\r | |
41 | @retval EFI_INVALID_PARAMETER The descriptor index was out of bounds.\r | |
42 | \r | |
43 | **/\r | |
44 | typedef\r | |
45 | EFI_STATUS\r | |
46 | (EFIAPI *PEI_SMM_OPEN)(\r | |
47 | IN EFI_PEI_SERVICES **PeiServices,\r | |
48 | IN PEI_SMM_ACCESS_PPI *This,\r | |
49 | IN UINTN DescriptorIndex\r | |
50 | );\r | |
51 | \r | |
52 | /**\r | |
53 | Inhibits access to the SMRAM.\r | |
54 | \r | |
55 | This function "closes" SMRAM so that it is not visible while outside of SMM. The function should\r | |
56 | return EFI_UNSUPPORTED if the hardware does not support hiding of SMRAM.\r | |
57 | \r | |
58 | @param PeiServices General purpose services available to every PEIM.\r | |
59 | @param This The pointer to the SMM Access Interface.\r | |
60 | @param DescriptorIndex The region of SMRAM to Close.\r | |
61 | \r | |
62 | @retval EFI_SUCCESS The region was successfully closed.\r | |
63 | @retval EFI_DEVICE_ERROR The region could not be closed because locked by chipset.\r | |
64 | @retval EFI_INVALID_PARAMETER The descriptor index was out of bounds.\r | |
65 | \r | |
66 | **/\r | |
67 | typedef\r | |
68 | EFI_STATUS\r | |
69 | (EFIAPI *PEI_SMM_CLOSE)(\r | |
70 | IN EFI_PEI_SERVICES **PeiServices,\r | |
71 | IN PEI_SMM_ACCESS_PPI *This,\r | |
72 | IN UINTN DescriptorIndex\r | |
73 | );\r | |
74 | \r | |
75 | /**\r | |
76 | Inhibits access to the SMRAM.\r | |
77 | \r | |
78 | This function prohibits access to the SMRAM region. This function is usually implemented such\r | |
79 | that it is a write-once operation.\r | |
80 | \r | |
81 | @param PeiServices General purpose services available to every PEIM.\r | |
82 | @param This The pointer to the SMM Access Interface.\r | |
83 | @param DescriptorIndex The region of SMRAM to Close.\r | |
84 | \r | |
85 | @retval EFI_SUCCESS The region was successfully locked.\r | |
86 | @retval EFI_DEVICE_ERROR The region could not be locked because at least\r | |
87 | one range is still open.\r | |
88 | @retval EFI_INVALID_PARAMETER The descriptor index was out of bounds.\r | |
89 | \r | |
90 | **/\r | |
91 | typedef\r | |
92 | EFI_STATUS\r | |
93 | (EFIAPI *PEI_SMM_LOCK)(\r | |
94 | IN EFI_PEI_SERVICES **PeiServices,\r | |
95 | IN PEI_SMM_ACCESS_PPI *This,\r | |
96 | IN UINTN DescriptorIndex\r | |
97 | );\r | |
98 | \r | |
99 | /**\r | |
100 | Queries the memory controller for the possible regions that will support SMRAM.\r | |
101 | \r | |
102 | @param PeiServices General purpose services available to every PEIM.\r | |
103 | @param This The pointer to the SmmAccessPpi Interface.\r | |
104 | @param SmramMapSize The pointer to the variable containing size of the\r | |
105 | buffer to contain the description information.\r | |
106 | @param SmramMap The buffer containing the data describing the Smram\r | |
107 | region descriptors.\r | |
108 | \r | |
109 | @retval EFI_BUFFER_TOO_SMALL The user did not provide a sufficient buffer.\r | |
110 | @retval EFI_SUCCESS The user provided a sufficiently-sized buffer.\r | |
111 | \r | |
112 | **/\r | |
113 | typedef\r | |
114 | EFI_STATUS\r | |
115 | (EFIAPI *PEI_SMM_CAPABILITIES)(\r | |
116 | IN EFI_PEI_SERVICES **PeiServices,\r | |
117 | IN PEI_SMM_ACCESS_PPI *This,\r | |
118 | IN OUT UINTN *SmramMapSize,\r | |
119 | IN OUT EFI_SMRAM_DESCRIPTOR *SmramMap\r | |
120 | );\r | |
121 | \r | |
122 | ///\r | |
123 | /// EFI SMM Access PPI is used to control the visibility of the SMRAM on the platform.\r | |
124 | /// It abstracts the location and characteristics of SMRAM. The platform should report\r | |
125 | /// all MMRAM via PEI_SMM_ACCESS_PPI. The expectation is that the north bridge or\r | |
126 | /// memory controller would publish this PPI.\r | |
127 | ///\r | |
128 | struct _PEI_SMM_ACCESS_PPI {\r | |
129 | PEI_SMM_OPEN Open;\r | |
130 | PEI_SMM_CLOSE Close;\r | |
131 | PEI_SMM_LOCK Lock;\r | |
132 | PEI_SMM_CAPABILITIES GetCapabilities;\r | |
133 | BOOLEAN LockState;\r | |
134 | BOOLEAN OpenState;\r | |
135 | };\r | |
136 | \r | |
137 | extern EFI_GUID gPeiSmmAccessPpiGuid;\r | |
138 | \r | |
139 | #endif\r |