| | 1 | /** @file\r |
| | 2 | The X64 entrypoint is used to process capsule in long mode.\r |
| | 3 | \r |
| | 4 | Copyright (c) 2011 - 2012, Intel Corporation. All rights reserved.<BR>\r |
| | 5 | This program and the accompanying materials\r |
| | 6 | are licensed and made available under the terms and conditions of the BSD License\r |
| | 7 | which accompanies this distribution. The full text of the license may be found at\r |
| | 8 | http://opensource.org/licenses/bsd-license.php\r |
| | 9 | \r |
| | 10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r |
| | 11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r |
| | 12 | \r |
| | 13 | **/\r |
| | 14 | \r |
| | 15 | #include <Library/DebugLib.h>\r |
| | 16 | #include <Library/BaseMemoryLib.h>\r |
| | 17 | #include <Library/CpuExceptionHandlerLib.h>\r |
| | 18 | #include "CommonHeader.h"\r |
| | 19 | \r |
| | 20 | #define EXCEPTION_VECTOR_NUMBER 0x20\r |
| | 21 | \r |
| | 22 | /**\r |
| | 23 | The X64 entrypoint is used to process capsule in long mode then\r |
| | 24 | return to 32-bit protected mode.\r |
| | 25 | \r |
| | 26 | @param EntrypointContext Pointer to the context of long mode.\r |
| | 27 | @param ReturnContext Pointer to the context of 32-bit protected mode.\r |
| | 28 | \r |
| | 29 | @retval This function should never return actually.\r |
| | 30 | \r |
| | 31 | **/\r |
| | 32 | EFI_STATUS\r |
| | 33 | EFIAPI\r |
| | 34 | _ModuleEntryPoint (\r |
| | 35 | SWITCH_32_TO_64_CONTEXT *EntrypointContext,\r |
| | 36 | SWITCH_64_TO_32_CONTEXT *ReturnContext\r |
| | 37 | )\r |
| | 38 | {\r |
| | 39 | EFI_STATUS Status;\r |
| | 40 | IA32_DESCRIPTOR Ia32Idtr;\r |
| | 41 | IA32_DESCRIPTOR X64Idtr;\r |
| | 42 | IA32_IDT_GATE_DESCRIPTOR IdtEntryTable[EXCEPTION_VECTOR_NUMBER];\r |
| | 43 | \r |
| | 44 | //\r |
| | 45 | // Save the IA32 IDT Descriptor\r |
| | 46 | //\r |
| | 47 | AsmReadIdtr ((IA32_DESCRIPTOR *) &Ia32Idtr); \r |
| | 48 | \r |
| | 49 | //\r |
| | 50 | // Setup X64 IDT table\r |
| | 51 | //\r |
| | 52 | ZeroMem (IdtEntryTable, sizeof (IA32_IDT_GATE_DESCRIPTOR) * EXCEPTION_VECTOR_NUMBER);\r |
| | 53 | X64Idtr.Base = (UINTN) IdtEntryTable;\r |
| | 54 | X64Idtr.Limit = (UINT16) (sizeof (IA32_IDT_GATE_DESCRIPTOR) * EXCEPTION_VECTOR_NUMBER - 1);\r |
| | 55 | AsmWriteIdtr ((IA32_DESCRIPTOR *) &X64Idtr); \r |
| | 56 | \r |
| | 57 | //\r |
| | 58 | // Setup the default CPU exception handlers\r |
| | 59 | //\r |
| | 60 | SetupCpuExceptionHandlers (); \r |
| | 61 | \r |
| | 62 | //\r |
| | 63 | // Call CapsuleDataCoalesce to process capsule.\r |
| | 64 | //\r |
| | 65 | Status = CapsuleDataCoalesce (\r |
| | 66 | NULL,\r |
| | 67 | (EFI_PHYSICAL_ADDRESS *) (UINTN) EntrypointContext->BlockListAddr,\r |
| | 68 | (VOID **) (UINTN) EntrypointContext->MemoryBase64Ptr,\r |
| | 69 | (UINTN *) (UINTN) EntrypointContext->MemorySize64Ptr\r |
| | 70 | );\r |
| | 71 | \r |
| | 72 | ReturnContext->ReturnStatus = Status;\r |
| | 73 | \r |
| | 74 | //\r |
| | 75 | // Restore IA32 IDT table\r |
| | 76 | //\r |
| | 77 | AsmWriteIdtr ((IA32_DESCRIPTOR *) &Ia32Idtr); \r |
| | 78 | \r |
| | 79 | //\r |
| | 80 | // Finish to coalesce capsule, and return to 32-bit mode.\r |
| | 81 | //\r |
| | 82 | AsmDisablePaging64 (\r |
| | 83 | ReturnContext->ReturnCs,\r |
| | 84 | (UINT32) ReturnContext->ReturnEntryPoint,\r |
| | 85 | (UINT32) (UINTN) EntrypointContext,\r |
| | 86 | (UINT32) (UINTN) ReturnContext,\r |
| | 87 | (UINT32) (EntrypointContext->StackBufferBase + EntrypointContext->StackBufferLength)\r |
| | 88 | ); \r |
| | 89 | \r |
| | 90 | //\r |
| | 91 | // Should never be here.\r |
| | 92 | //\r |
| | 93 | ASSERT (FALSE);\r |
| | 94 | return EFI_SUCCESS;\r |
| | 95 | } |
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