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1 | /** @file\r | |
2 | Support for PCI 2.3 standard.\r | |
3 | \r | |
4 | Copyright (c) 2006 - 2009, Intel Corporation \r | |
5 | All rights reserved. This program and the accompanying materials \r | |
6 | are licensed and made available under the terms and conditions of the BSD License \r | |
7 | which accompanies this distribution. The full text of the license may be found at \r | |
8 | http://opensource.org/licenses/bsd-license.php \r | |
9 | \r | |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r | |
12 | \r | |
13 | **/\r | |
14 | \r | |
15 | #ifndef _PCI23_H_\r | |
16 | #define _PCI23_H_\r | |
17 | \r | |
18 | #include <IndustryStandard/Pci22.h>\r | |
19 | \r | |
20 | ///\r | |
21 | /// PCI_CLASS_MASS_STORAGE, Base Class 01h\r | |
22 | ///\r | |
23 | ///@{\r | |
24 | #define PCI_CLASS_MASS_STORAGE_ATA 0x05\r | |
25 | #define PCI_IF_MASS_STORAGE_SINGLE_DMA 0x20\r | |
26 | #define PCI_IF_MASS_STORAGE_CHAINED_DMA 0x30\r | |
27 | ///@}\r | |
28 | \r | |
29 | ///\r | |
30 | /// PCI_CLASS_SERIAL, Base Class 0Ch\r | |
31 | ///\r | |
32 | ///@{\r | |
33 | #define PCI_IF_EHCI 0x20\r | |
34 | #define PCI_CLASS_SERIAL_IB 0x06\r | |
35 | ///@}\r | |
36 | \r | |
37 | ///\r | |
38 | /// defined in PCI Express Spec.\r | |
39 | ///\r | |
40 | #define PCI_EXP_MAX_CONFIG_OFFSET 0x1000\r | |
41 | \r | |
42 | ///\r | |
43 | /// PCI Capability List IDs and records\r | |
44 | ///\r | |
45 | #define EFI_PCI_CAPABILITY_ID_PCIX 0x07\r | |
46 | \r | |
47 | #pragma pack(1)\r | |
48 | ///\r | |
49 | /// PCI-X Capabilities List, \r | |
50 | /// Section 7.2, PCI-X Addendum to the PCI Local Bus Specification, Revision 1.0b\r | |
51 | ///\r | |
52 | typedef struct {\r | |
53 | EFI_PCI_CAPABILITY_HDR Hdr;\r | |
54 | UINT16 CommandReg;\r | |
55 | UINT32 StatusReg;\r | |
56 | } EFI_PCI_CAPABILITY_PCIX;\r | |
57 | \r | |
58 | ///\r | |
59 | /// PCI-X Bridge Capabilities List, \r | |
60 | /// Section 8.6.2, PCI-X Addendum to the PCI Local Bus Specification, Revision 1.0b\r | |
61 | ///\r | |
62 | typedef struct {\r | |
63 | EFI_PCI_CAPABILITY_HDR Hdr;\r | |
64 | UINT16 SecStatusReg;\r | |
65 | UINT32 StatusReg;\r | |
66 | UINT32 SplitTransCtrlRegUp;\r | |
67 | UINT32 SplitTransCtrlRegDn;\r | |
68 | } EFI_PCI_CAPABILITY_PCIX_BRDG;\r | |
69 | \r | |
70 | #pragma pack()\r | |
71 | \r | |
72 | #define PCI_CODE_TYPE_EFI_IMAGE 0x03\r | |
73 | \r | |
74 | #endif\r |