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1/** @file\r
2 Industry Standard Definitions of SMBIOS Table Specification v3.1.1.\r
3\r
4Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
5(C) Copyright 2015-2017 Hewlett Packard Enterprise Development LP<BR>\r
6This program and the accompanying materials are licensed and made available under\r
7the terms and conditions of the BSD License that accompanies this distribution.\r
8The full text of the license may be found at\r
9http://opensource.org/licenses/bsd-license.php.\r
10\r
11THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
12WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
13\r
14**/\r
15\r
16#ifndef __SMBIOS_STANDARD_H__\r
17#define __SMBIOS_STANDARD_H__\r
18\r
19///\r
20/// Reference SMBIOS 2.6, chapter 3.1.2.\r
21/// For v2.1 and later, handle values in the range 0FF00h to 0FFFFh are reserved for\r
22/// use by this specification.\r
23///\r
24#define SMBIOS_HANDLE_RESERVED_BEGIN 0xFF00\r
25\r
26///\r
27/// Reference SMBIOS 2.7, chapter 6.1.2.\r
28/// The UEFI Platform Initialization Specification reserves handle number FFFEh for its\r
29/// EFI_SMBIOS_PROTOCOL.Add() function to mean "assign an unused handle number automatically."\r
30/// This number is not used for any other purpose by the SMBIOS specification.\r
31///\r
32#define SMBIOS_HANDLE_PI_RESERVED 0xFFFE\r
33\r
34///\r
35/// Reference SMBIOS 2.6, chapter 3.1.3.\r
36/// Each text string is limited to 64 significant characters due to system MIF limitations.\r
37/// Reference SMBIOS 2.7, chapter 6.1.3.\r
38/// It will have no limit on the length of each individual text string.\r
39///\r
40#define SMBIOS_STRING_MAX_LENGTH 64\r
41\r
42//\r
43// The length of the entire structure table (including all strings) must be reported\r
44// in the Structure Table Length field of the SMBIOS Structure Table Entry Point,\r
45// which is a WORD field limited to 65,535 bytes.\r
46//\r
47#define SMBIOS_TABLE_MAX_LENGTH 0xFFFF\r
48\r
49//\r
50// For SMBIOS 3.0, Structure table maximum size in Entry Point structure is DWORD field limited to 0xFFFFFFFF bytes.\r
51//\r
52#define SMBIOS_3_0_TABLE_MAX_LENGTH 0xFFFFFFFF\r
53\r
54//\r
55// SMBIOS type macros which is according to SMBIOS 2.7 specification.\r
56//\r
57#define SMBIOS_TYPE_BIOS_INFORMATION 0\r
58#define SMBIOS_TYPE_SYSTEM_INFORMATION 1\r
59#define SMBIOS_TYPE_BASEBOARD_INFORMATION 2\r
60#define SMBIOS_TYPE_SYSTEM_ENCLOSURE 3\r
61#define SMBIOS_TYPE_PROCESSOR_INFORMATION 4\r
62#define SMBIOS_TYPE_MEMORY_CONTROLLER_INFORMATION 5\r
63#define SMBIOS_TYPE_MEMORY_MODULE_INFORMATON 6\r
64#define SMBIOS_TYPE_CACHE_INFORMATION 7\r
65#define SMBIOS_TYPE_PORT_CONNECTOR_INFORMATION 8\r
66#define SMBIOS_TYPE_SYSTEM_SLOTS 9\r
67#define SMBIOS_TYPE_ONBOARD_DEVICE_INFORMATION 10\r
68#define SMBIOS_TYPE_OEM_STRINGS 11\r
69#define SMBIOS_TYPE_SYSTEM_CONFIGURATION_OPTIONS 12\r
70#define SMBIOS_TYPE_BIOS_LANGUAGE_INFORMATION 13\r
71#define SMBIOS_TYPE_GROUP_ASSOCIATIONS 14\r
72#define SMBIOS_TYPE_SYSTEM_EVENT_LOG 15\r
73#define SMBIOS_TYPE_PHYSICAL_MEMORY_ARRAY 16\r
74#define SMBIOS_TYPE_MEMORY_DEVICE 17\r
75#define SMBIOS_TYPE_32BIT_MEMORY_ERROR_INFORMATION 18\r
76#define SMBIOS_TYPE_MEMORY_ARRAY_MAPPED_ADDRESS 19\r
77#define SMBIOS_TYPE_MEMORY_DEVICE_MAPPED_ADDRESS 20\r
78#define SMBIOS_TYPE_BUILT_IN_POINTING_DEVICE 21\r
79#define SMBIOS_TYPE_PORTABLE_BATTERY 22\r
80#define SMBIOS_TYPE_SYSTEM_RESET 23\r
81#define SMBIOS_TYPE_HARDWARE_SECURITY 24\r
82#define SMBIOS_TYPE_SYSTEM_POWER_CONTROLS 25\r
83#define SMBIOS_TYPE_VOLTAGE_PROBE 26\r
84#define SMBIOS_TYPE_COOLING_DEVICE 27\r
85#define SMBIOS_TYPE_TEMPERATURE_PROBE 28\r
86#define SMBIOS_TYPE_ELECTRICAL_CURRENT_PROBE 29\r
87#define SMBIOS_TYPE_OUT_OF_BAND_REMOTE_ACCESS 30\r
88#define SMBIOS_TYPE_BOOT_INTEGRITY_SERVICE 31\r
89#define SMBIOS_TYPE_SYSTEM_BOOT_INFORMATION 32\r
90#define SMBIOS_TYPE_64BIT_MEMORY_ERROR_INFORMATION 33\r
91#define SMBIOS_TYPE_MANAGEMENT_DEVICE 34\r
92#define SMBIOS_TYPE_MANAGEMENT_DEVICE_COMPONENT 35\r
93#define SMBIOS_TYPE_MANAGEMENT_DEVICE_THRESHOLD_DATA 36\r
94#define SMBIOS_TYPE_MEMORY_CHANNEL 37\r
95#define SMBIOS_TYPE_IPMI_DEVICE_INFORMATION 38\r
96#define SMBIOS_TYPE_SYSTEM_POWER_SUPPLY 39\r
97#define SMBIOS_TYPE_ADDITIONAL_INFORMATION 40\r
98#define SMBIOS_TYPE_ONBOARD_DEVICES_EXTENDED_INFORMATION 41\r
99#define SMBIOS_TYPE_MANAGEMENT_CONTROLLER_HOST_INTERFACE 42\r
100#define SMBIOS_TYPE_TPM_DEVICE 43\r
101\r
102///\r
103/// Inactive type is added from SMBIOS 2.2. Reference SMBIOS 2.6, chapter 3.3.43.\r
104/// Upper-level software that interprets the SMBIOS structure-table should bypass an\r
105/// Inactive structure just like a structure type that the software does not recognize.\r
106///\r
107#define SMBIOS_TYPE_INACTIVE 0x007E\r
108\r
109///\r
110/// End-of-table type is added from SMBIOS 2.2. Reference SMBIOS 2.6, chapter 3.3.44.\r
111/// The end-of-table indicator is used in the last physical structure in a table\r
112///\r
113#define SMBIOS_TYPE_END_OF_TABLE 0x007F\r
114\r
115#define SMBIOS_OEM_BEGIN 128\r
116#define SMBIOS_OEM_END 255\r
117\r
118///\r
119/// Types 0 through 127 (7Fh) are reserved for and defined by this\r
120/// specification. Types 128 through 256 (80h to FFh) are available for system- and OEM-specific information.\r
121///\r
122typedef UINT8 SMBIOS_TYPE;\r
123\r
124///\r
125/// Specifies the structure's handle, a unique 16-bit number in the range 0 to 0FFFEh (for version\r
126/// 2.0) or 0 to 0FEFFh (for version 2.1 and later). The handle can be used with the Get SMBIOS\r
127/// Structure function to retrieve a specific structure; the handle numbers are not required to be\r
128/// contiguous. For v2.1 and later, handle values in the range 0FF00h to 0FFFFh are reserved for\r
129/// use by this specification.\r
130/// If the system configuration changes, a previously assigned handle might no longer exist.\r
131/// However once a handle has been assigned by the BIOS, the BIOS cannot re-assign that handle\r
132/// number to another structure.\r
133///\r
134typedef UINT16 SMBIOS_HANDLE;\r
135\r
136///\r
137/// Smbios Table Entry Point Structure.\r
138///\r
139#pragma pack(1)\r
140typedef struct {\r
141 UINT8 AnchorString[4];\r
142 UINT8 EntryPointStructureChecksum;\r
143 UINT8 EntryPointLength;\r
144 UINT8 MajorVersion;\r
145 UINT8 MinorVersion;\r
146 UINT16 MaxStructureSize;\r
147 UINT8 EntryPointRevision;\r
148 UINT8 FormattedArea[5];\r
149 UINT8 IntermediateAnchorString[5];\r
150 UINT8 IntermediateChecksum;\r
151 UINT16 TableLength;\r
152 UINT32 TableAddress;\r
153 UINT16 NumberOfSmbiosStructures;\r
154 UINT8 SmbiosBcdRevision;\r
155} SMBIOS_TABLE_ENTRY_POINT;\r
156\r
157typedef struct {\r
158 UINT8 AnchorString[5];\r
159 UINT8 EntryPointStructureChecksum;\r
160 UINT8 EntryPointLength;\r
161 UINT8 MajorVersion;\r
162 UINT8 MinorVersion;\r
163 UINT8 DocRev;\r
164 UINT8 EntryPointRevision;\r
165 UINT8 Reserved;\r
166 UINT32 TableMaximumSize;\r
167 UINT64 TableAddress;\r
168} SMBIOS_TABLE_3_0_ENTRY_POINT;\r
169\r
170///\r
171/// The Smbios structure header.\r
172///\r
173typedef struct {\r
174 SMBIOS_TYPE Type;\r
175 UINT8 Length;\r
176 SMBIOS_HANDLE Handle;\r
177} SMBIOS_STRUCTURE;\r
178\r
179///\r
180/// Text strings associated with a given SMBIOS structure are returned in the dmiStrucBuffer, appended directly after\r
181/// the formatted portion of the structure. This method of returning string information eliminates the need for\r
182/// application software to deal with pointers embedded in the SMBIOS structure. Each string is terminated with a null\r
183/// (00h) BYTE and the set of strings is terminated with an additional null (00h) BYTE. When the formatted portion of\r
184/// a SMBIOS structure references a string, it does so by specifying a non-zero string number within the structure's\r
185/// string-set. For example, if a string field contains 02h, it references the second string following the formatted portion\r
186/// of the SMBIOS structure. If a string field references no string, a null (0) is placed in that string field. If the\r
187/// formatted portion of the structure contains string-reference fields and all the string fields are set to 0 (no string\r
188/// references), the formatted section of the structure is followed by two null (00h) BYTES.\r
189///\r
190typedef UINT8 SMBIOS_TABLE_STRING;\r
191\r
192///\r
193/// BIOS Characteristics\r
194/// Defines which functions the BIOS supports. PCI, PCMCIA, Flash, etc.\r
195///\r
196typedef struct {\r
197 UINT32 Reserved :2; ///< Bits 0-1.\r
198 UINT32 Unknown :1;\r
199 UINT32 BiosCharacteristicsNotSupported :1;\r
200 UINT32 IsaIsSupported :1;\r
201 UINT32 McaIsSupported :1;\r
202 UINT32 EisaIsSupported :1;\r
203 UINT32 PciIsSupported :1;\r
204 UINT32 PcmciaIsSupported :1;\r
205 UINT32 PlugAndPlayIsSupported :1;\r
206 UINT32 ApmIsSupported :1;\r
207 UINT32 BiosIsUpgradable :1;\r
208 UINT32 BiosShadowingAllowed :1;\r
209 UINT32 VlVesaIsSupported :1;\r
210 UINT32 EscdSupportIsAvailable :1;\r
211 UINT32 BootFromCdIsSupported :1;\r
212 UINT32 SelectableBootIsSupported :1;\r
213 UINT32 RomBiosIsSocketed :1;\r
214 UINT32 BootFromPcmciaIsSupported :1;\r
215 UINT32 EDDSpecificationIsSupported :1;\r
216 UINT32 JapaneseNecFloppyIsSupported :1;\r
217 UINT32 JapaneseToshibaFloppyIsSupported :1;\r
218 UINT32 Floppy525_360IsSupported :1;\r
219 UINT32 Floppy525_12IsSupported :1;\r
220 UINT32 Floppy35_720IsSupported :1;\r
221 UINT32 Floppy35_288IsSupported :1;\r
222 UINT32 PrintScreenIsSupported :1;\r
223 UINT32 Keyboard8042IsSupported :1;\r
224 UINT32 SerialIsSupported :1;\r
225 UINT32 PrinterIsSupported :1;\r
226 UINT32 CgaMonoIsSupported :1;\r
227 UINT32 NecPc98 :1;\r
228 UINT32 ReservedForVendor :32; ///< Bits 32-63. Bits 32-47 reserved for BIOS vendor\r
229 ///< and bits 48-63 reserved for System Vendor.\r
230} MISC_BIOS_CHARACTERISTICS;\r
231\r
232///\r
233/// BIOS Characteristics Extension Byte 1.\r
234/// This information, available for SMBIOS version 2.1 and later, appears at offset 12h\r
235/// within the BIOS Information structure.\r
236///\r
237typedef struct {\r
238 UINT8 AcpiIsSupported :1;\r
239 UINT8 UsbLegacyIsSupported :1;\r
240 UINT8 AgpIsSupported :1;\r
241 UINT8 I2OBootIsSupported :1;\r
242 UINT8 Ls120BootIsSupported :1;\r
243 UINT8 AtapiZipDriveBootIsSupported :1;\r
244 UINT8 Boot1394IsSupported :1;\r
245 UINT8 SmartBatteryIsSupported :1;\r
246} MBCE_BIOS_RESERVED;\r
247\r
248///\r
249/// BIOS Characteristics Extension Byte 2.\r
250/// This information, available for SMBIOS version 2.3 and later, appears at offset 13h\r
251/// within the BIOS Information structure.\r
252///\r
253typedef struct {\r
254 UINT8 BiosBootSpecIsSupported :1;\r
255 UINT8 FunctionKeyNetworkBootIsSupported :1;\r
256 UINT8 TargetContentDistributionEnabled :1;\r
257 UINT8 UefiSpecificationSupported :1;\r
258 UINT8 VirtualMachineSupported :1;\r
259 UINT8 ExtensionByte2Reserved :3;\r
260} MBCE_SYSTEM_RESERVED;\r
261\r
262///\r
263/// BIOS Characteristics Extension Bytes.\r
264///\r
265typedef struct {\r
266 MBCE_BIOS_RESERVED BiosReserved;\r
267 MBCE_SYSTEM_RESERVED SystemReserved;\r
268} MISC_BIOS_CHARACTERISTICS_EXTENSION;\r
269\r
270///\r
271/// Extended BIOS ROM size.\r
272///\r
273typedef struct {\r
274 UINT16 Size :14;\r
275 UINT16 Unit :2;\r
276} EXTENDED_BIOS_ROM_SIZE;\r
277\r
278///\r
279/// BIOS Information (Type 0).\r
280///\r
281typedef struct {\r
282 SMBIOS_STRUCTURE Hdr;\r
283 SMBIOS_TABLE_STRING Vendor;\r
284 SMBIOS_TABLE_STRING BiosVersion;\r
285 UINT16 BiosSegment;\r
286 SMBIOS_TABLE_STRING BiosReleaseDate;\r
287 UINT8 BiosSize;\r
288 MISC_BIOS_CHARACTERISTICS BiosCharacteristics;\r
289 UINT8 BIOSCharacteristicsExtensionBytes[2];\r
290 UINT8 SystemBiosMajorRelease;\r
291 UINT8 SystemBiosMinorRelease;\r
292 UINT8 EmbeddedControllerFirmwareMajorRelease;\r
293 UINT8 EmbeddedControllerFirmwareMinorRelease;\r
294 //\r
295 // Add for smbios 3.1.0\r
296 //\r
297 EXTENDED_BIOS_ROM_SIZE ExtendedBiosSize;\r
298} SMBIOS_TABLE_TYPE0;\r
299\r
300///\r
301/// System Wake-up Type.\r
302///\r
303typedef enum {\r
304 SystemWakeupTypeReserved = 0x00,\r
305 SystemWakeupTypeOther = 0x01,\r
306 SystemWakeupTypeUnknown = 0x02,\r
307 SystemWakeupTypeApmTimer = 0x03,\r
308 SystemWakeupTypeModemRing = 0x04,\r
309 SystemWakeupTypeLanRemote = 0x05,\r
310 SystemWakeupTypePowerSwitch = 0x06,\r
311 SystemWakeupTypePciPme = 0x07,\r
312 SystemWakeupTypeAcPowerRestored = 0x08\r
313} MISC_SYSTEM_WAKEUP_TYPE;\r
314\r
315///\r
316/// System Information (Type 1).\r
317///\r
318/// The information in this structure defines attributes of the overall system and is\r
319/// intended to be associated with the Component ID group of the system's MIF.\r
320/// An SMBIOS implementation is associated with a single system instance and contains\r
321/// one and only one System Information (Type 1) structure.\r
322///\r
323typedef struct {\r
324 SMBIOS_STRUCTURE Hdr;\r
325 SMBIOS_TABLE_STRING Manufacturer;\r
326 SMBIOS_TABLE_STRING ProductName;\r
327 SMBIOS_TABLE_STRING Version;\r
328 SMBIOS_TABLE_STRING SerialNumber;\r
329 GUID Uuid;\r
330 UINT8 WakeUpType; ///< The enumeration value from MISC_SYSTEM_WAKEUP_TYPE.\r
331 SMBIOS_TABLE_STRING SKUNumber;\r
332 SMBIOS_TABLE_STRING Family;\r
333} SMBIOS_TABLE_TYPE1;\r
334\r
335///\r
336/// Base Board - Feature Flags.\r
337///\r
338typedef struct {\r
339 UINT8 Motherboard :1;\r
340 UINT8 RequiresDaughterCard :1;\r
341 UINT8 Removable :1;\r
342 UINT8 Replaceable :1;\r
343 UINT8 HotSwappable :1;\r
344 UINT8 Reserved :3;\r
345} BASE_BOARD_FEATURE_FLAGS;\r
346\r
347///\r
348/// Base Board - Board Type.\r
349///\r
350typedef enum {\r
351 BaseBoardTypeUnknown = 0x1,\r
352 BaseBoardTypeOther = 0x2,\r
353 BaseBoardTypeServerBlade = 0x3,\r
354 BaseBoardTypeConnectivitySwitch = 0x4,\r
355 BaseBoardTypeSystemManagementModule = 0x5,\r
356 BaseBoardTypeProcessorModule = 0x6,\r
357 BaseBoardTypeIOModule = 0x7,\r
358 BaseBoardTypeMemoryModule = 0x8,\r
359 BaseBoardTypeDaughterBoard = 0x9,\r
360 BaseBoardTypeMotherBoard = 0xA,\r
361 BaseBoardTypeProcessorMemoryModule = 0xB,\r
362 BaseBoardTypeProcessorIOModule = 0xC,\r
363 BaseBoardTypeInterconnectBoard = 0xD\r
364} BASE_BOARD_TYPE;\r
365\r
366///\r
367/// Base Board (or Module) Information (Type 2).\r
368///\r
369/// The information in this structure defines attributes of a system baseboard -\r
370/// for example a motherboard, planar, or server blade or other standard system module.\r
371///\r
372typedef struct {\r
373 SMBIOS_STRUCTURE Hdr;\r
374 SMBIOS_TABLE_STRING Manufacturer;\r
375 SMBIOS_TABLE_STRING ProductName;\r
376 SMBIOS_TABLE_STRING Version;\r
377 SMBIOS_TABLE_STRING SerialNumber;\r
378 SMBIOS_TABLE_STRING AssetTag;\r
379 BASE_BOARD_FEATURE_FLAGS FeatureFlag;\r
380 SMBIOS_TABLE_STRING LocationInChassis;\r
381 UINT16 ChassisHandle;\r
382 UINT8 BoardType; ///< The enumeration value from BASE_BOARD_TYPE.\r
383 UINT8 NumberOfContainedObjectHandles;\r
384 UINT16 ContainedObjectHandles[1];\r
385} SMBIOS_TABLE_TYPE2;\r
386\r
387///\r
388/// System Enclosure or Chassis Types\r
389///\r
390typedef enum {\r
391 MiscChassisTypeOther = 0x01,\r
392 MiscChassisTypeUnknown = 0x02,\r
393 MiscChassisTypeDeskTop = 0x03,\r
394 MiscChassisTypeLowProfileDesktop = 0x04,\r
395 MiscChassisTypePizzaBox = 0x05,\r
396 MiscChassisTypeMiniTower = 0x06,\r
397 MiscChassisTypeTower = 0x07,\r
398 MiscChassisTypePortable = 0x08,\r
399 MiscChassisTypeLapTop = 0x09,\r
400 MiscChassisTypeNotebook = 0x0A,\r
401 MiscChassisTypeHandHeld = 0x0B,\r
402 MiscChassisTypeDockingStation = 0x0C,\r
403 MiscChassisTypeAllInOne = 0x0D,\r
404 MiscChassisTypeSubNotebook = 0x0E,\r
405 MiscChassisTypeSpaceSaving = 0x0F,\r
406 MiscChassisTypeLunchBox = 0x10,\r
407 MiscChassisTypeMainServerChassis = 0x11,\r
408 MiscChassisTypeExpansionChassis = 0x12,\r
409 MiscChassisTypeSubChassis = 0x13,\r
410 MiscChassisTypeBusExpansionChassis = 0x14,\r
411 MiscChassisTypePeripheralChassis = 0x15,\r
412 MiscChassisTypeRaidChassis = 0x16,\r
413 MiscChassisTypeRackMountChassis = 0x17,\r
414 MiscChassisTypeSealedCasePc = 0x18,\r
415 MiscChassisMultiSystemChassis = 0x19,\r
416 MiscChassisCompactPCI = 0x1A,\r
417 MiscChassisAdvancedTCA = 0x1B,\r
418 MiscChassisBlade = 0x1C,\r
419 MiscChassisBladeEnclosure = 0x1D,\r
420 MiscChassisTablet = 0x1E,\r
421 MiscChassisConvertible = 0x1F,\r
422 MiscChassisDetachable = 0x20,\r
423 MiscChassisIoTGateway = 0x21,\r
424 MiscChassisEmbeddedPc = 0x22,\r
425 MiscChassisMiniPc = 0x23,\r
426 MiscChassisStickPc = 0x24\r
427} MISC_CHASSIS_TYPE;\r
428\r
429///\r
430/// System Enclosure or Chassis States .\r
431///\r
432typedef enum {\r
433 ChassisStateOther = 0x01,\r
434 ChassisStateUnknown = 0x02,\r
435 ChassisStateSafe = 0x03,\r
436 ChassisStateWarning = 0x04,\r
437 ChassisStateCritical = 0x05,\r
438 ChassisStateNonRecoverable = 0x06\r
439} MISC_CHASSIS_STATE;\r
440\r
441///\r
442/// System Enclosure or Chassis Security Status.\r
443///\r
444typedef enum {\r
445 ChassisSecurityStatusOther = 0x01,\r
446 ChassisSecurityStatusUnknown = 0x02,\r
447 ChassisSecurityStatusNone = 0x03,\r
448 ChassisSecurityStatusExternalInterfaceLockedOut = 0x04,\r
449 ChassisSecurityStatusExternalInterfaceLockedEnabled = 0x05\r
450} MISC_CHASSIS_SECURITY_STATE;\r
451\r
452///\r
453/// Contained Element record\r
454///\r
455typedef struct {\r
456 UINT8 ContainedElementType;\r
457 UINT8 ContainedElementMinimum;\r
458 UINT8 ContainedElementMaximum;\r
459} CONTAINED_ELEMENT;\r
460\r
461\r
462///\r
463/// System Enclosure or Chassis (Type 3).\r
464///\r
465/// The information in this structure defines attributes of the system's mechanical enclosure(s).\r
466/// For example, if a system included a separate enclosure for its peripheral devices,\r
467/// two structures would be returned: one for the main, system enclosure and the second for\r
468/// the peripheral device enclosure. The additions to this structure in v2.1 of this specification\r
469/// support the population of the CIM_Chassis class.\r
470///\r
471typedef struct {\r
472 SMBIOS_STRUCTURE Hdr;\r
473 SMBIOS_TABLE_STRING Manufacturer;\r
474 UINT8 Type;\r
475 SMBIOS_TABLE_STRING Version;\r
476 SMBIOS_TABLE_STRING SerialNumber;\r
477 SMBIOS_TABLE_STRING AssetTag;\r
478 UINT8 BootupState; ///< The enumeration value from MISC_CHASSIS_STATE.\r
479 UINT8 PowerSupplyState; ///< The enumeration value from MISC_CHASSIS_STATE.\r
480 UINT8 ThermalState; ///< The enumeration value from MISC_CHASSIS_STATE.\r
481 UINT8 SecurityStatus; ///< The enumeration value from MISC_CHASSIS_SECURITY_STATE.\r
482 UINT8 OemDefined[4];\r
483 UINT8 Height;\r
484 UINT8 NumberofPowerCords;\r
485 UINT8 ContainedElementCount;\r
486 UINT8 ContainedElementRecordLength;\r
487 //\r
488 // Can have 0 to (ContainedElementCount * ContainedElementRecordLength) contained elements\r
489 //\r
490 CONTAINED_ELEMENT ContainedElements[1];\r
491 //\r
492 // Add for smbios 2.7\r
493 //\r
494 // Since ContainedElements has a variable number of entries, must not define SKUNumber in\r
495 // the structure. Need to reference it by starting at offset 0x15 and adding\r
496 // (ContainedElementCount * ContainedElementRecordLength) bytes.\r
497 //\r
498 // SMBIOS_TABLE_STRING SKUNumber;\r
499} SMBIOS_TABLE_TYPE3;\r
500\r
501///\r
502/// Processor Information - Processor Type.\r
503///\r
504typedef enum {\r
505 ProcessorOther = 0x01,\r
506 ProcessorUnknown = 0x02,\r
507 CentralProcessor = 0x03,\r
508 MathProcessor = 0x04,\r
509 DspProcessor = 0x05,\r
510 VideoProcessor = 0x06\r
511} PROCESSOR_TYPE_DATA;\r
512\r
513///\r
514/// Processor Information - Processor Family.\r
515///\r
516typedef enum {\r
517 ProcessorFamilyOther = 0x01,\r
518 ProcessorFamilyUnknown = 0x02,\r
519 ProcessorFamily8086 = 0x03,\r
520 ProcessorFamily80286 = 0x04,\r
521 ProcessorFamilyIntel386 = 0x05,\r
522 ProcessorFamilyIntel486 = 0x06,\r
523 ProcessorFamily8087 = 0x07,\r
524 ProcessorFamily80287 = 0x08,\r
525 ProcessorFamily80387 = 0x09,\r
526 ProcessorFamily80487 = 0x0A,\r
527 ProcessorFamilyPentium = 0x0B,\r
528 ProcessorFamilyPentiumPro = 0x0C,\r
529 ProcessorFamilyPentiumII = 0x0D,\r
530 ProcessorFamilyPentiumMMX = 0x0E,\r
531 ProcessorFamilyCeleron = 0x0F,\r
532 ProcessorFamilyPentiumIIXeon = 0x10,\r
533 ProcessorFamilyPentiumIII = 0x11,\r
534 ProcessorFamilyM1 = 0x12,\r
535 ProcessorFamilyM2 = 0x13,\r
536 ProcessorFamilyIntelCeleronM = 0x14,\r
537 ProcessorFamilyIntelPentium4Ht = 0x15,\r
538 ProcessorFamilyAmdDuron = 0x18,\r
539 ProcessorFamilyK5 = 0x19,\r
540 ProcessorFamilyK6 = 0x1A,\r
541 ProcessorFamilyK6_2 = 0x1B,\r
542 ProcessorFamilyK6_3 = 0x1C,\r
543 ProcessorFamilyAmdAthlon = 0x1D,\r
544 ProcessorFamilyAmd29000 = 0x1E,\r
545 ProcessorFamilyK6_2Plus = 0x1F,\r
546 ProcessorFamilyPowerPC = 0x20,\r
547 ProcessorFamilyPowerPC601 = 0x21,\r
548 ProcessorFamilyPowerPC603 = 0x22,\r
549 ProcessorFamilyPowerPC603Plus = 0x23,\r
550 ProcessorFamilyPowerPC604 = 0x24,\r
551 ProcessorFamilyPowerPC620 = 0x25,\r
552 ProcessorFamilyPowerPCx704 = 0x26,\r
553 ProcessorFamilyPowerPC750 = 0x27,\r
554 ProcessorFamilyIntelCoreDuo = 0x28,\r
555 ProcessorFamilyIntelCoreDuoMobile = 0x29,\r
556 ProcessorFamilyIntelCoreSoloMobile = 0x2A,\r
557 ProcessorFamilyIntelAtom = 0x2B,\r
558 ProcessorFamilyIntelCoreM = 0x2C,\r
559 ProcessorFamilyIntelCorem3 = 0x2D,\r
560 ProcessorFamilyIntelCorem5 = 0x2E,\r
561 ProcessorFamilyIntelCorem7 = 0x2F,\r
562 ProcessorFamilyAlpha = 0x30,\r
563 ProcessorFamilyAlpha21064 = 0x31,\r
564 ProcessorFamilyAlpha21066 = 0x32,\r
565 ProcessorFamilyAlpha21164 = 0x33,\r
566 ProcessorFamilyAlpha21164PC = 0x34,\r
567 ProcessorFamilyAlpha21164a = 0x35,\r
568 ProcessorFamilyAlpha21264 = 0x36,\r
569 ProcessorFamilyAlpha21364 = 0x37,\r
570 ProcessorFamilyAmdTurionIIUltraDualCoreMobileM = 0x38,\r
571 ProcessorFamilyAmdTurionIIDualCoreMobileM = 0x39,\r
572 ProcessorFamilyAmdAthlonIIDualCoreM = 0x3A,\r
573 ProcessorFamilyAmdOpteron6100Series = 0x3B,\r
574 ProcessorFamilyAmdOpteron4100Series = 0x3C,\r
575 ProcessorFamilyAmdOpteron6200Series = 0x3D,\r
576 ProcessorFamilyAmdOpteron4200Series = 0x3E,\r
577 ProcessorFamilyAmdFxSeries = 0x3F,\r
578 ProcessorFamilyMips = 0x40,\r
579 ProcessorFamilyMIPSR4000 = 0x41,\r
580 ProcessorFamilyMIPSR4200 = 0x42,\r
581 ProcessorFamilyMIPSR4400 = 0x43,\r
582 ProcessorFamilyMIPSR4600 = 0x44,\r
583 ProcessorFamilyMIPSR10000 = 0x45,\r
584 ProcessorFamilyAmdCSeries = 0x46,\r
585 ProcessorFamilyAmdESeries = 0x47,\r
586 ProcessorFamilyAmdASeries = 0x48, ///< SMBIOS spec 2.8.0 updated the name\r
587 ProcessorFamilyAmdGSeries = 0x49,\r
588 ProcessorFamilyAmdZSeries = 0x4A,\r
589 ProcessorFamilyAmdRSeries = 0x4B,\r
590 ProcessorFamilyAmdOpteron4300 = 0x4C,\r
591 ProcessorFamilyAmdOpteron6300 = 0x4D,\r
592 ProcessorFamilyAmdOpteron3300 = 0x4E,\r
593 ProcessorFamilyAmdFireProSeries = 0x4F,\r
594 ProcessorFamilySparc = 0x50,\r
595 ProcessorFamilySuperSparc = 0x51,\r
596 ProcessorFamilymicroSparcII = 0x52,\r
597 ProcessorFamilymicroSparcIIep = 0x53,\r
598 ProcessorFamilyUltraSparc = 0x54,\r
599 ProcessorFamilyUltraSparcII = 0x55,\r
600 ProcessorFamilyUltraSparcIii = 0x56,\r
601 ProcessorFamilyUltraSparcIII = 0x57,\r
602 ProcessorFamilyUltraSparcIIIi = 0x58,\r
603 ProcessorFamily68040 = 0x60,\r
604 ProcessorFamily68xxx = 0x61,\r
605 ProcessorFamily68000 = 0x62,\r
606 ProcessorFamily68010 = 0x63,\r
607 ProcessorFamily68020 = 0x64,\r
608 ProcessorFamily68030 = 0x65,\r
609 ProcessorFamilyAmdAthlonX4QuadCore = 0x66,\r
610 ProcessorFamilyAmdOpteronX1000Series = 0x67,\r
611 ProcessorFamilyAmdOpteronX2000Series = 0x68,\r
612 ProcessorFamilyAmdOpteronASeries = 0x69,\r
613 ProcessorFamilyAmdOpteronX3000Series = 0x6A,\r
614 ProcessorFamilyAmdZen = 0x6B,\r
615 ProcessorFamilyHobbit = 0x70,\r
616 ProcessorFamilyCrusoeTM5000 = 0x78,\r
617 ProcessorFamilyCrusoeTM3000 = 0x79,\r
618 ProcessorFamilyEfficeonTM8000 = 0x7A,\r
619 ProcessorFamilyWeitek = 0x80,\r
620 ProcessorFamilyItanium = 0x82,\r
621 ProcessorFamilyAmdAthlon64 = 0x83,\r
622 ProcessorFamilyAmdOpteron = 0x84,\r
623 ProcessorFamilyAmdSempron = 0x85,\r
624 ProcessorFamilyAmdTurion64Mobile = 0x86,\r
625 ProcessorFamilyDualCoreAmdOpteron = 0x87,\r
626 ProcessorFamilyAmdAthlon64X2DualCore = 0x88,\r
627 ProcessorFamilyAmdTurion64X2Mobile = 0x89,\r
628 ProcessorFamilyQuadCoreAmdOpteron = 0x8A,\r
629 ProcessorFamilyThirdGenerationAmdOpteron = 0x8B,\r
630 ProcessorFamilyAmdPhenomFxQuadCore = 0x8C,\r
631 ProcessorFamilyAmdPhenomX4QuadCore = 0x8D,\r
632 ProcessorFamilyAmdPhenomX2DualCore = 0x8E,\r
633 ProcessorFamilyAmdAthlonX2DualCore = 0x8F,\r
634 ProcessorFamilyPARISC = 0x90,\r
635 ProcessorFamilyPaRisc8500 = 0x91,\r
636 ProcessorFamilyPaRisc8000 = 0x92,\r
637 ProcessorFamilyPaRisc7300LC = 0x93,\r
638 ProcessorFamilyPaRisc7200 = 0x94,\r
639 ProcessorFamilyPaRisc7100LC = 0x95,\r
640 ProcessorFamilyPaRisc7100 = 0x96,\r
641 ProcessorFamilyV30 = 0xA0,\r
642 ProcessorFamilyQuadCoreIntelXeon3200Series = 0xA1,\r
643 ProcessorFamilyDualCoreIntelXeon3000Series = 0xA2,\r
644 ProcessorFamilyQuadCoreIntelXeon5300Series = 0xA3,\r
645 ProcessorFamilyDualCoreIntelXeon5100Series = 0xA4,\r
646 ProcessorFamilyDualCoreIntelXeon5000Series = 0xA5,\r
647 ProcessorFamilyDualCoreIntelXeonLV = 0xA6,\r
648 ProcessorFamilyDualCoreIntelXeonULV = 0xA7,\r
649 ProcessorFamilyDualCoreIntelXeon7100Series = 0xA8,\r
650 ProcessorFamilyQuadCoreIntelXeon5400Series = 0xA9,\r
651 ProcessorFamilyQuadCoreIntelXeon = 0xAA,\r
652 ProcessorFamilyDualCoreIntelXeon5200Series = 0xAB,\r
653 ProcessorFamilyDualCoreIntelXeon7200Series = 0xAC,\r
654 ProcessorFamilyQuadCoreIntelXeon7300Series = 0xAD,\r
655 ProcessorFamilyQuadCoreIntelXeon7400Series = 0xAE,\r
656 ProcessorFamilyMultiCoreIntelXeon7400Series = 0xAF,\r
657 ProcessorFamilyPentiumIIIXeon = 0xB0,\r
658 ProcessorFamilyPentiumIIISpeedStep = 0xB1,\r
659 ProcessorFamilyPentium4 = 0xB2,\r
660 ProcessorFamilyIntelXeon = 0xB3,\r
661 ProcessorFamilyAS400 = 0xB4,\r
662 ProcessorFamilyIntelXeonMP = 0xB5,\r
663 ProcessorFamilyAMDAthlonXP = 0xB6,\r
664 ProcessorFamilyAMDAthlonMP = 0xB7,\r
665 ProcessorFamilyIntelItanium2 = 0xB8,\r
666 ProcessorFamilyIntelPentiumM = 0xB9,\r
667 ProcessorFamilyIntelCeleronD = 0xBA,\r
668 ProcessorFamilyIntelPentiumD = 0xBB,\r
669 ProcessorFamilyIntelPentiumEx = 0xBC,\r
670 ProcessorFamilyIntelCoreSolo = 0xBD, ///< SMBIOS spec 2.6 updated this value\r
671 ProcessorFamilyReserved = 0xBE,\r
672 ProcessorFamilyIntelCore2 = 0xBF,\r
673 ProcessorFamilyIntelCore2Solo = 0xC0,\r
674 ProcessorFamilyIntelCore2Extreme = 0xC1,\r
675 ProcessorFamilyIntelCore2Quad = 0xC2,\r
676 ProcessorFamilyIntelCore2ExtremeMobile = 0xC3,\r
677 ProcessorFamilyIntelCore2DuoMobile = 0xC4,\r
678 ProcessorFamilyIntelCore2SoloMobile = 0xC5,\r
679 ProcessorFamilyIntelCoreI7 = 0xC6,\r
680 ProcessorFamilyDualCoreIntelCeleron = 0xC7,\r
681 ProcessorFamilyIBM390 = 0xC8,\r
682 ProcessorFamilyG4 = 0xC9,\r
683 ProcessorFamilyG5 = 0xCA,\r
684 ProcessorFamilyG6 = 0xCB,\r
685 ProcessorFamilyzArchitecture = 0xCC,\r
686 ProcessorFamilyIntelCoreI5 = 0xCD,\r
687 ProcessorFamilyIntelCoreI3 = 0xCE,\r
688 ProcessorFamilyViaC7M = 0xD2,\r
689 ProcessorFamilyViaC7D = 0xD3,\r
690 ProcessorFamilyViaC7 = 0xD4,\r
691 ProcessorFamilyViaEden = 0xD5,\r
692 ProcessorFamilyMultiCoreIntelXeon = 0xD6,\r
693 ProcessorFamilyDualCoreIntelXeon3Series = 0xD7,\r
694 ProcessorFamilyQuadCoreIntelXeon3Series = 0xD8,\r
695 ProcessorFamilyViaNano = 0xD9,\r
696 ProcessorFamilyDualCoreIntelXeon5Series = 0xDA,\r
697 ProcessorFamilyQuadCoreIntelXeon5Series = 0xDB,\r
698 ProcessorFamilyDualCoreIntelXeon7Series = 0xDD,\r
699 ProcessorFamilyQuadCoreIntelXeon7Series = 0xDE,\r
700 ProcessorFamilyMultiCoreIntelXeon7Series = 0xDF,\r
701 ProcessorFamilyMultiCoreIntelXeon3400Series = 0xE0,\r
702 ProcessorFamilyAmdOpteron3000Series = 0xE4,\r
703 ProcessorFamilyAmdSempronII = 0xE5,\r
704 ProcessorFamilyEmbeddedAmdOpteronQuadCore = 0xE6,\r
705 ProcessorFamilyAmdPhenomTripleCore = 0xE7,\r
706 ProcessorFamilyAmdTurionUltraDualCoreMobile = 0xE8,\r
707 ProcessorFamilyAmdTurionDualCoreMobile = 0xE9,\r
708 ProcessorFamilyAmdAthlonDualCore = 0xEA,\r
709 ProcessorFamilyAmdSempronSI = 0xEB,\r
710 ProcessorFamilyAmdPhenomII = 0xEC,\r
711 ProcessorFamilyAmdAthlonII = 0xED,\r
712 ProcessorFamilySixCoreAmdOpteron = 0xEE,\r
713 ProcessorFamilyAmdSempronM = 0xEF,\r
714 ProcessorFamilyi860 = 0xFA,\r
715 ProcessorFamilyi960 = 0xFB,\r
716 ProcessorFamilyIndicatorFamily2 = 0xFE,\r
717 ProcessorFamilyReserved1 = 0xFF\r
718} PROCESSOR_FAMILY_DATA;\r
719\r
720///\r
721/// Processor Information2 - Processor Family2.\r
722///\r
723typedef enum {\r
724 ProcessorFamilyARMv7 = 0x0100,\r
725 ProcessorFamilyARMv8 = 0x0101,\r
726 ProcessorFamilySH3 = 0x0104,\r
727 ProcessorFamilySH4 = 0x0105,\r
728 ProcessorFamilyARM = 0x0118,\r
729 ProcessorFamilyStrongARM = 0x0119,\r
730 ProcessorFamily6x86 = 0x012C,\r
731 ProcessorFamilyMediaGX = 0x012D,\r
732 ProcessorFamilyMII = 0x012E,\r
733 ProcessorFamilyWinChip = 0x0140,\r
734 ProcessorFamilyDSP = 0x015E,\r
735 ProcessorFamilyVideoProcessor = 0x01F4\r
736} PROCESSOR_FAMILY2_DATA;\r
737\r
738///\r
739/// Processor Information - Voltage.\r
740///\r
741typedef struct {\r
742 UINT8 ProcessorVoltageCapability5V :1;\r
743 UINT8 ProcessorVoltageCapability3_3V :1;\r
744 UINT8 ProcessorVoltageCapability2_9V :1;\r
745 UINT8 ProcessorVoltageCapabilityReserved :1; ///< Bit 3, must be zero.\r
746 UINT8 ProcessorVoltageReserved :3; ///< Bits 4-6, must be zero.\r
747 UINT8 ProcessorVoltageIndicateLegacy :1;\r
748} PROCESSOR_VOLTAGE;\r
749\r
750///\r
751/// Processor Information - Processor Upgrade.\r
752///\r
753typedef enum {\r
754 ProcessorUpgradeOther = 0x01,\r
755 ProcessorUpgradeUnknown = 0x02,\r
756 ProcessorUpgradeDaughterBoard = 0x03,\r
757 ProcessorUpgradeZIFSocket = 0x04,\r
758 ProcessorUpgradePiggyBack = 0x05, ///< Replaceable.\r
759 ProcessorUpgradeNone = 0x06,\r
760 ProcessorUpgradeLIFSocket = 0x07,\r
761 ProcessorUpgradeSlot1 = 0x08,\r
762 ProcessorUpgradeSlot2 = 0x09,\r
763 ProcessorUpgrade370PinSocket = 0x0A,\r
764 ProcessorUpgradeSlotA = 0x0B,\r
765 ProcessorUpgradeSlotM = 0x0C,\r
766 ProcessorUpgradeSocket423 = 0x0D,\r
767 ProcessorUpgradeSocketA = 0x0E, ///< Socket 462.\r
768 ProcessorUpgradeSocket478 = 0x0F,\r
769 ProcessorUpgradeSocket754 = 0x10,\r
770 ProcessorUpgradeSocket940 = 0x11,\r
771 ProcessorUpgradeSocket939 = 0x12,\r
772 ProcessorUpgradeSocketmPGA604 = 0x13,\r
773 ProcessorUpgradeSocketLGA771 = 0x14,\r
774 ProcessorUpgradeSocketLGA775 = 0x15,\r
775 ProcessorUpgradeSocketS1 = 0x16,\r
776 ProcessorUpgradeAM2 = 0x17,\r
777 ProcessorUpgradeF1207 = 0x18,\r
778 ProcessorSocketLGA1366 = 0x19,\r
779 ProcessorUpgradeSocketG34 = 0x1A,\r
780 ProcessorUpgradeSocketAM3 = 0x1B,\r
781 ProcessorUpgradeSocketC32 = 0x1C,\r
782 ProcessorUpgradeSocketLGA1156 = 0x1D,\r
783 ProcessorUpgradeSocketLGA1567 = 0x1E,\r
784 ProcessorUpgradeSocketPGA988A = 0x1F,\r
785 ProcessorUpgradeSocketBGA1288 = 0x20,\r
786 ProcessorUpgradeSocketrPGA988B = 0x21,\r
787 ProcessorUpgradeSocketBGA1023 = 0x22,\r
788 ProcessorUpgradeSocketBGA1224 = 0x23,\r
789 ProcessorUpgradeSocketLGA1155 = 0x24, ///< SMBIOS spec 2.8.0 updated the name\r
790 ProcessorUpgradeSocketLGA1356 = 0x25,\r
791 ProcessorUpgradeSocketLGA2011 = 0x26,\r
792 ProcessorUpgradeSocketFS1 = 0x27,\r
793 ProcessorUpgradeSocketFS2 = 0x28,\r
794 ProcessorUpgradeSocketFM1 = 0x29,\r
795 ProcessorUpgradeSocketFM2 = 0x2A,\r
796 ProcessorUpgradeSocketLGA2011_3 = 0x2B,\r
797 ProcessorUpgradeSocketLGA1356_3 = 0x2C,\r
798 ProcessorUpgradeSocketLGA1150 = 0x2D,\r
799 ProcessorUpgradeSocketBGA1168 = 0x2E,\r
800 ProcessorUpgradeSocketBGA1234 = 0x2F,\r
801 ProcessorUpgradeSocketBGA1364 = 0x30,\r
802 ProcessorUpgradeSocketAM4 = 0x31,\r
803 ProcessorUpgradeSocketLGA1151 = 0x32,\r
804 ProcessorUpgradeSocketBGA1356 = 0x33,\r
805 ProcessorUpgradeSocketBGA1440 = 0x34,\r
806 ProcessorUpgradeSocketBGA1515 = 0x35,\r
807 ProcessorUpgradeSocketLGA3647_1 = 0x36,\r
808 ProcessorUpgradeSocketSP3 = 0x37,\r
809 ProcessorUpgradeSocketSP3r2 = 0x38\r
810} PROCESSOR_UPGRADE;\r
811\r
812///\r
813/// Processor ID Field Description\r
814///\r
815typedef struct {\r
816 UINT32 ProcessorSteppingId:4;\r
817 UINT32 ProcessorModel: 4;\r
818 UINT32 ProcessorFamily: 4;\r
819 UINT32 ProcessorType: 2;\r
820 UINT32 ProcessorReserved1: 2;\r
821 UINT32 ProcessorXModel: 4;\r
822 UINT32 ProcessorXFamily: 8;\r
823 UINT32 ProcessorReserved2: 4;\r
824} PROCESSOR_SIGNATURE;\r
825\r
826typedef struct {\r
827 UINT32 ProcessorFpu :1;\r
828 UINT32 ProcessorVme :1;\r
829 UINT32 ProcessorDe :1;\r
830 UINT32 ProcessorPse :1;\r
831 UINT32 ProcessorTsc :1;\r
832 UINT32 ProcessorMsr :1;\r
833 UINT32 ProcessorPae :1;\r
834 UINT32 ProcessorMce :1;\r
835 UINT32 ProcessorCx8 :1;\r
836 UINT32 ProcessorApic :1;\r
837 UINT32 ProcessorReserved1 :1;\r
838 UINT32 ProcessorSep :1;\r
839 UINT32 ProcessorMtrr :1;\r
840 UINT32 ProcessorPge :1;\r
841 UINT32 ProcessorMca :1;\r
842 UINT32 ProcessorCmov :1;\r
843 UINT32 ProcessorPat :1;\r
844 UINT32 ProcessorPse36 :1;\r
845 UINT32 ProcessorPsn :1;\r
846 UINT32 ProcessorClfsh :1;\r
847 UINT32 ProcessorReserved2 :1;\r
848 UINT32 ProcessorDs :1;\r
849 UINT32 ProcessorAcpi :1;\r
850 UINT32 ProcessorMmx :1;\r
851 UINT32 ProcessorFxsr :1;\r
852 UINT32 ProcessorSse :1;\r
853 UINT32 ProcessorSse2 :1;\r
854 UINT32 ProcessorSs :1;\r
855 UINT32 ProcessorReserved3 :1;\r
856 UINT32 ProcessorTm :1;\r
857 UINT32 ProcessorReserved4 :2;\r
858} PROCESSOR_FEATURE_FLAGS;\r
859\r
860typedef struct {\r
861 PROCESSOR_SIGNATURE Signature;\r
862 PROCESSOR_FEATURE_FLAGS FeatureFlags;\r
863} PROCESSOR_ID_DATA;\r
864\r
865///\r
866/// Processor Information (Type 4).\r
867///\r
868/// The information in this structure defines the attributes of a single processor;\r
869/// a separate structure instance is provided for each system processor socket/slot.\r
870/// For example, a system with an IntelDX2 processor would have a single\r
871/// structure instance, while a system with an IntelSX2 processor would have a structure\r
872/// to describe the main CPU, and a second structure to describe the 80487 co-processor.\r
873///\r
874typedef struct {\r
875 SMBIOS_STRUCTURE Hdr;\r
876 SMBIOS_TABLE_STRING Socket;\r
877 UINT8 ProcessorType; ///< The enumeration value from PROCESSOR_TYPE_DATA.\r
878 UINT8 ProcessorFamily; ///< The enumeration value from PROCESSOR_FAMILY_DATA.\r
879 SMBIOS_TABLE_STRING ProcessorManufacture;\r
880 PROCESSOR_ID_DATA ProcessorId;\r
881 SMBIOS_TABLE_STRING ProcessorVersion;\r
882 PROCESSOR_VOLTAGE Voltage;\r
883 UINT16 ExternalClock;\r
884 UINT16 MaxSpeed;\r
885 UINT16 CurrentSpeed;\r
886 UINT8 Status;\r
887 UINT8 ProcessorUpgrade; ///< The enumeration value from PROCESSOR_UPGRADE.\r
888 UINT16 L1CacheHandle;\r
889 UINT16 L2CacheHandle;\r
890 UINT16 L3CacheHandle;\r
891 SMBIOS_TABLE_STRING SerialNumber;\r
892 SMBIOS_TABLE_STRING AssetTag;\r
893 SMBIOS_TABLE_STRING PartNumber;\r
894 //\r
895 // Add for smbios 2.5\r
896 //\r
897 UINT8 CoreCount;\r
898 UINT8 EnabledCoreCount;\r
899 UINT8 ThreadCount;\r
900 UINT16 ProcessorCharacteristics;\r
901 //\r
902 // Add for smbios 2.6\r
903 //\r
904 UINT16 ProcessorFamily2;\r
905 //\r
906 // Add for smbios 3.0\r
907 //\r
908 UINT16 CoreCount2;\r
909 UINT16 EnabledCoreCount2;\r
910 UINT16 ThreadCount2;\r
911} SMBIOS_TABLE_TYPE4;\r
912\r
913///\r
914/// Memory Controller Error Detecting Method.\r
915///\r
916typedef enum {\r
917 ErrorDetectingMethodOther = 0x01,\r
918 ErrorDetectingMethodUnknown = 0x02,\r
919 ErrorDetectingMethodNone = 0x03,\r
920 ErrorDetectingMethodParity = 0x04,\r
921 ErrorDetectingMethod32Ecc = 0x05,\r
922 ErrorDetectingMethod64Ecc = 0x06,\r
923 ErrorDetectingMethod128Ecc = 0x07,\r
924 ErrorDetectingMethodCrc = 0x08\r
925} MEMORY_ERROR_DETECT_METHOD;\r
926\r
927///\r
928/// Memory Controller Error Correcting Capability.\r
929///\r
930typedef struct {\r
931 UINT8 Other :1;\r
932 UINT8 Unknown :1;\r
933 UINT8 None :1;\r
934 UINT8 SingleBitErrorCorrect :1;\r
935 UINT8 DoubleBitErrorCorrect :1;\r
936 UINT8 ErrorScrubbing :1;\r
937 UINT8 Reserved :2;\r
938} MEMORY_ERROR_CORRECT_CAPABILITY;\r
939\r
940///\r
941/// Memory Controller Information - Interleave Support.\r
942///\r
943typedef enum {\r
944 MemoryInterleaveOther = 0x01,\r
945 MemoryInterleaveUnknown = 0x02,\r
946 MemoryInterleaveOneWay = 0x03,\r
947 MemoryInterleaveTwoWay = 0x04,\r
948 MemoryInterleaveFourWay = 0x05,\r
949 MemoryInterleaveEightWay = 0x06,\r
950 MemoryInterleaveSixteenWay = 0x07\r
951} MEMORY_SUPPORT_INTERLEAVE_TYPE;\r
952\r
953///\r
954/// Memory Controller Information - Memory Speeds.\r
955///\r
956typedef struct {\r
957 UINT16 Other :1;\r
958 UINT16 Unknown :1;\r
959 UINT16 SeventyNs:1;\r
960 UINT16 SixtyNs :1;\r
961 UINT16 FiftyNs :1;\r
962 UINT16 Reserved :11;\r
963} MEMORY_SPEED_TYPE;\r
964\r
965///\r
966/// Memory Controller Information (Type 5, Obsolete).\r
967///\r
968/// The information in this structure defines the attributes of the system's memory controller(s)\r
969/// and the supported attributes of any memory-modules present in the sockets controlled by\r
970/// this controller.\r
971/// Note: This structure, and its companion Memory Module Information (Type 6, Obsolete),\r
972/// are obsolete starting with version 2.1 of this specification. The Physical Memory Array (Type 16)\r
973/// and Memory Device (Type 17) structures should be used instead. BIOS providers might\r
974/// choose to implement both memory description types to allow existing DMI browsers\r
975/// to properly display the system's memory attributes.\r
976///\r
977typedef struct {\r
978 SMBIOS_STRUCTURE Hdr;\r
979 UINT8 ErrDetectMethod; ///< The enumeration value from MEMORY_ERROR_DETECT_METHOD.\r
980 MEMORY_ERROR_CORRECT_CAPABILITY ErrCorrectCapability;\r
981 UINT8 SupportInterleave; ///< The enumeration value from MEMORY_SUPPORT_INTERLEAVE_TYPE.\r
982 UINT8 CurrentInterleave; ///< The enumeration value from MEMORY_SUPPORT_INTERLEAVE_TYPE .\r
983 UINT8 MaxMemoryModuleSize;\r
984 MEMORY_SPEED_TYPE SupportSpeed;\r
985 UINT16 SupportMemoryType;\r
986 UINT8 MemoryModuleVoltage;\r
987 UINT8 AssociatedMemorySlotNum;\r
988 UINT16 MemoryModuleConfigHandles[1];\r
989} SMBIOS_TABLE_TYPE5;\r
990\r
991///\r
992/// Memory Module Information - Memory Types\r
993///\r
994typedef struct {\r
995 UINT16 Other :1;\r
996 UINT16 Unknown :1;\r
997 UINT16 Standard :1;\r
998 UINT16 FastPageMode:1;\r
999 UINT16 Edo :1;\r
1000 UINT16 Parity :1;\r
1001 UINT16 Ecc :1;\r
1002 UINT16 Simm :1;\r
1003 UINT16 Dimm :1;\r
1004 UINT16 BurstEdo :1;\r
1005 UINT16 Sdram :1;\r
1006 UINT16 Reserved :5;\r
1007} MEMORY_CURRENT_TYPE;\r
1008\r
1009///\r
1010/// Memory Module Information - Memory Size.\r
1011///\r
1012typedef struct {\r
1013 UINT8 InstalledOrEnabledSize :7; ///< Size (n), where 2**n is the size in MB.\r
1014 UINT8 SingleOrDoubleBank :1;\r
1015} MEMORY_INSTALLED_ENABLED_SIZE;\r
1016\r
1017///\r
1018/// Memory Module Information (Type 6, Obsolete)\r
1019///\r
1020/// One Memory Module Information structure is included for each memory-module socket\r
1021/// in the system. The structure describes the speed, type, size, and error status\r
1022/// of each system memory module. The supported attributes of each module are described\r
1023/// by the "owning" Memory Controller Information structure.\r
1024/// Note: This structure, and its companion Memory Controller Information (Type 5, Obsolete),\r
1025/// are obsolete starting with version 2.1 of this specification. The Physical Memory Array (Type 16)\r
1026/// and Memory Device (Type 17) structures should be used instead.\r
1027///\r
1028typedef struct {\r
1029 SMBIOS_STRUCTURE Hdr;\r
1030 SMBIOS_TABLE_STRING SocketDesignation;\r
1031 UINT8 BankConnections;\r
1032 UINT8 CurrentSpeed;\r
1033 MEMORY_CURRENT_TYPE CurrentMemoryType;\r
1034 MEMORY_INSTALLED_ENABLED_SIZE InstalledSize;\r
1035 MEMORY_INSTALLED_ENABLED_SIZE EnabledSize;\r
1036 UINT8 ErrorStatus;\r
1037} SMBIOS_TABLE_TYPE6;\r
1038\r
1039///\r
1040/// Cache Information - SRAM Type.\r
1041///\r
1042typedef struct {\r
1043 UINT16 Other :1;\r
1044 UINT16 Unknown :1;\r
1045 UINT16 NonBurst :1;\r
1046 UINT16 Burst :1;\r
1047 UINT16 PipelineBurst :1;\r
1048 UINT16 Synchronous :1;\r
1049 UINT16 Asynchronous :1;\r
1050 UINT16 Reserved :9;\r
1051} CACHE_SRAM_TYPE_DATA;\r
1052\r
1053///\r
1054/// Cache Information - Error Correction Type.\r
1055///\r
1056typedef enum {\r
1057 CacheErrorOther = 0x01,\r
1058 CacheErrorUnknown = 0x02,\r
1059 CacheErrorNone = 0x03,\r
1060 CacheErrorParity = 0x04,\r
1061 CacheErrorSingleBit = 0x05, ///< ECC\r
1062 CacheErrorMultiBit = 0x06 ///< ECC\r
1063} CACHE_ERROR_TYPE_DATA;\r
1064\r
1065///\r
1066/// Cache Information - System Cache Type.\r
1067///\r
1068typedef enum {\r
1069 CacheTypeOther = 0x01,\r
1070 CacheTypeUnknown = 0x02,\r
1071 CacheTypeInstruction = 0x03,\r
1072 CacheTypeData = 0x04,\r
1073 CacheTypeUnified = 0x05\r
1074} CACHE_TYPE_DATA;\r
1075\r
1076///\r
1077/// Cache Information - Associativity.\r
1078///\r
1079typedef enum {\r
1080 CacheAssociativityOther = 0x01,\r
1081 CacheAssociativityUnknown = 0x02,\r
1082 CacheAssociativityDirectMapped = 0x03,\r
1083 CacheAssociativity2Way = 0x04,\r
1084 CacheAssociativity4Way = 0x05,\r
1085 CacheAssociativityFully = 0x06,\r
1086 CacheAssociativity8Way = 0x07,\r
1087 CacheAssociativity16Way = 0x08,\r
1088 CacheAssociativity12Way = 0x09,\r
1089 CacheAssociativity24Way = 0x0A,\r
1090 CacheAssociativity32Way = 0x0B,\r
1091 CacheAssociativity48Way = 0x0C,\r
1092 CacheAssociativity64Way = 0x0D,\r
1093 CacheAssociativity20Way = 0x0E\r
1094} CACHE_ASSOCIATIVITY_DATA;\r
1095\r
1096///\r
1097/// Cache Information (Type 7).\r
1098///\r
1099/// The information in this structure defines the attributes of CPU cache device in the system.\r
1100/// One structure is specified for each such device, whether the device is internal to\r
1101/// or external to the CPU module. Cache modules can be associated with a processor structure\r
1102/// in one or two ways, depending on the SMBIOS version.\r
1103///\r
1104typedef struct {\r
1105 SMBIOS_STRUCTURE Hdr;\r
1106 SMBIOS_TABLE_STRING SocketDesignation;\r
1107 UINT16 CacheConfiguration;\r
1108 UINT16 MaximumCacheSize;\r
1109 UINT16 InstalledSize;\r
1110 CACHE_SRAM_TYPE_DATA SupportedSRAMType;\r
1111 CACHE_SRAM_TYPE_DATA CurrentSRAMType;\r
1112 UINT8 CacheSpeed;\r
1113 UINT8 ErrorCorrectionType; ///< The enumeration value from CACHE_ERROR_TYPE_DATA.\r
1114 UINT8 SystemCacheType; ///< The enumeration value from CACHE_TYPE_DATA.\r
1115 UINT8 Associativity; ///< The enumeration value from CACHE_ASSOCIATIVITY_DATA.\r
1116 //\r
1117 // Add for smbios 3.1.0\r
1118 //\r
1119 UINT32 MaximumCacheSize2;\r
1120 UINT32 InstalledSize2;\r
1121} SMBIOS_TABLE_TYPE7;\r
1122\r
1123///\r
1124/// Port Connector Information - Connector Types.\r
1125///\r
1126typedef enum {\r
1127 PortConnectorTypeNone = 0x00,\r
1128 PortConnectorTypeCentronics = 0x01,\r
1129 PortConnectorTypeMiniCentronics = 0x02,\r
1130 PortConnectorTypeProprietary = 0x03,\r
1131 PortConnectorTypeDB25Male = 0x04,\r
1132 PortConnectorTypeDB25Female = 0x05,\r
1133 PortConnectorTypeDB15Male = 0x06,\r
1134 PortConnectorTypeDB15Female = 0x07,\r
1135 PortConnectorTypeDB9Male = 0x08,\r
1136 PortConnectorTypeDB9Female = 0x09,\r
1137 PortConnectorTypeRJ11 = 0x0A,\r
1138 PortConnectorTypeRJ45 = 0x0B,\r
1139 PortConnectorType50PinMiniScsi = 0x0C,\r
1140 PortConnectorTypeMiniDin = 0x0D,\r
1141 PortConnectorTypeMicroDin = 0x0E,\r
1142 PortConnectorTypePS2 = 0x0F,\r
1143 PortConnectorTypeInfrared = 0x10,\r
1144 PortConnectorTypeHpHil = 0x11,\r
1145 PortConnectorTypeUsb = 0x12,\r
1146 PortConnectorTypeSsaScsi = 0x13,\r
1147 PortConnectorTypeCircularDin8Male = 0x14,\r
1148 PortConnectorTypeCircularDin8Female = 0x15,\r
1149 PortConnectorTypeOnboardIde = 0x16,\r
1150 PortConnectorTypeOnboardFloppy = 0x17,\r
1151 PortConnectorType9PinDualInline = 0x18,\r
1152 PortConnectorType25PinDualInline = 0x19,\r
1153 PortConnectorType50PinDualInline = 0x1A,\r
1154 PortConnectorType68PinDualInline = 0x1B,\r
1155 PortConnectorTypeOnboardSoundInput = 0x1C,\r
1156 PortConnectorTypeMiniCentronicsType14 = 0x1D,\r
1157 PortConnectorTypeMiniCentronicsType26 = 0x1E,\r
1158 PortConnectorTypeHeadPhoneMiniJack = 0x1F,\r
1159 PortConnectorTypeBNC = 0x20,\r
1160 PortConnectorType1394 = 0x21,\r
1161 PortConnectorTypeSasSata = 0x22,\r
1162 PortConnectorTypePC98 = 0xA0,\r
1163 PortConnectorTypePC98Hireso = 0xA1,\r
1164 PortConnectorTypePCH98 = 0xA2,\r
1165 PortConnectorTypePC98Note = 0xA3,\r
1166 PortConnectorTypePC98Full = 0xA4,\r
1167 PortConnectorTypeOther = 0xFF\r
1168} MISC_PORT_CONNECTOR_TYPE;\r
1169\r
1170///\r
1171/// Port Connector Information - Port Types\r
1172///\r
1173typedef enum {\r
1174 PortTypeNone = 0x00,\r
1175 PortTypeParallelXtAtCompatible = 0x01,\r
1176 PortTypeParallelPortPs2 = 0x02,\r
1177 PortTypeParallelPortEcp = 0x03,\r
1178 PortTypeParallelPortEpp = 0x04,\r
1179 PortTypeParallelPortEcpEpp = 0x05,\r
1180 PortTypeSerialXtAtCompatible = 0x06,\r
1181 PortTypeSerial16450Compatible = 0x07,\r
1182 PortTypeSerial16550Compatible = 0x08,\r
1183 PortTypeSerial16550ACompatible = 0x09,\r
1184 PortTypeScsi = 0x0A,\r
1185 PortTypeMidi = 0x0B,\r
1186 PortTypeJoyStick = 0x0C,\r
1187 PortTypeKeyboard = 0x0D,\r
1188 PortTypeMouse = 0x0E,\r
1189 PortTypeSsaScsi = 0x0F,\r
1190 PortTypeUsb = 0x10,\r
1191 PortTypeFireWire = 0x11,\r
1192 PortTypePcmciaTypeI = 0x12,\r
1193 PortTypePcmciaTypeII = 0x13,\r
1194 PortTypePcmciaTypeIII = 0x14,\r
1195 PortTypeCardBus = 0x15,\r
1196 PortTypeAccessBusPort = 0x16,\r
1197 PortTypeScsiII = 0x17,\r
1198 PortTypeScsiWide = 0x18,\r
1199 PortTypePC98 = 0x19,\r
1200 PortTypePC98Hireso = 0x1A,\r
1201 PortTypePCH98 = 0x1B,\r
1202 PortTypeVideoPort = 0x1C,\r
1203 PortTypeAudioPort = 0x1D,\r
1204 PortTypeModemPort = 0x1E,\r
1205 PortTypeNetworkPort = 0x1F,\r
1206 PortTypeSata = 0x20,\r
1207 PortTypeSas = 0x21,\r
1208 PortType8251Compatible = 0xA0,\r
1209 PortType8251FifoCompatible = 0xA1,\r
1210 PortTypeOther = 0xFF\r
1211} MISC_PORT_TYPE;\r
1212\r
1213///\r
1214/// Port Connector Information (Type 8).\r
1215///\r
1216/// The information in this structure defines the attributes of a system port connector,\r
1217/// e.g. parallel, serial, keyboard, or mouse ports. The port's type and connector information\r
1218/// are provided. One structure is present for each port provided by the system.\r
1219///\r
1220typedef struct {\r
1221 SMBIOS_STRUCTURE Hdr;\r
1222 SMBIOS_TABLE_STRING InternalReferenceDesignator;\r
1223 UINT8 InternalConnectorType; ///< The enumeration value from MISC_PORT_CONNECTOR_TYPE.\r
1224 SMBIOS_TABLE_STRING ExternalReferenceDesignator;\r
1225 UINT8 ExternalConnectorType; ///< The enumeration value from MISC_PORT_CONNECTOR_TYPE.\r
1226 UINT8 PortType; ///< The enumeration value from MISC_PORT_TYPE.\r
1227} SMBIOS_TABLE_TYPE8;\r
1228\r
1229///\r
1230/// System Slots - Slot Type\r
1231///\r
1232typedef enum {\r
1233 SlotTypeOther = 0x01,\r
1234 SlotTypeUnknown = 0x02,\r
1235 SlotTypeIsa = 0x03,\r
1236 SlotTypeMca = 0x04,\r
1237 SlotTypeEisa = 0x05,\r
1238 SlotTypePci = 0x06,\r
1239 SlotTypePcmcia = 0x07,\r
1240 SlotTypeVlVesa = 0x08,\r
1241 SlotTypeProprietary = 0x09,\r
1242 SlotTypeProcessorCardSlot = 0x0A,\r
1243 SlotTypeProprietaryMemoryCardSlot = 0x0B,\r
1244 SlotTypeIORiserCardSlot = 0x0C,\r
1245 SlotTypeNuBus = 0x0D,\r
1246 SlotTypePci66MhzCapable = 0x0E,\r
1247 SlotTypeAgp = 0x0F,\r
1248 SlotTypeApg2X = 0x10,\r
1249 SlotTypeAgp4X = 0x11,\r
1250 SlotTypePciX = 0x12,\r
1251 SlotTypeAgp8X = 0x13,\r
1252 SlotTypeM2Socket1_DP = 0x14,\r
1253 SlotTypeM2Socket1_SD = 0x15,\r
1254 SlotTypeM2Socket2 = 0x16,\r
1255 SlotTypeM2Socket3 = 0x17,\r
1256 SlotTypeMxmTypeI = 0x18,\r
1257 SlotTypeMxmTypeII = 0x19,\r
1258 SlotTypeMxmTypeIIIStandard = 0x1A,\r
1259 SlotTypeMxmTypeIIIHe = 0x1B,\r
1260 SlotTypeMxmTypeIV = 0x1C,\r
1261 SlotTypeMxm30TypeA = 0x1D,\r
1262 SlotTypeMxm30TypeB = 0x1E,\r
1263 SlotTypePciExpressGen2Sff_8639 = 0x1F,\r
1264 SlotTypePciExpressGen3Sff_8639 = 0x20,\r
1265 SlotTypePciExpressMini52pinWithBSKO = 0x21, ///< PCI Express Mini 52-pin (CEM spec. 2.0) with bottom-side keep-outs.\r
1266 SlotTypePciExpressMini52pinWithoutBSKO = 0x22, ///< PCI Express Mini 52-pin (CEM spec. 2.0) without bottom-side keep-outs.\r
1267 SlotTypePciExpressMini76pin = 0x23, ///< PCI Express Mini 76-pin (CEM spec. 2.0) Corresponds to Display-Mini card.\r
1268 SlotTypePC98C20 = 0xA0,\r
1269 SlotTypePC98C24 = 0xA1,\r
1270 SlotTypePC98E = 0xA2,\r
1271 SlotTypePC98LocalBus = 0xA3,\r
1272 SlotTypePC98Card = 0xA4,\r
1273 SlotTypePciExpress = 0xA5,\r
1274 SlotTypePciExpressX1 = 0xA6,\r
1275 SlotTypePciExpressX2 = 0xA7,\r
1276 SlotTypePciExpressX4 = 0xA8,\r
1277 SlotTypePciExpressX8 = 0xA9,\r
1278 SlotTypePciExpressX16 = 0xAA,\r
1279 SlotTypePciExpressGen2 = 0xAB,\r
1280 SlotTypePciExpressGen2X1 = 0xAC,\r
1281 SlotTypePciExpressGen2X2 = 0xAD,\r
1282 SlotTypePciExpressGen2X4 = 0xAE,\r
1283 SlotTypePciExpressGen2X8 = 0xAF,\r
1284 SlotTypePciExpressGen2X16 = 0xB0,\r
1285 SlotTypePciExpressGen3 = 0xB1,\r
1286 SlotTypePciExpressGen3X1 = 0xB2,\r
1287 SlotTypePciExpressGen3X2 = 0xB3,\r
1288 SlotTypePciExpressGen3X4 = 0xB4,\r
1289 SlotTypePciExpressGen3X8 = 0xB5,\r
1290 SlotTypePciExpressGen3X16 = 0xB6\r
1291} MISC_SLOT_TYPE;\r
1292\r
1293///\r
1294/// System Slots - Slot Data Bus Width.\r
1295///\r
1296typedef enum {\r
1297 SlotDataBusWidthOther = 0x01,\r
1298 SlotDataBusWidthUnknown = 0x02,\r
1299 SlotDataBusWidth8Bit = 0x03,\r
1300 SlotDataBusWidth16Bit = 0x04,\r
1301 SlotDataBusWidth32Bit = 0x05,\r
1302 SlotDataBusWidth64Bit = 0x06,\r
1303 SlotDataBusWidth128Bit = 0x07,\r
1304 SlotDataBusWidth1X = 0x08, ///< Or X1\r
1305 SlotDataBusWidth2X = 0x09, ///< Or X2\r
1306 SlotDataBusWidth4X = 0x0A, ///< Or X4\r
1307 SlotDataBusWidth8X = 0x0B, ///< Or X8\r
1308 SlotDataBusWidth12X = 0x0C, ///< Or X12\r
1309 SlotDataBusWidth16X = 0x0D, ///< Or X16\r
1310 SlotDataBusWidth32X = 0x0E ///< Or X32\r
1311} MISC_SLOT_DATA_BUS_WIDTH;\r
1312\r
1313///\r
1314/// System Slots - Current Usage.\r
1315///\r
1316typedef enum {\r
1317 SlotUsageOther = 0x01,\r
1318 SlotUsageUnknown = 0x02,\r
1319 SlotUsageAvailable = 0x03,\r
1320 SlotUsageInUse = 0x04\r
1321} MISC_SLOT_USAGE;\r
1322\r
1323///\r
1324/// System Slots - Slot Length.\r
1325///\r
1326typedef enum {\r
1327 SlotLengthOther = 0x01,\r
1328 SlotLengthUnknown = 0x02,\r
1329 SlotLengthShort = 0x03,\r
1330 SlotLengthLong = 0x04\r
1331} MISC_SLOT_LENGTH;\r
1332\r
1333///\r
1334/// System Slots - Slot Characteristics 1.\r
1335///\r
1336typedef struct {\r
1337 UINT8 CharacteristicsUnknown :1;\r
1338 UINT8 Provides50Volts :1;\r
1339 UINT8 Provides33Volts :1;\r
1340 UINT8 SharedSlot :1;\r
1341 UINT8 PcCard16Supported :1;\r
1342 UINT8 CardBusSupported :1;\r
1343 UINT8 ZoomVideoSupported :1;\r
1344 UINT8 ModemRingResumeSupported:1;\r
1345} MISC_SLOT_CHARACTERISTICS1;\r
1346///\r
1347/// System Slots - Slot Characteristics 2.\r
1348///\r
1349typedef struct {\r
1350 UINT8 PmeSignalSupported :1;\r
1351 UINT8 HotPlugDevicesSupported :1;\r
1352 UINT8 SmbusSignalSupported :1;\r
1353 UINT8 Reserved :5; ///< Set to 0.\r
1354} MISC_SLOT_CHARACTERISTICS2;\r
1355\r
1356///\r
1357/// System Slots (Type 9)\r
1358///\r
1359/// The information in this structure defines the attributes of a system slot.\r
1360/// One structure is provided for each slot in the system.\r
1361///\r
1362///\r
1363typedef struct {\r
1364 SMBIOS_STRUCTURE Hdr;\r
1365 SMBIOS_TABLE_STRING SlotDesignation;\r
1366 UINT8 SlotType; ///< The enumeration value from MISC_SLOT_TYPE.\r
1367 UINT8 SlotDataBusWidth; ///< The enumeration value from MISC_SLOT_DATA_BUS_WIDTH.\r
1368 UINT8 CurrentUsage; ///< The enumeration value from MISC_SLOT_USAGE.\r
1369 UINT8 SlotLength; ///< The enumeration value from MISC_SLOT_LENGTH.\r
1370 UINT16 SlotID;\r
1371 MISC_SLOT_CHARACTERISTICS1 SlotCharacteristics1;\r
1372 MISC_SLOT_CHARACTERISTICS2 SlotCharacteristics2;\r
1373 //\r
1374 // Add for smbios 2.6\r
1375 //\r
1376 UINT16 SegmentGroupNum;\r
1377 UINT8 BusNum;\r
1378 UINT8 DevFuncNum;\r
1379} SMBIOS_TABLE_TYPE9;\r
1380\r
1381///\r
1382/// On Board Devices Information - Device Types.\r
1383///\r
1384typedef enum {\r
1385 OnBoardDeviceTypeOther = 0x01,\r
1386 OnBoardDeviceTypeUnknown = 0x02,\r
1387 OnBoardDeviceTypeVideo = 0x03,\r
1388 OnBoardDeviceTypeScsiController = 0x04,\r
1389 OnBoardDeviceTypeEthernet = 0x05,\r
1390 OnBoardDeviceTypeTokenRing = 0x06,\r
1391 OnBoardDeviceTypeSound = 0x07,\r
1392 OnBoardDeviceTypePATAController = 0x08,\r
1393 OnBoardDeviceTypeSATAController = 0x09,\r
1394 OnBoardDeviceTypeSASController = 0x0A\r
1395} MISC_ONBOARD_DEVICE_TYPE;\r
1396\r
1397///\r
1398/// Device Item Entry\r
1399///\r
1400typedef struct {\r
1401 UINT8 DeviceType; ///< Bit [6:0] - enumeration type of device from MISC_ONBOARD_DEVICE_TYPE.\r
1402 ///< Bit 7 - 1 : device enabled, 0 : device disabled.\r
1403 SMBIOS_TABLE_STRING DescriptionString;\r
1404} DEVICE_STRUCT;\r
1405\r
1406///\r
1407/// On Board Devices Information (Type 10, obsolete).\r
1408///\r
1409/// Note: This structure is obsolete starting with version 2.6 specification; the Onboard Devices Extended\r
1410/// Information (Type 41) structure should be used instead . BIOS providers can choose to implement both\r
1411/// types to allow existing SMBIOS browsers to properly display the system's onboard devices information.\r
1412/// The information in this structure defines the attributes of devices that are onboard (soldered onto)\r
1413/// a system element, usually the baseboard. In general, an entry in this table implies that the BIOS\r
1414/// has some level of control over the enabling of the associated device for use by the system.\r
1415///\r
1416typedef struct {\r
1417 SMBIOS_STRUCTURE Hdr;\r
1418 DEVICE_STRUCT Device[1];\r
1419} SMBIOS_TABLE_TYPE10;\r
1420\r
1421///\r
1422/// OEM Strings (Type 11).\r
1423/// This structure contains free form strings defined by the OEM. Examples of this are:\r
1424/// Part Numbers for Reference Documents for the system, contact information for the manufacturer, etc.\r
1425///\r
1426typedef struct {\r
1427 SMBIOS_STRUCTURE Hdr;\r
1428 UINT8 StringCount;\r
1429} SMBIOS_TABLE_TYPE11;\r
1430\r
1431///\r
1432/// System Configuration Options (Type 12).\r
1433///\r
1434/// This structure contains information required to configure the base board's Jumpers and Switches.\r
1435///\r
1436typedef struct {\r
1437 SMBIOS_STRUCTURE Hdr;\r
1438 UINT8 StringCount;\r
1439} SMBIOS_TABLE_TYPE12;\r
1440\r
1441\r
1442///\r
1443/// BIOS Language Information (Type 13).\r
1444///\r
1445/// The information in this structure defines the installable language attributes of the BIOS.\r
1446///\r
1447typedef struct {\r
1448 SMBIOS_STRUCTURE Hdr;\r
1449 UINT8 InstallableLanguages;\r
1450 UINT8 Flags;\r
1451 UINT8 Reserved[15];\r
1452 SMBIOS_TABLE_STRING CurrentLanguages;\r
1453} SMBIOS_TABLE_TYPE13;\r
1454\r
1455///\r
1456/// Group Item Entry\r
1457///\r
1458typedef struct {\r
1459 UINT8 ItemType;\r
1460 UINT16 ItemHandle;\r
1461} GROUP_STRUCT;\r
1462\r
1463///\r
1464/// Group Associations (Type 14).\r
1465///\r
1466/// The Group Associations structure is provided for OEMs who want to specify\r
1467/// the arrangement or hierarchy of certain components (including other Group Associations)\r
1468/// within the system.\r
1469///\r
1470typedef struct {\r
1471 SMBIOS_STRUCTURE Hdr;\r
1472 SMBIOS_TABLE_STRING GroupName;\r
1473 GROUP_STRUCT Group[1];\r
1474} SMBIOS_TABLE_TYPE14;\r
1475\r
1476///\r
1477/// System Event Log - Event Log Types.\r
1478///\r
1479typedef enum {\r
1480 EventLogTypeReserved = 0x00,\r
1481 EventLogTypeSingleBitECC = 0x01,\r
1482 EventLogTypeMultiBitECC = 0x02,\r
1483 EventLogTypeParityMemErr = 0x03,\r
1484 EventLogTypeBusTimeOut = 0x04,\r
1485 EventLogTypeIOChannelCheck = 0x05,\r
1486 EventLogTypeSoftwareNMI = 0x06,\r
1487 EventLogTypePOSTMemResize = 0x07,\r
1488 EventLogTypePOSTErr = 0x08,\r
1489 EventLogTypePCIParityErr = 0x09,\r
1490 EventLogTypePCISystemErr = 0x0A,\r
1491 EventLogTypeCPUFailure = 0x0B,\r
1492 EventLogTypeEISATimeOut = 0x0C,\r
1493 EventLogTypeMemLogDisabled = 0x0D,\r
1494 EventLogTypeLoggingDisabled = 0x0E,\r
1495 EventLogTypeSysLimitExce = 0x10,\r
1496 EventLogTypeAsyncHWTimer = 0x11,\r
1497 EventLogTypeSysConfigInfo = 0x12,\r
1498 EventLogTypeHDInfo = 0x13,\r
1499 EventLogTypeSysReconfig = 0x14,\r
1500 EventLogTypeUncorrectCPUErr = 0x15,\r
1501 EventLogTypeAreaResetAndClr = 0x16,\r
1502 EventLogTypeSystemBoot = 0x17,\r
1503 EventLogTypeUnused = 0x18, ///< 0x18 - 0x7F\r
1504 EventLogTypeAvailForSys = 0x80, ///< 0x80 - 0xFE\r
1505 EventLogTypeEndOfLog = 0xFF\r
1506} EVENT_LOG_TYPE_DATA;\r
1507\r
1508///\r
1509/// System Event Log - Variable Data Format Types.\r
1510///\r
1511typedef enum {\r
1512 EventLogVariableNone = 0x00,\r
1513 EventLogVariableHandle = 0x01,\r
1514 EventLogVariableMutilEvent = 0x02,\r
1515 EventLogVariableMutilEventHandle = 0x03,\r
1516 EventLogVariablePOSTResultBitmap = 0x04,\r
1517 EventLogVariableSysManagementType = 0x05,\r
1518 EventLogVariableMutliEventSysManagmentType = 0x06,\r
1519 EventLogVariableUnused = 0x07,\r
1520 EventLogVariableOEMAssigned = 0x80\r
1521} EVENT_LOG_VARIABLE_DATA;\r
1522\r
1523///\r
1524/// Event Log Type Descriptors\r
1525///\r
1526typedef struct {\r
1527 UINT8 LogType; ///< The enumeration value from EVENT_LOG_TYPE_DATA.\r
1528 UINT8 DataFormatType;\r
1529} EVENT_LOG_TYPE;\r
1530\r
1531///\r
1532/// System Event Log (Type 15).\r
1533///\r
1534/// The presence of this structure within the SMBIOS data returned for a system indicates\r
1535/// that the system supports an event log. An event log is a fixed-length area within a\r
1536/// non-volatile storage element, starting with a fixed-length (and vendor-specific) header\r
1537/// record, followed by one or more variable-length log records.\r
1538///\r
1539typedef struct {\r
1540 SMBIOS_STRUCTURE Hdr;\r
1541 UINT16 LogAreaLength;\r
1542 UINT16 LogHeaderStartOffset;\r
1543 UINT16 LogDataStartOffset;\r
1544 UINT8 AccessMethod;\r
1545 UINT8 LogStatus;\r
1546 UINT32 LogChangeToken;\r
1547 UINT32 AccessMethodAddress;\r
1548 UINT8 LogHeaderFormat;\r
1549 UINT8 NumberOfSupportedLogTypeDescriptors;\r
1550 UINT8 LengthOfLogTypeDescriptor;\r
1551 EVENT_LOG_TYPE EventLogTypeDescriptors[1];\r
1552} SMBIOS_TABLE_TYPE15;\r
1553\r
1554///\r
1555/// Physical Memory Array - Location.\r
1556///\r
1557typedef enum {\r
1558 MemoryArrayLocationOther = 0x01,\r
1559 MemoryArrayLocationUnknown = 0x02,\r
1560 MemoryArrayLocationSystemBoard = 0x03,\r
1561 MemoryArrayLocationIsaAddonCard = 0x04,\r
1562 MemoryArrayLocationEisaAddonCard = 0x05,\r
1563 MemoryArrayLocationPciAddonCard = 0x06,\r
1564 MemoryArrayLocationMcaAddonCard = 0x07,\r
1565 MemoryArrayLocationPcmciaAddonCard = 0x08,\r
1566 MemoryArrayLocationProprietaryAddonCard = 0x09,\r
1567 MemoryArrayLocationNuBus = 0x0A,\r
1568 MemoryArrayLocationPc98C20AddonCard = 0xA0,\r
1569 MemoryArrayLocationPc98C24AddonCard = 0xA1,\r
1570 MemoryArrayLocationPc98EAddonCard = 0xA2,\r
1571 MemoryArrayLocationPc98LocalBusAddonCard = 0xA3\r
1572} MEMORY_ARRAY_LOCATION;\r
1573\r
1574///\r
1575/// Physical Memory Array - Use.\r
1576///\r
1577typedef enum {\r
1578 MemoryArrayUseOther = 0x01,\r
1579 MemoryArrayUseUnknown = 0x02,\r
1580 MemoryArrayUseSystemMemory = 0x03,\r
1581 MemoryArrayUseVideoMemory = 0x04,\r
1582 MemoryArrayUseFlashMemory = 0x05,\r
1583 MemoryArrayUseNonVolatileRam = 0x06,\r
1584 MemoryArrayUseCacheMemory = 0x07\r
1585} MEMORY_ARRAY_USE;\r
1586\r
1587///\r
1588/// Physical Memory Array - Error Correction Types.\r
1589///\r
1590typedef enum {\r
1591 MemoryErrorCorrectionOther = 0x01,\r
1592 MemoryErrorCorrectionUnknown = 0x02,\r
1593 MemoryErrorCorrectionNone = 0x03,\r
1594 MemoryErrorCorrectionParity = 0x04,\r
1595 MemoryErrorCorrectionSingleBitEcc = 0x05,\r
1596 MemoryErrorCorrectionMultiBitEcc = 0x06,\r
1597 MemoryErrorCorrectionCrc = 0x07\r
1598} MEMORY_ERROR_CORRECTION;\r
1599\r
1600///\r
1601/// Physical Memory Array (Type 16).\r
1602///\r
1603/// This structure describes a collection of memory devices that operate\r
1604/// together to form a memory address space.\r
1605///\r
1606typedef struct {\r
1607 SMBIOS_STRUCTURE Hdr;\r
1608 UINT8 Location; ///< The enumeration value from MEMORY_ARRAY_LOCATION.\r
1609 UINT8 Use; ///< The enumeration value from MEMORY_ARRAY_USE.\r
1610 UINT8 MemoryErrorCorrection; ///< The enumeration value from MEMORY_ERROR_CORRECTION.\r
1611 UINT32 MaximumCapacity;\r
1612 UINT16 MemoryErrorInformationHandle;\r
1613 UINT16 NumberOfMemoryDevices;\r
1614 //\r
1615 // Add for smbios 2.7\r
1616 //\r
1617 UINT64 ExtendedMaximumCapacity;\r
1618} SMBIOS_TABLE_TYPE16;\r
1619\r
1620///\r
1621/// Memory Device - Form Factor.\r
1622///\r
1623typedef enum {\r
1624 MemoryFormFactorOther = 0x01,\r
1625 MemoryFormFactorUnknown = 0x02,\r
1626 MemoryFormFactorSimm = 0x03,\r
1627 MemoryFormFactorSip = 0x04,\r
1628 MemoryFormFactorChip = 0x05,\r
1629 MemoryFormFactorDip = 0x06,\r
1630 MemoryFormFactorZip = 0x07,\r
1631 MemoryFormFactorProprietaryCard = 0x08,\r
1632 MemoryFormFactorDimm = 0x09,\r
1633 MemoryFormFactorTsop = 0x0A,\r
1634 MemoryFormFactorRowOfChips = 0x0B,\r
1635 MemoryFormFactorRimm = 0x0C,\r
1636 MemoryFormFactorSodimm = 0x0D,\r
1637 MemoryFormFactorSrimm = 0x0E,\r
1638 MemoryFormFactorFbDimm = 0x0F\r
1639} MEMORY_FORM_FACTOR;\r
1640\r
1641///\r
1642/// Memory Device - Type\r
1643///\r
1644typedef enum {\r
1645 MemoryTypeOther = 0x01,\r
1646 MemoryTypeUnknown = 0x02,\r
1647 MemoryTypeDram = 0x03,\r
1648 MemoryTypeEdram = 0x04,\r
1649 MemoryTypeVram = 0x05,\r
1650 MemoryTypeSram = 0x06,\r
1651 MemoryTypeRam = 0x07,\r
1652 MemoryTypeRom = 0x08,\r
1653 MemoryTypeFlash = 0x09,\r
1654 MemoryTypeEeprom = 0x0A,\r
1655 MemoryTypeFeprom = 0x0B,\r
1656 MemoryTypeEprom = 0x0C,\r
1657 MemoryTypeCdram = 0x0D,\r
1658 MemoryType3Dram = 0x0E,\r
1659 MemoryTypeSdram = 0x0F,\r
1660 MemoryTypeSgram = 0x10,\r
1661 MemoryTypeRdram = 0x11,\r
1662 MemoryTypeDdr = 0x12,\r
1663 MemoryTypeDdr2 = 0x13,\r
1664 MemoryTypeDdr2FbDimm = 0x14,\r
1665 MemoryTypeDdr3 = 0x18,\r
1666 MemoryTypeFbd2 = 0x19,\r
1667 MemoryTypeDdr4 = 0x1A,\r
1668 MemoryTypeLpddr = 0x1B,\r
1669 MemoryTypeLpddr2 = 0x1C,\r
1670 MemoryTypeLpddr3 = 0x1D,\r
1671 MemoryTypeLpddr4 = 0x1E\r
1672} MEMORY_DEVICE_TYPE;\r
1673\r
1674typedef struct {\r
1675 UINT16 Reserved :1;\r
1676 UINT16 Other :1;\r
1677 UINT16 Unknown :1;\r
1678 UINT16 FastPaged :1;\r
1679 UINT16 StaticColumn :1;\r
1680 UINT16 PseudoStatic :1;\r
1681 UINT16 Rambus :1;\r
1682 UINT16 Synchronous :1;\r
1683 UINT16 Cmos :1;\r
1684 UINT16 Edo :1;\r
1685 UINT16 WindowDram :1;\r
1686 UINT16 CacheDram :1;\r
1687 UINT16 Nonvolatile :1;\r
1688 UINT16 Registered :1;\r
1689 UINT16 Unbuffered :1;\r
1690 UINT16 LrDimm :1;\r
1691} MEMORY_DEVICE_TYPE_DETAIL;\r
1692\r
1693///\r
1694/// Memory Device (Type 17).\r
1695///\r
1696/// This structure describes a single memory device that is part of\r
1697/// a larger Physical Memory Array (Type 16).\r
1698/// Note: If a system includes memory-device sockets, the SMBIOS implementation\r
1699/// includes a Memory Device structure instance for each slot, whether or not the\r
1700/// socket is currently populated.\r
1701///\r
1702typedef struct {\r
1703 SMBIOS_STRUCTURE Hdr;\r
1704 UINT16 MemoryArrayHandle;\r
1705 UINT16 MemoryErrorInformationHandle;\r
1706 UINT16 TotalWidth;\r
1707 UINT16 DataWidth;\r
1708 UINT16 Size;\r
1709 UINT8 FormFactor; ///< The enumeration value from MEMORY_FORM_FACTOR.\r
1710 UINT8 DeviceSet;\r
1711 SMBIOS_TABLE_STRING DeviceLocator;\r
1712 SMBIOS_TABLE_STRING BankLocator;\r
1713 UINT8 MemoryType; ///< The enumeration value from MEMORY_DEVICE_TYPE.\r
1714 MEMORY_DEVICE_TYPE_DETAIL TypeDetail;\r
1715 UINT16 Speed;\r
1716 SMBIOS_TABLE_STRING Manufacturer;\r
1717 SMBIOS_TABLE_STRING SerialNumber;\r
1718 SMBIOS_TABLE_STRING AssetTag;\r
1719 SMBIOS_TABLE_STRING PartNumber;\r
1720 //\r
1721 // Add for smbios 2.6\r
1722 //\r
1723 UINT8 Attributes;\r
1724 //\r
1725 // Add for smbios 2.7\r
1726 //\r
1727 UINT32 ExtendedSize;\r
1728 UINT16 ConfiguredMemoryClockSpeed;\r
1729 //\r
1730 // Add for smbios 2.8.0\r
1731 //\r
1732 UINT16 MinimumVoltage;\r
1733 UINT16 MaximumVoltage;\r
1734 UINT16 ConfiguredVoltage;\r
1735} SMBIOS_TABLE_TYPE17;\r
1736\r
1737///\r
1738/// 32-bit Memory Error Information - Error Type.\r
1739///\r
1740typedef enum {\r
1741 MemoryErrorOther = 0x01,\r
1742 MemoryErrorUnknown = 0x02,\r
1743 MemoryErrorOk = 0x03,\r
1744 MemoryErrorBadRead = 0x04,\r
1745 MemoryErrorParity = 0x05,\r
1746 MemoryErrorSigleBit = 0x06,\r
1747 MemoryErrorDoubleBit = 0x07,\r
1748 MemoryErrorMultiBit = 0x08,\r
1749 MemoryErrorNibble = 0x09,\r
1750 MemoryErrorChecksum = 0x0A,\r
1751 MemoryErrorCrc = 0x0B,\r
1752 MemoryErrorCorrectSingleBit = 0x0C,\r
1753 MemoryErrorCorrected = 0x0D,\r
1754 MemoryErrorUnCorrectable = 0x0E\r
1755} MEMORY_ERROR_TYPE;\r
1756\r
1757///\r
1758/// 32-bit Memory Error Information - Error Granularity.\r
1759///\r
1760typedef enum {\r
1761 MemoryGranularityOther = 0x01,\r
1762 MemoryGranularityOtherUnknown = 0x02,\r
1763 MemoryGranularityDeviceLevel = 0x03,\r
1764 MemoryGranularityMemPartitionLevel = 0x04\r
1765} MEMORY_ERROR_GRANULARITY;\r
1766\r
1767///\r
1768/// 32-bit Memory Error Information - Error Operation.\r
1769///\r
1770typedef enum {\r
1771 MemoryErrorOperationOther = 0x01,\r
1772 MemoryErrorOperationUnknown = 0x02,\r
1773 MemoryErrorOperationRead = 0x03,\r
1774 MemoryErrorOperationWrite = 0x04,\r
1775 MemoryErrorOperationPartialWrite = 0x05\r
1776} MEMORY_ERROR_OPERATION;\r
1777\r
1778///\r
1779/// 32-bit Memory Error Information (Type 18).\r
1780///\r
1781/// This structure identifies the specifics of an error that might be detected\r
1782/// within a Physical Memory Array.\r
1783///\r
1784typedef struct {\r
1785 SMBIOS_STRUCTURE Hdr;\r
1786 UINT8 ErrorType; ///< The enumeration value from MEMORY_ERROR_TYPE.\r
1787 UINT8 ErrorGranularity; ///< The enumeration value from MEMORY_ERROR_GRANULARITY.\r
1788 UINT8 ErrorOperation; ///< The enumeration value from MEMORY_ERROR_OPERATION.\r
1789 UINT32 VendorSyndrome;\r
1790 UINT32 MemoryArrayErrorAddress;\r
1791 UINT32 DeviceErrorAddress;\r
1792 UINT32 ErrorResolution;\r
1793} SMBIOS_TABLE_TYPE18;\r
1794\r
1795///\r
1796/// Memory Array Mapped Address (Type 19).\r
1797///\r
1798/// This structure provides the address mapping for a Physical Memory Array.\r
1799/// One structure is present for each contiguous address range described.\r
1800///\r
1801typedef struct {\r
1802 SMBIOS_STRUCTURE Hdr;\r
1803 UINT32 StartingAddress;\r
1804 UINT32 EndingAddress;\r
1805 UINT16 MemoryArrayHandle;\r
1806 UINT8 PartitionWidth;\r
1807 //\r
1808 // Add for smbios 2.7\r
1809 //\r
1810 UINT64 ExtendedStartingAddress;\r
1811 UINT64 ExtendedEndingAddress;\r
1812} SMBIOS_TABLE_TYPE19;\r
1813\r
1814///\r
1815/// Memory Device Mapped Address (Type 20).\r
1816///\r
1817/// This structure maps memory address space usually to a device-level granularity.\r
1818/// One structure is present for each contiguous address range described.\r
1819///\r
1820typedef struct {\r
1821 SMBIOS_STRUCTURE Hdr;\r
1822 UINT32 StartingAddress;\r
1823 UINT32 EndingAddress;\r
1824 UINT16 MemoryDeviceHandle;\r
1825 UINT16 MemoryArrayMappedAddressHandle;\r
1826 UINT8 PartitionRowPosition;\r
1827 UINT8 InterleavePosition;\r
1828 UINT8 InterleavedDataDepth;\r
1829 //\r
1830 // Add for smbios 2.7\r
1831 //\r
1832 UINT64 ExtendedStartingAddress;\r
1833 UINT64 ExtendedEndingAddress;\r
1834} SMBIOS_TABLE_TYPE20;\r
1835\r
1836///\r
1837/// Built-in Pointing Device - Type\r
1838///\r
1839typedef enum {\r
1840 PointingDeviceTypeOther = 0x01,\r
1841 PointingDeviceTypeUnknown = 0x02,\r
1842 PointingDeviceTypeMouse = 0x03,\r
1843 PointingDeviceTypeTrackBall = 0x04,\r
1844 PointingDeviceTypeTrackPoint = 0x05,\r
1845 PointingDeviceTypeGlidePoint = 0x06,\r
1846 PointingDeviceTouchPad = 0x07,\r
1847 PointingDeviceTouchScreen = 0x08,\r
1848 PointingDeviceOpticalSensor = 0x09\r
1849} BUILTIN_POINTING_DEVICE_TYPE;\r
1850\r
1851///\r
1852/// Built-in Pointing Device - Interface.\r
1853///\r
1854typedef enum {\r
1855 PointingDeviceInterfaceOther = 0x01,\r
1856 PointingDeviceInterfaceUnknown = 0x02,\r
1857 PointingDeviceInterfaceSerial = 0x03,\r
1858 PointingDeviceInterfacePs2 = 0x04,\r
1859 PointingDeviceInterfaceInfrared = 0x05,\r
1860 PointingDeviceInterfaceHpHil = 0x06,\r
1861 PointingDeviceInterfaceBusMouse = 0x07,\r
1862 PointingDeviceInterfaceADB = 0x08,\r
1863 PointingDeviceInterfaceBusMouseDB9 = 0xA0,\r
1864 PointingDeviceInterfaceBusMouseMicroDin = 0xA1,\r
1865 PointingDeviceInterfaceUsb = 0xA2\r
1866} BUILTIN_POINTING_DEVICE_INTERFACE;\r
1867\r
1868///\r
1869/// Built-in Pointing Device (Type 21).\r
1870///\r
1871/// This structure describes the attributes of the built-in pointing device for the\r
1872/// system. The presence of this structure does not imply that the built-in\r
1873/// pointing device is active for the system's use!\r
1874///\r
1875typedef struct {\r
1876 SMBIOS_STRUCTURE Hdr;\r
1877 UINT8 Type; ///< The enumeration value from BUILTIN_POINTING_DEVICE_TYPE.\r
1878 UINT8 Interface; ///< The enumeration value from BUILTIN_POINTING_DEVICE_INTERFACE.\r
1879 UINT8 NumberOfButtons;\r
1880} SMBIOS_TABLE_TYPE21;\r
1881\r
1882///\r
1883/// Portable Battery - Device Chemistry\r
1884///\r
1885typedef enum {\r
1886 PortableBatteryDeviceChemistryOther = 0x01,\r
1887 PortableBatteryDeviceChemistryUnknown = 0x02,\r
1888 PortableBatteryDeviceChemistryLeadAcid = 0x03,\r
1889 PortableBatteryDeviceChemistryNickelCadmium = 0x04,\r
1890 PortableBatteryDeviceChemistryNickelMetalHydride = 0x05,\r
1891 PortableBatteryDeviceChemistryLithiumIon = 0x06,\r
1892 PortableBatteryDeviceChemistryZincAir = 0x07,\r
1893 PortableBatteryDeviceChemistryLithiumPolymer = 0x08\r
1894} PORTABLE_BATTERY_DEVICE_CHEMISTRY;\r
1895\r
1896///\r
1897/// Portable Battery (Type 22).\r
1898///\r
1899/// This structure describes the attributes of the portable battery(s) for the system.\r
1900/// The structure contains the static attributes for the group. Each structure describes\r
1901/// a single battery pack's attributes.\r
1902///\r
1903typedef struct {\r
1904 SMBIOS_STRUCTURE Hdr;\r
1905 SMBIOS_TABLE_STRING Location;\r
1906 SMBIOS_TABLE_STRING Manufacturer;\r
1907 SMBIOS_TABLE_STRING ManufactureDate;\r
1908 SMBIOS_TABLE_STRING SerialNumber;\r
1909 SMBIOS_TABLE_STRING DeviceName;\r
1910 UINT8 DeviceChemistry; ///< The enumeration value from PORTABLE_BATTERY_DEVICE_CHEMISTRY.\r
1911 UINT16 DeviceCapacity;\r
1912 UINT16 DesignVoltage;\r
1913 SMBIOS_TABLE_STRING SBDSVersionNumber;\r
1914 UINT8 MaximumErrorInBatteryData;\r
1915 UINT16 SBDSSerialNumber;\r
1916 UINT16 SBDSManufactureDate;\r
1917 SMBIOS_TABLE_STRING SBDSDeviceChemistry;\r
1918 UINT8 DesignCapacityMultiplier;\r
1919 UINT32 OEMSpecific;\r
1920} SMBIOS_TABLE_TYPE22;\r
1921\r
1922///\r
1923/// System Reset (Type 23)\r
1924///\r
1925/// This structure describes whether Automatic System Reset functions enabled (Status).\r
1926/// If the system has a watchdog Timer and the timer is not reset (Timer Reset)\r
1927/// before the Interval elapses, an automatic system reset will occur. The system will re-boot\r
1928/// according to the Boot Option. This function may repeat until the Limit is reached, at which time\r
1929/// the system will re-boot according to the Boot Option at Limit.\r
1930///\r
1931typedef struct {\r
1932 SMBIOS_STRUCTURE Hdr;\r
1933 UINT8 Capabilities;\r
1934 UINT16 ResetCount;\r
1935 UINT16 ResetLimit;\r
1936 UINT16 TimerInterval;\r
1937 UINT16 Timeout;\r
1938} SMBIOS_TABLE_TYPE23;\r
1939\r
1940///\r
1941/// Hardware Security (Type 24).\r
1942///\r
1943/// This structure describes the system-wide hardware security settings.\r
1944///\r
1945typedef struct {\r
1946 SMBIOS_STRUCTURE Hdr;\r
1947 UINT8 HardwareSecuritySettings;\r
1948} SMBIOS_TABLE_TYPE24;\r
1949\r
1950///\r
1951/// System Power Controls (Type 25).\r
1952///\r
1953/// This structure describes the attributes for controlling the main power supply to the system.\r
1954/// Software that interprets this structure uses the month, day, hour, minute, and second values\r
1955/// to determine the number of seconds until the next power-on of the system. The presence of\r
1956/// this structure implies that a timed power-on facility is available for the system.\r
1957///\r
1958typedef struct {\r
1959 SMBIOS_STRUCTURE Hdr;\r
1960 UINT8 NextScheduledPowerOnMonth;\r
1961 UINT8 NextScheduledPowerOnDayOfMonth;\r
1962 UINT8 NextScheduledPowerOnHour;\r
1963 UINT8 NextScheduledPowerOnMinute;\r
1964 UINT8 NextScheduledPowerOnSecond;\r
1965} SMBIOS_TABLE_TYPE25;\r
1966\r
1967///\r
1968/// Voltage Probe - Location and Status.\r
1969///\r
1970typedef struct {\r
1971 UINT8 VoltageProbeSite :5;\r
1972 UINT8 VoltageProbeStatus :3;\r
1973} MISC_VOLTAGE_PROBE_LOCATION;\r
1974\r
1975///\r
1976/// Voltage Probe (Type 26)\r
1977///\r
1978/// This describes the attributes for a voltage probe in the system.\r
1979/// Each structure describes a single voltage probe.\r
1980///\r
1981typedef struct {\r
1982 SMBIOS_STRUCTURE Hdr;\r
1983 SMBIOS_TABLE_STRING Description;\r
1984 MISC_VOLTAGE_PROBE_LOCATION LocationAndStatus;\r
1985 UINT16 MaximumValue;\r
1986 UINT16 MinimumValue;\r
1987 UINT16 Resolution;\r
1988 UINT16 Tolerance;\r
1989 UINT16 Accuracy;\r
1990 UINT32 OEMDefined;\r
1991 UINT16 NominalValue;\r
1992} SMBIOS_TABLE_TYPE26;\r
1993\r
1994///\r
1995/// Cooling Device - Device Type and Status.\r
1996///\r
1997typedef struct {\r
1998 UINT8 CoolingDevice :5;\r
1999 UINT8 CoolingDeviceStatus :3;\r
2000} MISC_COOLING_DEVICE_TYPE;\r
2001\r
2002///\r
2003/// Cooling Device (Type 27)\r
2004///\r
2005/// This structure describes the attributes for a cooling device in the system.\r
2006/// Each structure describes a single cooling device.\r
2007///\r
2008typedef struct {\r
2009 SMBIOS_STRUCTURE Hdr;\r
2010 UINT16 TemperatureProbeHandle;\r
2011 MISC_COOLING_DEVICE_TYPE DeviceTypeAndStatus;\r
2012 UINT8 CoolingUnitGroup;\r
2013 UINT32 OEMDefined;\r
2014 UINT16 NominalSpeed;\r
2015 //\r
2016 // Add for smbios 2.7\r
2017 //\r
2018 SMBIOS_TABLE_STRING Description;\r
2019} SMBIOS_TABLE_TYPE27;\r
2020\r
2021///\r
2022/// Temperature Probe - Location and Status.\r
2023///\r
2024typedef struct {\r
2025 UINT8 TemperatureProbeSite :5;\r
2026 UINT8 TemperatureProbeStatus :3;\r
2027} MISC_TEMPERATURE_PROBE_LOCATION;\r
2028\r
2029///\r
2030/// Temperature Probe (Type 28).\r
2031///\r
2032/// This structure describes the attributes for a temperature probe in the system.\r
2033/// Each structure describes a single temperature probe.\r
2034///\r
2035typedef struct {\r
2036 SMBIOS_STRUCTURE Hdr;\r
2037 SMBIOS_TABLE_STRING Description;\r
2038 MISC_TEMPERATURE_PROBE_LOCATION LocationAndStatus;\r
2039 UINT16 MaximumValue;\r
2040 UINT16 MinimumValue;\r
2041 UINT16 Resolution;\r
2042 UINT16 Tolerance;\r
2043 UINT16 Accuracy;\r
2044 UINT32 OEMDefined;\r
2045 UINT16 NominalValue;\r
2046} SMBIOS_TABLE_TYPE28;\r
2047\r
2048///\r
2049/// Electrical Current Probe - Location and Status.\r
2050///\r
2051typedef struct {\r
2052 UINT8 ElectricalCurrentProbeSite :5;\r
2053 UINT8 ElectricalCurrentProbeStatus :3;\r
2054} MISC_ELECTRICAL_CURRENT_PROBE_LOCATION;\r
2055\r
2056///\r
2057/// Electrical Current Probe (Type 29).\r
2058///\r
2059/// This structure describes the attributes for an electrical current probe in the system.\r
2060/// Each structure describes a single electrical current probe.\r
2061///\r
2062typedef struct {\r
2063 SMBIOS_STRUCTURE Hdr;\r
2064 SMBIOS_TABLE_STRING Description;\r
2065 MISC_ELECTRICAL_CURRENT_PROBE_LOCATION LocationAndStatus;\r
2066 UINT16 MaximumValue;\r
2067 UINT16 MinimumValue;\r
2068 UINT16 Resolution;\r
2069 UINT16 Tolerance;\r
2070 UINT16 Accuracy;\r
2071 UINT32 OEMDefined;\r
2072 UINT16 NominalValue;\r
2073} SMBIOS_TABLE_TYPE29;\r
2074\r
2075///\r
2076/// Out-of-Band Remote Access (Type 30).\r
2077///\r
2078/// This structure describes the attributes and policy settings of a hardware facility\r
2079/// that may be used to gain remote access to a hardware system when the operating system\r
2080/// is not available due to power-down status, hardware failures, or boot failures.\r
2081///\r
2082typedef struct {\r
2083 SMBIOS_STRUCTURE Hdr;\r
2084 SMBIOS_TABLE_STRING ManufacturerName;\r
2085 UINT8 Connections;\r
2086} SMBIOS_TABLE_TYPE30;\r
2087\r
2088///\r
2089/// Boot Integrity Services (BIS) Entry Point (Type 31).\r
2090///\r
2091/// Structure type 31 (decimal) is reserved for use by the Boot Integrity Services (BIS).\r
2092///\r
2093typedef struct {\r
2094 SMBIOS_STRUCTURE Hdr;\r
2095 UINT8 Checksum;\r
2096 UINT8 Reserved1;\r
2097 UINT16 Reserved2;\r
2098 UINT32 BisEntry16;\r
2099 UINT32 BisEntry32;\r
2100 UINT64 Reserved3;\r
2101 UINT32 Reserved4;\r
2102} SMBIOS_TABLE_TYPE31;\r
2103\r
2104///\r
2105/// System Boot Information - System Boot Status.\r
2106///\r
2107typedef enum {\r
2108 BootInformationStatusNoError = 0x00,\r
2109 BootInformationStatusNoBootableMedia = 0x01,\r
2110 BootInformationStatusNormalOSFailedLoading = 0x02,\r
2111 BootInformationStatusFirmwareDetectedFailure = 0x03,\r
2112 BootInformationStatusOSDetectedFailure = 0x04,\r
2113 BootInformationStatusUserRequestedBoot = 0x05,\r
2114 BootInformationStatusSystemSecurityViolation = 0x06,\r
2115 BootInformationStatusPreviousRequestedImage = 0x07,\r
2116 BootInformationStatusWatchdogTimerExpired = 0x08,\r
2117 BootInformationStatusStartReserved = 0x09,\r
2118 BootInformationStatusStartOemSpecific = 0x80,\r
2119 BootInformationStatusStartProductSpecific = 0xC0\r
2120} MISC_BOOT_INFORMATION_STATUS_DATA_TYPE;\r
2121\r
2122///\r
2123/// System Boot Information (Type 32).\r
2124///\r
2125/// The client system firmware, e.g. BIOS, communicates the System Boot Status to the\r
2126/// client's Pre-boot Execution Environment (PXE) boot image or OS-present management\r
2127/// application via this structure. When used in the PXE environment, for example,\r
2128/// this code identifies the reason the PXE was initiated and can be used by boot-image\r
2129/// software to further automate an enterprise's PXE sessions. For example, an enterprise\r
2130/// could choose to automatically download a hardware-diagnostic image to a client whose\r
2131/// reason code indicated either a firmware- or operating system-detected hardware failure.\r
2132///\r
2133typedef struct {\r
2134 SMBIOS_STRUCTURE Hdr;\r
2135 UINT8 Reserved[6];\r
2136 UINT8 BootStatus; ///< The enumeration value from MISC_BOOT_INFORMATION_STATUS_DATA_TYPE.\r
2137} SMBIOS_TABLE_TYPE32;\r
2138\r
2139///\r
2140/// 64-bit Memory Error Information (Type 33).\r
2141///\r
2142/// This structure describes an error within a Physical Memory Array,\r
2143/// when the error address is above 4G (0xFFFFFFFF).\r
2144///\r
2145typedef struct {\r
2146 SMBIOS_STRUCTURE Hdr;\r
2147 UINT8 ErrorType; ///< The enumeration value from MEMORY_ERROR_TYPE.\r
2148 UINT8 ErrorGranularity; ///< The enumeration value from MEMORY_ERROR_GRANULARITY.\r
2149 UINT8 ErrorOperation; ///< The enumeration value from MEMORY_ERROR_OPERATION.\r
2150 UINT32 VendorSyndrome;\r
2151 UINT64 MemoryArrayErrorAddress;\r
2152 UINT64 DeviceErrorAddress;\r
2153 UINT32 ErrorResolution;\r
2154} SMBIOS_TABLE_TYPE33;\r
2155\r
2156///\r
2157/// Management Device - Type.\r
2158///\r
2159typedef enum {\r
2160 ManagementDeviceTypeOther = 0x01,\r
2161 ManagementDeviceTypeUnknown = 0x02,\r
2162 ManagementDeviceTypeLm75 = 0x03,\r
2163 ManagementDeviceTypeLm78 = 0x04,\r
2164 ManagementDeviceTypeLm79 = 0x05,\r
2165 ManagementDeviceTypeLm80 = 0x06,\r
2166 ManagementDeviceTypeLm81 = 0x07,\r
2167 ManagementDeviceTypeAdm9240 = 0x08,\r
2168 ManagementDeviceTypeDs1780 = 0x09,\r
2169 ManagementDeviceTypeMaxim1617 = 0x0A,\r
2170 ManagementDeviceTypeGl518Sm = 0x0B,\r
2171 ManagementDeviceTypeW83781D = 0x0C,\r
2172 ManagementDeviceTypeHt82H791 = 0x0D\r
2173} MISC_MANAGEMENT_DEVICE_TYPE;\r
2174\r
2175///\r
2176/// Management Device - Address Type.\r
2177///\r
2178typedef enum {\r
2179 ManagementDeviceAddressTypeOther = 0x01,\r
2180 ManagementDeviceAddressTypeUnknown = 0x02,\r
2181 ManagementDeviceAddressTypeIOPort = 0x03,\r
2182 ManagementDeviceAddressTypeMemory = 0x04,\r
2183 ManagementDeviceAddressTypeSmbus = 0x05\r
2184} MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE;\r
2185\r
2186///\r
2187/// Management Device (Type 34).\r
2188///\r
2189/// The information in this structure defines the attributes of a Management Device.\r
2190/// A Management Device might control one or more fans or voltage, current, or temperature\r
2191/// probes as defined by one or more Management Device Component structures.\r
2192///\r
2193typedef struct {\r
2194 SMBIOS_STRUCTURE Hdr;\r
2195 SMBIOS_TABLE_STRING Description;\r
2196 UINT8 Type; ///< The enumeration value from MISC_MANAGEMENT_DEVICE_TYPE.\r
2197 UINT32 Address;\r
2198 UINT8 AddressType; ///< The enumeration value from MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE.\r
2199} SMBIOS_TABLE_TYPE34;\r
2200\r
2201///\r
2202/// Management Device Component (Type 35)\r
2203///\r
2204/// This structure associates a cooling device or environmental probe with structures\r
2205/// that define the controlling hardware device and (optionally) the component's thresholds.\r
2206///\r
2207typedef struct {\r
2208 SMBIOS_STRUCTURE Hdr;\r
2209 SMBIOS_TABLE_STRING Description;\r
2210 UINT16 ManagementDeviceHandle;\r
2211 UINT16 ComponentHandle;\r
2212 UINT16 ThresholdHandle;\r
2213} SMBIOS_TABLE_TYPE35;\r
2214\r
2215///\r
2216/// Management Device Threshold Data (Type 36).\r
2217///\r
2218/// The information in this structure defines threshold information for\r
2219/// a component (probe or cooling-unit) contained within a Management Device.\r
2220///\r
2221typedef struct {\r
2222 SMBIOS_STRUCTURE Hdr;\r
2223 UINT16 LowerThresholdNonCritical;\r
2224 UINT16 UpperThresholdNonCritical;\r
2225 UINT16 LowerThresholdCritical;\r
2226 UINT16 UpperThresholdCritical;\r
2227 UINT16 LowerThresholdNonRecoverable;\r
2228 UINT16 UpperThresholdNonRecoverable;\r
2229} SMBIOS_TABLE_TYPE36;\r
2230\r
2231///\r
2232/// Memory Channel Entry.\r
2233///\r
2234typedef struct {\r
2235 UINT8 DeviceLoad;\r
2236 UINT16 DeviceHandle;\r
2237} MEMORY_DEVICE;\r
2238\r
2239///\r
2240/// Memory Channel - Channel Type.\r
2241///\r
2242typedef enum {\r
2243 MemoryChannelTypeOther = 0x01,\r
2244 MemoryChannelTypeUnknown = 0x02,\r
2245 MemoryChannelTypeRambus = 0x03,\r
2246 MemoryChannelTypeSyncLink = 0x04\r
2247} MEMORY_CHANNEL_TYPE;\r
2248\r
2249///\r
2250/// Memory Channel (Type 37)\r
2251///\r
2252/// The information in this structure provides the correlation between a Memory Channel\r
2253/// and its associated Memory Devices. Each device presents one or more loads to the channel.\r
2254/// The sum of all device loads cannot exceed the channel's defined maximum.\r
2255///\r
2256typedef struct {\r
2257 SMBIOS_STRUCTURE Hdr;\r
2258 UINT8 ChannelType;\r
2259 UINT8 MaximumChannelLoad;\r
2260 UINT8 MemoryDeviceCount;\r
2261 MEMORY_DEVICE MemoryDevice[1];\r
2262} SMBIOS_TABLE_TYPE37;\r
2263\r
2264///\r
2265/// IPMI Device Information - BMC Interface Type\r
2266///\r
2267typedef enum {\r
2268 IPMIDeviceInfoInterfaceTypeUnknown = 0x00,\r
2269 IPMIDeviceInfoInterfaceTypeKCS = 0x01, ///< The Keyboard Controller Style.\r
2270 IPMIDeviceInfoInterfaceTypeSMIC = 0x02, ///< The Server Management Interface Chip.\r
2271 IPMIDeviceInfoInterfaceTypeBT = 0x03, ///< The Block Transfer\r
2272 IPMIDeviceInfoInterfaceTypeReserved = 0x04\r
2273} BMC_INTERFACE_TYPE;\r
2274\r
2275///\r
2276/// IPMI Device Information (Type 38).\r
2277///\r
2278/// The information in this structure defines the attributes of an\r
2279/// Intelligent Platform Management Interface (IPMI) Baseboard Management Controller (BMC).\r
2280///\r
2281/// The Type 42 structure can also be used to describe a physical management controller\r
2282/// host interface and one or more protocols that share that interface. If IPMI is not\r
2283/// shared with other protocols, either the Type 38 or Type 42 structures can be used.\r
2284/// Providing Type 38 is recommended for backward compatibility.\r
2285///\r
2286typedef struct {\r
2287 SMBIOS_STRUCTURE Hdr;\r
2288 UINT8 InterfaceType; ///< The enumeration value from BMC_INTERFACE_TYPE.\r
2289 UINT8 IPMISpecificationRevision;\r
2290 UINT8 I2CSlaveAddress;\r
2291 UINT8 NVStorageDeviceAddress;\r
2292 UINT64 BaseAddress;\r
2293 UINT8 BaseAddressModifier_InterruptInfo;\r
2294 UINT8 InterruptNumber;\r
2295} SMBIOS_TABLE_TYPE38;\r
2296\r
2297///\r
2298/// System Power Supply - Power Supply Characteristics.\r
2299///\r
2300typedef struct {\r
2301 UINT16 PowerSupplyHotReplaceable:1;\r
2302 UINT16 PowerSupplyPresent :1;\r
2303 UINT16 PowerSupplyUnplugged :1;\r
2304 UINT16 InputVoltageRangeSwitch :4;\r
2305 UINT16 PowerSupplyStatus :3;\r
2306 UINT16 PowerSupplyType :4;\r
2307 UINT16 Reserved :2;\r
2308} SYS_POWER_SUPPLY_CHARACTERISTICS;\r
2309\r
2310///\r
2311/// System Power Supply (Type 39).\r
2312///\r
2313/// This structure identifies attributes of a system power supply. One instance\r
2314/// of this record is present for each possible power supply in a system.\r
2315///\r
2316typedef struct {\r
2317 SMBIOS_STRUCTURE Hdr;\r
2318 UINT8 PowerUnitGroup;\r
2319 SMBIOS_TABLE_STRING Location;\r
2320 SMBIOS_TABLE_STRING DeviceName;\r
2321 SMBIOS_TABLE_STRING Manufacturer;\r
2322 SMBIOS_TABLE_STRING SerialNumber;\r
2323 SMBIOS_TABLE_STRING AssetTagNumber;\r
2324 SMBIOS_TABLE_STRING ModelPartNumber;\r
2325 SMBIOS_TABLE_STRING RevisionLevel;\r
2326 UINT16 MaxPowerCapacity;\r
2327 SYS_POWER_SUPPLY_CHARACTERISTICS PowerSupplyCharacteristics;\r
2328 UINT16 InputVoltageProbeHandle;\r
2329 UINT16 CoolingDeviceHandle;\r
2330 UINT16 InputCurrentProbeHandle;\r
2331} SMBIOS_TABLE_TYPE39;\r
2332\r
2333///\r
2334/// Additional Information Entry Format.\r
2335///\r
2336typedef struct {\r
2337 UINT8 EntryLength;\r
2338 UINT16 ReferencedHandle;\r
2339 UINT8 ReferencedOffset;\r
2340 SMBIOS_TABLE_STRING EntryString;\r
2341 UINT8 Value[1];\r
2342}ADDITIONAL_INFORMATION_ENTRY;\r
2343\r
2344///\r
2345/// Additional Information (Type 40).\r
2346///\r
2347/// This structure is intended to provide additional information for handling unspecified\r
2348/// enumerated values and interim field updates in another structure.\r
2349///\r
2350typedef struct {\r
2351 SMBIOS_STRUCTURE Hdr;\r
2352 UINT8 NumberOfAdditionalInformationEntries;\r
2353 ADDITIONAL_INFORMATION_ENTRY AdditionalInfoEntries[1];\r
2354} SMBIOS_TABLE_TYPE40;\r
2355\r
2356///\r
2357/// Onboard Devices Extended Information - Onboard Device Types.\r
2358///\r
2359typedef enum{\r
2360 OnBoardDeviceExtendedTypeOther = 0x01,\r
2361 OnBoardDeviceExtendedTypeUnknown = 0x02,\r
2362 OnBoardDeviceExtendedTypeVideo = 0x03,\r
2363 OnBoardDeviceExtendedTypeScsiController = 0x04,\r
2364 OnBoardDeviceExtendedTypeEthernet = 0x05,\r
2365 OnBoardDeviceExtendedTypeTokenRing = 0x06,\r
2366 OnBoardDeviceExtendedTypeSound = 0x07,\r
2367 OnBoardDeviceExtendedTypePATAController = 0x08,\r
2368 OnBoardDeviceExtendedTypeSATAController = 0x09,\r
2369 OnBoardDeviceExtendedTypeSASController = 0x0A\r
2370} ONBOARD_DEVICE_EXTENDED_INFO_TYPE;\r
2371\r
2372///\r
2373/// Onboard Devices Extended Information (Type 41).\r
2374///\r
2375/// The information in this structure defines the attributes of devices that\r
2376/// are onboard (soldered onto) a system element, usually the baseboard.\r
2377/// In general, an entry in this table implies that the BIOS has some level of\r
2378/// control over the enabling of the associated device for use by the system.\r
2379///\r
2380typedef struct {\r
2381 SMBIOS_STRUCTURE Hdr;\r
2382 SMBIOS_TABLE_STRING ReferenceDesignation;\r
2383 UINT8 DeviceType; ///< The enumeration value from ONBOARD_DEVICE_EXTENDED_INFO_TYPE\r
2384 UINT8 DeviceTypeInstance;\r
2385 UINT16 SegmentGroupNum;\r
2386 UINT8 BusNum;\r
2387 UINT8 DevFuncNum;\r
2388} SMBIOS_TABLE_TYPE41;\r
2389\r
2390///\r
2391/// Management Controller Host Interface - Interface Types.\r
2392/// 00h - 3Fh: MCTP Host Interfaces\r
2393///\r
2394typedef enum{\r
2395 MCHostInterfaceTypeNetworkHostInterface = 0x40,\r
2396 MCHostInterfaceTypeOemDefined = 0xF0\r
2397} MC_HOST_INTERFACE_TYPE;\r
2398\r
2399///\r
2400/// Management Controller Host Interface - Protocol Types.\r
2401///\r
2402typedef enum{\r
2403 MCHostInterfaceProtocolTypeIPMI = 0x02,\r
2404 MCHostInterfaceProtocolTypeMCTP = 0x03,\r
2405 MCHostInterfaceProtocolTypeRedfishOverIP = 0x04,\r
2406 MCHostInterfaceProtocolTypeOemDefined = 0xF0\r
2407} MC_HOST_INTERFACE_PROTOCOL_TYPE;\r
2408\r
2409///\r
2410/// Management Controller Host Interface (Type 42).\r
2411///\r
2412/// The information in this structure defines the attributes of a Management\r
2413/// Controller Host Interface that is not discoverable by "Plug and Play" mechanisms.\r
2414///\r
2415/// Type 42 should be used for management controller host interfaces that use protocols\r
2416/// other than IPMI or that use multiple protocols on a single host interface type.\r
2417///\r
2418/// This structure should also be provided if IPMI is shared with other protocols\r
2419/// over the same interface hardware. If IPMI is not shared with other protocols,\r
2420/// either the Type 38 or Type 42 structures can be used. Providing Type 38 is\r
2421/// recommended for backward compatibility. The structures are not required to\r
2422/// be mutually exclusive. Type 38 and Type 42 structures may be implemented\r
2423/// simultaneously to provide backward compatibility with IPMI applications or drivers\r
2424/// that do not yet recognize the Type 42 structure.\r
2425///\r
2426typedef struct {\r
2427 SMBIOS_STRUCTURE Hdr;\r
2428 UINT8 InterfaceType; ///< The enumeration value from MC_HOST_INTERFACE_TYPE\r
2429 UINT8 MCHostInterfaceData[1]; ///< This field has a minimum of four bytes\r
2430} SMBIOS_TABLE_TYPE42;\r
2431\r
2432///\r
2433/// TPM Device (Type 43).\r
2434///\r
2435typedef struct {\r
2436 SMBIOS_STRUCTURE Hdr;\r
2437 UINT8 VendorID[4];\r
2438 UINT8 MajorSpecVersion;\r
2439 UINT8 MinorSpecVersion;\r
2440 UINT32 FirmwareVersion1;\r
2441 UINT32 FirmwareVersion2;\r
2442 SMBIOS_TABLE_STRING Description;\r
2443 UINT64 Characteristics;\r
2444 UINT32 OemDefined;\r
2445} SMBIOS_TABLE_TYPE43;\r
2446\r
2447///\r
2448/// Inactive (Type 126)\r
2449///\r
2450typedef struct {\r
2451 SMBIOS_STRUCTURE Hdr;\r
2452} SMBIOS_TABLE_TYPE126;\r
2453\r
2454///\r
2455/// End-of-Table (Type 127)\r
2456///\r
2457typedef struct {\r
2458 SMBIOS_STRUCTURE Hdr;\r
2459} SMBIOS_TABLE_TYPE127;\r
2460\r
2461///\r
2462/// Union of all the possible SMBIOS record types.\r
2463///\r
2464typedef union {\r
2465 SMBIOS_STRUCTURE *Hdr;\r
2466 SMBIOS_TABLE_TYPE0 *Type0;\r
2467 SMBIOS_TABLE_TYPE1 *Type1;\r
2468 SMBIOS_TABLE_TYPE2 *Type2;\r
2469 SMBIOS_TABLE_TYPE3 *Type3;\r
2470 SMBIOS_TABLE_TYPE4 *Type4;\r
2471 SMBIOS_TABLE_TYPE5 *Type5;\r
2472 SMBIOS_TABLE_TYPE6 *Type6;\r
2473 SMBIOS_TABLE_TYPE7 *Type7;\r
2474 SMBIOS_TABLE_TYPE8 *Type8;\r
2475 SMBIOS_TABLE_TYPE9 *Type9;\r
2476 SMBIOS_TABLE_TYPE10 *Type10;\r
2477 SMBIOS_TABLE_TYPE11 *Type11;\r
2478 SMBIOS_TABLE_TYPE12 *Type12;\r
2479 SMBIOS_TABLE_TYPE13 *Type13;\r
2480 SMBIOS_TABLE_TYPE14 *Type14;\r
2481 SMBIOS_TABLE_TYPE15 *Type15;\r
2482 SMBIOS_TABLE_TYPE16 *Type16;\r
2483 SMBIOS_TABLE_TYPE17 *Type17;\r
2484 SMBIOS_TABLE_TYPE18 *Type18;\r
2485 SMBIOS_TABLE_TYPE19 *Type19;\r
2486 SMBIOS_TABLE_TYPE20 *Type20;\r
2487 SMBIOS_TABLE_TYPE21 *Type21;\r
2488 SMBIOS_TABLE_TYPE22 *Type22;\r
2489 SMBIOS_TABLE_TYPE23 *Type23;\r
2490 SMBIOS_TABLE_TYPE24 *Type24;\r
2491 SMBIOS_TABLE_TYPE25 *Type25;\r
2492 SMBIOS_TABLE_TYPE26 *Type26;\r
2493 SMBIOS_TABLE_TYPE27 *Type27;\r
2494 SMBIOS_TABLE_TYPE28 *Type28;\r
2495 SMBIOS_TABLE_TYPE29 *Type29;\r
2496 SMBIOS_TABLE_TYPE30 *Type30;\r
2497 SMBIOS_TABLE_TYPE31 *Type31;\r
2498 SMBIOS_TABLE_TYPE32 *Type32;\r
2499 SMBIOS_TABLE_TYPE33 *Type33;\r
2500 SMBIOS_TABLE_TYPE34 *Type34;\r
2501 SMBIOS_TABLE_TYPE35 *Type35;\r
2502 SMBIOS_TABLE_TYPE36 *Type36;\r
2503 SMBIOS_TABLE_TYPE37 *Type37;\r
2504 SMBIOS_TABLE_TYPE38 *Type38;\r
2505 SMBIOS_TABLE_TYPE39 *Type39;\r
2506 SMBIOS_TABLE_TYPE40 *Type40;\r
2507 SMBIOS_TABLE_TYPE41 *Type41;\r
2508 SMBIOS_TABLE_TYPE42 *Type42;\r
2509 SMBIOS_TABLE_TYPE43 *Type43;\r
2510 SMBIOS_TABLE_TYPE126 *Type126;\r
2511 SMBIOS_TABLE_TYPE127 *Type127;\r
2512 UINT8 *Raw;\r
2513} SMBIOS_STRUCTURE_POINTER;\r
2514\r
2515#pragma pack()\r
2516\r
2517#endif\r
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