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1/** @file\r
2 Industry Standard Definitions of SMBIOS Table Specification v3.2.0.\r
3\r
4Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
5(C) Copyright 2015-2017 Hewlett Packard Enterprise Development LP<BR>\r
6This program and the accompanying materials are licensed and made available under\r
7the terms and conditions of the BSD License that accompanies this distribution.\r
8The full text of the license may be found at\r
9http://opensource.org/licenses/bsd-license.php.\r
10\r
11THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
12WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
13\r
14**/\r
15\r
16#ifndef __SMBIOS_STANDARD_H__\r
17#define __SMBIOS_STANDARD_H__\r
18\r
19///\r
20/// Reference SMBIOS 2.6, chapter 3.1.2.\r
21/// For v2.1 and later, handle values in the range 0FF00h to 0FFFFh are reserved for\r
22/// use by this specification.\r
23///\r
24#define SMBIOS_HANDLE_RESERVED_BEGIN 0xFF00\r
25\r
26///\r
27/// Reference SMBIOS 2.7, chapter 6.1.2.\r
28/// The UEFI Platform Initialization Specification reserves handle number FFFEh for its\r
29/// EFI_SMBIOS_PROTOCOL.Add() function to mean "assign an unused handle number automatically."\r
30/// This number is not used for any other purpose by the SMBIOS specification.\r
31///\r
32#define SMBIOS_HANDLE_PI_RESERVED 0xFFFE\r
33\r
34///\r
35/// Reference SMBIOS 2.6, chapter 3.1.3.\r
36/// Each text string is limited to 64 significant characters due to system MIF limitations.\r
37/// Reference SMBIOS 2.7, chapter 6.1.3.\r
38/// It will have no limit on the length of each individual text string.\r
39///\r
40#define SMBIOS_STRING_MAX_LENGTH 64\r
41\r
42//\r
43// The length of the entire structure table (including all strings) must be reported\r
44// in the Structure Table Length field of the SMBIOS Structure Table Entry Point,\r
45// which is a WORD field limited to 65,535 bytes.\r
46//\r
47#define SMBIOS_TABLE_MAX_LENGTH 0xFFFF\r
48\r
49//\r
50// For SMBIOS 3.0, Structure table maximum size in Entry Point structure is DWORD field limited to 0xFFFFFFFF bytes.\r
51//\r
52#define SMBIOS_3_0_TABLE_MAX_LENGTH 0xFFFFFFFF\r
53\r
54//\r
55// SMBIOS type macros which is according to SMBIOS 2.7 specification.\r
56//\r
57#define SMBIOS_TYPE_BIOS_INFORMATION 0\r
58#define SMBIOS_TYPE_SYSTEM_INFORMATION 1\r
59#define SMBIOS_TYPE_BASEBOARD_INFORMATION 2\r
60#define SMBIOS_TYPE_SYSTEM_ENCLOSURE 3\r
61#define SMBIOS_TYPE_PROCESSOR_INFORMATION 4\r
62#define SMBIOS_TYPE_MEMORY_CONTROLLER_INFORMATION 5\r
63#define SMBIOS_TYPE_MEMORY_MODULE_INFORMATON 6\r
64#define SMBIOS_TYPE_CACHE_INFORMATION 7\r
65#define SMBIOS_TYPE_PORT_CONNECTOR_INFORMATION 8\r
66#define SMBIOS_TYPE_SYSTEM_SLOTS 9\r
67#define SMBIOS_TYPE_ONBOARD_DEVICE_INFORMATION 10\r
68#define SMBIOS_TYPE_OEM_STRINGS 11\r
69#define SMBIOS_TYPE_SYSTEM_CONFIGURATION_OPTIONS 12\r
70#define SMBIOS_TYPE_BIOS_LANGUAGE_INFORMATION 13\r
71#define SMBIOS_TYPE_GROUP_ASSOCIATIONS 14\r
72#define SMBIOS_TYPE_SYSTEM_EVENT_LOG 15\r
73#define SMBIOS_TYPE_PHYSICAL_MEMORY_ARRAY 16\r
74#define SMBIOS_TYPE_MEMORY_DEVICE 17\r
75#define SMBIOS_TYPE_32BIT_MEMORY_ERROR_INFORMATION 18\r
76#define SMBIOS_TYPE_MEMORY_ARRAY_MAPPED_ADDRESS 19\r
77#define SMBIOS_TYPE_MEMORY_DEVICE_MAPPED_ADDRESS 20\r
78#define SMBIOS_TYPE_BUILT_IN_POINTING_DEVICE 21\r
79#define SMBIOS_TYPE_PORTABLE_BATTERY 22\r
80#define SMBIOS_TYPE_SYSTEM_RESET 23\r
81#define SMBIOS_TYPE_HARDWARE_SECURITY 24\r
82#define SMBIOS_TYPE_SYSTEM_POWER_CONTROLS 25\r
83#define SMBIOS_TYPE_VOLTAGE_PROBE 26\r
84#define SMBIOS_TYPE_COOLING_DEVICE 27\r
85#define SMBIOS_TYPE_TEMPERATURE_PROBE 28\r
86#define SMBIOS_TYPE_ELECTRICAL_CURRENT_PROBE 29\r
87#define SMBIOS_TYPE_OUT_OF_BAND_REMOTE_ACCESS 30\r
88#define SMBIOS_TYPE_BOOT_INTEGRITY_SERVICE 31\r
89#define SMBIOS_TYPE_SYSTEM_BOOT_INFORMATION 32\r
90#define SMBIOS_TYPE_64BIT_MEMORY_ERROR_INFORMATION 33\r
91#define SMBIOS_TYPE_MANAGEMENT_DEVICE 34\r
92#define SMBIOS_TYPE_MANAGEMENT_DEVICE_COMPONENT 35\r
93#define SMBIOS_TYPE_MANAGEMENT_DEVICE_THRESHOLD_DATA 36\r
94#define SMBIOS_TYPE_MEMORY_CHANNEL 37\r
95#define SMBIOS_TYPE_IPMI_DEVICE_INFORMATION 38\r
96#define SMBIOS_TYPE_SYSTEM_POWER_SUPPLY 39\r
97#define SMBIOS_TYPE_ADDITIONAL_INFORMATION 40\r
98#define SMBIOS_TYPE_ONBOARD_DEVICES_EXTENDED_INFORMATION 41\r
99#define SMBIOS_TYPE_MANAGEMENT_CONTROLLER_HOST_INTERFACE 42\r
100#define SMBIOS_TYPE_TPM_DEVICE 43\r
101\r
102///\r
103/// Inactive type is added from SMBIOS 2.2. Reference SMBIOS 2.6, chapter 3.3.43.\r
104/// Upper-level software that interprets the SMBIOS structure-table should bypass an\r
105/// Inactive structure just like a structure type that the software does not recognize.\r
106///\r
107#define SMBIOS_TYPE_INACTIVE 0x007E\r
108\r
109///\r
110/// End-of-table type is added from SMBIOS 2.2. Reference SMBIOS 2.6, chapter 3.3.44.\r
111/// The end-of-table indicator is used in the last physical structure in a table\r
112///\r
113#define SMBIOS_TYPE_END_OF_TABLE 0x007F\r
114\r
115#define SMBIOS_OEM_BEGIN 128\r
116#define SMBIOS_OEM_END 255\r
117\r
118///\r
119/// Types 0 through 127 (7Fh) are reserved for and defined by this\r
120/// specification. Types 128 through 256 (80h to FFh) are available for system- and OEM-specific information.\r
121///\r
122typedef UINT8 SMBIOS_TYPE;\r
123\r
124///\r
125/// Specifies the structure's handle, a unique 16-bit number in the range 0 to 0FFFEh (for version\r
126/// 2.0) or 0 to 0FEFFh (for version 2.1 and later). The handle can be used with the Get SMBIOS\r
127/// Structure function to retrieve a specific structure; the handle numbers are not required to be\r
128/// contiguous. For v2.1 and later, handle values in the range 0FF00h to 0FFFFh are reserved for\r
129/// use by this specification.\r
130/// If the system configuration changes, a previously assigned handle might no longer exist.\r
131/// However once a handle has been assigned by the BIOS, the BIOS cannot re-assign that handle\r
132/// number to another structure.\r
133///\r
134typedef UINT16 SMBIOS_HANDLE;\r
135\r
136///\r
137/// Smbios Table Entry Point Structure.\r
138///\r
139#pragma pack(1)\r
140typedef struct {\r
141 UINT8 AnchorString[4];\r
142 UINT8 EntryPointStructureChecksum;\r
143 UINT8 EntryPointLength;\r
144 UINT8 MajorVersion;\r
145 UINT8 MinorVersion;\r
146 UINT16 MaxStructureSize;\r
147 UINT8 EntryPointRevision;\r
148 UINT8 FormattedArea[5];\r
149 UINT8 IntermediateAnchorString[5];\r
150 UINT8 IntermediateChecksum;\r
151 UINT16 TableLength;\r
152 UINT32 TableAddress;\r
153 UINT16 NumberOfSmbiosStructures;\r
154 UINT8 SmbiosBcdRevision;\r
155} SMBIOS_TABLE_ENTRY_POINT;\r
156\r
157typedef struct {\r
158 UINT8 AnchorString[5];\r
159 UINT8 EntryPointStructureChecksum;\r
160 UINT8 EntryPointLength;\r
161 UINT8 MajorVersion;\r
162 UINT8 MinorVersion;\r
163 UINT8 DocRev;\r
164 UINT8 EntryPointRevision;\r
165 UINT8 Reserved;\r
166 UINT32 TableMaximumSize;\r
167 UINT64 TableAddress;\r
168} SMBIOS_TABLE_3_0_ENTRY_POINT;\r
169\r
170///\r
171/// The Smbios structure header.\r
172///\r
173typedef struct {\r
174 SMBIOS_TYPE Type;\r
175 UINT8 Length;\r
176 SMBIOS_HANDLE Handle;\r
177} SMBIOS_STRUCTURE;\r
178\r
179///\r
180/// Text strings associated with a given SMBIOS structure are returned in the dmiStrucBuffer, appended directly after\r
181/// the formatted portion of the structure. This method of returning string information eliminates the need for\r
182/// application software to deal with pointers embedded in the SMBIOS structure. Each string is terminated with a null\r
183/// (00h) BYTE and the set of strings is terminated with an additional null (00h) BYTE. When the formatted portion of\r
184/// a SMBIOS structure references a string, it does so by specifying a non-zero string number within the structure's\r
185/// string-set. For example, if a string field contains 02h, it references the second string following the formatted portion\r
186/// of the SMBIOS structure. If a string field references no string, a null (0) is placed in that string field. If the\r
187/// formatted portion of the structure contains string-reference fields and all the string fields are set to 0 (no string\r
188/// references), the formatted section of the structure is followed by two null (00h) BYTES.\r
189///\r
190typedef UINT8 SMBIOS_TABLE_STRING;\r
191\r
192///\r
193/// BIOS Characteristics\r
194/// Defines which functions the BIOS supports. PCI, PCMCIA, Flash, etc.\r
195///\r
196typedef struct {\r
197 UINT32 Reserved :2; ///< Bits 0-1.\r
198 UINT32 Unknown :1;\r
199 UINT32 BiosCharacteristicsNotSupported :1;\r
200 UINT32 IsaIsSupported :1;\r
201 UINT32 McaIsSupported :1;\r
202 UINT32 EisaIsSupported :1;\r
203 UINT32 PciIsSupported :1;\r
204 UINT32 PcmciaIsSupported :1;\r
205 UINT32 PlugAndPlayIsSupported :1;\r
206 UINT32 ApmIsSupported :1;\r
207 UINT32 BiosIsUpgradable :1;\r
208 UINT32 BiosShadowingAllowed :1;\r
209 UINT32 VlVesaIsSupported :1;\r
210 UINT32 EscdSupportIsAvailable :1;\r
211 UINT32 BootFromCdIsSupported :1;\r
212 UINT32 SelectableBootIsSupported :1;\r
213 UINT32 RomBiosIsSocketed :1;\r
214 UINT32 BootFromPcmciaIsSupported :1;\r
215 UINT32 EDDSpecificationIsSupported :1;\r
216 UINT32 JapaneseNecFloppyIsSupported :1;\r
217 UINT32 JapaneseToshibaFloppyIsSupported :1;\r
218 UINT32 Floppy525_360IsSupported :1;\r
219 UINT32 Floppy525_12IsSupported :1;\r
220 UINT32 Floppy35_720IsSupported :1;\r
221 UINT32 Floppy35_288IsSupported :1;\r
222 UINT32 PrintScreenIsSupported :1;\r
223 UINT32 Keyboard8042IsSupported :1;\r
224 UINT32 SerialIsSupported :1;\r
225 UINT32 PrinterIsSupported :1;\r
226 UINT32 CgaMonoIsSupported :1;\r
227 UINT32 NecPc98 :1;\r
228 UINT32 ReservedForVendor :32; ///< Bits 32-63. Bits 32-47 reserved for BIOS vendor\r
229 ///< and bits 48-63 reserved for System Vendor.\r
230} MISC_BIOS_CHARACTERISTICS;\r
231\r
232///\r
233/// BIOS Characteristics Extension Byte 1.\r
234/// This information, available for SMBIOS version 2.1 and later, appears at offset 12h\r
235/// within the BIOS Information structure.\r
236///\r
237typedef struct {\r
238 UINT8 AcpiIsSupported :1;\r
239 UINT8 UsbLegacyIsSupported :1;\r
240 UINT8 AgpIsSupported :1;\r
241 UINT8 I2OBootIsSupported :1;\r
242 UINT8 Ls120BootIsSupported :1;\r
243 UINT8 AtapiZipDriveBootIsSupported :1;\r
244 UINT8 Boot1394IsSupported :1;\r
245 UINT8 SmartBatteryIsSupported :1;\r
246} MBCE_BIOS_RESERVED;\r
247\r
248///\r
249/// BIOS Characteristics Extension Byte 2.\r
250/// This information, available for SMBIOS version 2.3 and later, appears at offset 13h\r
251/// within the BIOS Information structure.\r
252///\r
253typedef struct {\r
254 UINT8 BiosBootSpecIsSupported :1;\r
255 UINT8 FunctionKeyNetworkBootIsSupported :1;\r
256 UINT8 TargetContentDistributionEnabled :1;\r
257 UINT8 UefiSpecificationSupported :1;\r
258 UINT8 VirtualMachineSupported :1;\r
259 UINT8 ExtensionByte2Reserved :3;\r
260} MBCE_SYSTEM_RESERVED;\r
261\r
262///\r
263/// BIOS Characteristics Extension Bytes.\r
264///\r
265typedef struct {\r
266 MBCE_BIOS_RESERVED BiosReserved;\r
267 MBCE_SYSTEM_RESERVED SystemReserved;\r
268} MISC_BIOS_CHARACTERISTICS_EXTENSION;\r
269\r
270///\r
271/// Extended BIOS ROM size.\r
272///\r
273typedef struct {\r
274 UINT16 Size :14;\r
275 UINT16 Unit :2;\r
276} EXTENDED_BIOS_ROM_SIZE;\r
277\r
278///\r
279/// BIOS Information (Type 0).\r
280///\r
281typedef struct {\r
282 SMBIOS_STRUCTURE Hdr;\r
283 SMBIOS_TABLE_STRING Vendor;\r
284 SMBIOS_TABLE_STRING BiosVersion;\r
285 UINT16 BiosSegment;\r
286 SMBIOS_TABLE_STRING BiosReleaseDate;\r
287 UINT8 BiosSize;\r
288 MISC_BIOS_CHARACTERISTICS BiosCharacteristics;\r
289 UINT8 BIOSCharacteristicsExtensionBytes[2];\r
290 UINT8 SystemBiosMajorRelease;\r
291 UINT8 SystemBiosMinorRelease;\r
292 UINT8 EmbeddedControllerFirmwareMajorRelease;\r
293 UINT8 EmbeddedControllerFirmwareMinorRelease;\r
294 //\r
295 // Add for smbios 3.1.0\r
296 //\r
297 EXTENDED_BIOS_ROM_SIZE ExtendedBiosSize;\r
298} SMBIOS_TABLE_TYPE0;\r
299\r
300///\r
301/// System Wake-up Type.\r
302///\r
303typedef enum {\r
304 SystemWakeupTypeReserved = 0x00,\r
305 SystemWakeupTypeOther = 0x01,\r
306 SystemWakeupTypeUnknown = 0x02,\r
307 SystemWakeupTypeApmTimer = 0x03,\r
308 SystemWakeupTypeModemRing = 0x04,\r
309 SystemWakeupTypeLanRemote = 0x05,\r
310 SystemWakeupTypePowerSwitch = 0x06,\r
311 SystemWakeupTypePciPme = 0x07,\r
312 SystemWakeupTypeAcPowerRestored = 0x08\r
313} MISC_SYSTEM_WAKEUP_TYPE;\r
314\r
315///\r
316/// System Information (Type 1).\r
317///\r
318/// The information in this structure defines attributes of the overall system and is\r
319/// intended to be associated with the Component ID group of the system's MIF.\r
320/// An SMBIOS implementation is associated with a single system instance and contains\r
321/// one and only one System Information (Type 1) structure.\r
322///\r
323typedef struct {\r
324 SMBIOS_STRUCTURE Hdr;\r
325 SMBIOS_TABLE_STRING Manufacturer;\r
326 SMBIOS_TABLE_STRING ProductName;\r
327 SMBIOS_TABLE_STRING Version;\r
328 SMBIOS_TABLE_STRING SerialNumber;\r
329 GUID Uuid;\r
330 UINT8 WakeUpType; ///< The enumeration value from MISC_SYSTEM_WAKEUP_TYPE.\r
331 SMBIOS_TABLE_STRING SKUNumber;\r
332 SMBIOS_TABLE_STRING Family;\r
333} SMBIOS_TABLE_TYPE1;\r
334\r
335///\r
336/// Base Board - Feature Flags.\r
337///\r
338typedef struct {\r
339 UINT8 Motherboard :1;\r
340 UINT8 RequiresDaughterCard :1;\r
341 UINT8 Removable :1;\r
342 UINT8 Replaceable :1;\r
343 UINT8 HotSwappable :1;\r
344 UINT8 Reserved :3;\r
345} BASE_BOARD_FEATURE_FLAGS;\r
346\r
347///\r
348/// Base Board - Board Type.\r
349///\r
350typedef enum {\r
351 BaseBoardTypeUnknown = 0x1,\r
352 BaseBoardTypeOther = 0x2,\r
353 BaseBoardTypeServerBlade = 0x3,\r
354 BaseBoardTypeConnectivitySwitch = 0x4,\r
355 BaseBoardTypeSystemManagementModule = 0x5,\r
356 BaseBoardTypeProcessorModule = 0x6,\r
357 BaseBoardTypeIOModule = 0x7,\r
358 BaseBoardTypeMemoryModule = 0x8,\r
359 BaseBoardTypeDaughterBoard = 0x9,\r
360 BaseBoardTypeMotherBoard = 0xA,\r
361 BaseBoardTypeProcessorMemoryModule = 0xB,\r
362 BaseBoardTypeProcessorIOModule = 0xC,\r
363 BaseBoardTypeInterconnectBoard = 0xD\r
364} BASE_BOARD_TYPE;\r
365\r
366///\r
367/// Base Board (or Module) Information (Type 2).\r
368///\r
369/// The information in this structure defines attributes of a system baseboard -\r
370/// for example a motherboard, planar, or server blade or other standard system module.\r
371///\r
372typedef struct {\r
373 SMBIOS_STRUCTURE Hdr;\r
374 SMBIOS_TABLE_STRING Manufacturer;\r
375 SMBIOS_TABLE_STRING ProductName;\r
376 SMBIOS_TABLE_STRING Version;\r
377 SMBIOS_TABLE_STRING SerialNumber;\r
378 SMBIOS_TABLE_STRING AssetTag;\r
379 BASE_BOARD_FEATURE_FLAGS FeatureFlag;\r
380 SMBIOS_TABLE_STRING LocationInChassis;\r
381 UINT16 ChassisHandle;\r
382 UINT8 BoardType; ///< The enumeration value from BASE_BOARD_TYPE.\r
383 UINT8 NumberOfContainedObjectHandles;\r
384 UINT16 ContainedObjectHandles[1];\r
385} SMBIOS_TABLE_TYPE2;\r
386\r
387///\r
388/// System Enclosure or Chassis Types\r
389///\r
390typedef enum {\r
391 MiscChassisTypeOther = 0x01,\r
392 MiscChassisTypeUnknown = 0x02,\r
393 MiscChassisTypeDeskTop = 0x03,\r
394 MiscChassisTypeLowProfileDesktop = 0x04,\r
395 MiscChassisTypePizzaBox = 0x05,\r
396 MiscChassisTypeMiniTower = 0x06,\r
397 MiscChassisTypeTower = 0x07,\r
398 MiscChassisTypePortable = 0x08,\r
399 MiscChassisTypeLapTop = 0x09,\r
400 MiscChassisTypeNotebook = 0x0A,\r
401 MiscChassisTypeHandHeld = 0x0B,\r
402 MiscChassisTypeDockingStation = 0x0C,\r
403 MiscChassisTypeAllInOne = 0x0D,\r
404 MiscChassisTypeSubNotebook = 0x0E,\r
405 MiscChassisTypeSpaceSaving = 0x0F,\r
406 MiscChassisTypeLunchBox = 0x10,\r
407 MiscChassisTypeMainServerChassis = 0x11,\r
408 MiscChassisTypeExpansionChassis = 0x12,\r
409 MiscChassisTypeSubChassis = 0x13,\r
410 MiscChassisTypeBusExpansionChassis = 0x14,\r
411 MiscChassisTypePeripheralChassis = 0x15,\r
412 MiscChassisTypeRaidChassis = 0x16,\r
413 MiscChassisTypeRackMountChassis = 0x17,\r
414 MiscChassisTypeSealedCasePc = 0x18,\r
415 MiscChassisMultiSystemChassis = 0x19,\r
416 MiscChassisCompactPCI = 0x1A,\r
417 MiscChassisAdvancedTCA = 0x1B,\r
418 MiscChassisBlade = 0x1C,\r
419 MiscChassisBladeEnclosure = 0x1D,\r
420 MiscChassisTablet = 0x1E,\r
421 MiscChassisConvertible = 0x1F,\r
422 MiscChassisDetachable = 0x20,\r
423 MiscChassisIoTGateway = 0x21,\r
424 MiscChassisEmbeddedPc = 0x22,\r
425 MiscChassisMiniPc = 0x23,\r
426 MiscChassisStickPc = 0x24\r
427} MISC_CHASSIS_TYPE;\r
428\r
429///\r
430/// System Enclosure or Chassis States .\r
431///\r
432typedef enum {\r
433 ChassisStateOther = 0x01,\r
434 ChassisStateUnknown = 0x02,\r
435 ChassisStateSafe = 0x03,\r
436 ChassisStateWarning = 0x04,\r
437 ChassisStateCritical = 0x05,\r
438 ChassisStateNonRecoverable = 0x06\r
439} MISC_CHASSIS_STATE;\r
440\r
441///\r
442/// System Enclosure or Chassis Security Status.\r
443///\r
444typedef enum {\r
445 ChassisSecurityStatusOther = 0x01,\r
446 ChassisSecurityStatusUnknown = 0x02,\r
447 ChassisSecurityStatusNone = 0x03,\r
448 ChassisSecurityStatusExternalInterfaceLockedOut = 0x04,\r
449 ChassisSecurityStatusExternalInterfaceLockedEnabled = 0x05\r
450} MISC_CHASSIS_SECURITY_STATE;\r
451\r
452///\r
453/// Contained Element record\r
454///\r
455typedef struct {\r
456 UINT8 ContainedElementType;\r
457 UINT8 ContainedElementMinimum;\r
458 UINT8 ContainedElementMaximum;\r
459} CONTAINED_ELEMENT;\r
460\r
461\r
462///\r
463/// System Enclosure or Chassis (Type 3).\r
464///\r
465/// The information in this structure defines attributes of the system's mechanical enclosure(s).\r
466/// For example, if a system included a separate enclosure for its peripheral devices,\r
467/// two structures would be returned: one for the main, system enclosure and the second for\r
468/// the peripheral device enclosure. The additions to this structure in v2.1 of this specification\r
469/// support the population of the CIM_Chassis class.\r
470///\r
471typedef struct {\r
472 SMBIOS_STRUCTURE Hdr;\r
473 SMBIOS_TABLE_STRING Manufacturer;\r
474 UINT8 Type;\r
475 SMBIOS_TABLE_STRING Version;\r
476 SMBIOS_TABLE_STRING SerialNumber;\r
477 SMBIOS_TABLE_STRING AssetTag;\r
478 UINT8 BootupState; ///< The enumeration value from MISC_CHASSIS_STATE.\r
479 UINT8 PowerSupplyState; ///< The enumeration value from MISC_CHASSIS_STATE.\r
480 UINT8 ThermalState; ///< The enumeration value from MISC_CHASSIS_STATE.\r
481 UINT8 SecurityStatus; ///< The enumeration value from MISC_CHASSIS_SECURITY_STATE.\r
482 UINT8 OemDefined[4];\r
483 UINT8 Height;\r
484 UINT8 NumberofPowerCords;\r
485 UINT8 ContainedElementCount;\r
486 UINT8 ContainedElementRecordLength;\r
487 //\r
488 // Can have 0 to (ContainedElementCount * ContainedElementRecordLength) contained elements\r
489 //\r
490 CONTAINED_ELEMENT ContainedElements[1];\r
491 //\r
492 // Add for smbios 2.7\r
493 //\r
494 // Since ContainedElements has a variable number of entries, must not define SKUNumber in\r
495 // the structure. Need to reference it by starting at offset 0x15 and adding\r
496 // (ContainedElementCount * ContainedElementRecordLength) bytes.\r
497 //\r
498 // SMBIOS_TABLE_STRING SKUNumber;\r
499} SMBIOS_TABLE_TYPE3;\r
500\r
501///\r
502/// Processor Information - Processor Type.\r
503///\r
504typedef enum {\r
505 ProcessorOther = 0x01,\r
506 ProcessorUnknown = 0x02,\r
507 CentralProcessor = 0x03,\r
508 MathProcessor = 0x04,\r
509 DspProcessor = 0x05,\r
510 VideoProcessor = 0x06\r
511} PROCESSOR_TYPE_DATA;\r
512\r
513///\r
514/// Processor Information - Processor Family.\r
515///\r
516typedef enum {\r
517 ProcessorFamilyOther = 0x01,\r
518 ProcessorFamilyUnknown = 0x02,\r
519 ProcessorFamily8086 = 0x03,\r
520 ProcessorFamily80286 = 0x04,\r
521 ProcessorFamilyIntel386 = 0x05,\r
522 ProcessorFamilyIntel486 = 0x06,\r
523 ProcessorFamily8087 = 0x07,\r
524 ProcessorFamily80287 = 0x08,\r
525 ProcessorFamily80387 = 0x09,\r
526 ProcessorFamily80487 = 0x0A,\r
527 ProcessorFamilyPentium = 0x0B,\r
528 ProcessorFamilyPentiumPro = 0x0C,\r
529 ProcessorFamilyPentiumII = 0x0D,\r
530 ProcessorFamilyPentiumMMX = 0x0E,\r
531 ProcessorFamilyCeleron = 0x0F,\r
532 ProcessorFamilyPentiumIIXeon = 0x10,\r
533 ProcessorFamilyPentiumIII = 0x11,\r
534 ProcessorFamilyM1 = 0x12,\r
535 ProcessorFamilyM2 = 0x13,\r
536 ProcessorFamilyIntelCeleronM = 0x14,\r
537 ProcessorFamilyIntelPentium4Ht = 0x15,\r
538 ProcessorFamilyAmdDuron = 0x18,\r
539 ProcessorFamilyK5 = 0x19,\r
540 ProcessorFamilyK6 = 0x1A,\r
541 ProcessorFamilyK6_2 = 0x1B,\r
542 ProcessorFamilyK6_3 = 0x1C,\r
543 ProcessorFamilyAmdAthlon = 0x1D,\r
544 ProcessorFamilyAmd29000 = 0x1E,\r
545 ProcessorFamilyK6_2Plus = 0x1F,\r
546 ProcessorFamilyPowerPC = 0x20,\r
547 ProcessorFamilyPowerPC601 = 0x21,\r
548 ProcessorFamilyPowerPC603 = 0x22,\r
549 ProcessorFamilyPowerPC603Plus = 0x23,\r
550 ProcessorFamilyPowerPC604 = 0x24,\r
551 ProcessorFamilyPowerPC620 = 0x25,\r
552 ProcessorFamilyPowerPCx704 = 0x26,\r
553 ProcessorFamilyPowerPC750 = 0x27,\r
554 ProcessorFamilyIntelCoreDuo = 0x28,\r
555 ProcessorFamilyIntelCoreDuoMobile = 0x29,\r
556 ProcessorFamilyIntelCoreSoloMobile = 0x2A,\r
557 ProcessorFamilyIntelAtom = 0x2B,\r
558 ProcessorFamilyIntelCoreM = 0x2C,\r
559 ProcessorFamilyIntelCorem3 = 0x2D,\r
560 ProcessorFamilyIntelCorem5 = 0x2E,\r
561 ProcessorFamilyIntelCorem7 = 0x2F,\r
562 ProcessorFamilyAlpha = 0x30,\r
563 ProcessorFamilyAlpha21064 = 0x31,\r
564 ProcessorFamilyAlpha21066 = 0x32,\r
565 ProcessorFamilyAlpha21164 = 0x33,\r
566 ProcessorFamilyAlpha21164PC = 0x34,\r
567 ProcessorFamilyAlpha21164a = 0x35,\r
568 ProcessorFamilyAlpha21264 = 0x36,\r
569 ProcessorFamilyAlpha21364 = 0x37,\r
570 ProcessorFamilyAmdTurionIIUltraDualCoreMobileM = 0x38,\r
571 ProcessorFamilyAmdTurionIIDualCoreMobileM = 0x39,\r
572 ProcessorFamilyAmdAthlonIIDualCoreM = 0x3A,\r
573 ProcessorFamilyAmdOpteron6100Series = 0x3B,\r
574 ProcessorFamilyAmdOpteron4100Series = 0x3C,\r
575 ProcessorFamilyAmdOpteron6200Series = 0x3D,\r
576 ProcessorFamilyAmdOpteron4200Series = 0x3E,\r
577 ProcessorFamilyAmdFxSeries = 0x3F,\r
578 ProcessorFamilyMips = 0x40,\r
579 ProcessorFamilyMIPSR4000 = 0x41,\r
580 ProcessorFamilyMIPSR4200 = 0x42,\r
581 ProcessorFamilyMIPSR4400 = 0x43,\r
582 ProcessorFamilyMIPSR4600 = 0x44,\r
583 ProcessorFamilyMIPSR10000 = 0x45,\r
584 ProcessorFamilyAmdCSeries = 0x46,\r
585 ProcessorFamilyAmdESeries = 0x47,\r
586 ProcessorFamilyAmdASeries = 0x48, ///< SMBIOS spec 2.8.0 updated the name\r
587 ProcessorFamilyAmdGSeries = 0x49,\r
588 ProcessorFamilyAmdZSeries = 0x4A,\r
589 ProcessorFamilyAmdRSeries = 0x4B,\r
590 ProcessorFamilyAmdOpteron4300 = 0x4C,\r
591 ProcessorFamilyAmdOpteron6300 = 0x4D,\r
592 ProcessorFamilyAmdOpteron3300 = 0x4E,\r
593 ProcessorFamilyAmdFireProSeries = 0x4F,\r
594 ProcessorFamilySparc = 0x50,\r
595 ProcessorFamilySuperSparc = 0x51,\r
596 ProcessorFamilymicroSparcII = 0x52,\r
597 ProcessorFamilymicroSparcIIep = 0x53,\r
598 ProcessorFamilyUltraSparc = 0x54,\r
599 ProcessorFamilyUltraSparcII = 0x55,\r
600 ProcessorFamilyUltraSparcIii = 0x56,\r
601 ProcessorFamilyUltraSparcIII = 0x57,\r
602 ProcessorFamilyUltraSparcIIIi = 0x58,\r
603 ProcessorFamily68040 = 0x60,\r
604 ProcessorFamily68xxx = 0x61,\r
605 ProcessorFamily68000 = 0x62,\r
606 ProcessorFamily68010 = 0x63,\r
607 ProcessorFamily68020 = 0x64,\r
608 ProcessorFamily68030 = 0x65,\r
609 ProcessorFamilyAmdAthlonX4QuadCore = 0x66,\r
610 ProcessorFamilyAmdOpteronX1000Series = 0x67,\r
611 ProcessorFamilyAmdOpteronX2000Series = 0x68,\r
612 ProcessorFamilyAmdOpteronASeries = 0x69,\r
613 ProcessorFamilyAmdOpteronX3000Series = 0x6A,\r
614 ProcessorFamilyAmdZen = 0x6B,\r
615 ProcessorFamilyHobbit = 0x70,\r
616 ProcessorFamilyCrusoeTM5000 = 0x78,\r
617 ProcessorFamilyCrusoeTM3000 = 0x79,\r
618 ProcessorFamilyEfficeonTM8000 = 0x7A,\r
619 ProcessorFamilyWeitek = 0x80,\r
620 ProcessorFamilyItanium = 0x82,\r
621 ProcessorFamilyAmdAthlon64 = 0x83,\r
622 ProcessorFamilyAmdOpteron = 0x84,\r
623 ProcessorFamilyAmdSempron = 0x85,\r
624 ProcessorFamilyAmdTurion64Mobile = 0x86,\r
625 ProcessorFamilyDualCoreAmdOpteron = 0x87,\r
626 ProcessorFamilyAmdAthlon64X2DualCore = 0x88,\r
627 ProcessorFamilyAmdTurion64X2Mobile = 0x89,\r
628 ProcessorFamilyQuadCoreAmdOpteron = 0x8A,\r
629 ProcessorFamilyThirdGenerationAmdOpteron = 0x8B,\r
630 ProcessorFamilyAmdPhenomFxQuadCore = 0x8C,\r
631 ProcessorFamilyAmdPhenomX4QuadCore = 0x8D,\r
632 ProcessorFamilyAmdPhenomX2DualCore = 0x8E,\r
633 ProcessorFamilyAmdAthlonX2DualCore = 0x8F,\r
634 ProcessorFamilyPARISC = 0x90,\r
635 ProcessorFamilyPaRisc8500 = 0x91,\r
636 ProcessorFamilyPaRisc8000 = 0x92,\r
637 ProcessorFamilyPaRisc7300LC = 0x93,\r
638 ProcessorFamilyPaRisc7200 = 0x94,\r
639 ProcessorFamilyPaRisc7100LC = 0x95,\r
640 ProcessorFamilyPaRisc7100 = 0x96,\r
641 ProcessorFamilyV30 = 0xA0,\r
642 ProcessorFamilyQuadCoreIntelXeon3200Series = 0xA1,\r
643 ProcessorFamilyDualCoreIntelXeon3000Series = 0xA2,\r
644 ProcessorFamilyQuadCoreIntelXeon5300Series = 0xA3,\r
645 ProcessorFamilyDualCoreIntelXeon5100Series = 0xA4,\r
646 ProcessorFamilyDualCoreIntelXeon5000Series = 0xA5,\r
647 ProcessorFamilyDualCoreIntelXeonLV = 0xA6,\r
648 ProcessorFamilyDualCoreIntelXeonULV = 0xA7,\r
649 ProcessorFamilyDualCoreIntelXeon7100Series = 0xA8,\r
650 ProcessorFamilyQuadCoreIntelXeon5400Series = 0xA9,\r
651 ProcessorFamilyQuadCoreIntelXeon = 0xAA,\r
652 ProcessorFamilyDualCoreIntelXeon5200Series = 0xAB,\r
653 ProcessorFamilyDualCoreIntelXeon7200Series = 0xAC,\r
654 ProcessorFamilyQuadCoreIntelXeon7300Series = 0xAD,\r
655 ProcessorFamilyQuadCoreIntelXeon7400Series = 0xAE,\r
656 ProcessorFamilyMultiCoreIntelXeon7400Series = 0xAF,\r
657 ProcessorFamilyPentiumIIIXeon = 0xB0,\r
658 ProcessorFamilyPentiumIIISpeedStep = 0xB1,\r
659 ProcessorFamilyPentium4 = 0xB2,\r
660 ProcessorFamilyIntelXeon = 0xB3,\r
661 ProcessorFamilyAS400 = 0xB4,\r
662 ProcessorFamilyIntelXeonMP = 0xB5,\r
663 ProcessorFamilyAMDAthlonXP = 0xB6,\r
664 ProcessorFamilyAMDAthlonMP = 0xB7,\r
665 ProcessorFamilyIntelItanium2 = 0xB8,\r
666 ProcessorFamilyIntelPentiumM = 0xB9,\r
667 ProcessorFamilyIntelCeleronD = 0xBA,\r
668 ProcessorFamilyIntelPentiumD = 0xBB,\r
669 ProcessorFamilyIntelPentiumEx = 0xBC,\r
670 ProcessorFamilyIntelCoreSolo = 0xBD, ///< SMBIOS spec 2.6 updated this value\r
671 ProcessorFamilyReserved = 0xBE,\r
672 ProcessorFamilyIntelCore2 = 0xBF,\r
673 ProcessorFamilyIntelCore2Solo = 0xC0,\r
674 ProcessorFamilyIntelCore2Extreme = 0xC1,\r
675 ProcessorFamilyIntelCore2Quad = 0xC2,\r
676 ProcessorFamilyIntelCore2ExtremeMobile = 0xC3,\r
677 ProcessorFamilyIntelCore2DuoMobile = 0xC4,\r
678 ProcessorFamilyIntelCore2SoloMobile = 0xC5,\r
679 ProcessorFamilyIntelCoreI7 = 0xC6,\r
680 ProcessorFamilyDualCoreIntelCeleron = 0xC7,\r
681 ProcessorFamilyIBM390 = 0xC8,\r
682 ProcessorFamilyG4 = 0xC9,\r
683 ProcessorFamilyG5 = 0xCA,\r
684 ProcessorFamilyG6 = 0xCB,\r
685 ProcessorFamilyzArchitecture = 0xCC,\r
686 ProcessorFamilyIntelCoreI5 = 0xCD,\r
687 ProcessorFamilyIntelCoreI3 = 0xCE,\r
688 ProcessorFamilyIntelCoreI9 = 0xCF,\r
689 ProcessorFamilyViaC7M = 0xD2,\r
690 ProcessorFamilyViaC7D = 0xD3,\r
691 ProcessorFamilyViaC7 = 0xD4,\r
692 ProcessorFamilyViaEden = 0xD5,\r
693 ProcessorFamilyMultiCoreIntelXeon = 0xD6,\r
694 ProcessorFamilyDualCoreIntelXeon3Series = 0xD7,\r
695 ProcessorFamilyQuadCoreIntelXeon3Series = 0xD8,\r
696 ProcessorFamilyViaNano = 0xD9,\r
697 ProcessorFamilyDualCoreIntelXeon5Series = 0xDA,\r
698 ProcessorFamilyQuadCoreIntelXeon5Series = 0xDB,\r
699 ProcessorFamilyDualCoreIntelXeon7Series = 0xDD,\r
700 ProcessorFamilyQuadCoreIntelXeon7Series = 0xDE,\r
701 ProcessorFamilyMultiCoreIntelXeon7Series = 0xDF,\r
702 ProcessorFamilyMultiCoreIntelXeon3400Series = 0xE0,\r
703 ProcessorFamilyAmdOpteron3000Series = 0xE4,\r
704 ProcessorFamilyAmdSempronII = 0xE5,\r
705 ProcessorFamilyEmbeddedAmdOpteronQuadCore = 0xE6,\r
706 ProcessorFamilyAmdPhenomTripleCore = 0xE7,\r
707 ProcessorFamilyAmdTurionUltraDualCoreMobile = 0xE8,\r
708 ProcessorFamilyAmdTurionDualCoreMobile = 0xE9,\r
709 ProcessorFamilyAmdAthlonDualCore = 0xEA,\r
710 ProcessorFamilyAmdSempronSI = 0xEB,\r
711 ProcessorFamilyAmdPhenomII = 0xEC,\r
712 ProcessorFamilyAmdAthlonII = 0xED,\r
713 ProcessorFamilySixCoreAmdOpteron = 0xEE,\r
714 ProcessorFamilyAmdSempronM = 0xEF,\r
715 ProcessorFamilyi860 = 0xFA,\r
716 ProcessorFamilyi960 = 0xFB,\r
717 ProcessorFamilyIndicatorFamily2 = 0xFE,\r
718 ProcessorFamilyReserved1 = 0xFF\r
719} PROCESSOR_FAMILY_DATA;\r
720\r
721///\r
722/// Processor Information2 - Processor Family2.\r
723///\r
724typedef enum {\r
725 ProcessorFamilyARMv7 = 0x0100,\r
726 ProcessorFamilyARMv8 = 0x0101,\r
727 ProcessorFamilySH3 = 0x0104,\r
728 ProcessorFamilySH4 = 0x0105,\r
729 ProcessorFamilyARM = 0x0118,\r
730 ProcessorFamilyStrongARM = 0x0119,\r
731 ProcessorFamily6x86 = 0x012C,\r
732 ProcessorFamilyMediaGX = 0x012D,\r
733 ProcessorFamilyMII = 0x012E,\r
734 ProcessorFamilyWinChip = 0x0140,\r
735 ProcessorFamilyDSP = 0x015E,\r
736 ProcessorFamilyVideoProcessor = 0x01F4\r
737} PROCESSOR_FAMILY2_DATA;\r
738\r
739///\r
740/// Processor Information - Voltage.\r
741///\r
742typedef struct {\r
743 UINT8 ProcessorVoltageCapability5V :1;\r
744 UINT8 ProcessorVoltageCapability3_3V :1;\r
745 UINT8 ProcessorVoltageCapability2_9V :1;\r
746 UINT8 ProcessorVoltageCapabilityReserved :1; ///< Bit 3, must be zero.\r
747 UINT8 ProcessorVoltageReserved :3; ///< Bits 4-6, must be zero.\r
748 UINT8 ProcessorVoltageIndicateLegacy :1;\r
749} PROCESSOR_VOLTAGE;\r
750\r
751///\r
752/// Processor Information - Processor Upgrade.\r
753///\r
754typedef enum {\r
755 ProcessorUpgradeOther = 0x01,\r
756 ProcessorUpgradeUnknown = 0x02,\r
757 ProcessorUpgradeDaughterBoard = 0x03,\r
758 ProcessorUpgradeZIFSocket = 0x04,\r
759 ProcessorUpgradePiggyBack = 0x05, ///< Replaceable.\r
760 ProcessorUpgradeNone = 0x06,\r
761 ProcessorUpgradeLIFSocket = 0x07,\r
762 ProcessorUpgradeSlot1 = 0x08,\r
763 ProcessorUpgradeSlot2 = 0x09,\r
764 ProcessorUpgrade370PinSocket = 0x0A,\r
765 ProcessorUpgradeSlotA = 0x0B,\r
766 ProcessorUpgradeSlotM = 0x0C,\r
767 ProcessorUpgradeSocket423 = 0x0D,\r
768 ProcessorUpgradeSocketA = 0x0E, ///< Socket 462.\r
769 ProcessorUpgradeSocket478 = 0x0F,\r
770 ProcessorUpgradeSocket754 = 0x10,\r
771 ProcessorUpgradeSocket940 = 0x11,\r
772 ProcessorUpgradeSocket939 = 0x12,\r
773 ProcessorUpgradeSocketmPGA604 = 0x13,\r
774 ProcessorUpgradeSocketLGA771 = 0x14,\r
775 ProcessorUpgradeSocketLGA775 = 0x15,\r
776 ProcessorUpgradeSocketS1 = 0x16,\r
777 ProcessorUpgradeAM2 = 0x17,\r
778 ProcessorUpgradeF1207 = 0x18,\r
779 ProcessorSocketLGA1366 = 0x19,\r
780 ProcessorUpgradeSocketG34 = 0x1A,\r
781 ProcessorUpgradeSocketAM3 = 0x1B,\r
782 ProcessorUpgradeSocketC32 = 0x1C,\r
783 ProcessorUpgradeSocketLGA1156 = 0x1D,\r
784 ProcessorUpgradeSocketLGA1567 = 0x1E,\r
785 ProcessorUpgradeSocketPGA988A = 0x1F,\r
786 ProcessorUpgradeSocketBGA1288 = 0x20,\r
787 ProcessorUpgradeSocketrPGA988B = 0x21,\r
788 ProcessorUpgradeSocketBGA1023 = 0x22,\r
789 ProcessorUpgradeSocketBGA1224 = 0x23,\r
790 ProcessorUpgradeSocketLGA1155 = 0x24, ///< SMBIOS spec 2.8.0 updated the name\r
791 ProcessorUpgradeSocketLGA1356 = 0x25,\r
792 ProcessorUpgradeSocketLGA2011 = 0x26,\r
793 ProcessorUpgradeSocketFS1 = 0x27,\r
794 ProcessorUpgradeSocketFS2 = 0x28,\r
795 ProcessorUpgradeSocketFM1 = 0x29,\r
796 ProcessorUpgradeSocketFM2 = 0x2A,\r
797 ProcessorUpgradeSocketLGA2011_3 = 0x2B,\r
798 ProcessorUpgradeSocketLGA1356_3 = 0x2C,\r
799 ProcessorUpgradeSocketLGA1150 = 0x2D,\r
800 ProcessorUpgradeSocketBGA1168 = 0x2E,\r
801 ProcessorUpgradeSocketBGA1234 = 0x2F,\r
802 ProcessorUpgradeSocketBGA1364 = 0x30,\r
803 ProcessorUpgradeSocketAM4 = 0x31,\r
804 ProcessorUpgradeSocketLGA1151 = 0x32,\r
805 ProcessorUpgradeSocketBGA1356 = 0x33,\r
806 ProcessorUpgradeSocketBGA1440 = 0x34,\r
807 ProcessorUpgradeSocketBGA1515 = 0x35,\r
808 ProcessorUpgradeSocketLGA3647_1 = 0x36,\r
809 ProcessorUpgradeSocketSP3 = 0x37,\r
810 ProcessorUpgradeSocketSP3r2 = 0x38,\r
811 ProcessorUpgradeSocketLGA2066 = 0x39,\r
812 ProcessorUpgradeSocketBGA1392 = 0x3A,\r
813 ProcessorUpgradeSocketBGA1510 = 0x3B,\r
814 ProcessorUpgradeSocketBGA1528 = 0x3C\r
815} PROCESSOR_UPGRADE;\r
816\r
817///\r
818/// Processor ID Field Description\r
819///\r
820typedef struct {\r
821 UINT32 ProcessorSteppingId:4;\r
822 UINT32 ProcessorModel: 4;\r
823 UINT32 ProcessorFamily: 4;\r
824 UINT32 ProcessorType: 2;\r
825 UINT32 ProcessorReserved1: 2;\r
826 UINT32 ProcessorXModel: 4;\r
827 UINT32 ProcessorXFamily: 8;\r
828 UINT32 ProcessorReserved2: 4;\r
829} PROCESSOR_SIGNATURE;\r
830\r
831typedef struct {\r
832 UINT32 ProcessorFpu :1;\r
833 UINT32 ProcessorVme :1;\r
834 UINT32 ProcessorDe :1;\r
835 UINT32 ProcessorPse :1;\r
836 UINT32 ProcessorTsc :1;\r
837 UINT32 ProcessorMsr :1;\r
838 UINT32 ProcessorPae :1;\r
839 UINT32 ProcessorMce :1;\r
840 UINT32 ProcessorCx8 :1;\r
841 UINT32 ProcessorApic :1;\r
842 UINT32 ProcessorReserved1 :1;\r
843 UINT32 ProcessorSep :1;\r
844 UINT32 ProcessorMtrr :1;\r
845 UINT32 ProcessorPge :1;\r
846 UINT32 ProcessorMca :1;\r
847 UINT32 ProcessorCmov :1;\r
848 UINT32 ProcessorPat :1;\r
849 UINT32 ProcessorPse36 :1;\r
850 UINT32 ProcessorPsn :1;\r
851 UINT32 ProcessorClfsh :1;\r
852 UINT32 ProcessorReserved2 :1;\r
853 UINT32 ProcessorDs :1;\r
854 UINT32 ProcessorAcpi :1;\r
855 UINT32 ProcessorMmx :1;\r
856 UINT32 ProcessorFxsr :1;\r
857 UINT32 ProcessorSse :1;\r
858 UINT32 ProcessorSse2 :1;\r
859 UINT32 ProcessorSs :1;\r
860 UINT32 ProcessorReserved3 :1;\r
861 UINT32 ProcessorTm :1;\r
862 UINT32 ProcessorReserved4 :2;\r
863} PROCESSOR_FEATURE_FLAGS;\r
864\r
865typedef struct {\r
866 PROCESSOR_SIGNATURE Signature;\r
867 PROCESSOR_FEATURE_FLAGS FeatureFlags;\r
868} PROCESSOR_ID_DATA;\r
869\r
870///\r
871/// Processor Information (Type 4).\r
872///\r
873/// The information in this structure defines the attributes of a single processor;\r
874/// a separate structure instance is provided for each system processor socket/slot.\r
875/// For example, a system with an IntelDX2 processor would have a single\r
876/// structure instance, while a system with an IntelSX2 processor would have a structure\r
877/// to describe the main CPU, and a second structure to describe the 80487 co-processor.\r
878///\r
879typedef struct {\r
880 SMBIOS_STRUCTURE Hdr;\r
881 SMBIOS_TABLE_STRING Socket;\r
882 UINT8 ProcessorType; ///< The enumeration value from PROCESSOR_TYPE_DATA.\r
883 UINT8 ProcessorFamily; ///< The enumeration value from PROCESSOR_FAMILY_DATA.\r
884 SMBIOS_TABLE_STRING ProcessorManufacture;\r
885 PROCESSOR_ID_DATA ProcessorId;\r
886 SMBIOS_TABLE_STRING ProcessorVersion;\r
887 PROCESSOR_VOLTAGE Voltage;\r
888 UINT16 ExternalClock;\r
889 UINT16 MaxSpeed;\r
890 UINT16 CurrentSpeed;\r
891 UINT8 Status;\r
892 UINT8 ProcessorUpgrade; ///< The enumeration value from PROCESSOR_UPGRADE.\r
893 UINT16 L1CacheHandle;\r
894 UINT16 L2CacheHandle;\r
895 UINT16 L3CacheHandle;\r
896 SMBIOS_TABLE_STRING SerialNumber;\r
897 SMBIOS_TABLE_STRING AssetTag;\r
898 SMBIOS_TABLE_STRING PartNumber;\r
899 //\r
900 // Add for smbios 2.5\r
901 //\r
902 UINT8 CoreCount;\r
903 UINT8 EnabledCoreCount;\r
904 UINT8 ThreadCount;\r
905 UINT16 ProcessorCharacteristics;\r
906 //\r
907 // Add for smbios 2.6\r
908 //\r
909 UINT16 ProcessorFamily2;\r
910 //\r
911 // Add for smbios 3.0\r
912 //\r
913 UINT16 CoreCount2;\r
914 UINT16 EnabledCoreCount2;\r
915 UINT16 ThreadCount2;\r
916} SMBIOS_TABLE_TYPE4;\r
917\r
918///\r
919/// Memory Controller Error Detecting Method.\r
920///\r
921typedef enum {\r
922 ErrorDetectingMethodOther = 0x01,\r
923 ErrorDetectingMethodUnknown = 0x02,\r
924 ErrorDetectingMethodNone = 0x03,\r
925 ErrorDetectingMethodParity = 0x04,\r
926 ErrorDetectingMethod32Ecc = 0x05,\r
927 ErrorDetectingMethod64Ecc = 0x06,\r
928 ErrorDetectingMethod128Ecc = 0x07,\r
929 ErrorDetectingMethodCrc = 0x08\r
930} MEMORY_ERROR_DETECT_METHOD;\r
931\r
932///\r
933/// Memory Controller Error Correcting Capability.\r
934///\r
935typedef struct {\r
936 UINT8 Other :1;\r
937 UINT8 Unknown :1;\r
938 UINT8 None :1;\r
939 UINT8 SingleBitErrorCorrect :1;\r
940 UINT8 DoubleBitErrorCorrect :1;\r
941 UINT8 ErrorScrubbing :1;\r
942 UINT8 Reserved :2;\r
943} MEMORY_ERROR_CORRECT_CAPABILITY;\r
944\r
945///\r
946/// Memory Controller Information - Interleave Support.\r
947///\r
948typedef enum {\r
949 MemoryInterleaveOther = 0x01,\r
950 MemoryInterleaveUnknown = 0x02,\r
951 MemoryInterleaveOneWay = 0x03,\r
952 MemoryInterleaveTwoWay = 0x04,\r
953 MemoryInterleaveFourWay = 0x05,\r
954 MemoryInterleaveEightWay = 0x06,\r
955 MemoryInterleaveSixteenWay = 0x07\r
956} MEMORY_SUPPORT_INTERLEAVE_TYPE;\r
957\r
958///\r
959/// Memory Controller Information - Memory Speeds.\r
960///\r
961typedef struct {\r
962 UINT16 Other :1;\r
963 UINT16 Unknown :1;\r
964 UINT16 SeventyNs:1;\r
965 UINT16 SixtyNs :1;\r
966 UINT16 FiftyNs :1;\r
967 UINT16 Reserved :11;\r
968} MEMORY_SPEED_TYPE;\r
969\r
970///\r
971/// Memory Controller Information (Type 5, Obsolete).\r
972///\r
973/// The information in this structure defines the attributes of the system's memory controller(s)\r
974/// and the supported attributes of any memory-modules present in the sockets controlled by\r
975/// this controller.\r
976/// Note: This structure, and its companion Memory Module Information (Type 6, Obsolete),\r
977/// are obsolete starting with version 2.1 of this specification. The Physical Memory Array (Type 16)\r
978/// and Memory Device (Type 17) structures should be used instead. BIOS providers might\r
979/// choose to implement both memory description types to allow existing DMI browsers\r
980/// to properly display the system's memory attributes.\r
981///\r
982typedef struct {\r
983 SMBIOS_STRUCTURE Hdr;\r
984 UINT8 ErrDetectMethod; ///< The enumeration value from MEMORY_ERROR_DETECT_METHOD.\r
985 MEMORY_ERROR_CORRECT_CAPABILITY ErrCorrectCapability;\r
986 UINT8 SupportInterleave; ///< The enumeration value from MEMORY_SUPPORT_INTERLEAVE_TYPE.\r
987 UINT8 CurrentInterleave; ///< The enumeration value from MEMORY_SUPPORT_INTERLEAVE_TYPE .\r
988 UINT8 MaxMemoryModuleSize;\r
989 MEMORY_SPEED_TYPE SupportSpeed;\r
990 UINT16 SupportMemoryType;\r
991 UINT8 MemoryModuleVoltage;\r
992 UINT8 AssociatedMemorySlotNum;\r
993 UINT16 MemoryModuleConfigHandles[1];\r
994} SMBIOS_TABLE_TYPE5;\r
995\r
996///\r
997/// Memory Module Information - Memory Types\r
998///\r
999typedef struct {\r
1000 UINT16 Other :1;\r
1001 UINT16 Unknown :1;\r
1002 UINT16 Standard :1;\r
1003 UINT16 FastPageMode:1;\r
1004 UINT16 Edo :1;\r
1005 UINT16 Parity :1;\r
1006 UINT16 Ecc :1;\r
1007 UINT16 Simm :1;\r
1008 UINT16 Dimm :1;\r
1009 UINT16 BurstEdo :1;\r
1010 UINT16 Sdram :1;\r
1011 UINT16 Reserved :5;\r
1012} MEMORY_CURRENT_TYPE;\r
1013\r
1014///\r
1015/// Memory Module Information - Memory Size.\r
1016///\r
1017typedef struct {\r
1018 UINT8 InstalledOrEnabledSize :7; ///< Size (n), where 2**n is the size in MB.\r
1019 UINT8 SingleOrDoubleBank :1;\r
1020} MEMORY_INSTALLED_ENABLED_SIZE;\r
1021\r
1022///\r
1023/// Memory Module Information (Type 6, Obsolete)\r
1024///\r
1025/// One Memory Module Information structure is included for each memory-module socket\r
1026/// in the system. The structure describes the speed, type, size, and error status\r
1027/// of each system memory module. The supported attributes of each module are described\r
1028/// by the "owning" Memory Controller Information structure.\r
1029/// Note: This structure, and its companion Memory Controller Information (Type 5, Obsolete),\r
1030/// are obsolete starting with version 2.1 of this specification. The Physical Memory Array (Type 16)\r
1031/// and Memory Device (Type 17) structures should be used instead.\r
1032///\r
1033typedef struct {\r
1034 SMBIOS_STRUCTURE Hdr;\r
1035 SMBIOS_TABLE_STRING SocketDesignation;\r
1036 UINT8 BankConnections;\r
1037 UINT8 CurrentSpeed;\r
1038 MEMORY_CURRENT_TYPE CurrentMemoryType;\r
1039 MEMORY_INSTALLED_ENABLED_SIZE InstalledSize;\r
1040 MEMORY_INSTALLED_ENABLED_SIZE EnabledSize;\r
1041 UINT8 ErrorStatus;\r
1042} SMBIOS_TABLE_TYPE6;\r
1043\r
1044///\r
1045/// Cache Information - SRAM Type.\r
1046///\r
1047typedef struct {\r
1048 UINT16 Other :1;\r
1049 UINT16 Unknown :1;\r
1050 UINT16 NonBurst :1;\r
1051 UINT16 Burst :1;\r
1052 UINT16 PipelineBurst :1;\r
1053 UINT16 Synchronous :1;\r
1054 UINT16 Asynchronous :1;\r
1055 UINT16 Reserved :9;\r
1056} CACHE_SRAM_TYPE_DATA;\r
1057\r
1058///\r
1059/// Cache Information - Error Correction Type.\r
1060///\r
1061typedef enum {\r
1062 CacheErrorOther = 0x01,\r
1063 CacheErrorUnknown = 0x02,\r
1064 CacheErrorNone = 0x03,\r
1065 CacheErrorParity = 0x04,\r
1066 CacheErrorSingleBit = 0x05, ///< ECC\r
1067 CacheErrorMultiBit = 0x06 ///< ECC\r
1068} CACHE_ERROR_TYPE_DATA;\r
1069\r
1070///\r
1071/// Cache Information - System Cache Type.\r
1072///\r
1073typedef enum {\r
1074 CacheTypeOther = 0x01,\r
1075 CacheTypeUnknown = 0x02,\r
1076 CacheTypeInstruction = 0x03,\r
1077 CacheTypeData = 0x04,\r
1078 CacheTypeUnified = 0x05\r
1079} CACHE_TYPE_DATA;\r
1080\r
1081///\r
1082/// Cache Information - Associativity.\r
1083///\r
1084typedef enum {\r
1085 CacheAssociativityOther = 0x01,\r
1086 CacheAssociativityUnknown = 0x02,\r
1087 CacheAssociativityDirectMapped = 0x03,\r
1088 CacheAssociativity2Way = 0x04,\r
1089 CacheAssociativity4Way = 0x05,\r
1090 CacheAssociativityFully = 0x06,\r
1091 CacheAssociativity8Way = 0x07,\r
1092 CacheAssociativity16Way = 0x08,\r
1093 CacheAssociativity12Way = 0x09,\r
1094 CacheAssociativity24Way = 0x0A,\r
1095 CacheAssociativity32Way = 0x0B,\r
1096 CacheAssociativity48Way = 0x0C,\r
1097 CacheAssociativity64Way = 0x0D,\r
1098 CacheAssociativity20Way = 0x0E\r
1099} CACHE_ASSOCIATIVITY_DATA;\r
1100\r
1101///\r
1102/// Cache Information (Type 7).\r
1103///\r
1104/// The information in this structure defines the attributes of CPU cache device in the system.\r
1105/// One structure is specified for each such device, whether the device is internal to\r
1106/// or external to the CPU module. Cache modules can be associated with a processor structure\r
1107/// in one or two ways, depending on the SMBIOS version.\r
1108///\r
1109typedef struct {\r
1110 SMBIOS_STRUCTURE Hdr;\r
1111 SMBIOS_TABLE_STRING SocketDesignation;\r
1112 UINT16 CacheConfiguration;\r
1113 UINT16 MaximumCacheSize;\r
1114 UINT16 InstalledSize;\r
1115 CACHE_SRAM_TYPE_DATA SupportedSRAMType;\r
1116 CACHE_SRAM_TYPE_DATA CurrentSRAMType;\r
1117 UINT8 CacheSpeed;\r
1118 UINT8 ErrorCorrectionType; ///< The enumeration value from CACHE_ERROR_TYPE_DATA.\r
1119 UINT8 SystemCacheType; ///< The enumeration value from CACHE_TYPE_DATA.\r
1120 UINT8 Associativity; ///< The enumeration value from CACHE_ASSOCIATIVITY_DATA.\r
1121 //\r
1122 // Add for smbios 3.1.0\r
1123 //\r
1124 UINT32 MaximumCacheSize2;\r
1125 UINT32 InstalledSize2;\r
1126} SMBIOS_TABLE_TYPE7;\r
1127\r
1128///\r
1129/// Port Connector Information - Connector Types.\r
1130///\r
1131typedef enum {\r
1132 PortConnectorTypeNone = 0x00,\r
1133 PortConnectorTypeCentronics = 0x01,\r
1134 PortConnectorTypeMiniCentronics = 0x02,\r
1135 PortConnectorTypeProprietary = 0x03,\r
1136 PortConnectorTypeDB25Male = 0x04,\r
1137 PortConnectorTypeDB25Female = 0x05,\r
1138 PortConnectorTypeDB15Male = 0x06,\r
1139 PortConnectorTypeDB15Female = 0x07,\r
1140 PortConnectorTypeDB9Male = 0x08,\r
1141 PortConnectorTypeDB9Female = 0x09,\r
1142 PortConnectorTypeRJ11 = 0x0A,\r
1143 PortConnectorTypeRJ45 = 0x0B,\r
1144 PortConnectorType50PinMiniScsi = 0x0C,\r
1145 PortConnectorTypeMiniDin = 0x0D,\r
1146 PortConnectorTypeMicroDin = 0x0E,\r
1147 PortConnectorTypePS2 = 0x0F,\r
1148 PortConnectorTypeInfrared = 0x10,\r
1149 PortConnectorTypeHpHil = 0x11,\r
1150 PortConnectorTypeUsb = 0x12,\r
1151 PortConnectorTypeSsaScsi = 0x13,\r
1152 PortConnectorTypeCircularDin8Male = 0x14,\r
1153 PortConnectorTypeCircularDin8Female = 0x15,\r
1154 PortConnectorTypeOnboardIde = 0x16,\r
1155 PortConnectorTypeOnboardFloppy = 0x17,\r
1156 PortConnectorType9PinDualInline = 0x18,\r
1157 PortConnectorType25PinDualInline = 0x19,\r
1158 PortConnectorType50PinDualInline = 0x1A,\r
1159 PortConnectorType68PinDualInline = 0x1B,\r
1160 PortConnectorTypeOnboardSoundInput = 0x1C,\r
1161 PortConnectorTypeMiniCentronicsType14 = 0x1D,\r
1162 PortConnectorTypeMiniCentronicsType26 = 0x1E,\r
1163 PortConnectorTypeHeadPhoneMiniJack = 0x1F,\r
1164 PortConnectorTypeBNC = 0x20,\r
1165 PortConnectorType1394 = 0x21,\r
1166 PortConnectorTypeSasSata = 0x22,\r
1167 PortConnectorTypeUsbTypeC = 0x23,\r
1168 PortConnectorTypePC98 = 0xA0,\r
1169 PortConnectorTypePC98Hireso = 0xA1,\r
1170 PortConnectorTypePCH98 = 0xA2,\r
1171 PortConnectorTypePC98Note = 0xA3,\r
1172 PortConnectorTypePC98Full = 0xA4,\r
1173 PortConnectorTypeOther = 0xFF\r
1174} MISC_PORT_CONNECTOR_TYPE;\r
1175\r
1176///\r
1177/// Port Connector Information - Port Types\r
1178///\r
1179typedef enum {\r
1180 PortTypeNone = 0x00,\r
1181 PortTypeParallelXtAtCompatible = 0x01,\r
1182 PortTypeParallelPortPs2 = 0x02,\r
1183 PortTypeParallelPortEcp = 0x03,\r
1184 PortTypeParallelPortEpp = 0x04,\r
1185 PortTypeParallelPortEcpEpp = 0x05,\r
1186 PortTypeSerialXtAtCompatible = 0x06,\r
1187 PortTypeSerial16450Compatible = 0x07,\r
1188 PortTypeSerial16550Compatible = 0x08,\r
1189 PortTypeSerial16550ACompatible = 0x09,\r
1190 PortTypeScsi = 0x0A,\r
1191 PortTypeMidi = 0x0B,\r
1192 PortTypeJoyStick = 0x0C,\r
1193 PortTypeKeyboard = 0x0D,\r
1194 PortTypeMouse = 0x0E,\r
1195 PortTypeSsaScsi = 0x0F,\r
1196 PortTypeUsb = 0x10,\r
1197 PortTypeFireWire = 0x11,\r
1198 PortTypePcmciaTypeI = 0x12,\r
1199 PortTypePcmciaTypeII = 0x13,\r
1200 PortTypePcmciaTypeIII = 0x14,\r
1201 PortTypeCardBus = 0x15,\r
1202 PortTypeAccessBusPort = 0x16,\r
1203 PortTypeScsiII = 0x17,\r
1204 PortTypeScsiWide = 0x18,\r
1205 PortTypePC98 = 0x19,\r
1206 PortTypePC98Hireso = 0x1A,\r
1207 PortTypePCH98 = 0x1B,\r
1208 PortTypeVideoPort = 0x1C,\r
1209 PortTypeAudioPort = 0x1D,\r
1210 PortTypeModemPort = 0x1E,\r
1211 PortTypeNetworkPort = 0x1F,\r
1212 PortTypeSata = 0x20,\r
1213 PortTypeSas = 0x21,\r
1214 PortTypeMfdp = 0x22, ///< Multi-Function Display Port\r
1215 PortTypeThunderbolt = 0x23,\r
1216 PortType8251Compatible = 0xA0,\r
1217 PortType8251FifoCompatible = 0xA1,\r
1218 PortTypeOther = 0xFF\r
1219} MISC_PORT_TYPE;\r
1220\r
1221///\r
1222/// Port Connector Information (Type 8).\r
1223///\r
1224/// The information in this structure defines the attributes of a system port connector,\r
1225/// e.g. parallel, serial, keyboard, or mouse ports. The port's type and connector information\r
1226/// are provided. One structure is present for each port provided by the system.\r
1227///\r
1228typedef struct {\r
1229 SMBIOS_STRUCTURE Hdr;\r
1230 SMBIOS_TABLE_STRING InternalReferenceDesignator;\r
1231 UINT8 InternalConnectorType; ///< The enumeration value from MISC_PORT_CONNECTOR_TYPE.\r
1232 SMBIOS_TABLE_STRING ExternalReferenceDesignator;\r
1233 UINT8 ExternalConnectorType; ///< The enumeration value from MISC_PORT_CONNECTOR_TYPE.\r
1234 UINT8 PortType; ///< The enumeration value from MISC_PORT_TYPE.\r
1235} SMBIOS_TABLE_TYPE8;\r
1236\r
1237///\r
1238/// System Slots - Slot Type\r
1239///\r
1240typedef enum {\r
1241 SlotTypeOther = 0x01,\r
1242 SlotTypeUnknown = 0x02,\r
1243 SlotTypeIsa = 0x03,\r
1244 SlotTypeMca = 0x04,\r
1245 SlotTypeEisa = 0x05,\r
1246 SlotTypePci = 0x06,\r
1247 SlotTypePcmcia = 0x07,\r
1248 SlotTypeVlVesa = 0x08,\r
1249 SlotTypeProprietary = 0x09,\r
1250 SlotTypeProcessorCardSlot = 0x0A,\r
1251 SlotTypeProprietaryMemoryCardSlot = 0x0B,\r
1252 SlotTypeIORiserCardSlot = 0x0C,\r
1253 SlotTypeNuBus = 0x0D,\r
1254 SlotTypePci66MhzCapable = 0x0E,\r
1255 SlotTypeAgp = 0x0F,\r
1256 SlotTypeApg2X = 0x10,\r
1257 SlotTypeAgp4X = 0x11,\r
1258 SlotTypePciX = 0x12,\r
1259 SlotTypeAgp8X = 0x13,\r
1260 SlotTypeM2Socket1_DP = 0x14,\r
1261 SlotTypeM2Socket1_SD = 0x15,\r
1262 SlotTypeM2Socket2 = 0x16,\r
1263 SlotTypeM2Socket3 = 0x17,\r
1264 SlotTypeMxmTypeI = 0x18,\r
1265 SlotTypeMxmTypeII = 0x19,\r
1266 SlotTypeMxmTypeIIIStandard = 0x1A,\r
1267 SlotTypeMxmTypeIIIHe = 0x1B,\r
1268 SlotTypeMxmTypeIV = 0x1C,\r
1269 SlotTypeMxm30TypeA = 0x1D,\r
1270 SlotTypeMxm30TypeB = 0x1E,\r
1271 SlotTypePciExpressGen2Sff_8639 = 0x1F,\r
1272 SlotTypePciExpressGen3Sff_8639 = 0x20,\r
1273 SlotTypePciExpressMini52pinWithBSKO = 0x21, ///< PCI Express Mini 52-pin (CEM spec. 2.0) with bottom-side keep-outs.\r
1274 SlotTypePciExpressMini52pinWithoutBSKO = 0x22, ///< PCI Express Mini 52-pin (CEM spec. 2.0) without bottom-side keep-outs.\r
1275 SlotTypePciExpressMini76pin = 0x23, ///< PCI Express Mini 76-pin (CEM spec. 2.0) Corresponds to Display-Mini card.\r
1276 SlotTypePC98C20 = 0xA0,\r
1277 SlotTypePC98C24 = 0xA1,\r
1278 SlotTypePC98E = 0xA2,\r
1279 SlotTypePC98LocalBus = 0xA3,\r
1280 SlotTypePC98Card = 0xA4,\r
1281 SlotTypePciExpress = 0xA5,\r
1282 SlotTypePciExpressX1 = 0xA6,\r
1283 SlotTypePciExpressX2 = 0xA7,\r
1284 SlotTypePciExpressX4 = 0xA8,\r
1285 SlotTypePciExpressX8 = 0xA9,\r
1286 SlotTypePciExpressX16 = 0xAA,\r
1287 SlotTypePciExpressGen2 = 0xAB,\r
1288 SlotTypePciExpressGen2X1 = 0xAC,\r
1289 SlotTypePciExpressGen2X2 = 0xAD,\r
1290 SlotTypePciExpressGen2X4 = 0xAE,\r
1291 SlotTypePciExpressGen2X8 = 0xAF,\r
1292 SlotTypePciExpressGen2X16 = 0xB0,\r
1293 SlotTypePciExpressGen3 = 0xB1,\r
1294 SlotTypePciExpressGen3X1 = 0xB2,\r
1295 SlotTypePciExpressGen3X2 = 0xB3,\r
1296 SlotTypePciExpressGen3X4 = 0xB4,\r
1297 SlotTypePciExpressGen3X8 = 0xB5,\r
1298 SlotTypePciExpressGen3X16 = 0xB6\r
1299} MISC_SLOT_TYPE;\r
1300\r
1301///\r
1302/// System Slots - Slot Data Bus Width.\r
1303///\r
1304typedef enum {\r
1305 SlotDataBusWidthOther = 0x01,\r
1306 SlotDataBusWidthUnknown = 0x02,\r
1307 SlotDataBusWidth8Bit = 0x03,\r
1308 SlotDataBusWidth16Bit = 0x04,\r
1309 SlotDataBusWidth32Bit = 0x05,\r
1310 SlotDataBusWidth64Bit = 0x06,\r
1311 SlotDataBusWidth128Bit = 0x07,\r
1312 SlotDataBusWidth1X = 0x08, ///< Or X1\r
1313 SlotDataBusWidth2X = 0x09, ///< Or X2\r
1314 SlotDataBusWidth4X = 0x0A, ///< Or X4\r
1315 SlotDataBusWidth8X = 0x0B, ///< Or X8\r
1316 SlotDataBusWidth12X = 0x0C, ///< Or X12\r
1317 SlotDataBusWidth16X = 0x0D, ///< Or X16\r
1318 SlotDataBusWidth32X = 0x0E ///< Or X32\r
1319} MISC_SLOT_DATA_BUS_WIDTH;\r
1320\r
1321///\r
1322/// System Slots - Current Usage.\r
1323///\r
1324typedef enum {\r
1325 SlotUsageOther = 0x01,\r
1326 SlotUsageUnknown = 0x02,\r
1327 SlotUsageAvailable = 0x03,\r
1328 SlotUsageInUse = 0x04,\r
1329 SlotUsageUnavailable = 0x05\r
1330} MISC_SLOT_USAGE;\r
1331\r
1332///\r
1333/// System Slots - Slot Length.\r
1334///\r
1335typedef enum {\r
1336 SlotLengthOther = 0x01,\r
1337 SlotLengthUnknown = 0x02,\r
1338 SlotLengthShort = 0x03,\r
1339 SlotLengthLong = 0x04\r
1340} MISC_SLOT_LENGTH;\r
1341\r
1342///\r
1343/// System Slots - Slot Characteristics 1.\r
1344///\r
1345typedef struct {\r
1346 UINT8 CharacteristicsUnknown :1;\r
1347 UINT8 Provides50Volts :1;\r
1348 UINT8 Provides33Volts :1;\r
1349 UINT8 SharedSlot :1;\r
1350 UINT8 PcCard16Supported :1;\r
1351 UINT8 CardBusSupported :1;\r
1352 UINT8 ZoomVideoSupported :1;\r
1353 UINT8 ModemRingResumeSupported:1;\r
1354} MISC_SLOT_CHARACTERISTICS1;\r
1355///\r
1356/// System Slots - Slot Characteristics 2.\r
1357///\r
1358typedef struct {\r
1359 UINT8 PmeSignalSupported :1;\r
1360 UINT8 HotPlugDevicesSupported :1;\r
1361 UINT8 SmbusSignalSupported :1;\r
1362 UINT8 BifurcationSupported :1;\r
1363 UINT8 Reserved :4; ///< Set to 0.\r
1364} MISC_SLOT_CHARACTERISTICS2;\r
1365\r
1366///\r
1367/// System Slots - Peer Segment/Bus/Device/Function/Width Groups\r
1368///\r
1369typedef struct {\r
1370 UINT16 SegmentGroupNum;\r
1371 UINT8 BusNum;\r
1372 UINT8 DevFuncNum;\r
1373 UINT8 DataBusWidth;\r
1374} MISC_SLOT_PEER_GROUP;\r
1375\r
1376///\r
1377/// System Slots (Type 9)\r
1378///\r
1379/// The information in this structure defines the attributes of a system slot.\r
1380/// One structure is provided for each slot in the system.\r
1381///\r
1382///\r
1383typedef struct {\r
1384 SMBIOS_STRUCTURE Hdr;\r
1385 SMBIOS_TABLE_STRING SlotDesignation;\r
1386 UINT8 SlotType; ///< The enumeration value from MISC_SLOT_TYPE.\r
1387 UINT8 SlotDataBusWidth; ///< The enumeration value from MISC_SLOT_DATA_BUS_WIDTH.\r
1388 UINT8 CurrentUsage; ///< The enumeration value from MISC_SLOT_USAGE.\r
1389 UINT8 SlotLength; ///< The enumeration value from MISC_SLOT_LENGTH.\r
1390 UINT16 SlotID;\r
1391 MISC_SLOT_CHARACTERISTICS1 SlotCharacteristics1;\r
1392 MISC_SLOT_CHARACTERISTICS2 SlotCharacteristics2;\r
1393 //\r
1394 // Add for smbios 2.6\r
1395 //\r
1396 UINT16 SegmentGroupNum;\r
1397 UINT8 BusNum;\r
1398 UINT8 DevFuncNum;\r
1399 //\r
1400 // Add for smbios 3.2\r
1401 //\r
1402 UINT8 DataBusWidth;\r
1403 UINT8 PeerGroupingCount;\r
1404 MISC_SLOT_PEER_GROUP PeerGroups[1];\r
1405} SMBIOS_TABLE_TYPE9;\r
1406\r
1407///\r
1408/// On Board Devices Information - Device Types.\r
1409///\r
1410typedef enum {\r
1411 OnBoardDeviceTypeOther = 0x01,\r
1412 OnBoardDeviceTypeUnknown = 0x02,\r
1413 OnBoardDeviceTypeVideo = 0x03,\r
1414 OnBoardDeviceTypeScsiController = 0x04,\r
1415 OnBoardDeviceTypeEthernet = 0x05,\r
1416 OnBoardDeviceTypeTokenRing = 0x06,\r
1417 OnBoardDeviceTypeSound = 0x07,\r
1418 OnBoardDeviceTypePATAController = 0x08,\r
1419 OnBoardDeviceTypeSATAController = 0x09,\r
1420 OnBoardDeviceTypeSASController = 0x0A\r
1421} MISC_ONBOARD_DEVICE_TYPE;\r
1422\r
1423///\r
1424/// Device Item Entry\r
1425///\r
1426typedef struct {\r
1427 UINT8 DeviceType; ///< Bit [6:0] - enumeration type of device from MISC_ONBOARD_DEVICE_TYPE.\r
1428 ///< Bit 7 - 1 : device enabled, 0 : device disabled.\r
1429 SMBIOS_TABLE_STRING DescriptionString;\r
1430} DEVICE_STRUCT;\r
1431\r
1432///\r
1433/// On Board Devices Information (Type 10, obsolete).\r
1434///\r
1435/// Note: This structure is obsolete starting with version 2.6 specification; the Onboard Devices Extended\r
1436/// Information (Type 41) structure should be used instead . BIOS providers can choose to implement both\r
1437/// types to allow existing SMBIOS browsers to properly display the system's onboard devices information.\r
1438/// The information in this structure defines the attributes of devices that are onboard (soldered onto)\r
1439/// a system element, usually the baseboard. In general, an entry in this table implies that the BIOS\r
1440/// has some level of control over the enabling of the associated device for use by the system.\r
1441///\r
1442typedef struct {\r
1443 SMBIOS_STRUCTURE Hdr;\r
1444 DEVICE_STRUCT Device[1];\r
1445} SMBIOS_TABLE_TYPE10;\r
1446\r
1447///\r
1448/// OEM Strings (Type 11).\r
1449/// This structure contains free form strings defined by the OEM. Examples of this are:\r
1450/// Part Numbers for Reference Documents for the system, contact information for the manufacturer, etc.\r
1451///\r
1452typedef struct {\r
1453 SMBIOS_STRUCTURE Hdr;\r
1454 UINT8 StringCount;\r
1455} SMBIOS_TABLE_TYPE11;\r
1456\r
1457///\r
1458/// System Configuration Options (Type 12).\r
1459///\r
1460/// This structure contains information required to configure the base board's Jumpers and Switches.\r
1461///\r
1462typedef struct {\r
1463 SMBIOS_STRUCTURE Hdr;\r
1464 UINT8 StringCount;\r
1465} SMBIOS_TABLE_TYPE12;\r
1466\r
1467\r
1468///\r
1469/// BIOS Language Information (Type 13).\r
1470///\r
1471/// The information in this structure defines the installable language attributes of the BIOS.\r
1472///\r
1473typedef struct {\r
1474 SMBIOS_STRUCTURE Hdr;\r
1475 UINT8 InstallableLanguages;\r
1476 UINT8 Flags;\r
1477 UINT8 Reserved[15];\r
1478 SMBIOS_TABLE_STRING CurrentLanguages;\r
1479} SMBIOS_TABLE_TYPE13;\r
1480\r
1481///\r
1482/// Group Item Entry\r
1483///\r
1484typedef struct {\r
1485 UINT8 ItemType;\r
1486 UINT16 ItemHandle;\r
1487} GROUP_STRUCT;\r
1488\r
1489///\r
1490/// Group Associations (Type 14).\r
1491///\r
1492/// The Group Associations structure is provided for OEMs who want to specify\r
1493/// the arrangement or hierarchy of certain components (including other Group Associations)\r
1494/// within the system.\r
1495///\r
1496typedef struct {\r
1497 SMBIOS_STRUCTURE Hdr;\r
1498 SMBIOS_TABLE_STRING GroupName;\r
1499 GROUP_STRUCT Group[1];\r
1500} SMBIOS_TABLE_TYPE14;\r
1501\r
1502///\r
1503/// System Event Log - Event Log Types.\r
1504///\r
1505typedef enum {\r
1506 EventLogTypeReserved = 0x00,\r
1507 EventLogTypeSingleBitECC = 0x01,\r
1508 EventLogTypeMultiBitECC = 0x02,\r
1509 EventLogTypeParityMemErr = 0x03,\r
1510 EventLogTypeBusTimeOut = 0x04,\r
1511 EventLogTypeIOChannelCheck = 0x05,\r
1512 EventLogTypeSoftwareNMI = 0x06,\r
1513 EventLogTypePOSTMemResize = 0x07,\r
1514 EventLogTypePOSTErr = 0x08,\r
1515 EventLogTypePCIParityErr = 0x09,\r
1516 EventLogTypePCISystemErr = 0x0A,\r
1517 EventLogTypeCPUFailure = 0x0B,\r
1518 EventLogTypeEISATimeOut = 0x0C,\r
1519 EventLogTypeMemLogDisabled = 0x0D,\r
1520 EventLogTypeLoggingDisabled = 0x0E,\r
1521 EventLogTypeSysLimitExce = 0x10,\r
1522 EventLogTypeAsyncHWTimer = 0x11,\r
1523 EventLogTypeSysConfigInfo = 0x12,\r
1524 EventLogTypeHDInfo = 0x13,\r
1525 EventLogTypeSysReconfig = 0x14,\r
1526 EventLogTypeUncorrectCPUErr = 0x15,\r
1527 EventLogTypeAreaResetAndClr = 0x16,\r
1528 EventLogTypeSystemBoot = 0x17,\r
1529 EventLogTypeUnused = 0x18, ///< 0x18 - 0x7F\r
1530 EventLogTypeAvailForSys = 0x80, ///< 0x80 - 0xFE\r
1531 EventLogTypeEndOfLog = 0xFF\r
1532} EVENT_LOG_TYPE_DATA;\r
1533\r
1534///\r
1535/// System Event Log - Variable Data Format Types.\r
1536///\r
1537typedef enum {\r
1538 EventLogVariableNone = 0x00,\r
1539 EventLogVariableHandle = 0x01,\r
1540 EventLogVariableMutilEvent = 0x02,\r
1541 EventLogVariableMutilEventHandle = 0x03,\r
1542 EventLogVariablePOSTResultBitmap = 0x04,\r
1543 EventLogVariableSysManagementType = 0x05,\r
1544 EventLogVariableMutliEventSysManagmentType = 0x06,\r
1545 EventLogVariableUnused = 0x07,\r
1546 EventLogVariableOEMAssigned = 0x80\r
1547} EVENT_LOG_VARIABLE_DATA;\r
1548\r
1549///\r
1550/// Event Log Type Descriptors\r
1551///\r
1552typedef struct {\r
1553 UINT8 LogType; ///< The enumeration value from EVENT_LOG_TYPE_DATA.\r
1554 UINT8 DataFormatType;\r
1555} EVENT_LOG_TYPE;\r
1556\r
1557///\r
1558/// System Event Log (Type 15).\r
1559///\r
1560/// The presence of this structure within the SMBIOS data returned for a system indicates\r
1561/// that the system supports an event log. An event log is a fixed-length area within a\r
1562/// non-volatile storage element, starting with a fixed-length (and vendor-specific) header\r
1563/// record, followed by one or more variable-length log records.\r
1564///\r
1565typedef struct {\r
1566 SMBIOS_STRUCTURE Hdr;\r
1567 UINT16 LogAreaLength;\r
1568 UINT16 LogHeaderStartOffset;\r
1569 UINT16 LogDataStartOffset;\r
1570 UINT8 AccessMethod;\r
1571 UINT8 LogStatus;\r
1572 UINT32 LogChangeToken;\r
1573 UINT32 AccessMethodAddress;\r
1574 UINT8 LogHeaderFormat;\r
1575 UINT8 NumberOfSupportedLogTypeDescriptors;\r
1576 UINT8 LengthOfLogTypeDescriptor;\r
1577 EVENT_LOG_TYPE EventLogTypeDescriptors[1];\r
1578} SMBIOS_TABLE_TYPE15;\r
1579\r
1580///\r
1581/// Physical Memory Array - Location.\r
1582///\r
1583typedef enum {\r
1584 MemoryArrayLocationOther = 0x01,\r
1585 MemoryArrayLocationUnknown = 0x02,\r
1586 MemoryArrayLocationSystemBoard = 0x03,\r
1587 MemoryArrayLocationIsaAddonCard = 0x04,\r
1588 MemoryArrayLocationEisaAddonCard = 0x05,\r
1589 MemoryArrayLocationPciAddonCard = 0x06,\r
1590 MemoryArrayLocationMcaAddonCard = 0x07,\r
1591 MemoryArrayLocationPcmciaAddonCard = 0x08,\r
1592 MemoryArrayLocationProprietaryAddonCard = 0x09,\r
1593 MemoryArrayLocationNuBus = 0x0A,\r
1594 MemoryArrayLocationPc98C20AddonCard = 0xA0,\r
1595 MemoryArrayLocationPc98C24AddonCard = 0xA1,\r
1596 MemoryArrayLocationPc98EAddonCard = 0xA2,\r
1597 MemoryArrayLocationPc98LocalBusAddonCard = 0xA3\r
1598} MEMORY_ARRAY_LOCATION;\r
1599\r
1600///\r
1601/// Physical Memory Array - Use.\r
1602///\r
1603typedef enum {\r
1604 MemoryArrayUseOther = 0x01,\r
1605 MemoryArrayUseUnknown = 0x02,\r
1606 MemoryArrayUseSystemMemory = 0x03,\r
1607 MemoryArrayUseVideoMemory = 0x04,\r
1608 MemoryArrayUseFlashMemory = 0x05,\r
1609 MemoryArrayUseNonVolatileRam = 0x06,\r
1610 MemoryArrayUseCacheMemory = 0x07\r
1611} MEMORY_ARRAY_USE;\r
1612\r
1613///\r
1614/// Physical Memory Array - Error Correction Types.\r
1615///\r
1616typedef enum {\r
1617 MemoryErrorCorrectionOther = 0x01,\r
1618 MemoryErrorCorrectionUnknown = 0x02,\r
1619 MemoryErrorCorrectionNone = 0x03,\r
1620 MemoryErrorCorrectionParity = 0x04,\r
1621 MemoryErrorCorrectionSingleBitEcc = 0x05,\r
1622 MemoryErrorCorrectionMultiBitEcc = 0x06,\r
1623 MemoryErrorCorrectionCrc = 0x07\r
1624} MEMORY_ERROR_CORRECTION;\r
1625\r
1626///\r
1627/// Physical Memory Array (Type 16).\r
1628///\r
1629/// This structure describes a collection of memory devices that operate\r
1630/// together to form a memory address space.\r
1631///\r
1632typedef struct {\r
1633 SMBIOS_STRUCTURE Hdr;\r
1634 UINT8 Location; ///< The enumeration value from MEMORY_ARRAY_LOCATION.\r
1635 UINT8 Use; ///< The enumeration value from MEMORY_ARRAY_USE.\r
1636 UINT8 MemoryErrorCorrection; ///< The enumeration value from MEMORY_ERROR_CORRECTION.\r
1637 UINT32 MaximumCapacity;\r
1638 UINT16 MemoryErrorInformationHandle;\r
1639 UINT16 NumberOfMemoryDevices;\r
1640 //\r
1641 // Add for smbios 2.7\r
1642 //\r
1643 UINT64 ExtendedMaximumCapacity;\r
1644} SMBIOS_TABLE_TYPE16;\r
1645\r
1646///\r
1647/// Memory Device - Form Factor.\r
1648///\r
1649typedef enum {\r
1650 MemoryFormFactorOther = 0x01,\r
1651 MemoryFormFactorUnknown = 0x02,\r
1652 MemoryFormFactorSimm = 0x03,\r
1653 MemoryFormFactorSip = 0x04,\r
1654 MemoryFormFactorChip = 0x05,\r
1655 MemoryFormFactorDip = 0x06,\r
1656 MemoryFormFactorZip = 0x07,\r
1657 MemoryFormFactorProprietaryCard = 0x08,\r
1658 MemoryFormFactorDimm = 0x09,\r
1659 MemoryFormFactorTsop = 0x0A,\r
1660 MemoryFormFactorRowOfChips = 0x0B,\r
1661 MemoryFormFactorRimm = 0x0C,\r
1662 MemoryFormFactorSodimm = 0x0D,\r
1663 MemoryFormFactorSrimm = 0x0E,\r
1664 MemoryFormFactorFbDimm = 0x0F\r
1665} MEMORY_FORM_FACTOR;\r
1666\r
1667///\r
1668/// Memory Device - Type\r
1669///\r
1670typedef enum {\r
1671 MemoryTypeOther = 0x01,\r
1672 MemoryTypeUnknown = 0x02,\r
1673 MemoryTypeDram = 0x03,\r
1674 MemoryTypeEdram = 0x04,\r
1675 MemoryTypeVram = 0x05,\r
1676 MemoryTypeSram = 0x06,\r
1677 MemoryTypeRam = 0x07,\r
1678 MemoryTypeRom = 0x08,\r
1679 MemoryTypeFlash = 0x09,\r
1680 MemoryTypeEeprom = 0x0A,\r
1681 MemoryTypeFeprom = 0x0B,\r
1682 MemoryTypeEprom = 0x0C,\r
1683 MemoryTypeCdram = 0x0D,\r
1684 MemoryType3Dram = 0x0E,\r
1685 MemoryTypeSdram = 0x0F,\r
1686 MemoryTypeSgram = 0x10,\r
1687 MemoryTypeRdram = 0x11,\r
1688 MemoryTypeDdr = 0x12,\r
1689 MemoryTypeDdr2 = 0x13,\r
1690 MemoryTypeDdr2FbDimm = 0x14,\r
1691 MemoryTypeDdr3 = 0x18,\r
1692 MemoryTypeFbd2 = 0x19,\r
1693 MemoryTypeDdr4 = 0x1A,\r
1694 MemoryTypeLpddr = 0x1B,\r
1695 MemoryTypeLpddr2 = 0x1C,\r
1696 MemoryTypeLpddr3 = 0x1D,\r
1697 MemoryTypeLpddr4 = 0x1E,\r
1698 MemoryTypeLogicalNonVolatileDevice = 0x1F\r
1699} MEMORY_DEVICE_TYPE;\r
1700\r
1701///\r
1702/// Memory Device - Type Detail\r
1703///\r
1704typedef struct {\r
1705 UINT16 Reserved :1;\r
1706 UINT16 Other :1;\r
1707 UINT16 Unknown :1;\r
1708 UINT16 FastPaged :1;\r
1709 UINT16 StaticColumn :1;\r
1710 UINT16 PseudoStatic :1;\r
1711 UINT16 Rambus :1;\r
1712 UINT16 Synchronous :1;\r
1713 UINT16 Cmos :1;\r
1714 UINT16 Edo :1;\r
1715 UINT16 WindowDram :1;\r
1716 UINT16 CacheDram :1;\r
1717 UINT16 Nonvolatile :1;\r
1718 UINT16 Registered :1;\r
1719 UINT16 Unbuffered :1;\r
1720 UINT16 LrDimm :1;\r
1721} MEMORY_DEVICE_TYPE_DETAIL;\r
1722\r
1723///\r
1724/// Memory Device - Memory Technology\r
1725///\r
1726typedef enum {\r
1727 MemoryTechnologyOther = 0x01,\r
1728 MemoryTechnologyUnknown = 0x02,\r
1729 MemoryTechnologyDram = 0x03,\r
1730 MemoryTechnologyNvdimmN = 0x04,\r
1731 MemoryTechnologyNvdimmF = 0x05,\r
1732 MemoryTechnologyNvdimmP = 0x06,\r
1733 MemoryTechnologyIntelPersistentMemory = 0x07\r
1734} MEMORY_DEVICE_TECHNOLOGY;\r
1735\r
1736///\r
1737/// Memory Device - Memory Operating Mode Capability\r
1738///\r
1739typedef union {\r
1740 ///\r
1741 /// Individual bit fields\r
1742 ///\r
1743 struct {\r
1744 UINT16 Reserved :1; ///< Set to 0.\r
1745 UINT16 Other :1;\r
1746 UINT16 Unknown :1;\r
1747 UINT16 VolatileMemory :1;\r
1748 UINT16 ByteAccessiblePersistentMemory :1;\r
1749 UINT16 BlockAccessiblePersistentMemory :1;\r
1750 UINT16 Reserved2 :10; ///< Set to 0.\r
1751 } Bits;\r
1752 ///\r
1753 /// All bit fields as a 16-bit value\r
1754 ///\r
1755 UINT16 Uint16;\r
1756} MEMORY_DEVICE_OPERATING_MODE_CAPABILITY;\r
1757\r
1758///\r
1759/// Memory Device (Type 17).\r
1760///\r
1761/// This structure describes a single memory device that is part of\r
1762/// a larger Physical Memory Array (Type 16).\r
1763/// Note: If a system includes memory-device sockets, the SMBIOS implementation\r
1764/// includes a Memory Device structure instance for each slot, whether or not the\r
1765/// socket is currently populated.\r
1766///\r
1767typedef struct {\r
1768 SMBIOS_STRUCTURE Hdr;\r
1769 UINT16 MemoryArrayHandle;\r
1770 UINT16 MemoryErrorInformationHandle;\r
1771 UINT16 TotalWidth;\r
1772 UINT16 DataWidth;\r
1773 UINT16 Size;\r
1774 UINT8 FormFactor; ///< The enumeration value from MEMORY_FORM_FACTOR.\r
1775 UINT8 DeviceSet;\r
1776 SMBIOS_TABLE_STRING DeviceLocator;\r
1777 SMBIOS_TABLE_STRING BankLocator;\r
1778 UINT8 MemoryType; ///< The enumeration value from MEMORY_DEVICE_TYPE.\r
1779 MEMORY_DEVICE_TYPE_DETAIL TypeDetail;\r
1780 UINT16 Speed;\r
1781 SMBIOS_TABLE_STRING Manufacturer;\r
1782 SMBIOS_TABLE_STRING SerialNumber;\r
1783 SMBIOS_TABLE_STRING AssetTag;\r
1784 SMBIOS_TABLE_STRING PartNumber;\r
1785 //\r
1786 // Add for smbios 2.6\r
1787 //\r
1788 UINT8 Attributes;\r
1789 //\r
1790 // Add for smbios 2.7\r
1791 //\r
1792 UINT32 ExtendedSize;\r
1793 //\r
1794 // Keep using name "ConfiguredMemoryClockSpeed" for compatibility\r
1795 // although this field is renamed from "Configured Memory Clock Speed"\r
1796 // to "Configured Memory Speed" in smbios 3.2.0.\r
1797 //\r
1798 UINT16 ConfiguredMemoryClockSpeed;\r
1799 //\r
1800 // Add for smbios 2.8.0\r
1801 //\r
1802 UINT16 MinimumVoltage;\r
1803 UINT16 MaximumVoltage;\r
1804 UINT16 ConfiguredVoltage;\r
1805 //\r
1806 // Add for smbios 3.2.0\r
1807 //\r
1808 UINT8 MemoryTechnology; ///< The enumeration value from MEMORY_DEVICE_TECHNOLOGY\r
1809 MEMORY_DEVICE_OPERATING_MODE_CAPABILITY MemoryOperatingModeCapability;\r
1810 SMBIOS_TABLE_STRING FirwareVersion;\r
1811 UINT16 ModuleManufacturerID;\r
1812 UINT16 ModuleProductID;\r
1813 UINT16 MemorySubsystemControllerManufacturerID;\r
1814 UINT16 MemorySubsystemControllerProductID;\r
1815 UINT64 NonVolatileSize;\r
1816 UINT64 VolatileSize;\r
1817 UINT64 CacheSize;\r
1818 UINT64 LogicalSize;\r
1819} SMBIOS_TABLE_TYPE17;\r
1820\r
1821///\r
1822/// 32-bit Memory Error Information - Error Type.\r
1823///\r
1824typedef enum {\r
1825 MemoryErrorOther = 0x01,\r
1826 MemoryErrorUnknown = 0x02,\r
1827 MemoryErrorOk = 0x03,\r
1828 MemoryErrorBadRead = 0x04,\r
1829 MemoryErrorParity = 0x05,\r
1830 MemoryErrorSigleBit = 0x06,\r
1831 MemoryErrorDoubleBit = 0x07,\r
1832 MemoryErrorMultiBit = 0x08,\r
1833 MemoryErrorNibble = 0x09,\r
1834 MemoryErrorChecksum = 0x0A,\r
1835 MemoryErrorCrc = 0x0B,\r
1836 MemoryErrorCorrectSingleBit = 0x0C,\r
1837 MemoryErrorCorrected = 0x0D,\r
1838 MemoryErrorUnCorrectable = 0x0E\r
1839} MEMORY_ERROR_TYPE;\r
1840\r
1841///\r
1842/// 32-bit Memory Error Information - Error Granularity.\r
1843///\r
1844typedef enum {\r
1845 MemoryGranularityOther = 0x01,\r
1846 MemoryGranularityOtherUnknown = 0x02,\r
1847 MemoryGranularityDeviceLevel = 0x03,\r
1848 MemoryGranularityMemPartitionLevel = 0x04\r
1849} MEMORY_ERROR_GRANULARITY;\r
1850\r
1851///\r
1852/// 32-bit Memory Error Information - Error Operation.\r
1853///\r
1854typedef enum {\r
1855 MemoryErrorOperationOther = 0x01,\r
1856 MemoryErrorOperationUnknown = 0x02,\r
1857 MemoryErrorOperationRead = 0x03,\r
1858 MemoryErrorOperationWrite = 0x04,\r
1859 MemoryErrorOperationPartialWrite = 0x05\r
1860} MEMORY_ERROR_OPERATION;\r
1861\r
1862///\r
1863/// 32-bit Memory Error Information (Type 18).\r
1864///\r
1865/// This structure identifies the specifics of an error that might be detected\r
1866/// within a Physical Memory Array.\r
1867///\r
1868typedef struct {\r
1869 SMBIOS_STRUCTURE Hdr;\r
1870 UINT8 ErrorType; ///< The enumeration value from MEMORY_ERROR_TYPE.\r
1871 UINT8 ErrorGranularity; ///< The enumeration value from MEMORY_ERROR_GRANULARITY.\r
1872 UINT8 ErrorOperation; ///< The enumeration value from MEMORY_ERROR_OPERATION.\r
1873 UINT32 VendorSyndrome;\r
1874 UINT32 MemoryArrayErrorAddress;\r
1875 UINT32 DeviceErrorAddress;\r
1876 UINT32 ErrorResolution;\r
1877} SMBIOS_TABLE_TYPE18;\r
1878\r
1879///\r
1880/// Memory Array Mapped Address (Type 19).\r
1881///\r
1882/// This structure provides the address mapping for a Physical Memory Array.\r
1883/// One structure is present for each contiguous address range described.\r
1884///\r
1885typedef struct {\r
1886 SMBIOS_STRUCTURE Hdr;\r
1887 UINT32 StartingAddress;\r
1888 UINT32 EndingAddress;\r
1889 UINT16 MemoryArrayHandle;\r
1890 UINT8 PartitionWidth;\r
1891 //\r
1892 // Add for smbios 2.7\r
1893 //\r
1894 UINT64 ExtendedStartingAddress;\r
1895 UINT64 ExtendedEndingAddress;\r
1896} SMBIOS_TABLE_TYPE19;\r
1897\r
1898///\r
1899/// Memory Device Mapped Address (Type 20).\r
1900///\r
1901/// This structure maps memory address space usually to a device-level granularity.\r
1902/// One structure is present for each contiguous address range described.\r
1903///\r
1904typedef struct {\r
1905 SMBIOS_STRUCTURE Hdr;\r
1906 UINT32 StartingAddress;\r
1907 UINT32 EndingAddress;\r
1908 UINT16 MemoryDeviceHandle;\r
1909 UINT16 MemoryArrayMappedAddressHandle;\r
1910 UINT8 PartitionRowPosition;\r
1911 UINT8 InterleavePosition;\r
1912 UINT8 InterleavedDataDepth;\r
1913 //\r
1914 // Add for smbios 2.7\r
1915 //\r
1916 UINT64 ExtendedStartingAddress;\r
1917 UINT64 ExtendedEndingAddress;\r
1918} SMBIOS_TABLE_TYPE20;\r
1919\r
1920///\r
1921/// Built-in Pointing Device - Type\r
1922///\r
1923typedef enum {\r
1924 PointingDeviceTypeOther = 0x01,\r
1925 PointingDeviceTypeUnknown = 0x02,\r
1926 PointingDeviceTypeMouse = 0x03,\r
1927 PointingDeviceTypeTrackBall = 0x04,\r
1928 PointingDeviceTypeTrackPoint = 0x05,\r
1929 PointingDeviceTypeGlidePoint = 0x06,\r
1930 PointingDeviceTouchPad = 0x07,\r
1931 PointingDeviceTouchScreen = 0x08,\r
1932 PointingDeviceOpticalSensor = 0x09\r
1933} BUILTIN_POINTING_DEVICE_TYPE;\r
1934\r
1935///\r
1936/// Built-in Pointing Device - Interface.\r
1937///\r
1938typedef enum {\r
1939 PointingDeviceInterfaceOther = 0x01,\r
1940 PointingDeviceInterfaceUnknown = 0x02,\r
1941 PointingDeviceInterfaceSerial = 0x03,\r
1942 PointingDeviceInterfacePs2 = 0x04,\r
1943 PointingDeviceInterfaceInfrared = 0x05,\r
1944 PointingDeviceInterfaceHpHil = 0x06,\r
1945 PointingDeviceInterfaceBusMouse = 0x07,\r
1946 PointingDeviceInterfaceADB = 0x08,\r
1947 PointingDeviceInterfaceBusMouseDB9 = 0xA0,\r
1948 PointingDeviceInterfaceBusMouseMicroDin = 0xA1,\r
1949 PointingDeviceInterfaceUsb = 0xA2\r
1950} BUILTIN_POINTING_DEVICE_INTERFACE;\r
1951\r
1952///\r
1953/// Built-in Pointing Device (Type 21).\r
1954///\r
1955/// This structure describes the attributes of the built-in pointing device for the\r
1956/// system. The presence of this structure does not imply that the built-in\r
1957/// pointing device is active for the system's use!\r
1958///\r
1959typedef struct {\r
1960 SMBIOS_STRUCTURE Hdr;\r
1961 UINT8 Type; ///< The enumeration value from BUILTIN_POINTING_DEVICE_TYPE.\r
1962 UINT8 Interface; ///< The enumeration value from BUILTIN_POINTING_DEVICE_INTERFACE.\r
1963 UINT8 NumberOfButtons;\r
1964} SMBIOS_TABLE_TYPE21;\r
1965\r
1966///\r
1967/// Portable Battery - Device Chemistry\r
1968///\r
1969typedef enum {\r
1970 PortableBatteryDeviceChemistryOther = 0x01,\r
1971 PortableBatteryDeviceChemistryUnknown = 0x02,\r
1972 PortableBatteryDeviceChemistryLeadAcid = 0x03,\r
1973 PortableBatteryDeviceChemistryNickelCadmium = 0x04,\r
1974 PortableBatteryDeviceChemistryNickelMetalHydride = 0x05,\r
1975 PortableBatteryDeviceChemistryLithiumIon = 0x06,\r
1976 PortableBatteryDeviceChemistryZincAir = 0x07,\r
1977 PortableBatteryDeviceChemistryLithiumPolymer = 0x08\r
1978} PORTABLE_BATTERY_DEVICE_CHEMISTRY;\r
1979\r
1980///\r
1981/// Portable Battery (Type 22).\r
1982///\r
1983/// This structure describes the attributes of the portable battery(s) for the system.\r
1984/// The structure contains the static attributes for the group. Each structure describes\r
1985/// a single battery pack's attributes.\r
1986///\r
1987typedef struct {\r
1988 SMBIOS_STRUCTURE Hdr;\r
1989 SMBIOS_TABLE_STRING Location;\r
1990 SMBIOS_TABLE_STRING Manufacturer;\r
1991 SMBIOS_TABLE_STRING ManufactureDate;\r
1992 SMBIOS_TABLE_STRING SerialNumber;\r
1993 SMBIOS_TABLE_STRING DeviceName;\r
1994 UINT8 DeviceChemistry; ///< The enumeration value from PORTABLE_BATTERY_DEVICE_CHEMISTRY.\r
1995 UINT16 DeviceCapacity;\r
1996 UINT16 DesignVoltage;\r
1997 SMBIOS_TABLE_STRING SBDSVersionNumber;\r
1998 UINT8 MaximumErrorInBatteryData;\r
1999 UINT16 SBDSSerialNumber;\r
2000 UINT16 SBDSManufactureDate;\r
2001 SMBIOS_TABLE_STRING SBDSDeviceChemistry;\r
2002 UINT8 DesignCapacityMultiplier;\r
2003 UINT32 OEMSpecific;\r
2004} SMBIOS_TABLE_TYPE22;\r
2005\r
2006///\r
2007/// System Reset (Type 23)\r
2008///\r
2009/// This structure describes whether Automatic System Reset functions enabled (Status).\r
2010/// If the system has a watchdog Timer and the timer is not reset (Timer Reset)\r
2011/// before the Interval elapses, an automatic system reset will occur. The system will re-boot\r
2012/// according to the Boot Option. This function may repeat until the Limit is reached, at which time\r
2013/// the system will re-boot according to the Boot Option at Limit.\r
2014///\r
2015typedef struct {\r
2016 SMBIOS_STRUCTURE Hdr;\r
2017 UINT8 Capabilities;\r
2018 UINT16 ResetCount;\r
2019 UINT16 ResetLimit;\r
2020 UINT16 TimerInterval;\r
2021 UINT16 Timeout;\r
2022} SMBIOS_TABLE_TYPE23;\r
2023\r
2024///\r
2025/// Hardware Security (Type 24).\r
2026///\r
2027/// This structure describes the system-wide hardware security settings.\r
2028///\r
2029typedef struct {\r
2030 SMBIOS_STRUCTURE Hdr;\r
2031 UINT8 HardwareSecuritySettings;\r
2032} SMBIOS_TABLE_TYPE24;\r
2033\r
2034///\r
2035/// System Power Controls (Type 25).\r
2036///\r
2037/// This structure describes the attributes for controlling the main power supply to the system.\r
2038/// Software that interprets this structure uses the month, day, hour, minute, and second values\r
2039/// to determine the number of seconds until the next power-on of the system. The presence of\r
2040/// this structure implies that a timed power-on facility is available for the system.\r
2041///\r
2042typedef struct {\r
2043 SMBIOS_STRUCTURE Hdr;\r
2044 UINT8 NextScheduledPowerOnMonth;\r
2045 UINT8 NextScheduledPowerOnDayOfMonth;\r
2046 UINT8 NextScheduledPowerOnHour;\r
2047 UINT8 NextScheduledPowerOnMinute;\r
2048 UINT8 NextScheduledPowerOnSecond;\r
2049} SMBIOS_TABLE_TYPE25;\r
2050\r
2051///\r
2052/// Voltage Probe - Location and Status.\r
2053///\r
2054typedef struct {\r
2055 UINT8 VoltageProbeSite :5;\r
2056 UINT8 VoltageProbeStatus :3;\r
2057} MISC_VOLTAGE_PROBE_LOCATION;\r
2058\r
2059///\r
2060/// Voltage Probe (Type 26)\r
2061///\r
2062/// This describes the attributes for a voltage probe in the system.\r
2063/// Each structure describes a single voltage probe.\r
2064///\r
2065typedef struct {\r
2066 SMBIOS_STRUCTURE Hdr;\r
2067 SMBIOS_TABLE_STRING Description;\r
2068 MISC_VOLTAGE_PROBE_LOCATION LocationAndStatus;\r
2069 UINT16 MaximumValue;\r
2070 UINT16 MinimumValue;\r
2071 UINT16 Resolution;\r
2072 UINT16 Tolerance;\r
2073 UINT16 Accuracy;\r
2074 UINT32 OEMDefined;\r
2075 UINT16 NominalValue;\r
2076} SMBIOS_TABLE_TYPE26;\r
2077\r
2078///\r
2079/// Cooling Device - Device Type and Status.\r
2080///\r
2081typedef struct {\r
2082 UINT8 CoolingDevice :5;\r
2083 UINT8 CoolingDeviceStatus :3;\r
2084} MISC_COOLING_DEVICE_TYPE;\r
2085\r
2086///\r
2087/// Cooling Device (Type 27)\r
2088///\r
2089/// This structure describes the attributes for a cooling device in the system.\r
2090/// Each structure describes a single cooling device.\r
2091///\r
2092typedef struct {\r
2093 SMBIOS_STRUCTURE Hdr;\r
2094 UINT16 TemperatureProbeHandle;\r
2095 MISC_COOLING_DEVICE_TYPE DeviceTypeAndStatus;\r
2096 UINT8 CoolingUnitGroup;\r
2097 UINT32 OEMDefined;\r
2098 UINT16 NominalSpeed;\r
2099 //\r
2100 // Add for smbios 2.7\r
2101 //\r
2102 SMBIOS_TABLE_STRING Description;\r
2103} SMBIOS_TABLE_TYPE27;\r
2104\r
2105///\r
2106/// Temperature Probe - Location and Status.\r
2107///\r
2108typedef struct {\r
2109 UINT8 TemperatureProbeSite :5;\r
2110 UINT8 TemperatureProbeStatus :3;\r
2111} MISC_TEMPERATURE_PROBE_LOCATION;\r
2112\r
2113///\r
2114/// Temperature Probe (Type 28).\r
2115///\r
2116/// This structure describes the attributes for a temperature probe in the system.\r
2117/// Each structure describes a single temperature probe.\r
2118///\r
2119typedef struct {\r
2120 SMBIOS_STRUCTURE Hdr;\r
2121 SMBIOS_TABLE_STRING Description;\r
2122 MISC_TEMPERATURE_PROBE_LOCATION LocationAndStatus;\r
2123 UINT16 MaximumValue;\r
2124 UINT16 MinimumValue;\r
2125 UINT16 Resolution;\r
2126 UINT16 Tolerance;\r
2127 UINT16 Accuracy;\r
2128 UINT32 OEMDefined;\r
2129 UINT16 NominalValue;\r
2130} SMBIOS_TABLE_TYPE28;\r
2131\r
2132///\r
2133/// Electrical Current Probe - Location and Status.\r
2134///\r
2135typedef struct {\r
2136 UINT8 ElectricalCurrentProbeSite :5;\r
2137 UINT8 ElectricalCurrentProbeStatus :3;\r
2138} MISC_ELECTRICAL_CURRENT_PROBE_LOCATION;\r
2139\r
2140///\r
2141/// Electrical Current Probe (Type 29).\r
2142///\r
2143/// This structure describes the attributes for an electrical current probe in the system.\r
2144/// Each structure describes a single electrical current probe.\r
2145///\r
2146typedef struct {\r
2147 SMBIOS_STRUCTURE Hdr;\r
2148 SMBIOS_TABLE_STRING Description;\r
2149 MISC_ELECTRICAL_CURRENT_PROBE_LOCATION LocationAndStatus;\r
2150 UINT16 MaximumValue;\r
2151 UINT16 MinimumValue;\r
2152 UINT16 Resolution;\r
2153 UINT16 Tolerance;\r
2154 UINT16 Accuracy;\r
2155 UINT32 OEMDefined;\r
2156 UINT16 NominalValue;\r
2157} SMBIOS_TABLE_TYPE29;\r
2158\r
2159///\r
2160/// Out-of-Band Remote Access (Type 30).\r
2161///\r
2162/// This structure describes the attributes and policy settings of a hardware facility\r
2163/// that may be used to gain remote access to a hardware system when the operating system\r
2164/// is not available due to power-down status, hardware failures, or boot failures.\r
2165///\r
2166typedef struct {\r
2167 SMBIOS_STRUCTURE Hdr;\r
2168 SMBIOS_TABLE_STRING ManufacturerName;\r
2169 UINT8 Connections;\r
2170} SMBIOS_TABLE_TYPE30;\r
2171\r
2172///\r
2173/// Boot Integrity Services (BIS) Entry Point (Type 31).\r
2174///\r
2175/// Structure type 31 (decimal) is reserved for use by the Boot Integrity Services (BIS).\r
2176///\r
2177typedef struct {\r
2178 SMBIOS_STRUCTURE Hdr;\r
2179 UINT8 Checksum;\r
2180 UINT8 Reserved1;\r
2181 UINT16 Reserved2;\r
2182 UINT32 BisEntry16;\r
2183 UINT32 BisEntry32;\r
2184 UINT64 Reserved3;\r
2185 UINT32 Reserved4;\r
2186} SMBIOS_TABLE_TYPE31;\r
2187\r
2188///\r
2189/// System Boot Information - System Boot Status.\r
2190///\r
2191typedef enum {\r
2192 BootInformationStatusNoError = 0x00,\r
2193 BootInformationStatusNoBootableMedia = 0x01,\r
2194 BootInformationStatusNormalOSFailedLoading = 0x02,\r
2195 BootInformationStatusFirmwareDetectedFailure = 0x03,\r
2196 BootInformationStatusOSDetectedFailure = 0x04,\r
2197 BootInformationStatusUserRequestedBoot = 0x05,\r
2198 BootInformationStatusSystemSecurityViolation = 0x06,\r
2199 BootInformationStatusPreviousRequestedImage = 0x07,\r
2200 BootInformationStatusWatchdogTimerExpired = 0x08,\r
2201 BootInformationStatusStartReserved = 0x09,\r
2202 BootInformationStatusStartOemSpecific = 0x80,\r
2203 BootInformationStatusStartProductSpecific = 0xC0\r
2204} MISC_BOOT_INFORMATION_STATUS_DATA_TYPE;\r
2205\r
2206///\r
2207/// System Boot Information (Type 32).\r
2208///\r
2209/// The client system firmware, e.g. BIOS, communicates the System Boot Status to the\r
2210/// client's Pre-boot Execution Environment (PXE) boot image or OS-present management\r
2211/// application via this structure. When used in the PXE environment, for example,\r
2212/// this code identifies the reason the PXE was initiated and can be used by boot-image\r
2213/// software to further automate an enterprise's PXE sessions. For example, an enterprise\r
2214/// could choose to automatically download a hardware-diagnostic image to a client whose\r
2215/// reason code indicated either a firmware- or operating system-detected hardware failure.\r
2216///\r
2217typedef struct {\r
2218 SMBIOS_STRUCTURE Hdr;\r
2219 UINT8 Reserved[6];\r
2220 UINT8 BootStatus; ///< The enumeration value from MISC_BOOT_INFORMATION_STATUS_DATA_TYPE.\r
2221} SMBIOS_TABLE_TYPE32;\r
2222\r
2223///\r
2224/// 64-bit Memory Error Information (Type 33).\r
2225///\r
2226/// This structure describes an error within a Physical Memory Array,\r
2227/// when the error address is above 4G (0xFFFFFFFF).\r
2228///\r
2229typedef struct {\r
2230 SMBIOS_STRUCTURE Hdr;\r
2231 UINT8 ErrorType; ///< The enumeration value from MEMORY_ERROR_TYPE.\r
2232 UINT8 ErrorGranularity; ///< The enumeration value from MEMORY_ERROR_GRANULARITY.\r
2233 UINT8 ErrorOperation; ///< The enumeration value from MEMORY_ERROR_OPERATION.\r
2234 UINT32 VendorSyndrome;\r
2235 UINT64 MemoryArrayErrorAddress;\r
2236 UINT64 DeviceErrorAddress;\r
2237 UINT32 ErrorResolution;\r
2238} SMBIOS_TABLE_TYPE33;\r
2239\r
2240///\r
2241/// Management Device - Type.\r
2242///\r
2243typedef enum {\r
2244 ManagementDeviceTypeOther = 0x01,\r
2245 ManagementDeviceTypeUnknown = 0x02,\r
2246 ManagementDeviceTypeLm75 = 0x03,\r
2247 ManagementDeviceTypeLm78 = 0x04,\r
2248 ManagementDeviceTypeLm79 = 0x05,\r
2249 ManagementDeviceTypeLm80 = 0x06,\r
2250 ManagementDeviceTypeLm81 = 0x07,\r
2251 ManagementDeviceTypeAdm9240 = 0x08,\r
2252 ManagementDeviceTypeDs1780 = 0x09,\r
2253 ManagementDeviceTypeMaxim1617 = 0x0A,\r
2254 ManagementDeviceTypeGl518Sm = 0x0B,\r
2255 ManagementDeviceTypeW83781D = 0x0C,\r
2256 ManagementDeviceTypeHt82H791 = 0x0D\r
2257} MISC_MANAGEMENT_DEVICE_TYPE;\r
2258\r
2259///\r
2260/// Management Device - Address Type.\r
2261///\r
2262typedef enum {\r
2263 ManagementDeviceAddressTypeOther = 0x01,\r
2264 ManagementDeviceAddressTypeUnknown = 0x02,\r
2265 ManagementDeviceAddressTypeIOPort = 0x03,\r
2266 ManagementDeviceAddressTypeMemory = 0x04,\r
2267 ManagementDeviceAddressTypeSmbus = 0x05\r
2268} MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE;\r
2269\r
2270///\r
2271/// Management Device (Type 34).\r
2272///\r
2273/// The information in this structure defines the attributes of a Management Device.\r
2274/// A Management Device might control one or more fans or voltage, current, or temperature\r
2275/// probes as defined by one or more Management Device Component structures.\r
2276///\r
2277typedef struct {\r
2278 SMBIOS_STRUCTURE Hdr;\r
2279 SMBIOS_TABLE_STRING Description;\r
2280 UINT8 Type; ///< The enumeration value from MISC_MANAGEMENT_DEVICE_TYPE.\r
2281 UINT32 Address;\r
2282 UINT8 AddressType; ///< The enumeration value from MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE.\r
2283} SMBIOS_TABLE_TYPE34;\r
2284\r
2285///\r
2286/// Management Device Component (Type 35)\r
2287///\r
2288/// This structure associates a cooling device or environmental probe with structures\r
2289/// that define the controlling hardware device and (optionally) the component's thresholds.\r
2290///\r
2291typedef struct {\r
2292 SMBIOS_STRUCTURE Hdr;\r
2293 SMBIOS_TABLE_STRING Description;\r
2294 UINT16 ManagementDeviceHandle;\r
2295 UINT16 ComponentHandle;\r
2296 UINT16 ThresholdHandle;\r
2297} SMBIOS_TABLE_TYPE35;\r
2298\r
2299///\r
2300/// Management Device Threshold Data (Type 36).\r
2301///\r
2302/// The information in this structure defines threshold information for\r
2303/// a component (probe or cooling-unit) contained within a Management Device.\r
2304///\r
2305typedef struct {\r
2306 SMBIOS_STRUCTURE Hdr;\r
2307 UINT16 LowerThresholdNonCritical;\r
2308 UINT16 UpperThresholdNonCritical;\r
2309 UINT16 LowerThresholdCritical;\r
2310 UINT16 UpperThresholdCritical;\r
2311 UINT16 LowerThresholdNonRecoverable;\r
2312 UINT16 UpperThresholdNonRecoverable;\r
2313} SMBIOS_TABLE_TYPE36;\r
2314\r
2315///\r
2316/// Memory Channel Entry.\r
2317///\r
2318typedef struct {\r
2319 UINT8 DeviceLoad;\r
2320 UINT16 DeviceHandle;\r
2321} MEMORY_DEVICE;\r
2322\r
2323///\r
2324/// Memory Channel - Channel Type.\r
2325///\r
2326typedef enum {\r
2327 MemoryChannelTypeOther = 0x01,\r
2328 MemoryChannelTypeUnknown = 0x02,\r
2329 MemoryChannelTypeRambus = 0x03,\r
2330 MemoryChannelTypeSyncLink = 0x04\r
2331} MEMORY_CHANNEL_TYPE;\r
2332\r
2333///\r
2334/// Memory Channel (Type 37)\r
2335///\r
2336/// The information in this structure provides the correlation between a Memory Channel\r
2337/// and its associated Memory Devices. Each device presents one or more loads to the channel.\r
2338/// The sum of all device loads cannot exceed the channel's defined maximum.\r
2339///\r
2340typedef struct {\r
2341 SMBIOS_STRUCTURE Hdr;\r
2342 UINT8 ChannelType;\r
2343 UINT8 MaximumChannelLoad;\r
2344 UINT8 MemoryDeviceCount;\r
2345 MEMORY_DEVICE MemoryDevice[1];\r
2346} SMBIOS_TABLE_TYPE37;\r
2347\r
2348///\r
2349/// IPMI Device Information - BMC Interface Type\r
2350///\r
2351typedef enum {\r
2352 IPMIDeviceInfoInterfaceTypeUnknown = 0x00,\r
2353 IPMIDeviceInfoInterfaceTypeKCS = 0x01, ///< The Keyboard Controller Style.\r
2354 IPMIDeviceInfoInterfaceTypeSMIC = 0x02, ///< The Server Management Interface Chip.\r
2355 IPMIDeviceInfoInterfaceTypeBT = 0x03, ///< The Block Transfer\r
2356 IPMIDeviceInfoInterfaceTypeSSIF = 0x04 ///< SMBus System Interface\r
2357} BMC_INTERFACE_TYPE;\r
2358\r
2359///\r
2360/// IPMI Device Information (Type 38).\r
2361///\r
2362/// The information in this structure defines the attributes of an\r
2363/// Intelligent Platform Management Interface (IPMI) Baseboard Management Controller (BMC).\r
2364///\r
2365/// The Type 42 structure can also be used to describe a physical management controller\r
2366/// host interface and one or more protocols that share that interface. If IPMI is not\r
2367/// shared with other protocols, either the Type 38 or Type 42 structures can be used.\r
2368/// Providing Type 38 is recommended for backward compatibility.\r
2369///\r
2370typedef struct {\r
2371 SMBIOS_STRUCTURE Hdr;\r
2372 UINT8 InterfaceType; ///< The enumeration value from BMC_INTERFACE_TYPE.\r
2373 UINT8 IPMISpecificationRevision;\r
2374 UINT8 I2CSlaveAddress;\r
2375 UINT8 NVStorageDeviceAddress;\r
2376 UINT64 BaseAddress;\r
2377 UINT8 BaseAddressModifier_InterruptInfo;\r
2378 UINT8 InterruptNumber;\r
2379} SMBIOS_TABLE_TYPE38;\r
2380\r
2381///\r
2382/// System Power Supply - Power Supply Characteristics.\r
2383///\r
2384typedef struct {\r
2385 UINT16 PowerSupplyHotReplaceable:1;\r
2386 UINT16 PowerSupplyPresent :1;\r
2387 UINT16 PowerSupplyUnplugged :1;\r
2388 UINT16 InputVoltageRangeSwitch :4;\r
2389 UINT16 PowerSupplyStatus :3;\r
2390 UINT16 PowerSupplyType :4;\r
2391 UINT16 Reserved :2;\r
2392} SYS_POWER_SUPPLY_CHARACTERISTICS;\r
2393\r
2394///\r
2395/// System Power Supply (Type 39).\r
2396///\r
2397/// This structure identifies attributes of a system power supply. One instance\r
2398/// of this record is present for each possible power supply in a system.\r
2399///\r
2400typedef struct {\r
2401 SMBIOS_STRUCTURE Hdr;\r
2402 UINT8 PowerUnitGroup;\r
2403 SMBIOS_TABLE_STRING Location;\r
2404 SMBIOS_TABLE_STRING DeviceName;\r
2405 SMBIOS_TABLE_STRING Manufacturer;\r
2406 SMBIOS_TABLE_STRING SerialNumber;\r
2407 SMBIOS_TABLE_STRING AssetTagNumber;\r
2408 SMBIOS_TABLE_STRING ModelPartNumber;\r
2409 SMBIOS_TABLE_STRING RevisionLevel;\r
2410 UINT16 MaxPowerCapacity;\r
2411 SYS_POWER_SUPPLY_CHARACTERISTICS PowerSupplyCharacteristics;\r
2412 UINT16 InputVoltageProbeHandle;\r
2413 UINT16 CoolingDeviceHandle;\r
2414 UINT16 InputCurrentProbeHandle;\r
2415} SMBIOS_TABLE_TYPE39;\r
2416\r
2417///\r
2418/// Additional Information Entry Format.\r
2419///\r
2420typedef struct {\r
2421 UINT8 EntryLength;\r
2422 UINT16 ReferencedHandle;\r
2423 UINT8 ReferencedOffset;\r
2424 SMBIOS_TABLE_STRING EntryString;\r
2425 UINT8 Value[1];\r
2426} ADDITIONAL_INFORMATION_ENTRY;\r
2427\r
2428///\r
2429/// Additional Information (Type 40).\r
2430///\r
2431/// This structure is intended to provide additional information for handling unspecified\r
2432/// enumerated values and interim field updates in another structure.\r
2433///\r
2434typedef struct {\r
2435 SMBIOS_STRUCTURE Hdr;\r
2436 UINT8 NumberOfAdditionalInformationEntries;\r
2437 ADDITIONAL_INFORMATION_ENTRY AdditionalInfoEntries[1];\r
2438} SMBIOS_TABLE_TYPE40;\r
2439\r
2440///\r
2441/// Onboard Devices Extended Information - Onboard Device Types.\r
2442///\r
2443typedef enum{\r
2444 OnBoardDeviceExtendedTypeOther = 0x01,\r
2445 OnBoardDeviceExtendedTypeUnknown = 0x02,\r
2446 OnBoardDeviceExtendedTypeVideo = 0x03,\r
2447 OnBoardDeviceExtendedTypeScsiController = 0x04,\r
2448 OnBoardDeviceExtendedTypeEthernet = 0x05,\r
2449 OnBoardDeviceExtendedTypeTokenRing = 0x06,\r
2450 OnBoardDeviceExtendedTypeSound = 0x07,\r
2451 OnBoardDeviceExtendedTypePATAController = 0x08,\r
2452 OnBoardDeviceExtendedTypeSATAController = 0x09,\r
2453 OnBoardDeviceExtendedTypeSASController = 0x0A\r
2454} ONBOARD_DEVICE_EXTENDED_INFO_TYPE;\r
2455\r
2456///\r
2457/// Onboard Devices Extended Information (Type 41).\r
2458///\r
2459/// The information in this structure defines the attributes of devices that\r
2460/// are onboard (soldered onto) a system element, usually the baseboard.\r
2461/// In general, an entry in this table implies that the BIOS has some level of\r
2462/// control over the enabling of the associated device for use by the system.\r
2463///\r
2464typedef struct {\r
2465 SMBIOS_STRUCTURE Hdr;\r
2466 SMBIOS_TABLE_STRING ReferenceDesignation;\r
2467 UINT8 DeviceType; ///< The enumeration value from ONBOARD_DEVICE_EXTENDED_INFO_TYPE\r
2468 UINT8 DeviceTypeInstance;\r
2469 UINT16 SegmentGroupNum;\r
2470 UINT8 BusNum;\r
2471 UINT8 DevFuncNum;\r
2472} SMBIOS_TABLE_TYPE41;\r
2473\r
2474///\r
2475/// Management Controller Host Interface - Interface Types.\r
2476/// 00h - 3Fh: MCTP Host Interfaces\r
2477///\r
2478typedef enum{\r
2479 MCHostInterfaceTypeNetworkHostInterface = 0x40,\r
2480 MCHostInterfaceTypeOemDefined = 0xF0\r
2481} MC_HOST_INTERFACE_TYPE;\r
2482\r
2483///\r
2484/// Management Controller Host Interface - Protocol Types.\r
2485///\r
2486typedef enum{\r
2487 MCHostInterfaceProtocolTypeIPMI = 0x02,\r
2488 MCHostInterfaceProtocolTypeMCTP = 0x03,\r
2489 MCHostInterfaceProtocolTypeRedfishOverIP = 0x04,\r
2490 MCHostInterfaceProtocolTypeOemDefined = 0xF0\r
2491} MC_HOST_INTERFACE_PROTOCOL_TYPE;\r
2492\r
2493///\r
2494/// Management Controller Host Interface (Type 42).\r
2495///\r
2496/// The information in this structure defines the attributes of a Management\r
2497/// Controller Host Interface that is not discoverable by "Plug and Play" mechanisms.\r
2498///\r
2499/// Type 42 should be used for management controller host interfaces that use protocols\r
2500/// other than IPMI or that use multiple protocols on a single host interface type.\r
2501///\r
2502/// This structure should also be provided if IPMI is shared with other protocols\r
2503/// over the same interface hardware. If IPMI is not shared with other protocols,\r
2504/// either the Type 38 or Type 42 structures can be used. Providing Type 38 is\r
2505/// recommended for backward compatibility. The structures are not required to\r
2506/// be mutually exclusive. Type 38 and Type 42 structures may be implemented\r
2507/// simultaneously to provide backward compatibility with IPMI applications or drivers\r
2508/// that do not yet recognize the Type 42 structure.\r
2509///\r
2510typedef struct {\r
2511 SMBIOS_STRUCTURE Hdr;\r
2512 UINT8 InterfaceType; ///< The enumeration value from MC_HOST_INTERFACE_TYPE\r
2513 UINT8 InterfaceTypeSpecificDataLength;\r
2514 UINT8 InterfaceTypeSpecificData[4]; ///< This field has a minimum of four bytes\r
2515} SMBIOS_TABLE_TYPE42;\r
2516\r
2517///\r
2518/// TPM Device (Type 43).\r
2519///\r
2520typedef struct {\r
2521 SMBIOS_STRUCTURE Hdr;\r
2522 UINT8 VendorID[4];\r
2523 UINT8 MajorSpecVersion;\r
2524 UINT8 MinorSpecVersion;\r
2525 UINT32 FirmwareVersion1;\r
2526 UINT32 FirmwareVersion2;\r
2527 SMBIOS_TABLE_STRING Description;\r
2528 UINT64 Characteristics;\r
2529 UINT32 OemDefined;\r
2530} SMBIOS_TABLE_TYPE43;\r
2531\r
2532///\r
2533/// Inactive (Type 126)\r
2534///\r
2535typedef struct {\r
2536 SMBIOS_STRUCTURE Hdr;\r
2537} SMBIOS_TABLE_TYPE126;\r
2538\r
2539///\r
2540/// End-of-Table (Type 127)\r
2541///\r
2542typedef struct {\r
2543 SMBIOS_STRUCTURE Hdr;\r
2544} SMBIOS_TABLE_TYPE127;\r
2545\r
2546///\r
2547/// Union of all the possible SMBIOS record types.\r
2548///\r
2549typedef union {\r
2550 SMBIOS_STRUCTURE *Hdr;\r
2551 SMBIOS_TABLE_TYPE0 *Type0;\r
2552 SMBIOS_TABLE_TYPE1 *Type1;\r
2553 SMBIOS_TABLE_TYPE2 *Type2;\r
2554 SMBIOS_TABLE_TYPE3 *Type3;\r
2555 SMBIOS_TABLE_TYPE4 *Type4;\r
2556 SMBIOS_TABLE_TYPE5 *Type5;\r
2557 SMBIOS_TABLE_TYPE6 *Type6;\r
2558 SMBIOS_TABLE_TYPE7 *Type7;\r
2559 SMBIOS_TABLE_TYPE8 *Type8;\r
2560 SMBIOS_TABLE_TYPE9 *Type9;\r
2561 SMBIOS_TABLE_TYPE10 *Type10;\r
2562 SMBIOS_TABLE_TYPE11 *Type11;\r
2563 SMBIOS_TABLE_TYPE12 *Type12;\r
2564 SMBIOS_TABLE_TYPE13 *Type13;\r
2565 SMBIOS_TABLE_TYPE14 *Type14;\r
2566 SMBIOS_TABLE_TYPE15 *Type15;\r
2567 SMBIOS_TABLE_TYPE16 *Type16;\r
2568 SMBIOS_TABLE_TYPE17 *Type17;\r
2569 SMBIOS_TABLE_TYPE18 *Type18;\r
2570 SMBIOS_TABLE_TYPE19 *Type19;\r
2571 SMBIOS_TABLE_TYPE20 *Type20;\r
2572 SMBIOS_TABLE_TYPE21 *Type21;\r
2573 SMBIOS_TABLE_TYPE22 *Type22;\r
2574 SMBIOS_TABLE_TYPE23 *Type23;\r
2575 SMBIOS_TABLE_TYPE24 *Type24;\r
2576 SMBIOS_TABLE_TYPE25 *Type25;\r
2577 SMBIOS_TABLE_TYPE26 *Type26;\r
2578 SMBIOS_TABLE_TYPE27 *Type27;\r
2579 SMBIOS_TABLE_TYPE28 *Type28;\r
2580 SMBIOS_TABLE_TYPE29 *Type29;\r
2581 SMBIOS_TABLE_TYPE30 *Type30;\r
2582 SMBIOS_TABLE_TYPE31 *Type31;\r
2583 SMBIOS_TABLE_TYPE32 *Type32;\r
2584 SMBIOS_TABLE_TYPE33 *Type33;\r
2585 SMBIOS_TABLE_TYPE34 *Type34;\r
2586 SMBIOS_TABLE_TYPE35 *Type35;\r
2587 SMBIOS_TABLE_TYPE36 *Type36;\r
2588 SMBIOS_TABLE_TYPE37 *Type37;\r
2589 SMBIOS_TABLE_TYPE38 *Type38;\r
2590 SMBIOS_TABLE_TYPE39 *Type39;\r
2591 SMBIOS_TABLE_TYPE40 *Type40;\r
2592 SMBIOS_TABLE_TYPE41 *Type41;\r
2593 SMBIOS_TABLE_TYPE42 *Type42;\r
2594 SMBIOS_TABLE_TYPE43 *Type43;\r
2595 SMBIOS_TABLE_TYPE126 *Type126;\r
2596 SMBIOS_TABLE_TYPE127 *Type127;\r
2597 UINT8 *Raw;\r
2598} SMBIOS_STRUCTURE_POINTER;\r
2599\r
2600#pragma pack()\r
2601\r
2602#endif\r
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