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1 | /** @file\r | |
2 | Memory-only library functions with no library constructor/destructor\r | |
3 | \r | |
4 | Copyright (c) 2006, Intel Corporation\r | |
5 | All rights reserved. This program and the accompanying materials\r | |
6 | are licensed and made available under the terms and conditions of the BSD License\r | |
7 | which accompanies this distribution. The full text of the license may be found at\r | |
8 | http://opensource.org/licenses/bsd-license.php\r | |
9 | \r | |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
12 | \r | |
13 | Module Name: BaseLib.h\r | |
14 | \r | |
15 | **/\r | |
16 | \r | |
17 | #ifndef __BASE_LIB__\r | |
18 | #define __BASE_LIB__\r | |
19 | \r | |
20 | //\r | |
21 | // Definitions for architecture specific types\r | |
22 | // These include SPIN_LOCK and BASE_LIBRARY_JUMP_BUFFER\r | |
23 | //\r | |
24 | \r | |
25 | //\r | |
26 | // SPIN_LOCK\r | |
27 | //\r | |
28 | typedef UINTN SPIN_LOCK;\r | |
29 | \r | |
30 | #if defined (MDE_CPU_IA32)\r | |
31 | //\r | |
32 | // IA32 context buffer used by SetJump() and LongJump()\r | |
33 | //\r | |
34 | typedef struct {\r | |
35 | UINT32 Ebx;\r | |
36 | UINT32 Esi;\r | |
37 | UINT32 Edi;\r | |
38 | UINT32 Ebp;\r | |
39 | UINT32 Esp;\r | |
40 | UINT32 Eip;\r | |
41 | } BASE_LIBRARY_JUMP_BUFFER;\r | |
42 | \r | |
43 | #elif defined (MDE_CPU_IPF)\r | |
44 | //\r | |
45 | // IPF context buffer used by SetJump() and LongJump()\r | |
46 | //\r | |
47 | typedef struct {\r | |
48 | UINT64 InitialUNAT;\r | |
49 | UINT64 AfterSpillUNAT;\r | |
50 | UINT64 PFS;\r | |
51 | UINT64 BSP;\r | |
52 | UINT64 RNAT;\r | |
53 | UINT64 Predicates;\r | |
54 | UINT64 LoopCount;\r | |
55 | UINT64 R4;\r | |
56 | UINT64 R5;\r | |
57 | UINT64 R6;\r | |
58 | UINT64 R7;\r | |
59 | UINT64 SP;\r | |
60 | UINT64 F2Low;\r | |
61 | UINT64 F2High;\r | |
62 | UINT64 F3Low;\r | |
63 | UINT64 F3High;\r | |
64 | UINT64 F4Low;\r | |
65 | UINT64 F4High;\r | |
66 | UINT64 F5Low;\r | |
67 | UINT64 F5High;\r | |
68 | UINT64 F16Low;\r | |
69 | UINT64 F16High;\r | |
70 | UINT64 F17Low;\r | |
71 | UINT64 F17High;\r | |
72 | UINT64 F18Low;\r | |
73 | UINT64 F18High;\r | |
74 | UINT64 F19Low;\r | |
75 | UINT64 F19High;\r | |
76 | UINT64 F20Low;\r | |
77 | UINT64 F20High;\r | |
78 | UINT64 F21Low;\r | |
79 | UINT64 F21High;\r | |
80 | UINT64 F22Low;\r | |
81 | UINT64 F22High;\r | |
82 | UINT64 F23Low;\r | |
83 | UINT64 F23High;\r | |
84 | UINT64 F24Low;\r | |
85 | UINT64 F24High;\r | |
86 | UINT64 F25Low;\r | |
87 | UINT64 F25High;\r | |
88 | UINT64 F26Low;\r | |
89 | UINT64 F26High;\r | |
90 | UINT64 F27Low;\r | |
91 | UINT64 F27High;\r | |
92 | UINT64 F28Low;\r | |
93 | UINT64 F28High;\r | |
94 | UINT64 F29Low;\r | |
95 | UINT64 F29High;\r | |
96 | UINT64 F30Low;\r | |
97 | UINT64 F30High;\r | |
98 | UINT64 F31Low;\r | |
99 | UINT64 F31High;\r | |
100 | UINT64 FPSR;\r | |
101 | UINT64 BR0;\r | |
102 | UINT64 BR1;\r | |
103 | UINT64 BR2;\r | |
104 | UINT64 BR3;\r | |
105 | UINT64 BR4;\r | |
106 | UINT64 BR5;\r | |
107 | } BASE_LIBRARY_JUMP_BUFFER;\r | |
108 | \r | |
109 | #elif defined (MDE_CPU_X64)\r | |
110 | //\r | |
111 | // X64 context buffer used by SetJump() and LongJump()\r | |
112 | //\r | |
113 | typedef struct {\r | |
114 | UINT64 Rbx;\r | |
115 | UINT64 Rsp;\r | |
116 | UINT64 Rbp;\r | |
117 | UINT64 Rdi;\r | |
118 | UINT64 Rsi;\r | |
119 | UINT64 R12;\r | |
120 | UINT64 R13;\r | |
121 | UINT64 R14;\r | |
122 | UINT64 R15;\r | |
123 | UINT64 Rip;\r | |
124 | } BASE_LIBRARY_JUMP_BUFFER;\r | |
125 | \r | |
126 | #elif defined (MDE_CPU_EBC)\r | |
127 | //\r | |
128 | // EBC context buffer used by SetJump() and LongJump()\r | |
129 | //\r | |
130 | typedef struct {\r | |
131 | UINT64 R0;\r | |
132 | UINT64 R1;\r | |
133 | UINT64 R2;\r | |
134 | UINT64 R3;\r | |
135 | UINT64 IP;\r | |
136 | } BASE_LIBRARY_JUMP_BUFFER;\r | |
137 | \r | |
138 | #else\r | |
139 | #error Unknown Processor Type\r | |
140 | #endif\r | |
141 | \r | |
142 | //\r | |
143 | // String Services\r | |
144 | //\r | |
145 | \r | |
146 | /**\r | |
147 | Copies one Null-terminated Unicode string to another Null-terminated Unicode\r | |
148 | string and returns the new Unicode string.\r | |
149 | \r | |
150 | This function copies the contents of the Unicode string Source to the Unicode\r | |
151 | string Destination, and returns Destination. If Source and Destination\r | |
152 | overlap, then the results are undefined.\r | |
153 | \r | |
154 | If Destination is NULL, then ASSERT().\r | |
155 | If Source is NULL, then ASSERT().\r | |
156 | If Source and Destination overlap, then ASSERT().\r | |
157 | If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r | |
158 | PcdMaximumUnicodeStringLength Unicode characters, then ASSERT().\r | |
159 | \r | |
160 | @param Destination Pointer to a Null-terminated Unicode string.\r | |
161 | @param Source Pointer to a Null-terminated Unicode string.\r | |
162 | \r | |
163 | @return Destiantion\r | |
164 | \r | |
165 | **/\r | |
166 | CHAR16 *\r | |
167 | EFIAPI\r | |
168 | StrCpy (\r | |
169 | OUT CHAR16 *Destination,\r | |
170 | IN CONST CHAR16 *Source\r | |
171 | );\r | |
172 | \r | |
173 | /**\r | |
174 | Copies one Null-terminated Unicode string with a maximum length to another\r | |
175 | Null-terminated Unicode string with a maximum length and returns the new\r | |
176 | Unicode string.\r | |
177 | \r | |
178 | This function copies the contents of the Unicode string Source to the Unicode\r | |
179 | string Destination, and returns Destination. At most, Length Unicode\r | |
180 | characters are copied from Source to Destination. If Length is 0, then\r | |
181 | Destination is returned unmodified. If Length is greater that the number of\r | |
182 | Unicode characters in Source, then Destination is padded with Null Unicode\r | |
183 | characters. If Source and Destination overlap, then the results are\r | |
184 | undefined.\r | |
185 | \r | |
186 | If Destination is NULL, then ASSERT().\r | |
187 | If Source is NULL, then ASSERT().\r | |
188 | If Source and Destination overlap, then ASSERT().\r | |
189 | If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r | |
190 | PcdMaximumUnicodeStringLength Unicode characters, then ASSERT().\r | |
191 | \r | |
192 | @param Destination Pointer to a Null-terminated Unicode string.\r | |
193 | @param Source Pointer to a Null-terminated Unicode string.\r | |
194 | @param Length Maximum number of Unicode characters to copy.\r | |
195 | \r | |
196 | @return Destination\r | |
197 | \r | |
198 | **/\r | |
199 | CHAR16 *\r | |
200 | EFIAPI\r | |
201 | StrnCpy (\r | |
202 | OUT CHAR16 *Destination,\r | |
203 | IN CONST CHAR16 *Source,\r | |
204 | IN UINTN Length\r | |
205 | );\r | |
206 | \r | |
207 | /**\r | |
208 | Returns the length of a Null-terminated Unicode string.\r | |
209 | \r | |
210 | This function returns the number of Unicode characters in the Null-terminated\r | |
211 | Unicode string specified by String.\r | |
212 | \r | |
213 | If String is NULL, then ASSERT().\r | |
214 | If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r | |
215 | PcdMaximumUnicodeStringLength Unicode characters, then ASSERT().\r | |
216 | \r | |
217 | @param String Pointer to a Null-terminated Unicode string.\r | |
218 | \r | |
219 | @return The length of String.\r | |
220 | \r | |
221 | **/\r | |
222 | UINTN\r | |
223 | EFIAPI\r | |
224 | StrLen (\r | |
225 | IN CONST CHAR16 *String\r | |
226 | );\r | |
227 | \r | |
228 | /**\r | |
229 | Returns the size of a Null-terminated Unicode string in bytes, including the\r | |
230 | Null terminator.\r | |
231 | \r | |
232 | This function returns the size, in bytes, of the Null-terminated Unicode\r | |
233 | string specified by String.\r | |
234 | \r | |
235 | If String is NULL, then ASSERT().\r | |
236 | If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r | |
237 | PcdMaximumUnicodeStringLength Unicode characters, then ASSERT().\r | |
238 | \r | |
239 | @param String Pointer to a Null-terminated Unicode string.\r | |
240 | \r | |
241 | @return The size of String.\r | |
242 | \r | |
243 | **/\r | |
244 | UINTN\r | |
245 | EFIAPI\r | |
246 | StrSize (\r | |
247 | IN CONST CHAR16 *String\r | |
248 | );\r | |
249 | \r | |
250 | /**\r | |
251 | Compares two Null-terminated Unicode strings, and returns the difference\r | |
252 | between the first mismatched Unicode characters.\r | |
253 | \r | |
254 | This function compares the Null-terminated Unicode string FirstString to the\r | |
255 | Null-terminated Unicode string SecondString. If FirstString is identical to\r | |
256 | SecondString, then 0 is returned. Otherwise, the value returned is the first\r | |
257 | mismatched Unicode character in SecondString subtracted from the first\r | |
258 | mismatched Unicode character in FirstString.\r | |
259 | \r | |
260 | If FirstString is NULL, then ASSERT().\r | |
261 | If SecondString is NULL, then ASSERT().\r | |
262 | If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more\r | |
263 | than PcdMaximumUnicodeStringLength Unicode characters, then ASSERT().\r | |
264 | If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more\r | |
265 | than PcdMaximumUnicodeStringLength Unicode characters, then ASSERT().\r | |
266 | \r | |
267 | @param FirstString Pointer to a Null-terminated Unicode string.\r | |
268 | @param SecondString Pointer to a Null-terminated Unicode string.\r | |
269 | \r | |
270 | @retval 0 FirstString is identical to SecondString.\r | |
271 | @retval !=0 FirstString is not identical to SecondString.\r | |
272 | \r | |
273 | **/\r | |
274 | INTN\r | |
275 | EFIAPI\r | |
276 | StrCmp (\r | |
277 | IN CONST CHAR16 *FirstString,\r | |
278 | IN CONST CHAR16 *SecondString\r | |
279 | );\r | |
280 | \r | |
281 | /**\r | |
282 | Compares two Null-terminated Unicode strings with maximum lengths, and\r | |
283 | returns the difference between the first mismatched Unicode characters.\r | |
284 | \r | |
285 | This function compares the Null-terminated Unicode string FirstString to the\r | |
286 | Null-terminated Unicode string SecondString. At most, Length Unicode\r | |
287 | characters will be compared. If Length is 0, then 0 is returned. If\r | |
288 | FirstString is identical to SecondString, then 0 is returned. Otherwise, the\r | |
289 | value returned is the first mismatched Unicode character in SecondString\r | |
290 | subtracted from the first mismatched Unicode character in FirstString.\r | |
291 | \r | |
292 | If FirstString is NULL, then ASSERT().\r | |
293 | If SecondString is NULL, then ASSERT().\r | |
294 | If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more\r | |
295 | than PcdMaximumUnicodeStringLength Unicode characters, then ASSERT().\r | |
296 | If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more\r | |
297 | than PcdMaximumUnicodeStringLength Unicode characters, then ASSERT().\r | |
298 | \r | |
299 | @param FirstString Pointer to a Null-terminated Unicode string.\r | |
300 | @param SecondString Pointer to a Null-terminated Unicode string.\r | |
301 | @param Length Maximum number of Unicode characters to compare.\r | |
302 | \r | |
303 | @retval 0 FirstString is identical to SecondString.\r | |
304 | @retval !=0 FirstString is not identical to SecondString.\r | |
305 | \r | |
306 | **/\r | |
307 | INTN\r | |
308 | EFIAPI\r | |
309 | StrnCmp (\r | |
310 | IN CONST CHAR16 *FirstString,\r | |
311 | IN CONST CHAR16 *SecondString,\r | |
312 | IN UINTN Length\r | |
313 | );\r | |
314 | \r | |
315 | /**\r | |
316 | Concatenates one Null-terminated Unicode string to another Null-terminated\r | |
317 | Unicode string, and returns the concatenated Unicode string.\r | |
318 | \r | |
319 | This function concatenates two Null-terminated Unicode strings. The contents\r | |
320 | of Null-terminated Unicode string Source are concatenated to the end of\r | |
321 | Null-terminated Unicode string Destination. The Null-terminated concatenated\r | |
322 | Unicode String is returned. If Source and Destination overlap, then the\r | |
323 | results are undefined.\r | |
324 | \r | |
325 | If Destination is NULL, then ASSERT().\r | |
326 | If Source is NULL, then ASSERT().\r | |
327 | If Source and Destination overlap, then ASSERT().\r | |
328 | If PcdMaximumUnicodeStringLength is not zero, and Destination contains more\r | |
329 | than PcdMaximumUnicodeStringLength Unicode characters, then ASSERT().\r | |
330 | If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r | |
331 | PcdMaximumUnicodeStringLength Unicode characters, then ASSERT().\r | |
332 | If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination\r | |
333 | and Source results in a Unicode string with more than\r | |
334 | PcdMaximumUnicodeStringLength Unicode characters, then ASSERT().\r | |
335 | \r | |
336 | @param Destination Pointer to a Null-terminated Unicode string.\r | |
337 | @param Source Pointer to a Null-terminated Unicode string.\r | |
338 | \r | |
339 | @return Destination\r | |
340 | \r | |
341 | **/\r | |
342 | CHAR16 *\r | |
343 | EFIAPI\r | |
344 | StrCat (\r | |
345 | IN OUT CHAR16 *Destination,\r | |
346 | IN CONST CHAR16 *Source\r | |
347 | );\r | |
348 | \r | |
349 | /**\r | |
350 | Concatenates one Null-terminated Unicode string with a maximum length to the\r | |
351 | end of another Null-terminated Unicode string, and returns the concatenated\r | |
352 | Unicode string.\r | |
353 | \r | |
354 | This function concatenates two Null-terminated Unicode strings. The contents\r | |
355 | of Null-terminated Unicode string Source are concatenated to the end of\r | |
356 | Null-terminated Unicode string Destination, and Destination is returned. At\r | |
357 | most, Length Unicode characters are concatenated from Source to the end of\r | |
358 | Destination, and Destination is always Null-terminated. If Length is 0, then\r | |
359 | Destination is returned unmodified. If Source and Destination overlap, then\r | |
360 | the results are undefined.\r | |
361 | \r | |
362 | If Destination is NULL, then ASSERT().\r | |
363 | If Source is NULL, then ASSERT().\r | |
364 | If Source and Destination overlap, then ASSERT().\r | |
365 | If PcdMaximumUnicodeStringLength is not zero, and Destination contains more\r | |
366 | than PcdMaximumUnicodeStringLength Unicode characters, then ASSERT().\r | |
367 | If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r | |
368 | PcdMaximumUnicodeStringLength Unicode characters, then ASSERT().\r | |
369 | If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination\r | |
370 | and Source results in a Unicode string with more than\r | |
371 | PcdMaximumUnicodeStringLength Unicode characters, then ASSERT().\r | |
372 | \r | |
373 | @param Destination Pointer to a Null-terminated Unicode string.\r | |
374 | @param Source Pointer to a Null-terminated Unicode string.\r | |
375 | @param Length Maximum number of Unicode characters to concatenate from\r | |
376 | Source.\r | |
377 | \r | |
378 | @return Destination\r | |
379 | \r | |
380 | **/\r | |
381 | CHAR16 *\r | |
382 | EFIAPI\r | |
383 | StrnCat (\r | |
384 | IN OUT CHAR16 *Destination,\r | |
385 | IN CONST CHAR16 *Source,\r | |
386 | IN UINTN Length\r | |
387 | );\r | |
388 | \r | |
389 | /**\r | |
390 | Copies one Null-terminated ASCII string to another Null-terminated ASCII\r | |
391 | string and returns the new ASCII string.\r | |
392 | \r | |
393 | This function copies the contents of the ASCII string Source to the ASCII\r | |
394 | string Destination, and returns Destination. If Source and Destination\r | |
395 | overlap, then the results are undefined.\r | |
396 | \r | |
397 | If Destination is NULL, then ASSERT().\r | |
398 | If Source is NULL, then ASSERT().\r | |
399 | If Source and Destination overlap, then ASSERT().\r | |
400 | If PcdMaximumAsciiStringLength is not zero and Source contains more than\r | |
401 | PcdMaximumAsciiStringLength ASCII characters, then ASSERT().\r | |
402 | \r | |
403 | @param Destination Pointer to a Null-terminated ASCII string.\r | |
404 | @param Source Pointer to a Null-terminated ASCII string.\r | |
405 | \r | |
406 | @return Destination\r | |
407 | \r | |
408 | **/\r | |
409 | CHAR8 *\r | |
410 | EFIAPI\r | |
411 | AsciiStrCpy (\r | |
412 | OUT CHAR8 *Destination,\r | |
413 | IN CONST CHAR8 *Source\r | |
414 | );\r | |
415 | \r | |
416 | /**\r | |
417 | Copies one Null-terminated ASCII string with a maximum length to another\r | |
418 | Null-terminated ASCII string with a maximum length and returns the new ASCII\r | |
419 | string.\r | |
420 | \r | |
421 | This function copies the contents of the ASCII string Source to the ASCII\r | |
422 | string Destination, and returns Destination. At most, Length ASCII characters\r | |
423 | are copied from Source to Destination. If Length is 0, then Destination is\r | |
424 | returned unmodified. If Length is greater that the number of ASCII characters\r | |
425 | in Source, then Destination is padded with Null ASCII characters. If Source\r | |
426 | and Destination overlap, then the results are undefined.\r | |
427 | \r | |
428 | If Destination is NULL, then ASSERT().\r | |
429 | If Source is NULL, then ASSERT().\r | |
430 | If Source and Destination overlap, then ASSERT().\r | |
431 | If PcdMaximumAsciiStringLength is not zero, and Source contains more than\r | |
432 | PcdMaximumAsciiStringLength ASCII characters, then ASSERT().\r | |
433 | \r | |
434 | @param Destination Pointer to a Null-terminated ASCII string.\r | |
435 | @param Source Pointer to a Null-terminated ASCII string.\r | |
436 | @param Length Maximum number of ASCII characters to copy.\r | |
437 | \r | |
438 | @return Destination\r | |
439 | \r | |
440 | **/\r | |
441 | CHAR8 *\r | |
442 | EFIAPI\r | |
443 | AsciiStrnCpy (\r | |
444 | OUT CHAR8 *Destination,\r | |
445 | IN CONST CHAR8 *Source,\r | |
446 | IN UINTN Length\r | |
447 | );\r | |
448 | \r | |
449 | /**\r | |
450 | Returns the length of a Null-terminated ASCII string.\r | |
451 | \r | |
452 | This function returns the number of ASCII characters in the Null-terminated\r | |
453 | ASCII string specified by String.\r | |
454 | \r | |
455 | If String is NULL, then ASSERT().\r | |
456 | If PcdMaximumAsciiStringLength is not zero and String contains more than\r | |
457 | PcdMaximumAsciiStringLength ASCII characters, then ASSERT().\r | |
458 | \r | |
459 | @param String Pointer to a Null-terminated ASCII string.\r | |
460 | \r | |
461 | @return The length of String.\r | |
462 | \r | |
463 | **/\r | |
464 | UINTN\r | |
465 | EFIAPI\r | |
466 | AsciiStrLen (\r | |
467 | IN CONST CHAR8 *String\r | |
468 | );\r | |
469 | \r | |
470 | /**\r | |
471 | Returns the size of a Null-terminated ASCII string in bytes, including the\r | |
472 | Null terminator.\r | |
473 | \r | |
474 | This function returns the size, in bytes, of the Null-terminated ASCII string\r | |
475 | specified by String.\r | |
476 | \r | |
477 | If String is NULL, then ASSERT().\r | |
478 | If PcdMaximumAsciiStringLength is not zero and String contains more than\r | |
479 | PcdMaximumAsciiStringLength ASCII characters, then ASSERT().\r | |
480 | \r | |
481 | @param String Pointer to a Null-terminated ASCII string.\r | |
482 | \r | |
483 | @return The size of String.\r | |
484 | \r | |
485 | **/\r | |
486 | UINTN\r | |
487 | EFIAPI\r | |
488 | AsciiStrSize (\r | |
489 | IN CONST CHAR8 *String\r | |
490 | );\r | |
491 | \r | |
492 | /**\r | |
493 | Compares two Null-terminated ASCII strings, and returns the difference\r | |
494 | between the first mismatched ASCII characters.\r | |
495 | \r | |
496 | This function compares the Null-terminated ASCII string FirstString to the\r | |
497 | Null-terminated ASCII string SecondString. If FirstString is identical to\r | |
498 | SecondString, then 0 is returned. Otherwise, the value returned is the first\r | |
499 | mismatched ASCII character in SecondString subtracted from the first\r | |
500 | mismatched ASCII character in FirstString.\r | |
501 | \r | |
502 | If FirstString is NULL, then ASSERT().\r | |
503 | If SecondString is NULL, then ASSERT().\r | |
504 | If PcdMaximumAsciiStringLength is not zero and FirstString contains more than\r | |
505 | PcdMaximumAsciiStringLength ASCII characters, then ASSERT().\r | |
506 | If PcdMaximumAsciiStringLength is not zero and SecondString contains more\r | |
507 | than PcdMaximumAsciiStringLength ASCII characters, then ASSERT().\r | |
508 | \r | |
509 | @param FirstString Pointer to a Null-terminated ASCII string.\r | |
510 | @param SecondString Pointer to a Null-terminated ASCII string.\r | |
511 | \r | |
512 | @retval 0 FirstString is identical to SecondString.\r | |
513 | @retval !=0 FirstString is not identical to SecondString.\r | |
514 | \r | |
515 | **/\r | |
516 | INTN\r | |
517 | EFIAPI\r | |
518 | AsciiStrCmp (\r | |
519 | IN CONST CHAR8 *FirstString,\r | |
520 | IN CONST CHAR8 *SecondString\r | |
521 | );\r | |
522 | \r | |
523 | /**\r | |
524 | Performs a case insensitive comparison of two Null-terminated ASCII strings,\r | |
525 | and returns the difference between the first mismatched ASCII characters.\r | |
526 | \r | |
527 | This function performs a case insensitive comparison of the Null-terminated\r | |
528 | ASCII string FirstString to the Null-terminated ASCII string SecondString. If\r | |
529 | FirstString is identical to SecondString, then 0 is returned. Otherwise, the\r | |
530 | value returned is the first mismatched lower case ASCII character in\r | |
531 | SecondString subtracted from the first mismatched lower case ASCII character\r | |
532 | in FirstString.\r | |
533 | \r | |
534 | If FirstString is NULL, then ASSERT().\r | |
535 | If SecondString is NULL, then ASSERT().\r | |
536 | If PcdMaximumAsciiStringLength is not zero and FirstString contains more than\r | |
537 | PcdMaximumAsciiStringLength ASCII characters, then ASSERT().\r | |
538 | If PcdMaximumAsciiStringLength is not zero and SecondString contains more\r | |
539 | than PcdMaximumAsciiStringLength ASCII characters, then ASSERT().\r | |
540 | \r | |
541 | @param FirstString Pointer to a Null-terminated ASCII string.\r | |
542 | @param SecondString Pointer to a Null-terminated ASCII string.\r | |
543 | \r | |
544 | @retval 0 FirstString is identical to SecondString using case insensitive\r | |
545 | comparisons.\r | |
546 | @retval !=0 FirstString is not identical to SecondString using case\r | |
547 | insensitive comparisons.\r | |
548 | \r | |
549 | **/\r | |
550 | INTN\r | |
551 | EFIAPI\r | |
552 | AsciiStriCmp (\r | |
553 | IN CONST CHAR8 *FirstString,\r | |
554 | IN CONST CHAR8 *SecondString\r | |
555 | );\r | |
556 | \r | |
557 | /**\r | |
558 | Compares two Null-terminated ASCII strings with maximum lengths, and returns\r | |
559 | the difference between the first mismatched ASCII characters.\r | |
560 | \r | |
561 | This function compares the Null-terminated ASCII string FirstString to the\r | |
562 | Null-terminated ASCII string SecondString. At most, Length ASCII characters\r | |
563 | will be compared. If Length is 0, then 0 is returned. If FirstString is\r | |
564 | identical to SecondString, then 0 is returned. Otherwise, the value returned\r | |
565 | is the first mismatched ASCII character in SecondString subtracted from the\r | |
566 | first mismatched ASCII character in FirstString.\r | |
567 | \r | |
568 | If FirstString is NULL, then ASSERT().\r | |
569 | If SecondString is NULL, then ASSERT().\r | |
570 | If PcdMaximumAsciiStringLength is not zero and FirstString contains more than\r | |
571 | PcdMaximumAsciiStringLength ASCII characters, then ASSERT().\r | |
572 | If PcdMaximumAsciiStringLength is not zero and SecondString contains more\r | |
573 | than PcdMaximumAsciiStringLength ASCII characters, then ASSERT().\r | |
574 | \r | |
575 | @param FirstString Pointer to a Null-terminated ASCII string.\r | |
576 | @param SecondString Pointer to a Null-terminated ASCII string.\r | |
577 | \r | |
578 | @retval 0 FirstString is identical to SecondString.\r | |
579 | @retval !=0 FirstString is not identical to SecondString.\r | |
580 | \r | |
581 | **/\r | |
582 | INTN\r | |
583 | EFIAPI\r | |
584 | AsciiStrnCmp (\r | |
585 | IN CONST CHAR8 *FirstString,\r | |
586 | IN CONST CHAR8 *SecondString,\r | |
587 | IN UINTN Length\r | |
588 | );\r | |
589 | \r | |
590 | /**\r | |
591 | Concatenates one Null-terminated ASCII string to another Null-terminated\r | |
592 | ASCII string, and returns the concatenated ASCII string.\r | |
593 | \r | |
594 | This function concatenates two Null-terminated ASCII strings. The contents of\r | |
595 | Null-terminated ASCII string Source are concatenated to the end of Null-\r | |
596 | terminated ASCII string Destination. The Null-terminated concatenated ASCII\r | |
597 | String is returned.\r | |
598 | \r | |
599 | If Destination is NULL, then ASSERT().\r | |
600 | If Source is NULL, then ASSERT().\r | |
601 | If PcdMaximumAsciiStringLength is not zero and Destination contains more than\r | |
602 | PcdMaximumAsciiStringLength ASCII characters, then ASSERT().\r | |
603 | If PcdMaximumAsciiStringLength is not zero and Source contains more than\r | |
604 | PcdMaximumAsciiStringLength ASCII characters, then ASSERT().\r | |
605 | If PcdMaximumAsciiStringLength is not zero and concatenating Destination and\r | |
606 | Source results in a ASCII string with more than PcdMaximumAsciiStringLength\r | |
607 | ASCII characters, then ASSERT().\r | |
608 | \r | |
609 | @param Destination Pointer to a Null-terminated ASCII string.\r | |
610 | @param Source Pointer to a Null-terminated ASCII string.\r | |
611 | \r | |
612 | @return Destination\r | |
613 | \r | |
614 | **/\r | |
615 | CHAR8 *\r | |
616 | EFIAPI\r | |
617 | AsciiStrCat (\r | |
618 | IN OUT CHAR8 *Destination,\r | |
619 | IN CONST CHAR8 *Source\r | |
620 | );\r | |
621 | \r | |
622 | /**\r | |
623 | Concatenates one Null-terminated ASCII string with a maximum length to the\r | |
624 | end of another Null-terminated ASCII string, and returns the concatenated\r | |
625 | ASCII string.\r | |
626 | \r | |
627 | This function concatenates two Null-terminated ASCII strings. The contents\r | |
628 | of Null-terminated ASCII string Source are concatenated to the end of Null-\r | |
629 | terminated ASCII string Destination, and Destination is returned. At most,\r | |
630 | Length ASCII characters are concatenated from Source to the end of\r | |
631 | Destination, and Destination is always Null-terminated. If Length is 0, then\r | |
632 | Destination is returned unmodified. If Source and Destination overlap, then\r | |
633 | the results are undefined.\r | |
634 | \r | |
635 | If Destination is NULL, then ASSERT().\r | |
636 | If Source is NULL, then ASSERT().\r | |
637 | If Source and Destination overlap, then ASSERT().\r | |
638 | If PcdMaximumAsciiStringLength is not zero, and Destination contains more\r | |
639 | than PcdMaximumAsciiStringLength ASCII characters, then ASSERT().\r | |
640 | If PcdMaximumAsciiStringLength is not zero, and Source contains more than\r | |
641 | PcdMaximumAsciiStringLength ASCII characters, then ASSERT().\r | |
642 | If PcdMaximumAsciiStringLength is not zero, and concatenating Destination and\r | |
643 | Source results in a ASCII string with more than PcdMaximumAsciiStringLength\r | |
644 | ASCII characters, then ASSERT().\r | |
645 | \r | |
646 | @param Destination Pointer to a Null-terminated ASCII string.\r | |
647 | @param Source Pointer to a Null-terminated ASCII string.\r | |
648 | @param Length Maximum number of ASCII characters to concatenate from\r | |
649 | Source.\r | |
650 | \r | |
651 | @return Destination\r | |
652 | \r | |
653 | **/\r | |
654 | CHAR8 *\r | |
655 | EFIAPI\r | |
656 | AsciiStrnCat (\r | |
657 | IN OUT CHAR8 *Destination,\r | |
658 | IN CONST CHAR8 *Source,\r | |
659 | IN UINTN Length\r | |
660 | );\r | |
661 | \r | |
662 | //\r | |
663 | // LIST_ENTRY definition\r | |
664 | //\r | |
665 | typedef struct _LIST_ENTRY LIST_ENTRY;\r | |
666 | \r | |
667 | struct _LIST_ENTRY {\r | |
668 | LIST_ENTRY *ForwardLink;\r | |
669 | LIST_ENTRY *BackLink;\r | |
670 | };\r | |
671 | \r | |
672 | //\r | |
673 | // Linked List Functions and Macros\r | |
674 | //\r | |
675 | \r | |
676 | /**\r | |
677 | Initializes the head node of a doubly linked list that is declared as a\r | |
678 | global variable in a module.\r | |
679 | \r | |
680 | Initializes the forward and backward links of a new linked list. After\r | |
681 | initializing a linked list with this macro, the other linked list functions\r | |
682 | may be used to add and remove nodes from the linked list. This macro results\r | |
683 | in smaller executables by initializing the linked list in the data section,\r | |
684 | instead if calling the InitializeListHead() function to perform the\r | |
685 | equivalent operation.\r | |
686 | \r | |
687 | @param ListHead The head note of a list to initiailize.\r | |
688 | \r | |
689 | **/\r | |
690 | #define INITIALIZE_LIST_HEAD_VARIABLE(ListHead) {&ListHead, &ListHead}\r | |
691 | \r | |
692 | /**\r | |
693 | Initializes the head node of a doubly linked list, and returns the pointer to\r | |
694 | the head node of the doubly linked list.\r | |
695 | \r | |
696 | Initializes the forward and backward links of a new linked list. After\r | |
697 | initializing a linked list with this function, the other linked list\r | |
698 | functions may be used to add and remove nodes from the linked list. It is up\r | |
699 | to the caller of this function to allocate the memory for ListHead.\r | |
700 | \r | |
701 | If ListHead is NULL, then ASSERT().\r | |
702 | \r | |
703 | @param ListHead A pointer to the head node of a new doubly linked list.\r | |
704 | \r | |
705 | @return ListHead\r | |
706 | \r | |
707 | **/\r | |
708 | LIST_ENTRY *\r | |
709 | EFIAPI\r | |
710 | InitializeListHead (\r | |
711 | IN LIST_ENTRY *ListHead\r | |
712 | );\r | |
713 | \r | |
714 | /**\r | |
715 | Adds a node to the beginning of a doubly linked list, and returns the pointer\r | |
716 | to the head node of the doubly linked list.\r | |
717 | \r | |
718 | Adds the node Entry at the beginning of the doubly linked list denoted by\r | |
719 | ListHead, and returns ListHead.\r | |
720 | \r | |
721 | If ListHead is NULL, then ASSERT().\r | |
722 | If Entry is NULL, then ASSERT().\r | |
723 | If ListHead was not initialized with InitializeListHead(), then ASSERT().\r | |
724 | If PcdMaximumLinkedListLenth is not zero, and ListHead contains more than\r | |
725 | PcdMaximumLinkedListLenth nodes, then ASSERT().\r | |
726 | \r | |
727 | @param ListHead A pointer to the head node of a doubly linked list.\r | |
728 | @param Entry A pointer to a node that is to be inserted at the beginning\r | |
729 | of a doubly linked list.\r | |
730 | \r | |
731 | @return ListHead\r | |
732 | \r | |
733 | **/\r | |
734 | LIST_ENTRY *\r | |
735 | EFIAPI\r | |
736 | InsertHeadList (\r | |
737 | IN LIST_ENTRY *ListHead,\r | |
738 | IN LIST_ENTRY *Entry\r | |
739 | );\r | |
740 | \r | |
741 | /**\r | |
742 | Adds a node to the end of a doubly linked list, and returns the pointer to\r | |
743 | the head node of the doubly linked list.\r | |
744 | \r | |
745 | Adds the node Entry to the end of the doubly linked list denoted by ListHead,\r | |
746 | and returns ListHead.\r | |
747 | \r | |
748 | If ListHead is NULL, then ASSERT().\r | |
749 | If Entry is NULL, then ASSERT().\r | |
750 | If ListHead was not initialized with InitializeListHead(), then ASSERT().\r | |
751 | If PcdMaximumLinkedListLenth is not zero, and ListHead contains more than\r | |
752 | PcdMaximumLinkedListLenth nodes, then ASSERT().\r | |
753 | \r | |
754 | @param ListHead A pointer to the head node of a doubly linked list.\r | |
755 | @param Entry A pointer to a node that is to be added at the end of the\r | |
756 | doubly linked list.\r | |
757 | \r | |
758 | @return ListHead\r | |
759 | \r | |
760 | **/\r | |
761 | LIST_ENTRY *\r | |
762 | EFIAPI\r | |
763 | InsertTailList (\r | |
764 | IN LIST_ENTRY *ListHead,\r | |
765 | IN LIST_ENTRY *Entry\r | |
766 | );\r | |
767 | \r | |
768 | /**\r | |
769 | Retrieves the first node of a doubly linked list.\r | |
770 | \r | |
771 | Returns the first node of a doubly linked list. List must have been\r | |
772 | initialized with InitializeListHead(). If List is empty, then NULL is\r | |
773 | returned.\r | |
774 | \r | |
775 | If List is NULL, then ASSERT().\r | |
776 | If List was not initialized with InitializeListHead(), then ASSERT().\r | |
777 | If PcdMaximumLinkedListLenth is not zero, and List contains more than\r | |
778 | PcdMaximumLinkedListLenth nodes, then ASSERT().\r | |
779 | \r | |
780 | @param List A pointer to the head node of a doubly linked list.\r | |
781 | \r | |
782 | @return The first node of a doubly linked list.\r | |
783 | @retval NULL The list is empty.\r | |
784 | \r | |
785 | **/\r | |
786 | LIST_ENTRY *\r | |
787 | EFIAPI\r | |
788 | GetFirstNode (\r | |
789 | IN CONST LIST_ENTRY *List\r | |
790 | );\r | |
791 | \r | |
792 | /**\r | |
793 | Retrieves the next node of a doubly linked list.\r | |
794 | \r | |
795 | Returns the node of a doubly linked list that follows Node. List must have\r | |
796 | been initialized with InitializeListHead(). If List is empty, then List is\r | |
797 | returned.\r | |
798 | \r | |
799 | If List is NULL, then ASSERT().\r | |
800 | If Node is NULL, then ASSERT().\r | |
801 | If List was not initialized with InitializeListHead(), then ASSERT().\r | |
802 | If PcdMaximumLinkedListLenth is not zero, and List contains more than\r | |
803 | PcdMaximumLinkedListLenth nodes, then ASSERT().\r | |
804 | If Node is not a node in List, then ASSERT().\r | |
805 | \r | |
806 | @param List A pointer to the head node of a doubly linked list.\r | |
807 | @param Node A pointer to a node in the doubly linked list.\r | |
808 | \r | |
809 | @return Pointer to the next node if one exists. Otherwise a null value which\r | |
810 | is actually List is returned.\r | |
811 | \r | |
812 | **/\r | |
813 | LIST_ENTRY *\r | |
814 | EFIAPI\r | |
815 | GetNextNode (\r | |
816 | IN CONST LIST_ENTRY *List,\r | |
817 | IN CONST LIST_ENTRY *Node\r | |
818 | );\r | |
819 | \r | |
820 | /**\r | |
821 | Checks to see if a doubly linked list is empty or not.\r | |
822 | \r | |
823 | Checks to see if the doubly linked list is empty. If the linked list contains\r | |
824 | zero nodes, this function returns TRUE. Otherwise, it returns FALSE.\r | |
825 | \r | |
826 | If ListHead is NULL, then ASSERT().\r | |
827 | If ListHead was not initialized with InitializeListHead(), then ASSERT().\r | |
828 | If PcdMaximumLinkedListLenth is not zero, and List contains more than\r | |
829 | PcdMaximumLinkedListLenth nodes, then ASSERT().\r | |
830 | \r | |
831 | @param ListHead A pointer to the head node of a doubly linked list.\r | |
832 | \r | |
833 | @retval TRUE The linked list is empty.\r | |
834 | @retval FALSE The linked list is not empty.\r | |
835 | \r | |
836 | **/\r | |
837 | BOOLEAN\r | |
838 | EFIAPI\r | |
839 | IsListEmpty (\r | |
840 | IN CONST LIST_ENTRY *ListHead\r | |
841 | );\r | |
842 | \r | |
843 | /**\r | |
844 | Determines if a node in a doubly linked list is null.\r | |
845 | \r | |
846 | Returns FALSE if Node is one of the nodes in the doubly linked list specified\r | |
847 | by List. Otherwise, TRUE is returned. List must have been initialized with\r | |
848 | InitializeListHead().\r | |
849 | \r | |
850 | If List is NULL, then ASSERT().\r | |
851 | If Node is NULL, then ASSERT().\r | |
852 | If List was not initialized with InitializeListHead(), then ASSERT().\r | |
853 | If PcdMaximumLinkedListLenth is not zero, and List contains more than\r | |
854 | PcdMaximumLinkedListLenth nodes, then ASSERT().\r | |
855 | If Node is not a node in List and Node is not equal to List, then ASSERT().\r | |
856 | \r | |
857 | @param List A pointer to the head node of a doubly linked list.\r | |
858 | @param Node A pointer to a node in the doubly linked list.\r | |
859 | \r | |
860 | @retval TRUE Node is one of the nodes in the doubly linked list.\r | |
861 | @retval FALSE Node is not one of the nodes in the doubly linked list.\r | |
862 | \r | |
863 | **/\r | |
864 | BOOLEAN\r | |
865 | EFIAPI\r | |
866 | IsNull (\r | |
867 | IN CONST LIST_ENTRY *List,\r | |
868 | IN CONST LIST_ENTRY *Node\r | |
869 | );\r | |
870 | \r | |
871 | /**\r | |
872 | Determines if a node the last node in a doubly linked list.\r | |
873 | \r | |
874 | Returns TRUE if Node is the last node in the doubly linked list specified by\r | |
875 | List. Otherwise, FALSE is returned. List must have been initialized with\r | |
876 | InitializeListHead().\r | |
877 | \r | |
878 | If List is NULL, then ASSERT().\r | |
879 | If Node is NULL, then ASSERT().\r | |
880 | If List was not initialized with InitializeListHead(), then ASSERT().\r | |
881 | If PcdMaximumLinkedListLenth is not zero, and List contains more than\r | |
882 | PcdMaximumLinkedListLenth nodes, then ASSERT().\r | |
883 | If Node is not a node in List, then ASSERT().\r | |
884 | \r | |
885 | @param List A pointer to the head node of a doubly linked list.\r | |
886 | @param Node A pointer to a node in the doubly linked list.\r | |
887 | \r | |
888 | @retval TRUE Node is the last node in the linked list.\r | |
889 | @retval FALSE Node is not the last node in the linked list.\r | |
890 | \r | |
891 | **/\r | |
892 | BOOLEAN\r | |
893 | EFIAPI\r | |
894 | IsNodeAtEnd (\r | |
895 | IN CONST LIST_ENTRY *List,\r | |
896 | IN CONST LIST_ENTRY *Node\r | |
897 | );\r | |
898 | \r | |
899 | /**\r | |
900 | Swaps the location of two nodes in a doubly linked list, and returns the\r | |
901 | first node after the swap.\r | |
902 | \r | |
903 | If FirstEntry is identical to SecondEntry, then SecondEntry is returned.\r | |
904 | Otherwise, the location of the FirstEntry node is swapped with the location\r | |
905 | of the SecondEntry node in a doubly linked list. SecondEntry must be in the\r | |
906 | same double linked list as FirstEntry and that double linked list must have\r | |
907 | been initialized with InitializeListHead(). SecondEntry is returned after the\r | |
908 | nodes are swapped.\r | |
909 | \r | |
910 | If FirstEntry is NULL, then ASSERT().\r | |
911 | If SecondEntry is NULL, then ASSERT().\r | |
912 | If SecondEntry and FirstEntry are not in the same linked list, then ASSERT().\r | |
913 | If PcdMaximumLinkedListLenth is not zero, and the linked list containing\r | |
914 | FirstEntry and SecondEntry contains more than PcdMaximumLinkedListLenth\r | |
915 | nodes, then ASSERT().\r | |
916 | \r | |
917 | @param FirstEntry A pointer to a node in a linked list.\r | |
918 | @param SecondEntry A pointer to another node in the same linked list.\r | |
919 | \r | |
920 | **/\r | |
921 | LIST_ENTRY *\r | |
922 | EFIAPI\r | |
923 | SwapListEntries (\r | |
924 | IN LIST_ENTRY *FirstEntry,\r | |
925 | IN LIST_ENTRY *SecondEntry\r | |
926 | );\r | |
927 | \r | |
928 | /**\r | |
929 | Removes a node from a doubly linked list, and returns the node that follows\r | |
930 | the removed node.\r | |
931 | \r | |
932 | Removes the node Entry from a doubly linked list. It is up to the caller of\r | |
933 | this function to release the memory used by this node if that is required. On\r | |
934 | exit, the node following Entry in the doubly linked list is returned. If\r | |
935 | Entry is the only node in the linked list, then the head node of the linked\r | |
936 | list is returned.\r | |
937 | \r | |
938 | If Entry is NULL, then ASSERT().\r | |
939 | If Entry is the head node of an empty list, then ASSERT().\r | |
940 | If PcdMaximumLinkedListLenth is not zero, and the linked list containing\r | |
941 | Entry contains more than PcdMaximumLinkedListLenth nodes, then ASSERT().\r | |
942 | \r | |
943 | @param Entry A pointer to a node in a linked list\r | |
944 | \r | |
945 | @return Entry\r | |
946 | \r | |
947 | **/\r | |
948 | LIST_ENTRY *\r | |
949 | EFIAPI\r | |
950 | RemoveEntryList (\r | |
951 | IN CONST LIST_ENTRY *Entry\r | |
952 | );\r | |
953 | \r | |
954 | //\r | |
955 | // Math Services\r | |
956 | //\r | |
957 | \r | |
958 | /**\r | |
959 | Shifts a 64-bit integer left between 0 and 63 bits. The low bits are filled\r | |
960 | with zeros. The shifted value is returned.\r | |
961 | \r | |
962 | This function shifts the 64-bit value Operand to the left by Count bits. The\r | |
963 | low Count bits are set to zero. The shifted value is returned.\r | |
964 | \r | |
965 | If Count is greater than 63, then ASSERT().\r | |
966 | \r | |
967 | @param Operand The 64-bit operand to shift left.\r | |
968 | @param Count The number of bits to shift left.\r | |
969 | \r | |
970 | @return Operand << Count\r | |
971 | \r | |
972 | **/\r | |
973 | UINT64\r | |
974 | EFIAPI\r | |
975 | LShiftU64 (\r | |
976 | IN UINT64 Operand,\r | |
977 | IN UINTN Count\r | |
978 | );\r | |
979 | \r | |
980 | /**\r | |
981 | Shifts a 64-bit integer right between 0 and 63 bits. This high bits are\r | |
982 | filled with zeros. The shifted value is returned.\r | |
983 | \r | |
984 | This function shifts the 64-bit value Operand to the right by Count bits. The\r | |
985 | high Count bits are set to zero. The shifted value is returned.\r | |
986 | \r | |
987 | If Count is greater than 63, then ASSERT().\r | |
988 | \r | |
989 | @param Operand The 64-bit operand to shift right.\r | |
990 | @param Count The number of bits to shift right.\r | |
991 | \r | |
992 | @return Operand >> Count\r | |
993 | \r | |
994 | **/\r | |
995 | UINT64\r | |
996 | EFIAPI\r | |
997 | RShiftU64 (\r | |
998 | IN UINT64 Operand,\r | |
999 | IN UINTN Count\r | |
1000 | );\r | |
1001 | \r | |
1002 | /**\r | |
1003 | Shifts a 64-bit integer right between 0 and 63 bits. The high bits are filled\r | |
1004 | with original integer's bit 63. The shifted value is returned.\r | |
1005 | \r | |
1006 | This function shifts the 64-bit value Operand to the right by Count bits. The\r | |
1007 | high Count bits are set to bit 63 of Operand. The shifted value is returned.\r | |
1008 | \r | |
1009 | If Count is greater than 63, then ASSERT().\r | |
1010 | \r | |
1011 | @param Operand The 64-bit operand to shift right.\r | |
1012 | @param Count The number of bits to shift right.\r | |
1013 | \r | |
1014 | @return Operand >> Count\r | |
1015 | \r | |
1016 | **/\r | |
1017 | UINT64\r | |
1018 | EFIAPI\r | |
1019 | ARShiftU64 (\r | |
1020 | IN UINT64 Operand,\r | |
1021 | IN UINTN Count\r | |
1022 | );\r | |
1023 | \r | |
1024 | /**\r | |
1025 | Rotates a 32-bit integer left between 0 and 31 bits, filling the low bits\r | |
1026 | with the high bits that were rotated.\r | |
1027 | \r | |
1028 | This function rotates the 32-bit value Operand to the left by Count bits. The\r | |
1029 | low Count bits are fill with the high Count bits of Operand. The rotated\r | |
1030 | value is returned.\r | |
1031 | \r | |
1032 | If Count is greater than 31, then ASSERT().\r | |
1033 | \r | |
1034 | @param Operand The 32-bit operand to rotate left.\r | |
1035 | @param Count The number of bits to rotate left.\r | |
1036 | \r | |
1037 | @return Operand <<< Count\r | |
1038 | \r | |
1039 | **/\r | |
1040 | UINT32\r | |
1041 | EFIAPI\r | |
1042 | LRotU32 (\r | |
1043 | IN UINT32 Operand,\r | |
1044 | IN UINTN Count\r | |
1045 | );\r | |
1046 | \r | |
1047 | /**\r | |
1048 | Rotates a 32-bit integer right between 0 and 31 bits, filling the high bits\r | |
1049 | with the low bits that were rotated.\r | |
1050 | \r | |
1051 | This function rotates the 32-bit value Operand to the right by Count bits.\r | |
1052 | The high Count bits are fill with the low Count bits of Operand. The rotated\r | |
1053 | value is returned.\r | |
1054 | \r | |
1055 | If Count is greater than 31, then ASSERT().\r | |
1056 | \r | |
1057 | @param Operand The 32-bit operand to rotate right.\r | |
1058 | @param Count The number of bits to rotate right.\r | |
1059 | \r | |
1060 | @return Operand >>> Count\r | |
1061 | \r | |
1062 | **/\r | |
1063 | UINT32\r | |
1064 | EFIAPI\r | |
1065 | RRotU32 (\r | |
1066 | IN UINT32 Operand,\r | |
1067 | IN UINTN Count\r | |
1068 | );\r | |
1069 | \r | |
1070 | /**\r | |
1071 | Rotates a 64-bit integer left between 0 and 63 bits, filling the low bits\r | |
1072 | with the high bits that were rotated.\r | |
1073 | \r | |
1074 | This function rotates the 64-bit value Operand to the left by Count bits. The\r | |
1075 | low Count bits are fill with the high Count bits of Operand. The rotated\r | |
1076 | value is returned.\r | |
1077 | \r | |
1078 | If Count is greater than 63, then ASSERT().\r | |
1079 | \r | |
1080 | @param Operand The 64-bit operand to rotate left.\r | |
1081 | @param Count The number of bits to rotate left.\r | |
1082 | \r | |
1083 | @return Operand <<< Count\r | |
1084 | \r | |
1085 | **/\r | |
1086 | UINT64\r | |
1087 | EFIAPI\r | |
1088 | LRotU64 (\r | |
1089 | IN UINT64 Operand,\r | |
1090 | IN UINTN Count\r | |
1091 | );\r | |
1092 | \r | |
1093 | /**\r | |
1094 | Rotates a 64-bit integer right between 0 and 63 bits, filling the high bits\r | |
1095 | with the high low bits that were rotated.\r | |
1096 | \r | |
1097 | This function rotates the 64-bit value Operand to the right by Count bits.\r | |
1098 | The high Count bits are fill with the low Count bits of Operand. The rotated\r | |
1099 | value is returned.\r | |
1100 | \r | |
1101 | If Count is greater than 63, then ASSERT().\r | |
1102 | \r | |
1103 | @param Operand The 64-bit operand to rotate right.\r | |
1104 | @param Count The number of bits to rotate right.\r | |
1105 | \r | |
1106 | @return Operand >>> Count\r | |
1107 | \r | |
1108 | **/\r | |
1109 | UINT64\r | |
1110 | EFIAPI\r | |
1111 | RRotU64 (\r | |
1112 | IN UINT64 Operand,\r | |
1113 | IN UINTN Count\r | |
1114 | );\r | |
1115 | \r | |
1116 | /**\r | |
1117 | Returns the bit position of the lowest bit set in a 32-bit value.\r | |
1118 | \r | |
1119 | This function computes the bit position of the lowest bit set in the 32-bit\r | |
1120 | value specified by Operand. If Operand is zero, then -1 is returned.\r | |
1121 | Otherwise, a value between 0 and 31 is returned.\r | |
1122 | \r | |
1123 | @param Operand The 32-bit operand to evaluate.\r | |
1124 | \r | |
1125 | @return Position of the lowest bit set in Operand if found.\r | |
1126 | @retval -1 Operand is zero.\r | |
1127 | \r | |
1128 | **/\r | |
1129 | INTN\r | |
1130 | EFIAPI\r | |
1131 | LowBitSet32 (\r | |
1132 | IN UINT32 Operand\r | |
1133 | );\r | |
1134 | \r | |
1135 | /**\r | |
1136 | Returns the bit position of the lowest bit set in a 64-bit value.\r | |
1137 | \r | |
1138 | This function computes the bit position of the lowest bit set in the 64-bit\r | |
1139 | value specified by Operand. If Operand is zero, then -1 is returned.\r | |
1140 | Otherwise, a value between 0 and 63 is returned.\r | |
1141 | \r | |
1142 | @param Operand The 64-bit operand to evaluate.\r | |
1143 | \r | |
1144 | @return Position of the lowest bit set in Operand if found.\r | |
1145 | @retval -1 Operand is zero.\r | |
1146 | \r | |
1147 | **/\r | |
1148 | INTN\r | |
1149 | EFIAPI\r | |
1150 | LowBitSet64 (\r | |
1151 | IN UINT64 Operand\r | |
1152 | );\r | |
1153 | \r | |
1154 | /**\r | |
1155 | Returns the bit position of the highest bit set in a 32-bit value. Equivalent\r | |
1156 | to log2(x).\r | |
1157 | \r | |
1158 | This function computes the bit position of the highest bit set in the 32-bit\r | |
1159 | value specified by Operand. If Operand is zero, then -1 is returned.\r | |
1160 | Otherwise, a value between 0 and 31 is returned.\r | |
1161 | \r | |
1162 | @param Operand The 32-bit operand to evaluate.\r | |
1163 | \r | |
1164 | @return Position of the highest bit set in Operand if found.\r | |
1165 | @retval -1 Operand is zero.\r | |
1166 | \r | |
1167 | **/\r | |
1168 | INTN\r | |
1169 | EFIAPI\r | |
1170 | HighBitSet32 (\r | |
1171 | IN UINT32 Operand\r | |
1172 | );\r | |
1173 | \r | |
1174 | /**\r | |
1175 | Returns the bit position of the highest bit set in a 64-bit value. Equivalent\r | |
1176 | to log2(x).\r | |
1177 | \r | |
1178 | This function computes the bit position of the highest bit set in the 64-bit\r | |
1179 | value specified by Operand. If Operand is zero, then -1 is returned.\r | |
1180 | Otherwise, a value between 0 and 63 is returned.\r | |
1181 | \r | |
1182 | @param Operand The 64-bit operand to evaluate.\r | |
1183 | \r | |
1184 | @return Position of the highest bit set in Operand if found.\r | |
1185 | @retval -1 Operand is zero.\r | |
1186 | \r | |
1187 | **/\r | |
1188 | INTN\r | |
1189 | EFIAPI\r | |
1190 | HighBitSet64 (\r | |
1191 | IN UINT64 Operand\r | |
1192 | );\r | |
1193 | \r | |
1194 | /**\r | |
1195 | Returns the value of the highest bit set in a 32-bit value. Equivalent to\r | |
1196 | 1 << HighBitSet32(x).\r | |
1197 | \r | |
1198 | This function computes the value of the highest bit set in the 32-bit value\r | |
1199 | specified by Operand. If Operand is zero, then zero is returned.\r | |
1200 | \r | |
1201 | @param Operand The 32-bit operand to evaluate.\r | |
1202 | \r | |
1203 | @return 1 << HighBitSet32(Operand)\r | |
1204 | @retval 0 Operand is zero.\r | |
1205 | \r | |
1206 | **/\r | |
1207 | UINT32\r | |
1208 | EFIAPI\r | |
1209 | GetPowerOfTwo32 (\r | |
1210 | IN UINT32 Operand\r | |
1211 | );\r | |
1212 | \r | |
1213 | /**\r | |
1214 | Returns the value of the highest bit set in a 64-bit value. Equivalent to\r | |
1215 | 1 << HighBitSet64(x).\r | |
1216 | \r | |
1217 | This function computes the value of the highest bit set in the 64-bit value\r | |
1218 | specified by Operand. If Operand is zero, then zero is returned.\r | |
1219 | \r | |
1220 | @param Operand The 64-bit operand to evaluate.\r | |
1221 | \r | |
1222 | @return 1 << HighBitSet64(Operand)\r | |
1223 | @retval 0 Operand is zero.\r | |
1224 | \r | |
1225 | **/\r | |
1226 | UINT64\r | |
1227 | EFIAPI\r | |
1228 | GetPowerOfTwo64 (\r | |
1229 | IN UINT64 Operand\r | |
1230 | );\r | |
1231 | \r | |
1232 | /**\r | |
1233 | Switches the endianess of a 16-bit integer.\r | |
1234 | \r | |
1235 | This function swaps the bytes in a 16-bit unsigned value to switch the value\r | |
1236 | from little endian to big endian or vice versa. The byte swapped value is\r | |
1237 | returned.\r | |
1238 | \r | |
1239 | @param Operand A 16-bit unsigned value.\r | |
1240 | \r | |
1241 | @return The byte swaped Operand.\r | |
1242 | \r | |
1243 | **/\r | |
1244 | UINT16\r | |
1245 | EFIAPI\r | |
1246 | SwapBytes16 (\r | |
1247 | IN UINT16 Value\r | |
1248 | );\r | |
1249 | \r | |
1250 | /**\r | |
1251 | Switches the endianess of a 32-bit integer.\r | |
1252 | \r | |
1253 | This function swaps the bytes in a 32-bit unsigned value to switch the value\r | |
1254 | from little endian to big endian or vice versa. The byte swapped value is\r | |
1255 | returned.\r | |
1256 | \r | |
1257 | @param Operand A 32-bit unsigned value.\r | |
1258 | \r | |
1259 | @return The byte swaped Operand.\r | |
1260 | \r | |
1261 | **/\r | |
1262 | UINT32\r | |
1263 | EFIAPI\r | |
1264 | SwapBytes32 (\r | |
1265 | IN UINT32 Value\r | |
1266 | );\r | |
1267 | \r | |
1268 | /**\r | |
1269 | Switches the endianess of a 64-bit integer.\r | |
1270 | \r | |
1271 | This function swaps the bytes in a 64-bit unsigned value to switch the value\r | |
1272 | from little endian to big endian or vice versa. The byte swapped value is\r | |
1273 | returned.\r | |
1274 | \r | |
1275 | @param Operand A 64-bit unsigned value.\r | |
1276 | \r | |
1277 | @return The byte swaped Operand.\r | |
1278 | \r | |
1279 | **/\r | |
1280 | UINT64\r | |
1281 | EFIAPI\r | |
1282 | SwapBytes64 (\r | |
1283 | IN UINT64 Value\r | |
1284 | );\r | |
1285 | \r | |
1286 | /**\r | |
1287 | Multiples a 64-bit unsigned integer by a 32-bit unsigned integer and\r | |
1288 | generates a 64-bit unsigned result.\r | |
1289 | \r | |
1290 | This function multiples the 64-bit unsigned value Multiplicand by the 32-bit\r | |
1291 | unsigned value Multiplier and generates a 64-bit unsigned result. This 64-\r | |
1292 | bit unsigned result is returned.\r | |
1293 | \r | |
1294 | If the result overflows, then ASSERT().\r | |
1295 | \r | |
1296 | @param Multiplicand A 64-bit unsigned value.\r | |
1297 | @param Multiplier A 32-bit unsigned value.\r | |
1298 | \r | |
1299 | @return Multiplicand * Multiplier\r | |
1300 | \r | |
1301 | **/\r | |
1302 | UINT64\r | |
1303 | EFIAPI\r | |
1304 | MultU64x32 (\r | |
1305 | IN UINT64 Multiplicand,\r | |
1306 | IN UINT32 Multiplier\r | |
1307 | );\r | |
1308 | \r | |
1309 | /**\r | |
1310 | Multiples a 64-bit unsigned integer by a 64-bit unsigned integer and\r | |
1311 | generates a 64-bit unsigned result.\r | |
1312 | \r | |
1313 | This function multiples the 64-bit unsigned value Multiplicand by the 64-bit\r | |
1314 | unsigned value Multiplier and generates a 64-bit unsigned result. This 64-\r | |
1315 | bit unsigned result is returned.\r | |
1316 | \r | |
1317 | If the result overflows, then ASSERT().\r | |
1318 | \r | |
1319 | @param Multiplicand A 64-bit unsigned value.\r | |
1320 | @param Multiplier A 64-bit unsigned value.\r | |
1321 | \r | |
1322 | @return Multiplicand * Multiplier\r | |
1323 | \r | |
1324 | **/\r | |
1325 | UINT64\r | |
1326 | EFIAPI\r | |
1327 | MultU64x64 (\r | |
1328 | IN UINT64 Multiplicand,\r | |
1329 | IN UINT64 Multiplier\r | |
1330 | );\r | |
1331 | \r | |
1332 | /**\r | |
1333 | Multiples a 64-bit signed integer by a 64-bit signed integer and generates a\r | |
1334 | 64-bit signed result.\r | |
1335 | \r | |
1336 | This function multiples the 64-bit signed value Multiplicand by the 64-bit\r | |
1337 | signed value Multiplier and generates a 64-bit signed result. This 64-bit\r | |
1338 | signed result is returned.\r | |
1339 | \r | |
1340 | If the result overflows, then ASSERT().\r | |
1341 | \r | |
1342 | @param Multiplicand A 64-bit signed value.\r | |
1343 | @param Multiplier A 64-bit signed value.\r | |
1344 | \r | |
1345 | @return Multiplicand * Multiplier\r | |
1346 | \r | |
1347 | **/\r | |
1348 | INT64\r | |
1349 | EFIAPI\r | |
1350 | MultS64x64 (\r | |
1351 | IN INT64 Multiplicand,\r | |
1352 | IN INT64 Multiplier\r | |
1353 | );\r | |
1354 | \r | |
1355 | /**\r | |
1356 | Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates\r | |
1357 | a 64-bit unsigned result.\r | |
1358 | \r | |
1359 | This function divides the 64-bit unsigned value Dividend by the 32-bit\r | |
1360 | unsigned value Divisor and generates a 64-bit unsigned quotient. This\r | |
1361 | function returns the 64-bit unsigned quotient.\r | |
1362 | \r | |
1363 | If Divisor is 0, then ASSERT().\r | |
1364 | \r | |
1365 | @param Dividend A 64-bit unsigned value.\r | |
1366 | @param Divisor A 32-bit unsigned value.\r | |
1367 | \r | |
1368 | @return Dividend / Divisor\r | |
1369 | \r | |
1370 | **/\r | |
1371 | UINT64\r | |
1372 | EFIAPI\r | |
1373 | DivU64x32 (\r | |
1374 | IN UINT64 Dividend,\r | |
1375 | IN UINT32 Divisor\r | |
1376 | );\r | |
1377 | \r | |
1378 | /**\r | |
1379 | Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates\r | |
1380 | a 32-bit unsigned remainder.\r | |
1381 | \r | |
1382 | This function divides the 64-bit unsigned value Dividend by the 32-bit\r | |
1383 | unsigned value Divisor and generates a 32-bit remainder. This function\r | |
1384 | returns the 32-bit unsigned remainder.\r | |
1385 | \r | |
1386 | If Divisor is 0, then ASSERT().\r | |
1387 | \r | |
1388 | @param Dividend A 64-bit unsigned value.\r | |
1389 | @param Divisor A 32-bit unsigned value.\r | |
1390 | \r | |
1391 | @return Dividend % Divisor\r | |
1392 | \r | |
1393 | **/\r | |
1394 | UINT32\r | |
1395 | EFIAPI\r | |
1396 | ModU64x32 (\r | |
1397 | IN UINT64 Dividend,\r | |
1398 | IN UINT32 Divisor\r | |
1399 | );\r | |
1400 | \r | |
1401 | /**\r | |
1402 | Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates\r | |
1403 | a 64-bit unsigned result and an optional 32-bit unsigned remainder.\r | |
1404 | \r | |
1405 | This function divides the 64-bit unsigned value Dividend by the 32-bit\r | |
1406 | unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder\r | |
1407 | is not NULL, then the 32-bit unsigned remainder is returned in Remainder.\r | |
1408 | This function returns the 64-bit unsigned quotient.\r | |
1409 | \r | |
1410 | If Divisor is 0, then ASSERT().\r | |
1411 | \r | |
1412 | @param Dividend A 64-bit unsigned value.\r | |
1413 | @param Divisor A 32-bit unsigned value.\r | |
1414 | @param Remainder A pointer to a 32-bit unsigned value. This parameter is\r | |
1415 | optional and may be NULL.\r | |
1416 | \r | |
1417 | @return Dividend / Divisor\r | |
1418 | \r | |
1419 | **/\r | |
1420 | UINT64\r | |
1421 | EFIAPI\r | |
1422 | DivU64x32Remainder (\r | |
1423 | IN UINT64 Dividend,\r | |
1424 | IN UINT32 Divisor,\r | |
1425 | OUT UINT32 *Remainder OPTIONAL\r | |
1426 | );\r | |
1427 | \r | |
1428 | /**\r | |
1429 | Divides a 64-bit unsigned integer by a 64-bit unsigned integer and generates\r | |
1430 | a 64-bit unsigned result and an optional 64-bit unsigned remainder.\r | |
1431 | \r | |
1432 | This function divides the 64-bit unsigned value Dividend by the 64-bit\r | |
1433 | unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder\r | |
1434 | is not NULL, then the 64-bit unsigned remainder is returned in Remainder.\r | |
1435 | This function returns the 64-bit unsigned quotient.\r | |
1436 | \r | |
1437 | If Divisor is 0, then ASSERT().\r | |
1438 | \r | |
1439 | @param Dividend A 64-bit unsigned value.\r | |
1440 | @param Divisor A 64-bit unsigned value.\r | |
1441 | @param Remainder A pointer to a 64-bit unsigned value. This parameter is\r | |
1442 | optional and may be NULL.\r | |
1443 | \r | |
1444 | @return Dividend / Divisor\r | |
1445 | \r | |
1446 | **/\r | |
1447 | UINT64\r | |
1448 | EFIAPI\r | |
1449 | DivU64x64Remainder (\r | |
1450 | IN UINT64 Dividend,\r | |
1451 | IN UINT64 Divisor,\r | |
1452 | OUT UINT64 *Remainder OPTIONAL\r | |
1453 | );\r | |
1454 | \r | |
1455 | /**\r | |
1456 | Divides a 64-bit signed integer by a 64-bit signed integer and generates a\r | |
1457 | 64-bit signed result and a optional 64-bit signed remainder.\r | |
1458 | \r | |
1459 | This function divides the 64-bit signed value Dividend by the 64-bit signed\r | |
1460 | value Divisor and generates a 64-bit signed quotient. If Remainder is not\r | |
1461 | NULL, then the 64-bit signed remainder is returned in Remainder. This\r | |
1462 | function returns the 64-bit signed quotient.\r | |
1463 | \r | |
1464 | If Divisor is 0, then ASSERT().\r | |
1465 | \r | |
1466 | @param Dividend A 64-bit signed value.\r | |
1467 | @param Divisor A 64-bit signed value.\r | |
1468 | @param Remainder A pointer to a 64-bit signed value. This parameter is\r | |
1469 | optional and may be NULL.\r | |
1470 | \r | |
1471 | @return Dividend / Divisor\r | |
1472 | \r | |
1473 | **/\r | |
1474 | INT64\r | |
1475 | EFIAPI\r | |
1476 | DivS64x64Remainder (\r | |
1477 | IN INT64 Dividend,\r | |
1478 | IN INT64 Divisor,\r | |
1479 | OUT INT64 *Remainder OPTIONAL\r | |
1480 | );\r | |
1481 | \r | |
1482 | /**\r | |
1483 | Reads a 16-bit value from memory that may be unaligned.\r | |
1484 | \r | |
1485 | This function returns the 16-bit value pointed to by Buffer. The function\r | |
1486 | guarantees that the read operation does not produce an alignment fault.\r | |
1487 | \r | |
1488 | If the Buffer is NULL, then ASSERT().\r | |
1489 | \r | |
1490 | @param Buffer Pointer to a 16-bit value that may be unaligned.\r | |
1491 | \r | |
1492 | @return *Uint16\r | |
1493 | \r | |
1494 | **/\r | |
1495 | UINT16\r | |
1496 | EFIAPI\r | |
1497 | ReadUnaligned16 (\r | |
1498 | IN CONST UINT16 *Uint16\r | |
1499 | );\r | |
1500 | \r | |
1501 | /**\r | |
1502 | Writes a 16-bit value to memory that may be unaligned.\r | |
1503 | \r | |
1504 | This function writes the 16-bit value specified by Value to Buffer. Value is\r | |
1505 | returned. The function guarantees that the write operation does not produce\r | |
1506 | an alignment fault.\r | |
1507 | \r | |
1508 | If the Buffer is NULL, then ASSERT().\r | |
1509 | \r | |
1510 | @param Buffer Pointer to a 16-bit value that may be unaligned.\r | |
1511 | @param Value 16-bit value to write to Buffer.\r | |
1512 | \r | |
1513 | @return Value\r | |
1514 | \r | |
1515 | **/\r | |
1516 | UINT16\r | |
1517 | EFIAPI\r | |
1518 | WriteUnaligned16 (\r | |
1519 | OUT UINT16 *Uint16,\r | |
1520 | IN UINT16 Value\r | |
1521 | );\r | |
1522 | \r | |
1523 | /**\r | |
1524 | Reads a 24-bit value from memory that may be unaligned.\r | |
1525 | \r | |
1526 | This function returns the 24-bit value pointed to by Buffer. The function\r | |
1527 | guarantees that the read operation does not produce an alignment fault.\r | |
1528 | \r | |
1529 | If the Buffer is NULL, then ASSERT().\r | |
1530 | \r | |
1531 | @param Buffer Pointer to a 24-bit value that may be unaligned.\r | |
1532 | \r | |
1533 | @return The value read.\r | |
1534 | \r | |
1535 | **/\r | |
1536 | UINT32\r | |
1537 | EFIAPI\r | |
1538 | ReadUnaligned24 (\r | |
1539 | IN CONST UINT32 *Buffer\r | |
1540 | );\r | |
1541 | \r | |
1542 | /**\r | |
1543 | Writes a 24-bit value to memory that may be unaligned.\r | |
1544 | \r | |
1545 | This function writes the 24-bit value specified by Value to Buffer. Value is\r | |
1546 | returned. The function guarantees that the write operation does not produce\r | |
1547 | an alignment fault.\r | |
1548 | \r | |
1549 | If the Buffer is NULL, then ASSERT().\r | |
1550 | \r | |
1551 | @param Buffer Pointer to a 24-bit value that may be unaligned.\r | |
1552 | @param Value 24-bit value to write to Buffer.\r | |
1553 | \r | |
1554 | @return The value written.\r | |
1555 | \r | |
1556 | **/\r | |
1557 | UINT32\r | |
1558 | EFIAPI\r | |
1559 | WriteUnaligned24 (\r | |
1560 | OUT UINT32 *Buffer,\r | |
1561 | IN UINT32 Value\r | |
1562 | );\r | |
1563 | \r | |
1564 | /**\r | |
1565 | Reads a 32-bit value from memory that may be unaligned.\r | |
1566 | \r | |
1567 | This function returns the 32-bit value pointed to by Buffer. The function\r | |
1568 | guarantees that the read operation does not produce an alignment fault.\r | |
1569 | \r | |
1570 | If the Buffer is NULL, then ASSERT().\r | |
1571 | \r | |
1572 | @param Buffer Pointer to a 32-bit value that may be unaligned.\r | |
1573 | \r | |
1574 | @return *Uint32\r | |
1575 | \r | |
1576 | **/\r | |
1577 | UINT32\r | |
1578 | EFIAPI\r | |
1579 | ReadUnaligned32 (\r | |
1580 | IN CONST UINT32 *Uint32\r | |
1581 | );\r | |
1582 | \r | |
1583 | /**\r | |
1584 | Writes a 32-bit value to memory that may be unaligned.\r | |
1585 | \r | |
1586 | This function writes the 32-bit value specified by Value to Buffer. Value is\r | |
1587 | returned. The function guarantees that the write operation does not produce\r | |
1588 | an alignment fault.\r | |
1589 | \r | |
1590 | If the Buffer is NULL, then ASSERT().\r | |
1591 | \r | |
1592 | @param Buffer Pointer to a 32-bit value that may be unaligned.\r | |
1593 | @param Value 32-bit value to write to Buffer.\r | |
1594 | \r | |
1595 | @return Value\r | |
1596 | \r | |
1597 | **/\r | |
1598 | UINT32\r | |
1599 | EFIAPI\r | |
1600 | WriteUnaligned32 (\r | |
1601 | OUT UINT32 *Uint32,\r | |
1602 | IN UINT32 Value\r | |
1603 | );\r | |
1604 | \r | |
1605 | /**\r | |
1606 | Reads a 64-bit value from memory that may be unaligned.\r | |
1607 | \r | |
1608 | This function returns the 64-bit value pointed to by Buffer. The function\r | |
1609 | guarantees that the read operation does not produce an alignment fault.\r | |
1610 | \r | |
1611 | If the Buffer is NULL, then ASSERT().\r | |
1612 | \r | |
1613 | @param Buffer Pointer to a 64-bit value that may be unaligned.\r | |
1614 | \r | |
1615 | @return *Uint64\r | |
1616 | \r | |
1617 | **/\r | |
1618 | UINT64\r | |
1619 | EFIAPI\r | |
1620 | ReadUnaligned64 (\r | |
1621 | IN CONST UINT64 *Uint64\r | |
1622 | );\r | |
1623 | \r | |
1624 | /**\r | |
1625 | Writes a 64-bit value to memory that may be unaligned.\r | |
1626 | \r | |
1627 | This function writes the 64-bit value specified by Value to Buffer. Value is\r | |
1628 | returned. The function guarantees that the write operation does not produce\r | |
1629 | an alignment fault.\r | |
1630 | \r | |
1631 | If the Buffer is NULL, then ASSERT().\r | |
1632 | \r | |
1633 | @param Buffer Pointer to a 64-bit value that may be unaligned.\r | |
1634 | @param Value 64-bit value to write to Buffer.\r | |
1635 | \r | |
1636 | @return Value\r | |
1637 | \r | |
1638 | **/\r | |
1639 | UINT64\r | |
1640 | EFIAPI\r | |
1641 | WriteUnaligned64 (\r | |
1642 | OUT UINT64 *Uint64,\r | |
1643 | IN UINT64 Value\r | |
1644 | );\r | |
1645 | \r | |
1646 | //\r | |
1647 | // Bit Field Functions\r | |
1648 | //\r | |
1649 | \r | |
1650 | /**\r | |
1651 | Returns a bit field from an 8-bit value.\r | |
1652 | \r | |
1653 | Returns the bitfield specified by the StartBit and the EndBit from Operand.\r | |
1654 | \r | |
1655 | If 8-bit operations are not supported, then ASSERT().\r | |
1656 | If StartBit is greater than 7, then ASSERT().\r | |
1657 | If EndBit is greater than 7, then ASSERT().\r | |
1658 | If EndBit is less than or equal to StartBit, then ASSERT().\r | |
1659 | \r | |
1660 | @param Operand Operand on which to perform the bitfield operation.\r | |
1661 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
1662 | Range 0..7.\r | |
1663 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
1664 | Range 0..7.\r | |
1665 | \r | |
1666 | @return The bit field read.\r | |
1667 | \r | |
1668 | **/\r | |
1669 | UINT8\r | |
1670 | EFIAPI\r | |
1671 | BitFieldRead8 (\r | |
1672 | IN UINT8 Operand,\r | |
1673 | IN UINTN StartBit,\r | |
1674 | IN UINTN EndBit\r | |
1675 | );\r | |
1676 | \r | |
1677 | /**\r | |
1678 | Writes a bit field to an 8-bit value, and returns the result.\r | |
1679 | \r | |
1680 | Writes Value to the bit field specified by the StartBit and the EndBit in\r | |
1681 | Operand. All other bits in Operand are preserved. The new 8-bit value is\r | |
1682 | returned.\r | |
1683 | \r | |
1684 | If 8-bit operations are not supported, then ASSERT().\r | |
1685 | If StartBit is greater than 7, then ASSERT().\r | |
1686 | If EndBit is greater than 7, then ASSERT().\r | |
1687 | If EndBit is less than or equal to StartBit, then ASSERT().\r | |
1688 | \r | |
1689 | @param Operand Operand on which to perform the bitfield operation.\r | |
1690 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
1691 | Range 0..7.\r | |
1692 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
1693 | Range 0..7.\r | |
1694 | @param Value New value of the bit field.\r | |
1695 | \r | |
1696 | @return The new 8-bit value.\r | |
1697 | \r | |
1698 | **/\r | |
1699 | UINT8\r | |
1700 | EFIAPI\r | |
1701 | BitFieldWrite8 (\r | |
1702 | IN UINT8 Operand,\r | |
1703 | IN UINTN StartBit,\r | |
1704 | IN UINTN EndBit,\r | |
1705 | IN UINT8 Value\r | |
1706 | );\r | |
1707 | \r | |
1708 | /**\r | |
1709 | Reads a bit field from an 8-bit value, performs a bitwise OR, and returns the\r | |
1710 | result.\r | |
1711 | \r | |
1712 | Performs a bitwise inclusive OR between the bit field specified by StartBit\r | |
1713 | and EndBit in Operand and the value specified by OrData. All other bits in\r | |
1714 | Operand are preserved. The new 8-bit value is returned.\r | |
1715 | \r | |
1716 | If 8-bit operations are not supported, then ASSERT().\r | |
1717 | If StartBit is greater than 7, then ASSERT().\r | |
1718 | If EndBit is greater than 7, then ASSERT().\r | |
1719 | If EndBit is less than or equal to StartBit, then ASSERT().\r | |
1720 | \r | |
1721 | @param Operand Operand on which to perform the bitfield operation.\r | |
1722 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
1723 | Range 0..7.\r | |
1724 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
1725 | Range 0..7.\r | |
1726 | @param OrData The value to OR with the read value from the value\r | |
1727 | \r | |
1728 | @return The new 8-bit value.\r | |
1729 | \r | |
1730 | **/\r | |
1731 | UINT8\r | |
1732 | EFIAPI\r | |
1733 | BitFieldOr8 (\r | |
1734 | IN UINT8 Operand,\r | |
1735 | IN UINTN StartBit,\r | |
1736 | IN UINTN EndBit,\r | |
1737 | IN UINT8 OrData\r | |
1738 | );\r | |
1739 | \r | |
1740 | /**\r | |
1741 | Reads a bit field from an 8-bit value, performs a bitwise AND, and returns\r | |
1742 | the result.\r | |
1743 | \r | |
1744 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
1745 | in Operand and the value specified by AndData. All other bits in Operand are\r | |
1746 | preserved. The new 8-bit value is returned.\r | |
1747 | \r | |
1748 | If 8-bit operations are not supported, then ASSERT().\r | |
1749 | If StartBit is greater than 7, then ASSERT().\r | |
1750 | If EndBit is greater than 7, then ASSERT().\r | |
1751 | If EndBit is less than or equal to StartBit, then ASSERT().\r | |
1752 | \r | |
1753 | @param Operand Operand on which to perform the bitfield operation.\r | |
1754 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
1755 | Range 0..7.\r | |
1756 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
1757 | Range 0..7.\r | |
1758 | @param AndData The value to AND with the read value from the value.\r | |
1759 | \r | |
1760 | @return The new 8-bit value.\r | |
1761 | \r | |
1762 | **/\r | |
1763 | UINT8\r | |
1764 | EFIAPI\r | |
1765 | BitFieldAnd8 (\r | |
1766 | IN UINT8 Operand,\r | |
1767 | IN UINTN StartBit,\r | |
1768 | IN UINTN EndBit,\r | |
1769 | IN UINT8 AndData\r | |
1770 | );\r | |
1771 | \r | |
1772 | /**\r | |
1773 | Reads a bit field from an 8-bit value, performs a bitwise AND followed by a\r | |
1774 | bitwise OR, and returns the result.\r | |
1775 | \r | |
1776 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
1777 | in Operand and the value specified by AndData, followed by a bitwise\r | |
1778 | inclusive OR with value specified by OrData. All other bits in Operand are\r | |
1779 | preserved. The new 8-bit value is returned.\r | |
1780 | \r | |
1781 | If 8-bit operations are not supported, then ASSERT().\r | |
1782 | If StartBit is greater than 7, then ASSERT().\r | |
1783 | If EndBit is greater than 7, then ASSERT().\r | |
1784 | If EndBit is less than or equal to StartBit, then ASSERT().\r | |
1785 | \r | |
1786 | @param Operand Operand on which to perform the bitfield operation.\r | |
1787 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
1788 | Range 0..7.\r | |
1789 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
1790 | Range 0..7.\r | |
1791 | @param AndData The value to AND with the read value from the value.\r | |
1792 | @param OrData The value to OR with the result of the AND operation.\r | |
1793 | \r | |
1794 | @return The new 8-bit value.\r | |
1795 | \r | |
1796 | **/\r | |
1797 | UINT8\r | |
1798 | EFIAPI\r | |
1799 | BitFieldAndThenOr8 (\r | |
1800 | IN UINT8 Operand,\r | |
1801 | IN UINTN StartBit,\r | |
1802 | IN UINTN EndBit,\r | |
1803 | IN UINT8 AndData,\r | |
1804 | IN UINT8 OrData\r | |
1805 | );\r | |
1806 | \r | |
1807 | /**\r | |
1808 | Returns a bit field from a 16-bit value.\r | |
1809 | \r | |
1810 | Returns the bitfield specified by the StartBit and the EndBit from Operand.\r | |
1811 | \r | |
1812 | If 16-bit operations are not supported, then ASSERT().\r | |
1813 | If StartBit is greater than 15, then ASSERT().\r | |
1814 | If EndBit is greater than 15, then ASSERT().\r | |
1815 | If EndBit is less than or equal to StartBit, then ASSERT().\r | |
1816 | \r | |
1817 | @param Operand Operand on which to perform the bitfield operation.\r | |
1818 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
1819 | Range 0..15.\r | |
1820 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
1821 | Range 0..15.\r | |
1822 | \r | |
1823 | @return The bit field read.\r | |
1824 | \r | |
1825 | **/\r | |
1826 | UINT16\r | |
1827 | EFIAPI\r | |
1828 | BitFieldRead16 (\r | |
1829 | IN UINT16 Operand,\r | |
1830 | IN UINTN StartBit,\r | |
1831 | IN UINTN EndBit\r | |
1832 | );\r | |
1833 | \r | |
1834 | /**\r | |
1835 | Writes a bit field to a 16-bit value, and returns the result.\r | |
1836 | \r | |
1837 | Writes Value to the bit field specified by the StartBit and the EndBit in\r | |
1838 | Operand. All other bits in Operand are preserved. The new 16-bit value is\r | |
1839 | returned.\r | |
1840 | \r | |
1841 | If 16-bit operations are not supported, then ASSERT().\r | |
1842 | If StartBit is greater than 15, then ASSERT().\r | |
1843 | If EndBit is greater than 15, then ASSERT().\r | |
1844 | If EndBit is less than or equal to StartBit, then ASSERT().\r | |
1845 | \r | |
1846 | @param Operand Operand on which to perform the bitfield operation.\r | |
1847 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
1848 | Range 0..15.\r | |
1849 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
1850 | Range 0..15.\r | |
1851 | @param Value New value of the bit field.\r | |
1852 | \r | |
1853 | @return The new 16-bit value.\r | |
1854 | \r | |
1855 | **/\r | |
1856 | UINT16\r | |
1857 | EFIAPI\r | |
1858 | BitFieldWrite16 (\r | |
1859 | IN UINT16 Operand,\r | |
1860 | IN UINTN StartBit,\r | |
1861 | IN UINTN EndBit,\r | |
1862 | IN UINT16 Value\r | |
1863 | );\r | |
1864 | \r | |
1865 | /**\r | |
1866 | Reads a bit field from a 16-bit value, performs a bitwise OR, and returns the\r | |
1867 | result.\r | |
1868 | \r | |
1869 | Performs a bitwise inclusive OR between the bit field specified by StartBit\r | |
1870 | and EndBit in Operand and the value specified by OrData. All other bits in\r | |
1871 | Operand are preserved. The new 16-bit value is returned.\r | |
1872 | \r | |
1873 | If 16-bit operations are not supported, then ASSERT().\r | |
1874 | If StartBit is greater than 15, then ASSERT().\r | |
1875 | If EndBit is greater than 15, then ASSERT().\r | |
1876 | If EndBit is less than or equal to StartBit, then ASSERT().\r | |
1877 | \r | |
1878 | @param Operand Operand on which to perform the bitfield operation.\r | |
1879 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
1880 | Range 0..15.\r | |
1881 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
1882 | Range 0..15.\r | |
1883 | @param OrData The value to OR with the read value from the value\r | |
1884 | \r | |
1885 | @return The new 16-bit value.\r | |
1886 | \r | |
1887 | **/\r | |
1888 | UINT16\r | |
1889 | EFIAPI\r | |
1890 | BitFieldOr16 (\r | |
1891 | IN UINT16 Operand,\r | |
1892 | IN UINTN StartBit,\r | |
1893 | IN UINTN EndBit,\r | |
1894 | IN UINT16 OrData\r | |
1895 | );\r | |
1896 | \r | |
1897 | /**\r | |
1898 | Reads a bit field from a 16-bit value, performs a bitwise AND, and returns\r | |
1899 | the result.\r | |
1900 | \r | |
1901 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
1902 | in Operand and the value specified by AndData. All other bits in Operand are\r | |
1903 | preserved. The new 16-bit value is returned.\r | |
1904 | \r | |
1905 | If 16-bit operations are not supported, then ASSERT().\r | |
1906 | If StartBit is greater than 15, then ASSERT().\r | |
1907 | If EndBit is greater than 15, then ASSERT().\r | |
1908 | If EndBit is less than or equal to StartBit, then ASSERT().\r | |
1909 | \r | |
1910 | @param Operand Operand on which to perform the bitfield operation.\r | |
1911 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
1912 | Range 0..15.\r | |
1913 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
1914 | Range 0..15.\r | |
1915 | @param AndData The value to AND with the read value from the value\r | |
1916 | \r | |
1917 | @return The new 16-bit value.\r | |
1918 | \r | |
1919 | **/\r | |
1920 | UINT16\r | |
1921 | EFIAPI\r | |
1922 | BitFieldAnd16 (\r | |
1923 | IN UINT16 Operand,\r | |
1924 | IN UINTN StartBit,\r | |
1925 | IN UINTN EndBit,\r | |
1926 | IN UINT16 AndData\r | |
1927 | );\r | |
1928 | \r | |
1929 | /**\r | |
1930 | Reads a bit field from a 16-bit value, performs a bitwise AND followed by a\r | |
1931 | bitwise OR, and returns the result.\r | |
1932 | \r | |
1933 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
1934 | in Operand and the value specified by AndData, followed by a bitwise\r | |
1935 | inclusive OR with value specified by OrData. All other bits in Operand are\r | |
1936 | preserved. The new 16-bit value is returned.\r | |
1937 | \r | |
1938 | If 16-bit operations are not supported, then ASSERT().\r | |
1939 | If StartBit is greater than 15, then ASSERT().\r | |
1940 | If EndBit is greater than 15, then ASSERT().\r | |
1941 | If EndBit is less than or equal to StartBit, then ASSERT().\r | |
1942 | \r | |
1943 | @param Operand Operand on which to perform the bitfield operation.\r | |
1944 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
1945 | Range 0..15.\r | |
1946 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
1947 | Range 0..15.\r | |
1948 | @param AndData The value to AND with the read value from the value.\r | |
1949 | @param OrData The value to OR with the result of the AND operation.\r | |
1950 | \r | |
1951 | @return The new 16-bit value.\r | |
1952 | \r | |
1953 | **/\r | |
1954 | UINT16\r | |
1955 | EFIAPI\r | |
1956 | BitFieldAndThenOr16 (\r | |
1957 | IN UINT16 Operand,\r | |
1958 | IN UINTN StartBit,\r | |
1959 | IN UINTN EndBit,\r | |
1960 | IN UINT16 AndData,\r | |
1961 | IN UINT16 OrData\r | |
1962 | );\r | |
1963 | \r | |
1964 | /**\r | |
1965 | Returns a bit field from a 32-bit value.\r | |
1966 | \r | |
1967 | Returns the bitfield specified by the StartBit and the EndBit from Operand.\r | |
1968 | \r | |
1969 | If 32-bit operations are not supported, then ASSERT().\r | |
1970 | If StartBit is greater than 31, then ASSERT().\r | |
1971 | If EndBit is greater than 31, then ASSERT().\r | |
1972 | If EndBit is less than or equal to StartBit, then ASSERT().\r | |
1973 | \r | |
1974 | @param Operand Operand on which to perform the bitfield operation.\r | |
1975 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
1976 | Range 0..31.\r | |
1977 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
1978 | Range 0..31.\r | |
1979 | \r | |
1980 | @return The bit field read.\r | |
1981 | \r | |
1982 | **/\r | |
1983 | UINT32\r | |
1984 | EFIAPI\r | |
1985 | BitFieldRead32 (\r | |
1986 | IN UINT32 Operand,\r | |
1987 | IN UINTN StartBit,\r | |
1988 | IN UINTN EndBit\r | |
1989 | );\r | |
1990 | \r | |
1991 | /**\r | |
1992 | Writes a bit field to a 32-bit value, and returns the result.\r | |
1993 | \r | |
1994 | Writes Value to the bit field specified by the StartBit and the EndBit in\r | |
1995 | Operand. All other bits in Operand are preserved. The new 32-bit value is\r | |
1996 | returned.\r | |
1997 | \r | |
1998 | If 32-bit operations are not supported, then ASSERT().\r | |
1999 | If StartBit is greater than 31, then ASSERT().\r | |
2000 | If EndBit is greater than 31, then ASSERT().\r | |
2001 | If EndBit is less than or equal to StartBit, then ASSERT().\r | |
2002 | \r | |
2003 | @param Operand Operand on which to perform the bitfield operation.\r | |
2004 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2005 | Range 0..31.\r | |
2006 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2007 | Range 0..31.\r | |
2008 | @param Value New value of the bit field.\r | |
2009 | \r | |
2010 | @return The new 32-bit value.\r | |
2011 | \r | |
2012 | **/\r | |
2013 | UINT32\r | |
2014 | EFIAPI\r | |
2015 | BitFieldWrite32 (\r | |
2016 | IN UINT32 Operand,\r | |
2017 | IN UINTN StartBit,\r | |
2018 | IN UINTN EndBit,\r | |
2019 | IN UINT32 Value\r | |
2020 | );\r | |
2021 | \r | |
2022 | /**\r | |
2023 | Reads a bit field from a 32-bit value, performs a bitwise OR, and returns the\r | |
2024 | result.\r | |
2025 | \r | |
2026 | Performs a bitwise inclusive OR between the bit field specified by StartBit\r | |
2027 | and EndBit in Operand and the value specified by OrData. All other bits in\r | |
2028 | Operand are preserved. The new 32-bit value is returned.\r | |
2029 | \r | |
2030 | If 32-bit operations are not supported, then ASSERT().\r | |
2031 | If StartBit is greater than 31, then ASSERT().\r | |
2032 | If EndBit is greater than 31, then ASSERT().\r | |
2033 | If EndBit is less than or equal to StartBit, then ASSERT().\r | |
2034 | \r | |
2035 | @param Operand Operand on which to perform the bitfield operation.\r | |
2036 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2037 | Range 0..31.\r | |
2038 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2039 | Range 0..31.\r | |
2040 | @param OrData The value to OR with the read value from the value\r | |
2041 | \r | |
2042 | @return The new 32-bit value.\r | |
2043 | \r | |
2044 | **/\r | |
2045 | UINT32\r | |
2046 | EFIAPI\r | |
2047 | BitFieldOr32 (\r | |
2048 | IN UINT32 Operand,\r | |
2049 | IN UINTN StartBit,\r | |
2050 | IN UINTN EndBit,\r | |
2051 | IN UINT32 OrData\r | |
2052 | );\r | |
2053 | \r | |
2054 | /**\r | |
2055 | Reads a bit field from a 32-bit value, performs a bitwise AND, and returns\r | |
2056 | the result.\r | |
2057 | \r | |
2058 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
2059 | in Operand and the value specified by AndData. All other bits in Operand are\r | |
2060 | preserved. The new 32-bit value is returned.\r | |
2061 | \r | |
2062 | If 32-bit operations are not supported, then ASSERT().\r | |
2063 | If StartBit is greater than 31, then ASSERT().\r | |
2064 | If EndBit is greater than 31, then ASSERT().\r | |
2065 | If EndBit is less than or equal to StartBit, then ASSERT().\r | |
2066 | \r | |
2067 | @param Operand Operand on which to perform the bitfield operation.\r | |
2068 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2069 | Range 0..31.\r | |
2070 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2071 | Range 0..31.\r | |
2072 | @param AndData The value to AND with the read value from the value\r | |
2073 | \r | |
2074 | @return The new 32-bit value.\r | |
2075 | \r | |
2076 | **/\r | |
2077 | UINT32\r | |
2078 | EFIAPI\r | |
2079 | BitFieldAnd32 (\r | |
2080 | IN UINT32 Operand,\r | |
2081 | IN UINTN StartBit,\r | |
2082 | IN UINTN EndBit,\r | |
2083 | IN UINT32 AndData\r | |
2084 | );\r | |
2085 | \r | |
2086 | /**\r | |
2087 | Reads a bit field from a 32-bit value, performs a bitwise AND followed by a\r | |
2088 | bitwise OR, and returns the result.\r | |
2089 | \r | |
2090 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
2091 | in Operand and the value specified by AndData, followed by a bitwise\r | |
2092 | inclusive OR with value specified by OrData. All other bits in Operand are\r | |
2093 | preserved. The new 32-bit value is returned.\r | |
2094 | \r | |
2095 | If 32-bit operations are not supported, then ASSERT().\r | |
2096 | If StartBit is greater than 31, then ASSERT().\r | |
2097 | If EndBit is greater than 31, then ASSERT().\r | |
2098 | If EndBit is less than or equal to StartBit, then ASSERT().\r | |
2099 | \r | |
2100 | @param Operand Operand on which to perform the bitfield operation.\r | |
2101 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2102 | Range 0..31.\r | |
2103 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2104 | Range 0..31.\r | |
2105 | @param AndData The value to AND with the read value from the value.\r | |
2106 | @param OrData The value to OR with the result of the AND operation.\r | |
2107 | \r | |
2108 | @return The new 32-bit value.\r | |
2109 | \r | |
2110 | **/\r | |
2111 | UINT32\r | |
2112 | EFIAPI\r | |
2113 | BitFieldAndThenOr32 (\r | |
2114 | IN UINT32 Operand,\r | |
2115 | IN UINTN StartBit,\r | |
2116 | IN UINTN EndBit,\r | |
2117 | IN UINT32 AndData,\r | |
2118 | IN UINT32 OrData\r | |
2119 | );\r | |
2120 | \r | |
2121 | /**\r | |
2122 | Returns a bit field from a 64-bit value.\r | |
2123 | \r | |
2124 | Returns the bitfield specified by the StartBit and the EndBit from Operand.\r | |
2125 | \r | |
2126 | If 64-bit operations are not supported, then ASSERT().\r | |
2127 | If StartBit is greater than 63, then ASSERT().\r | |
2128 | If EndBit is greater than 63, then ASSERT().\r | |
2129 | If EndBit is less than or equal to StartBit, then ASSERT().\r | |
2130 | \r | |
2131 | @param Operand Operand on which to perform the bitfield operation.\r | |
2132 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2133 | Range 0..63.\r | |
2134 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2135 | Range 0..63.\r | |
2136 | \r | |
2137 | @return The bit field read.\r | |
2138 | \r | |
2139 | **/\r | |
2140 | UINT64\r | |
2141 | EFIAPI\r | |
2142 | BitFieldRead64 (\r | |
2143 | IN UINT64 Operand,\r | |
2144 | IN UINTN StartBit,\r | |
2145 | IN UINTN EndBit\r | |
2146 | );\r | |
2147 | \r | |
2148 | /**\r | |
2149 | Writes a bit field to a 64-bit value, and returns the result.\r | |
2150 | \r | |
2151 | Writes Value to the bit field specified by the StartBit and the EndBit in\r | |
2152 | Operand. All other bits in Operand are preserved. The new 64-bit value is\r | |
2153 | returned.\r | |
2154 | \r | |
2155 | If 64-bit operations are not supported, then ASSERT().\r | |
2156 | If StartBit is greater than 63, then ASSERT().\r | |
2157 | If EndBit is greater than 63, then ASSERT().\r | |
2158 | If EndBit is less than or equal to StartBit, then ASSERT().\r | |
2159 | \r | |
2160 | @param Operand Operand on which to perform the bitfield operation.\r | |
2161 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2162 | Range 0..63.\r | |
2163 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2164 | Range 0..63.\r | |
2165 | @param Value New value of the bit field.\r | |
2166 | \r | |
2167 | @return The new 64-bit value.\r | |
2168 | \r | |
2169 | **/\r | |
2170 | UINT64\r | |
2171 | EFIAPI\r | |
2172 | BitFieldWrite64 (\r | |
2173 | IN UINT64 Operand,\r | |
2174 | IN UINTN StartBit,\r | |
2175 | IN UINTN EndBit,\r | |
2176 | IN UINT64 Value\r | |
2177 | );\r | |
2178 | \r | |
2179 | /**\r | |
2180 | Reads a bit field from a 64-bit value, performs a bitwise OR, and returns the\r | |
2181 | result.\r | |
2182 | \r | |
2183 | Performs a bitwise inclusive OR between the bit field specified by StartBit\r | |
2184 | and EndBit in Operand and the value specified by OrData. All other bits in\r | |
2185 | Operand are preserved. The new 64-bit value is returned.\r | |
2186 | \r | |
2187 | If 64-bit operations are not supported, then ASSERT().\r | |
2188 | If StartBit is greater than 63, then ASSERT().\r | |
2189 | If EndBit is greater than 63, then ASSERT().\r | |
2190 | If EndBit is less than or equal to StartBit, then ASSERT().\r | |
2191 | \r | |
2192 | @param Operand Operand on which to perform the bitfield operation.\r | |
2193 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2194 | Range 0..63.\r | |
2195 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2196 | Range 0..63.\r | |
2197 | @param OrData The value to OR with the read value from the value\r | |
2198 | \r | |
2199 | @return The new 64-bit value.\r | |
2200 | \r | |
2201 | **/\r | |
2202 | UINT64\r | |
2203 | EFIAPI\r | |
2204 | BitFieldOr64 (\r | |
2205 | IN UINT64 Operand,\r | |
2206 | IN UINTN StartBit,\r | |
2207 | IN UINTN EndBit,\r | |
2208 | IN UINT64 OrData\r | |
2209 | );\r | |
2210 | \r | |
2211 | /**\r | |
2212 | Reads a bit field from a 64-bit value, performs a bitwise AND, and returns\r | |
2213 | the result.\r | |
2214 | \r | |
2215 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
2216 | in Operand and the value specified by AndData. All other bits in Operand are\r | |
2217 | preserved. The new 64-bit value is returned.\r | |
2218 | \r | |
2219 | If 64-bit operations are not supported, then ASSERT().\r | |
2220 | If StartBit is greater than 63, then ASSERT().\r | |
2221 | If EndBit is greater than 63, then ASSERT().\r | |
2222 | If EndBit is less than or equal to StartBit, then ASSERT().\r | |
2223 | \r | |
2224 | @param Operand Operand on which to perform the bitfield operation.\r | |
2225 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2226 | Range 0..63.\r | |
2227 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2228 | Range 0..63.\r | |
2229 | @param AndData The value to AND with the read value from the value\r | |
2230 | \r | |
2231 | @return The new 64-bit value.\r | |
2232 | \r | |
2233 | **/\r | |
2234 | UINT64\r | |
2235 | EFIAPI\r | |
2236 | BitFieldAnd64 (\r | |
2237 | IN UINT64 Operand,\r | |
2238 | IN UINTN StartBit,\r | |
2239 | IN UINTN EndBit,\r | |
2240 | IN UINT64 AndData\r | |
2241 | );\r | |
2242 | \r | |
2243 | /**\r | |
2244 | Reads a bit field from a 64-bit value, performs a bitwise AND followed by a\r | |
2245 | bitwise OR, and returns the result.\r | |
2246 | \r | |
2247 | Performs a bitwise AND between the bit field specified by StartBit and EndBit\r | |
2248 | in Operand and the value specified by AndData, followed by a bitwise\r | |
2249 | inclusive OR with value specified by OrData. All other bits in Operand are\r | |
2250 | preserved. The new 64-bit value is returned.\r | |
2251 | \r | |
2252 | If 64-bit operations are not supported, then ASSERT().\r | |
2253 | If StartBit is greater than 63, then ASSERT().\r | |
2254 | If EndBit is greater than 63, then ASSERT().\r | |
2255 | If EndBit is less than or equal to StartBit, then ASSERT().\r | |
2256 | \r | |
2257 | @param Operand Operand on which to perform the bitfield operation.\r | |
2258 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
2259 | Range 0..63.\r | |
2260 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
2261 | Range 0..63.\r | |
2262 | @param AndData The value to AND with the read value from the value.\r | |
2263 | @param OrData The value to OR with the result of the AND operation.\r | |
2264 | \r | |
2265 | @return The new 64-bit value.\r | |
2266 | \r | |
2267 | **/\r | |
2268 | UINT64\r | |
2269 | EFIAPI\r | |
2270 | BitFieldAndThenOr64 (\r | |
2271 | IN UINT64 Operand,\r | |
2272 | IN UINTN StartBit,\r | |
2273 | IN UINTN EndBit,\r | |
2274 | IN UINT64 AndData,\r | |
2275 | IN UINT64 OrData\r | |
2276 | );\r | |
2277 | \r | |
2278 | //\r | |
2279 | // Base Library Synchronization Functions\r | |
2280 | //\r | |
2281 | \r | |
2282 | /**\r | |
2283 | Retrieves the architecture specific spin lock alignment requirements for\r | |
2284 | optimal spin lock performance.\r | |
2285 | \r | |
2286 | This function retrieves the spin lock alignment requirements for optimal\r | |
2287 | performance on a given CPU architecture. The spin lock alignment must be a\r | |
2288 | power of two and is returned by this function. If there are no alignment\r | |
2289 | requirements, then 1 must be returned. The spin lock synchronization\r | |
2290 | functions must function correctly if the spin lock size and alignment values\r | |
2291 | returned by this function are not used at all. These values are hints to the\r | |
2292 | consumers of the spin lock synchronization functions to obtain optimal spin\r | |
2293 | lock performance.\r | |
2294 | \r | |
2295 | @return The architecture specific spin lock alignment.\r | |
2296 | \r | |
2297 | **/\r | |
2298 | UINTN\r | |
2299 | EFIAPI\r | |
2300 | GetSpinLockProperties (\r | |
2301 | VOID\r | |
2302 | );\r | |
2303 | \r | |
2304 | /**\r | |
2305 | Initializes a spin lock to the released state and returns the spin lock.\r | |
2306 | \r | |
2307 | This function initializes the spin lock specified by SpinLock to the released\r | |
2308 | state, and returns SpinLock. Optimal performance can be achieved by calling\r | |
2309 | GetSpinLockProperties() to determine the size and alignment requirements for\r | |
2310 | SpinLock.\r | |
2311 | \r | |
2312 | If SpinLock is NULL, then ASSERT().\r | |
2313 | \r | |
2314 | @param SpinLock A pointer to the spin lock to initialize to the released\r | |
2315 | state.\r | |
2316 | \r | |
2317 | @return SpinLock\r | |
2318 | \r | |
2319 | **/\r | |
2320 | SPIN_LOCK *\r | |
2321 | EFIAPI\r | |
2322 | InitializeSpinLock (\r | |
2323 | IN SPIN_LOCK *SpinLock\r | |
2324 | );\r | |
2325 | \r | |
2326 | /**\r | |
2327 | Waits until a spin lock can be placed in the acquired state.\r | |
2328 | \r | |
2329 | This function checks the state of the spin lock specified by SpinLock. If\r | |
2330 | SpinLock is in the released state, then this function places SpinLock in the\r | |
2331 | acquired state and returns SpinLock. Otherwise, this function waits\r | |
2332 | indefinitely for the spin lock to be released, and then places it in the\r | |
2333 | acquired state and returns SpinLock. All state transitions of SpinLock must\r | |
2334 | be performed using MP safe mechanisms.\r | |
2335 | \r | |
2336 | If SpinLock is NULL, then ASSERT().\r | |
2337 | If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().\r | |
2338 | If PcdSpinLockTimeout is not zero, and SpinLock is can not be acquired in\r | |
2339 | PcdSpinLockTimeout microseconds, then ASSERT().\r | |
2340 | \r | |
2341 | @param SpinLock A pointer to the spin lock to place in the acquired state.\r | |
2342 | \r | |
2343 | @return SpinLock\r | |
2344 | \r | |
2345 | **/\r | |
2346 | SPIN_LOCK *\r | |
2347 | EFIAPI\r | |
2348 | AcquireSpinLock (\r | |
2349 | IN SPIN_LOCK *SpinLock\r | |
2350 | );\r | |
2351 | \r | |
2352 | /**\r | |
2353 | Attempts to place a spin lock in the acquired state.\r | |
2354 | \r | |
2355 | This function checks the state of the spin lock specified by SpinLock. If\r | |
2356 | SpinLock is in the released state, then this function places SpinLock in the\r | |
2357 | acquired state and returns TRUE. Otherwise, FALSE is returned. All state\r | |
2358 | transitions of SpinLock must be performed using MP safe mechanisms.\r | |
2359 | \r | |
2360 | If SpinLock is NULL, then ASSERT().\r | |
2361 | If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().\r | |
2362 | \r | |
2363 | @param SpinLock A pointer to the spin lock to place in the acquired state.\r | |
2364 | \r | |
2365 | @retval TRUE SpinLock was placed in the acquired state.\r | |
2366 | @retval FALSE SpinLock could not be acquired.\r | |
2367 | \r | |
2368 | **/\r | |
2369 | BOOLEAN\r | |
2370 | EFIAPI\r | |
2371 | AcquireSpinLockOrFail (\r | |
2372 | IN SPIN_LOCK *SpinLock\r | |
2373 | );\r | |
2374 | \r | |
2375 | /**\r | |
2376 | Releases a spin lock.\r | |
2377 | \r | |
2378 | This function places the spin lock specified by SpinLock in the release state\r | |
2379 | and returns SpinLock.\r | |
2380 | \r | |
2381 | If SpinLock is NULL, then ASSERT().\r | |
2382 | If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().\r | |
2383 | \r | |
2384 | @param SpinLock A pointer to the spin lock to release.\r | |
2385 | \r | |
2386 | @return SpinLock\r | |
2387 | \r | |
2388 | **/\r | |
2389 | SPIN_LOCK *\r | |
2390 | EFIAPI\r | |
2391 | ReleaseSpinLock (\r | |
2392 | IN SPIN_LOCK *SpinLock\r | |
2393 | );\r | |
2394 | \r | |
2395 | /**\r | |
2396 | Performs an atomic increment of an 32-bit unsigned integer.\r | |
2397 | \r | |
2398 | Performs an atomic increment of the 32-bit unsigned integer specified by\r | |
2399 | Value and returns the incremented value. The increment operation must be\r | |
2400 | performed using MP safe mechanisms. The state of the return value is not\r | |
2401 | guaranteed to be MP safe.\r | |
2402 | \r | |
2403 | If Value is NULL, then ASSERT().\r | |
2404 | \r | |
2405 | @param Value A pointer to the 32-bit value to increment.\r | |
2406 | \r | |
2407 | @return The incremented value.\r | |
2408 | \r | |
2409 | **/\r | |
2410 | UINT32\r | |
2411 | EFIAPI\r | |
2412 | InterlockedIncrement (\r | |
2413 | IN UINT32 *Value\r | |
2414 | );\r | |
2415 | \r | |
2416 | /**\r | |
2417 | Performs an atomic decrement of an 32-bit unsigned integer.\r | |
2418 | \r | |
2419 | Performs an atomic decrement of the 32-bit unsigned integer specified by\r | |
2420 | Value and returns the decremented value. The decrement operation must be\r | |
2421 | performed using MP safe mechanisms. The state of the return value is not\r | |
2422 | guaranteed to be MP safe.\r | |
2423 | \r | |
2424 | If Value is NULL, then ASSERT().\r | |
2425 | \r | |
2426 | @param Value A pointer to the 32-bit value to decrement.\r | |
2427 | \r | |
2428 | @return The decremented value.\r | |
2429 | \r | |
2430 | **/\r | |
2431 | UINT32\r | |
2432 | EFIAPI\r | |
2433 | InterlockedDecrement (\r | |
2434 | IN UINT32 *Value\r | |
2435 | );\r | |
2436 | \r | |
2437 | /**\r | |
2438 | Performs an atomic compare exchange operation on a 32-bit unsigned integer.\r | |
2439 | \r | |
2440 | @param Value A pointer to the 32-bit value for the compare exchange\r | |
2441 | operation.\r | |
2442 | @param CompareValue 32-bit value used in compare operation.\r | |
2443 | @param ExchangeValue 32-bit value used in exchange operation.\r | |
2444 | \r | |
2445 | @return The original *Value before exchange.\r | |
2446 | \r | |
2447 | **/\r | |
2448 | UINT32\r | |
2449 | EFIAPI\r | |
2450 | InterlockedCompareExchange32 (\r | |
2451 | IN UINT32 *Value,\r | |
2452 | IN UINT32 CompareValue,\r | |
2453 | IN UINT32 ExchangeValue\r | |
2454 | );\r | |
2455 | \r | |
2456 | /**\r | |
2457 | Performs an atomic compare exchange operation on a 64-bit unsigned integer.\r | |
2458 | \r | |
2459 | @param Value A pointer to the 64-bit value for the compare exchange\r | |
2460 | operation.\r | |
2461 | @param CompareValue 64-bit value used in compare operation.\r | |
2462 | @param ExchangeValue 64-bit value used in exchange operation.\r | |
2463 | \r | |
2464 | @return The original *Value before exchange.\r | |
2465 | \r | |
2466 | **/\r | |
2467 | UINT64\r | |
2468 | EFIAPI\r | |
2469 | InterlockedCompareExchange64 (\r | |
2470 | IN UINT64 *Value,\r | |
2471 | IN UINT64 CompareValue,\r | |
2472 | IN UINT64 ExchangeValue\r | |
2473 | );\r | |
2474 | \r | |
2475 | /**\r | |
2476 | Performs an atomic compare exchange operation on a pointer value.\r | |
2477 | \r | |
2478 | Performs an atomic compare exchange operation on the pointer value specified\r | |
2479 | by Value. If Value is equal to CompareValue, then Value is set to\r | |
2480 | ExchangeValue and CompareValue is returned. If Value is not equal to\r | |
2481 | CompareValue, then Value is returned. The compare exchange operation must be\r | |
2482 | performed using MP safe mechanisms.\r | |
2483 | \r | |
2484 | If Value is NULL, then ASSERT().\r | |
2485 | \r | |
2486 | @param Value A pointer to the pointer value for the compare exchange\r | |
2487 | operation.\r | |
2488 | @param CompareValue Pointer value used in compare operation.\r | |
2489 | @param ExchangeValue Pointer value used in exchange operation.\r | |
2490 | \r | |
2491 | **/\r | |
2492 | VOID *\r | |
2493 | EFIAPI\r | |
2494 | InterlockedCompareExchangePointer (\r | |
2495 | IN VOID **Value,\r | |
2496 | IN VOID *CompareValue,\r | |
2497 | IN VOID *ExchangeValue\r | |
2498 | );\r | |
2499 | \r | |
2500 | //\r | |
2501 | // Base Library CPU Functions\r | |
2502 | //\r | |
2503 | typedef\r | |
2504 | VOID\r | |
2505 | (EFIAPI *SWITCH_STACK_ENTRY_POINT) (\r | |
2506 | IN VOID *Context1, OPTIONAL\r | |
2507 | IN VOID *Context2 OPTIONAL\r | |
2508 | );\r | |
2509 | \r | |
2510 | /**\r | |
2511 | Used to serialize load and store operations.\r | |
2512 | \r | |
2513 | All loads and stores that proceed calls to this function are guaranteed to be\r | |
2514 | globally visible when this function returns.\r | |
2515 | \r | |
2516 | **/\r | |
2517 | VOID\r | |
2518 | EFIAPI\r | |
2519 | MemoryFence (\r | |
2520 | VOID\r | |
2521 | );\r | |
2522 | \r | |
2523 | /**\r | |
2524 | Saves the current CPU context that can be restored with a call to LongJump()\r | |
2525 | and returns 0.\r | |
2526 | \r | |
2527 | Saves the current CPU context in the buffer specified by JumpBuffer and\r | |
2528 | returns 0. The initial call to SetJump() must always return 0. Subsequent\r | |
2529 | calls to LongJump() cause a non-zero value to be returned by SetJump().\r | |
2530 | \r | |
2531 | If JumpBuffer is NULL, then ASSERT().\r | |
2532 | \r | |
2533 | @param JumpBuffer A pointer to CPU context buffer.\r | |
2534 | \r | |
2535 | @retval 0 Indicates a return from SetJump().\r | |
2536 | \r | |
2537 | **/\r | |
2538 | UINTN\r | |
2539 | EFIAPI\r | |
2540 | SetJump (\r | |
2541 | OUT BASE_LIBRARY_JUMP_BUFFER *JumpBuffer\r | |
2542 | );\r | |
2543 | \r | |
2544 | /**\r | |
2545 | Restores the CPU context that was saved with SetJump().\r | |
2546 | \r | |
2547 | Restores the CPU context from the buffer specified by JumpBuffer. This\r | |
2548 | function never returns to the caller. Instead is resumes execution based on\r | |
2549 | the state of JumpBuffer.\r | |
2550 | \r | |
2551 | If JumpBuffer is NULL, then ASSERT().\r | |
2552 | If Value is 0, then ASSERT().\r | |
2553 | \r | |
2554 | @param JumpBuffer A pointer to CPU context buffer.\r | |
2555 | @param Value The value to return when the SetJump() context is\r | |
2556 | restored and must be non-zero.\r | |
2557 | \r | |
2558 | **/\r | |
2559 | VOID\r | |
2560 | EFIAPI\r | |
2561 | LongJump (\r | |
2562 | IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer,\r | |
2563 | IN UINTN Value\r | |
2564 | );\r | |
2565 | \r | |
2566 | /**\r | |
2567 | Enables CPU interrupts.\r | |
2568 | \r | |
2569 | Enables CPU interrupts.\r | |
2570 | \r | |
2571 | **/\r | |
2572 | VOID\r | |
2573 | EFIAPI\r | |
2574 | EnableInterrupts (\r | |
2575 | VOID\r | |
2576 | );\r | |
2577 | \r | |
2578 | /**\r | |
2579 | Disables CPU interrupts.\r | |
2580 | \r | |
2581 | Disables CPU interrupts.\r | |
2582 | \r | |
2583 | **/\r | |
2584 | VOID\r | |
2585 | EFIAPI\r | |
2586 | DisableInterrupts (\r | |
2587 | VOID\r | |
2588 | );\r | |
2589 | \r | |
2590 | /**\r | |
2591 | Disables CPU interrupts and returns the interrupt state prior to the disable\r | |
2592 | operation.\r | |
2593 | \r | |
2594 | Disables CPU interrupts and returns the interrupt state prior to the disable\r | |
2595 | operation.\r | |
2596 | \r | |
2597 | @retval TRUE CPU interrupts were enabled on entry to this call.\r | |
2598 | @retval FALSE CPU interrupts were disabled on entry to this call.\r | |
2599 | \r | |
2600 | **/\r | |
2601 | BOOLEAN\r | |
2602 | EFIAPI\r | |
2603 | SaveAndDisableInterrupts (\r | |
2604 | VOID\r | |
2605 | );\r | |
2606 | \r | |
2607 | /**\r | |
2608 | Enables CPU interrupts for the smallest window required to capture any\r | |
2609 | pending interrupts.\r | |
2610 | \r | |
2611 | Enables CPU interrupts for the smallest window required to capture any\r | |
2612 | pending interrupts.\r | |
2613 | \r | |
2614 | **/\r | |
2615 | VOID\r | |
2616 | EFIAPI\r | |
2617 | EnableDisableInterrupts (\r | |
2618 | VOID\r | |
2619 | );\r | |
2620 | \r | |
2621 | /**\r | |
2622 | Retrieves the current CPU interrupt state.\r | |
2623 | \r | |
2624 | Retrieves the current CPU interrupt state. Returns TRUE is interrupts are\r | |
2625 | currently enabled. Otherwise returns FALSE.\r | |
2626 | \r | |
2627 | @retval TRUE CPU interrupts are enabled.\r | |
2628 | @retval FALSE CPU interrupts are disabled.\r | |
2629 | \r | |
2630 | **/\r | |
2631 | BOOLEAN\r | |
2632 | EFIAPI\r | |
2633 | GetInterruptState (\r | |
2634 | VOID\r | |
2635 | );\r | |
2636 | \r | |
2637 | /**\r | |
2638 | Set the current CPU interrupt state.\r | |
2639 | \r | |
2640 | Sets the current CPU interrupt state to the state specified by\r | |
2641 | InterruptState. If InterruptState is TRUE, then interrupts are enabled. If\r | |
2642 | InterruptState is FALSE, then interrupts are disabled. InterruptState is\r | |
2643 | returned.\r | |
2644 | \r | |
2645 | @param InterruptState TRUE if interrupts should enabled. FALSE if\r | |
2646 | interrupts should be disabled.\r | |
2647 | \r | |
2648 | @return InterruptState\r | |
2649 | \r | |
2650 | **/\r | |
2651 | BOOLEAN\r | |
2652 | EFIAPI\r | |
2653 | SetInterruptState (\r | |
2654 | IN BOOLEAN InterruptState\r | |
2655 | );\r | |
2656 | \r | |
2657 | /**\r | |
2658 | Places the CPU in a sleep state until an interrupt is received.\r | |
2659 | \r | |
2660 | Places the CPU in a sleep state until an interrupt is received. If interrupts\r | |
2661 | are disabled prior to calling this function, then the CPU will be placed in a\r | |
2662 | sleep state indefinitely.\r | |
2663 | \r | |
2664 | **/\r | |
2665 | VOID\r | |
2666 | EFIAPI\r | |
2667 | CpuSleep (\r | |
2668 | VOID\r | |
2669 | );\r | |
2670 | \r | |
2671 | /**\r | |
2672 | Requests CPU to pause for a short period of time.\r | |
2673 | \r | |
2674 | Requests CPU to pause for a short period of time. Typically used in MP\r | |
2675 | systems to prevent memory starvation while waiting for a spin lock.\r | |
2676 | \r | |
2677 | **/\r | |
2678 | VOID\r | |
2679 | EFIAPI\r | |
2680 | CpuPause (\r | |
2681 | VOID\r | |
2682 | );\r | |
2683 | \r | |
2684 | /**\r | |
2685 | Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU.\r | |
2686 | \r | |
2687 | Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU.\r | |
2688 | \r | |
2689 | **/\r | |
2690 | VOID\r | |
2691 | EFIAPI\r | |
2692 | CpuFlushTlb (\r | |
2693 | VOID\r | |
2694 | );\r | |
2695 | \r | |
2696 | /**\r | |
2697 | Transfers control to a function starting with a new stack.\r | |
2698 | \r | |
2699 | Transfers control to the function specified by EntryPoint using the new stack\r | |
2700 | specified by NewStack and passing in the parameters specified by Context1 and\r | |
2701 | Context2. Context1 and Context2 are optional and may be NULL. The function\r | |
2702 | EntryPoint must never return.\r | |
2703 | \r | |
2704 | If EntryPoint is NULL, then ASSERT().\r | |
2705 | If NewStack is NULL, then ASSERT().\r | |
2706 | \r | |
2707 | @param EntryPoint A pointer to function to call with the new stack.\r | |
2708 | @param Context1 A pointer to the context to pass into the EntryPoint\r | |
2709 | function.\r | |
2710 | @param Context2 A pointer to the context to pass into the EntryPoint\r | |
2711 | function.\r | |
2712 | @param NewStack A pointer to the new stack to use for the EntryPoint\r | |
2713 | function.\r | |
2714 | \r | |
2715 | **/\r | |
2716 | VOID\r | |
2717 | EFIAPI\r | |
2718 | SwitchStack (\r | |
2719 | IN SWITCH_STACK_ENTRY_POINT EntryPoint,\r | |
2720 | IN VOID *Context1, OPTIONAL\r | |
2721 | IN VOID *Context2, OPTIONAL\r | |
2722 | IN VOID *NewStack\r | |
2723 | );\r | |
2724 | \r | |
2725 | /**\r | |
2726 | Generates a breakpoint on the CPU.\r | |
2727 | \r | |
2728 | Generates a breakpoint on the CPU. The breakpoint must be implemented such\r | |
2729 | that code can resume normal execution after the breakpoint.\r | |
2730 | \r | |
2731 | **/\r | |
2732 | VOID\r | |
2733 | EFIAPI\r | |
2734 | CpuBreakpoint (\r | |
2735 | VOID\r | |
2736 | );\r | |
2737 | \r | |
2738 | /**\r | |
2739 | Executes an infinite loop.\r | |
2740 | \r | |
2741 | Forces the CPU to execute an infinite loop. A debugger may be used to skip\r | |
2742 | past the loop and the code that follows the loop must execute properly. This\r | |
2743 | implies that the infinite loop must not cause the code that follow it to be\r | |
2744 | optimized away.\r | |
2745 | \r | |
2746 | **/\r | |
2747 | VOID\r | |
2748 | EFIAPI\r | |
2749 | CpuDeadLoop (\r | |
2750 | VOID\r | |
2751 | );\r | |
2752 | \r | |
2753 | //\r | |
2754 | // IA32 and X64 Specific Functions\r | |
2755 | //\r | |
2756 | //\r | |
2757 | // Byte packed structure for 16-bit Real Mode EFLAGS\r | |
2758 | //\r | |
2759 | typedef union {\r | |
2760 | struct {\r | |
2761 | UINT32 CF:1; // Carry Flag\r | |
2762 | UINT32 Reserved_0:1; // Reserved\r | |
2763 | UINT32 PF:1; // Parity Flag\r | |
2764 | UINT32 Reserved_1:1; // Reserved\r | |
2765 | UINT32 AF:1; // Auxiliary Carry Flag\r | |
2766 | UINT32 Reserved_2:1; // Reserved\r | |
2767 | UINT32 ZF:1; // Zero Flag\r | |
2768 | UINT32 SF:1; // Sign Flag\r | |
2769 | UINT32 TF:1; // Trap Flag\r | |
2770 | UINT32 IF:1; // Interrupt Enable Flag\r | |
2771 | UINT32 DF:1; // Direction Flag\r | |
2772 | UINT32 OF:1; // Overflow Flag\r | |
2773 | UINT32 IOPL:2; // I/O Privilege Level\r | |
2774 | UINT32 NT:1; // Nested Task\r | |
2775 | UINT32 Reserved_3:1; // Reserved\r | |
2776 | } Bits;\r | |
2777 | UINT16 Uint16;\r | |
2778 | } IA32_FLAGS16;\r | |
2779 | \r | |
2780 | //\r | |
2781 | // Byte packed structure for EFLAGS/RFLAGS\r | |
2782 | // 32-bits on IA-32\r | |
2783 | // 64-bits on X64. The upper 32-bits on X64 are reserved\r | |
2784 | //\r | |
2785 | typedef union {\r | |
2786 | struct {\r | |
2787 | UINT32 CF:1; // Carry Flag\r | |
2788 | UINT32 Reserved_0:1; // Reserved\r | |
2789 | UINT32 PF:1; // Parity Flag\r | |
2790 | UINT32 Reserved_1:1; // Reserved\r | |
2791 | UINT32 AF:1; // Auxiliary Carry Flag\r | |
2792 | UINT32 Reserved_2:1; // Reserved\r | |
2793 | UINT32 ZF:1; // Zero Flag\r | |
2794 | UINT32 SF:1; // Sign Flag\r | |
2795 | UINT32 TF:1; // Trap Flag\r | |
2796 | UINT32 IF:1; // Interrupt Enable Flag\r | |
2797 | UINT32 DF:1; // Direction Flag\r | |
2798 | UINT32 OF:1; // Overflow Flag\r | |
2799 | UINT32 IOPL:2; // I/O Privilege Level\r | |
2800 | UINT32 NT:1; // Nested Task\r | |
2801 | UINT32 Reserved_3:1; // Reserved\r | |
2802 | UINT32 RF:1; // Resume Flag\r | |
2803 | UINT32 VM:1; // Virtual 8086 Mode\r | |
2804 | UINT32 AC:1; // Alignment Check\r | |
2805 | UINT32 VIF:1; // Virtual Interrupt Flag\r | |
2806 | UINT32 VIP:1; // Virtual Interrupt Pending\r | |
2807 | UINT32 ID:1; // ID Flag\r | |
2808 | UINT32 Reserved_4:10; // Reserved\r | |
2809 | } Bits;\r | |
2810 | UINTN UintN;\r | |
2811 | } IA32_EFLAGS32;\r | |
2812 | \r | |
2813 | //\r | |
2814 | // Byte packed structure for Control Register 0 (CR0)\r | |
2815 | // 32-bits on IA-32\r | |
2816 | // 64-bits on X64. The upper 32-bits on X64 are reserved\r | |
2817 | //\r | |
2818 | typedef union {\r | |
2819 | struct {\r | |
2820 | UINT32 PE:1; // Protection Enable\r | |
2821 | UINT32 MP:1; // Monitor Coprocessor\r | |
2822 | UINT32 EM:1; // Emulation\r | |
2823 | UINT32 TS:1; // Task Switched\r | |
2824 | UINT32 ET:1; // Extension Type\r | |
2825 | UINT32 NE:1; // Numeric Error\r | |
2826 | UINT32 Reserved_0:10; // Reserved\r | |
2827 | UINT32 WP:1; // Write Protect\r | |
2828 | UINT32 Reserved_1:1; // Reserved\r | |
2829 | UINT32 AM:1; // Alignment Mask\r | |
2830 | UINT32 Reserved_2:10; // Reserved\r | |
2831 | UINT32 NW:1; // Mot Write-through\r | |
2832 | UINT32 CD:1; // Cache Disable\r | |
2833 | UINT32 PG:1; // Paging\r | |
2834 | } Bits;\r | |
2835 | UINTN UintN;\r | |
2836 | } IA32_CR0;\r | |
2837 | \r | |
2838 | //\r | |
2839 | // Byte packed structure for Control Register 4 (CR4)\r | |
2840 | // 32-bits on IA-32\r | |
2841 | // 64-bits on X64. The upper 32-bits on X64 are reserved\r | |
2842 | //\r | |
2843 | typedef union {\r | |
2844 | struct {\r | |
2845 | UINT32 VME:1; // Virtual-8086 Mode Extensions\r | |
2846 | UINT32 PVI:1; // Protected-Mode Virtual Interrupts\r | |
2847 | UINT32 TSD:1; // Time Stamp Disable\r | |
2848 | UINT32 DE:1; // Debugging Extensions\r | |
2849 | UINT32 PSE:1; // Page Size Extensions\r | |
2850 | UINT32 PAE:1; // Physical Address Extension\r | |
2851 | UINT32 MCE:1; // Machine Check Enable\r | |
2852 | UINT32 PGE:1; // Page Global Enable\r | |
2853 | UINT32 PCE:1; // Performance Monitoring Counter\r | |
2854 | // Enable\r | |
2855 | UINT32 OSFXSR:1; // Operating System Support for\r | |
2856 | // FXSAVE and FXRSTOR instructions\r | |
2857 | UINT32 OSXMMEXCPT:1; // Operating System Support for\r | |
2858 | // Unmasked SIMD Floating Point\r | |
2859 | // Exceptions\r | |
2860 | UINT32 Reserved_0:2; // Reserved\r | |
2861 | UINT32 VMXE:1; // VMX Enable\r | |
2862 | UINT32 Reserved_1:18; // Reseved\r | |
2863 | } Bits;\r | |
2864 | UINTN UintN;\r | |
2865 | } IA32_CR4;\r | |
2866 | \r | |
2867 | //\r | |
2868 | // Byte packed structure for an IDTR, GDTR, LDTR descriptor\r | |
2869 | //\r | |
2870 | typedef struct {\r | |
2871 | UINT16 Limit;\r | |
2872 | UINTN Base;\r | |
2873 | } IA32_DESCRIPTOR;\r | |
2874 | \r | |
2875 | #define IA32_IDT_GATE_TYPE_TASK 0x85\r | |
2876 | #define IA32_IDT_GATE_TYPE_INTERRUPT_16 0x86\r | |
2877 | #define IA32_IDT_GATE_TYPE_TRAP_16 0x87\r | |
2878 | #define IA32_IDT_GATE_TYPE_INTERRUPT_32 0x8E\r | |
2879 | #define IA32_IDT_GATE_TYPE_TRAP_32 0x8F\r | |
2880 | \r | |
2881 | //\r | |
2882 | // Byte packed structure for an Interrupt Gate Descriptor\r | |
2883 | //\r | |
2884 | typedef union {\r | |
2885 | struct {\r | |
2886 | UINT32 OffsetLow:16; // Offset bits 15..0\r | |
2887 | UINT32 Selector:16; // Selector\r | |
2888 | UINT32 Reserved_0:8; // Reserved\r | |
2889 | UINT32 GateType:8; // Gate Type. See #defines above\r | |
2890 | UINT32 OffsetHigh:16; // Offset bits 31..16\r | |
2891 | } Bits;\r | |
2892 | UINT64 Uint64;\r | |
2893 | } IA32_IDT_GATE_DESCRIPTOR;\r | |
2894 | \r | |
2895 | //\r | |
2896 | // Byte packed structure for an FP/SSE/SSE2 context\r | |
2897 | //\r | |
2898 | typedef struct {\r | |
2899 | UINT8 Buffer[512];\r | |
2900 | } IA32_FX_BUFFER;\r | |
2901 | \r | |
2902 | //\r | |
2903 | // Structures for the 16-bit real mode thunks\r | |
2904 | //\r | |
2905 | typedef struct {\r | |
2906 | UINT32 Reserved1;\r | |
2907 | UINT32 Reserved2;\r | |
2908 | UINT32 Reserved3;\r | |
2909 | UINT32 Reserved4;\r | |
2910 | UINT8 BL;\r | |
2911 | UINT8 BH;\r | |
2912 | UINT16 Reserved5;\r | |
2913 | UINT8 DL;\r | |
2914 | UINT8 DH;\r | |
2915 | UINT16 Reserved6;\r | |
2916 | UINT8 CL;\r | |
2917 | UINT8 CH;\r | |
2918 | UINT16 Reserved7;\r | |
2919 | UINT8 AL;\r | |
2920 | UINT8 AH;\r | |
2921 | UINT16 Reserved8;\r | |
2922 | } IA32_BYTE_REGS;\r | |
2923 | \r | |
2924 | typedef struct {\r | |
2925 | UINT16 DI;\r | |
2926 | UINT16 Reserved1;\r | |
2927 | UINT16 SI;\r | |
2928 | UINT16 Reserved2;\r | |
2929 | UINT16 BP;\r | |
2930 | UINT16 Reserved3;\r | |
2931 | UINT16 SP;\r | |
2932 | UINT16 Reserved4;\r | |
2933 | UINT16 BX;\r | |
2934 | UINT16 Reserved5;\r | |
2935 | UINT16 DX;\r | |
2936 | UINT16 Reserved6;\r | |
2937 | UINT16 CX;\r | |
2938 | UINT16 Reserved7;\r | |
2939 | UINT16 AX;\r | |
2940 | UINT16 Reserved8;\r | |
2941 | } IA32_WORD_REGS;\r | |
2942 | \r | |
2943 | typedef struct {\r | |
2944 | UINT32 EDI;\r | |
2945 | UINT32 ESI;\r | |
2946 | UINT32 EBP;\r | |
2947 | UINT32 ESP;\r | |
2948 | UINT32 EBX;\r | |
2949 | UINT32 EDX;\r | |
2950 | UINT32 ECX;\r | |
2951 | UINT32 EAX;\r | |
2952 | UINT16 DS;\r | |
2953 | UINT16 ES;\r | |
2954 | UINT16 FS;\r | |
2955 | UINT16 GS;\r | |
2956 | IA32_EFLAGS32 EFLAGS;\r | |
2957 | UINT32 Eip;\r | |
2958 | UINT16 CS;\r | |
2959 | UINT16 SS;\r | |
2960 | } IA32_DWORD_REGS;\r | |
2961 | \r | |
2962 | typedef union {\r | |
2963 | IA32_DWORD_REGS E;\r | |
2964 | IA32_WORD_REGS X;\r | |
2965 | IA32_BYTE_REGS H;\r | |
2966 | } IA32_REGISTER_SET;\r | |
2967 | \r | |
2968 | //\r | |
2969 | // Byte packed structure for an 16-bit real mode thunks\r | |
2970 | //\r | |
2971 | typedef struct {\r | |
2972 | IA32_REGISTER_SET *RealModeState;\r | |
2973 | VOID *RealModeBuffer;\r | |
2974 | UINT32 RealModeBufferSize;\r | |
2975 | UINT32 ThunkAttributes;\r | |
2976 | } THUNK_CONTEXT;\r | |
2977 | \r | |
2978 | #define THUNK_ATTRIBUTE_BIG_REAL_MODE 0x00000001\r | |
2979 | #define THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 0x00000002\r | |
2980 | #define THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL 0x00000004\r | |
2981 | \r | |
2982 | /**\r | |
2983 | Retrieves CPUID information.\r | |
2984 | \r | |
2985 | Executes the CPUID instruction with EAX set to the value specified by Index.\r | |
2986 | This function always returns Index.\r | |
2987 | If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.\r | |
2988 | If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.\r | |
2989 | If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.\r | |
2990 | If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.\r | |
2991 | This function is only available on IA-32 and X64.\r | |
2992 | \r | |
2993 | @param Index The 32-bit value to load into EAX prior to invoking the CPUID\r | |
2994 | instruction.\r | |
2995 | @param Eax Pointer to the 32-bit EAX value returned by the CPUID\r | |
2996 | instruction. This is an optional parameter that may be NULL.\r | |
2997 | @param Ebx Pointer to the 32-bit EBX value returned by the CPUID\r | |
2998 | instruction. This is an optional parameter that may be NULL.\r | |
2999 | @param Ecx Pointer to the 32-bit ECX value returned by the CPUID\r | |
3000 | instruction. This is an optional parameter that may be NULL.\r | |
3001 | @param Edx Pointer to the 32-bit EDX value returned by the CPUID\r | |
3002 | instruction. This is an optional parameter that may be NULL.\r | |
3003 | \r | |
3004 | @return Index\r | |
3005 | \r | |
3006 | **/\r | |
3007 | UINT32\r | |
3008 | EFIAPI\r | |
3009 | AsmCpuid (\r | |
3010 | IN UINT32 Index,\r | |
3011 | OUT UINT32 *Eax, OPTIONAL\r | |
3012 | OUT UINT32 *Ebx, OPTIONAL\r | |
3013 | OUT UINT32 *Ecx, OPTIONAL\r | |
3014 | OUT UINT32 *Edx OPTIONAL\r | |
3015 | );\r | |
3016 | \r | |
3017 | /**\r | |
3018 | Returns the lower 32-bits of a Machine Specific Register(MSR).\r | |
3019 | \r | |
3020 | Reads and returns the lower 32-bits of the MSR specified by Index.\r | |
3021 | No parameter checking is performed on Index, and some Index values may cause\r | |
3022 | CPU exceptions. The caller must either guarantee that Index is valid, or the\r | |
3023 | caller must set up exception handlers to catch the exceptions. This function\r | |
3024 | is only available on IA-32 and X64.\r | |
3025 | \r | |
3026 | @param Index The 32-bit MSR index to read.\r | |
3027 | \r | |
3028 | @return The lower 32 bits of the MSR identified by Index.\r | |
3029 | \r | |
3030 | **/\r | |
3031 | UINT32\r | |
3032 | EFIAPI\r | |
3033 | AsmReadMsr32 (\r | |
3034 | IN UINT32 Index\r | |
3035 | );\r | |
3036 | \r | |
3037 | /**\r | |
3038 | Zero-extend a 32-bit value and writes it to a Machine Specific Register(MSR).\r | |
3039 | \r | |
3040 | Writes the 32-bit value specified by Value to the MSR specified by Index. The\r | |
3041 | upper 32-bits of the MSR write are set to zero. The 32-bit value written to\r | |
3042 | the MSR is returned. No parameter checking is performed on Index or Value,\r | |
3043 | and some of these may cause CPU exceptions. The caller must either guarantee\r | |
3044 | that Index and Value are valid, or the caller must establish proper exception\r | |
3045 | handlers. This function is only available on IA-32 and X64.\r | |
3046 | \r | |
3047 | @param Index The 32-bit MSR index to write.\r | |
3048 | @param Value The 32-bit value to write to the MSR.\r | |
3049 | \r | |
3050 | @return Value\r | |
3051 | \r | |
3052 | **/\r | |
3053 | UINT32\r | |
3054 | EFIAPI\r | |
3055 | AsmWriteMsr32 (\r | |
3056 | IN UINT32 Index,\r | |
3057 | IN UINT32 Value\r | |
3058 | );\r | |
3059 | \r | |
3060 | /**\r | |
3061 | Reads a 64-bit MSR, performs a bitwise inclusive OR on the lower 32-bits, and\r | |
3062 | writes the result back to the 64-bit MSR.\r | |
3063 | \r | |
3064 | Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR\r | |
3065 | between the lower 32-bits of the read result and the value specified by\r | |
3066 | OrData, and writes the result to the 64-bit MSR specified by Index. The lower\r | |
3067 | 32-bits of the value written to the MSR is returned. No parameter checking is\r | |
3068 | performed on Index or OrData, and some of these may cause CPU exceptions. The\r | |
3069 | caller must either guarantee that Index and OrData are valid, or the caller\r | |
3070 | must establish proper exception handlers. This function is only available on\r | |
3071 | IA-32 and X64.\r | |
3072 | \r | |
3073 | @param Index The 32-bit MSR index to write.\r | |
3074 | @param OrData The value to OR with the read value from the MSR.\r | |
3075 | \r | |
3076 | @return The lower 32-bit value written to the MSR.\r | |
3077 | \r | |
3078 | **/\r | |
3079 | UINT32\r | |
3080 | EFIAPI\r | |
3081 | AsmMsrOr32 (\r | |
3082 | IN UINT32 Index,\r | |
3083 | IN UINT32 OrData\r | |
3084 | );\r | |
3085 | \r | |
3086 | /**\r | |
3087 | Reads a 64-bit MSR, performs a bitwise AND on the lower 32-bits, and writes\r | |
3088 | the result back to the 64-bit MSR.\r | |
3089 | \r | |
3090 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r | |
3091 | lower 32-bits of the read result and the value specified by AndData, and\r | |
3092 | writes the result to the 64-bit MSR specified by Index. The lower 32-bits of\r | |
3093 | the value written to the MSR is returned. No parameter checking is performed\r | |
3094 | on Index or AndData, and some of these may cause CPU exceptions. The caller\r | |
3095 | must either guarantee that Index and AndData are valid, or the caller must\r | |
3096 | establish proper exception handlers. This function is only available on IA-32\r | |
3097 | and X64.\r | |
3098 | \r | |
3099 | @param Index The 32-bit MSR index to write.\r | |
3100 | @param AndData The value to AND with the read value from the MSR.\r | |
3101 | \r | |
3102 | @return The lower 32-bit value written to the MSR.\r | |
3103 | \r | |
3104 | **/\r | |
3105 | UINT32\r | |
3106 | EFIAPI\r | |
3107 | AsmMsrAnd32 (\r | |
3108 | IN UINT32 Index,\r | |
3109 | IN UINT32 AndData\r | |
3110 | );\r | |
3111 | \r | |
3112 | /**\r | |
3113 | Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise inclusive OR\r | |
3114 | on the lower 32-bits, and writes the result back to the 64-bit MSR.\r | |
3115 | \r | |
3116 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r | |
3117 | lower 32-bits of the read result and the value specified by AndData\r | |
3118 | preserving the upper 32-bits, performs a bitwise inclusive OR between the\r | |
3119 | result of the AND operation and the value specified by OrData, and writes the\r | |
3120 | result to the 64-bit MSR specified by Address. The lower 32-bits of the value\r | |
3121 | written to the MSR is returned. No parameter checking is performed on Index,\r | |
3122 | AndData, or OrData, and some of these may cause CPU exceptions. The caller\r | |
3123 | must either guarantee that Index, AndData, and OrData are valid, or the\r | |
3124 | caller must establish proper exception handlers. This function is only\r | |
3125 | available on IA-32 and X64.\r | |
3126 | \r | |
3127 | @param Index The 32-bit MSR index to write.\r | |
3128 | @param AndData The value to AND with the read value from the MSR.\r | |
3129 | @param OrData The value to OR with the result of the AND operation.\r | |
3130 | \r | |
3131 | @return The lower 32-bit value written to the MSR.\r | |
3132 | \r | |
3133 | **/\r | |
3134 | UINT32\r | |
3135 | EFIAPI\r | |
3136 | AsmMsrAndThenOr32 (\r | |
3137 | IN UINT32 Index,\r | |
3138 | IN UINT32 AndData,\r | |
3139 | IN UINT32 OrData\r | |
3140 | );\r | |
3141 | \r | |
3142 | /**\r | |
3143 | Reads a bit field of an MSR.\r | |
3144 | \r | |
3145 | Reads the bit field in the lower 32-bits of a 64-bit MSR. The bit field is\r | |
3146 | specified by the StartBit and the EndBit. The value of the bit field is\r | |
3147 | returned. The caller must either guarantee that Index is valid, or the caller\r | |
3148 | must set up exception handlers to catch the exceptions. This function is only\r | |
3149 | available on IA-32 and X64.\r | |
3150 | \r | |
3151 | If StartBit is greater than 31, then ASSERT().\r | |
3152 | If EndBit is greater than 31, then ASSERT().\r | |
3153 | If EndBit is less than or equal to StartBit, then ASSERT().\r | |
3154 | \r | |
3155 | @param Index The 32-bit MSR index to read.\r | |
3156 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
3157 | Range 0..31.\r | |
3158 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
3159 | Range 0..31.\r | |
3160 | \r | |
3161 | @return The bit field read from the MSR.\r | |
3162 | \r | |
3163 | **/\r | |
3164 | UINT32\r | |
3165 | EFIAPI\r | |
3166 | AsmMsrBitFieldRead32 (\r | |
3167 | IN UINT32 Index,\r | |
3168 | IN UINTN StartBit,\r | |
3169 | IN UINTN EndBit\r | |
3170 | );\r | |
3171 | \r | |
3172 | /**\r | |
3173 | Writes a bit field to an MSR.\r | |
3174 | \r | |
3175 | Writes Value to a bit field in the lower 32-bits of a 64-bit MSR. The bit\r | |
3176 | field is specified by the StartBit and the EndBit. All other bits in the\r | |
3177 | destination MSR are preserved. The lower 32-bits of the MSR written is\r | |
3178 | returned. Extra left bits in Value are stripped. The caller must either\r | |
3179 | guarantee that Index and the data written is valid, or the caller must set up\r | |
3180 | exception handlers to catch the exceptions. This function is only available\r | |
3181 | on IA-32 and X64.\r | |
3182 | \r | |
3183 | If StartBit is greater than 31, then ASSERT().\r | |
3184 | If EndBit is greater than 31, then ASSERT().\r | |
3185 | If EndBit is less than or equal to StartBit, then ASSERT().\r | |
3186 | \r | |
3187 | @param Index The 32-bit MSR index to write.\r | |
3188 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
3189 | Range 0..31.\r | |
3190 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
3191 | Range 0..31.\r | |
3192 | @param Value New value of the bit field.\r | |
3193 | \r | |
3194 | @return The lower 32-bit of the value written to the MSR.\r | |
3195 | \r | |
3196 | **/\r | |
3197 | UINT32\r | |
3198 | EFIAPI\r | |
3199 | AsmMsrBitFieldWrite32 (\r | |
3200 | IN UINT32 Index,\r | |
3201 | IN UINTN StartBit,\r | |
3202 | IN UINTN EndBit,\r | |
3203 | IN UINT32 Value\r | |
3204 | );\r | |
3205 | \r | |
3206 | /**\r | |
3207 | Reads a bit field in a 64-bit MSR, performs a bitwise OR, and writes the\r | |
3208 | result back to the bit field in the 64-bit MSR.\r | |
3209 | \r | |
3210 | Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR\r | |
3211 | between the read result and the value specified by OrData, and writes the\r | |
3212 | result to the 64-bit MSR specified by Index. The lower 32-bits of the value\r | |
3213 | written to the MSR are returned. Extra left bits in OrData are stripped. The\r | |
3214 | caller must either guarantee that Index and the data written is valid, or\r | |
3215 | the caller must set up exception handlers to catch the exceptions. This\r | |
3216 | function is only available on IA-32 and X64.\r | |
3217 | \r | |
3218 | If StartBit is greater than 31, then ASSERT().\r | |
3219 | If EndBit is greater than 31, then ASSERT().\r | |
3220 | If EndBit is less than or equal to StartBit, then ASSERT().\r | |
3221 | \r | |
3222 | @param Index The 32-bit MSR index to write.\r | |
3223 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
3224 | Range 0..31.\r | |
3225 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
3226 | Range 0..31.\r | |
3227 | @param OrData The value to OR with the read value from the MSR.\r | |
3228 | \r | |
3229 | @return The lower 32-bit of the value written to the MSR.\r | |
3230 | \r | |
3231 | **/\r | |
3232 | UINT32\r | |
3233 | EFIAPI\r | |
3234 | AsmMsrBitFieldOr32 (\r | |
3235 | IN UINT32 Index,\r | |
3236 | IN UINTN StartBit,\r | |
3237 | IN UINTN EndBit,\r | |
3238 | IN UINT32 OrData\r | |
3239 | );\r | |
3240 | \r | |
3241 | /**\r | |
3242 | Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the\r | |
3243 | result back to the bit field in the 64-bit MSR.\r | |
3244 | \r | |
3245 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r | |
3246 | read result and the value specified by AndData, and writes the result to the\r | |
3247 | 64-bit MSR specified by Index. The lower 32-bits of the value written to the\r | |
3248 | MSR are returned. Extra left bits in AndData are stripped. The caller must\r | |
3249 | either guarantee that Index and the data written is valid, or the caller must\r | |
3250 | set up exception handlers to catch the exceptions. This function is only\r | |
3251 | available on IA-32 and X64.\r | |
3252 | \r | |
3253 | If StartBit is greater than 31, then ASSERT().\r | |
3254 | If EndBit is greater than 31, then ASSERT().\r | |
3255 | If EndBit is less than or equal to StartBit, then ASSERT().\r | |
3256 | \r | |
3257 | @param Index The 32-bit MSR index to write.\r | |
3258 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
3259 | Range 0..31.\r | |
3260 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
3261 | Range 0..31.\r | |
3262 | @param AndData The value to AND with the read value from the MSR.\r | |
3263 | \r | |
3264 | @return The lower 32-bit of the value written to the MSR.\r | |
3265 | \r | |
3266 | **/\r | |
3267 | UINT32\r | |
3268 | EFIAPI\r | |
3269 | AsmMsrBitFieldAnd32 (\r | |
3270 | IN UINT32 Index,\r | |
3271 | IN UINTN StartBit,\r | |
3272 | IN UINTN EndBit,\r | |
3273 | IN UINT32 AndData\r | |
3274 | );\r | |
3275 | \r | |
3276 | /**\r | |
3277 | Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a\r | |
3278 | bitwise inclusive OR, and writes the result back to the bit field in the\r | |
3279 | 64-bit MSR.\r | |
3280 | \r | |
3281 | Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by a\r | |
3282 | bitwise inclusive OR between the read result and the value specified by\r | |
3283 | AndData, and writes the result to the 64-bit MSR specified by Index. The\r | |
3284 | lower 32-bits of the value written to the MSR are returned. Extra left bits\r | |
3285 | in both AndData and OrData are stripped. The caller must either guarantee\r | |
3286 | that Index and the data written is valid, or the caller must set up exception\r | |
3287 | handlers to catch the exceptions. This function is only available on IA-32\r | |
3288 | and X64.\r | |
3289 | \r | |
3290 | If StartBit is greater than 31, then ASSERT().\r | |
3291 | If EndBit is greater than 31, then ASSERT().\r | |
3292 | If EndBit is less than or equal to StartBit, then ASSERT().\r | |
3293 | \r | |
3294 | @param Index The 32-bit MSR index to write.\r | |
3295 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
3296 | Range 0..31.\r | |
3297 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
3298 | Range 0..31.\r | |
3299 | @param AndData The value to AND with the read value from the MSR.\r | |
3300 | @param OrData The value to OR with the result of the AND operation.\r | |
3301 | \r | |
3302 | @return The lower 32-bit of the value written to the MSR.\r | |
3303 | \r | |
3304 | **/\r | |
3305 | UINT32\r | |
3306 | EFIAPI\r | |
3307 | AsmMsrBitFieldAndThenOr32 (\r | |
3308 | IN UINT32 Index,\r | |
3309 | IN UINTN StartBit,\r | |
3310 | IN UINTN EndBit,\r | |
3311 | IN UINT32 AndData,\r | |
3312 | IN UINT32 OrData\r | |
3313 | );\r | |
3314 | \r | |
3315 | /**\r | |
3316 | Returns a 64-bit Machine Specific Register(MSR).\r | |
3317 | \r | |
3318 | Reads and returns the 64-bit MSR specified by Index. No parameter checking is\r | |
3319 | performed on Index, and some Index values may cause CPU exceptions. The\r | |
3320 | caller must either guarantee that Index is valid, or the caller must set up\r | |
3321 | exception handlers to catch the exceptions. This function is only available\r | |
3322 | on IA-32 and X64.\r | |
3323 | \r | |
3324 | @param Index The 32-bit MSR index to read.\r | |
3325 | \r | |
3326 | @return The value of the MSR identified by Index.\r | |
3327 | \r | |
3328 | **/\r | |
3329 | UINT64\r | |
3330 | EFIAPI\r | |
3331 | AsmReadMsr64 (\r | |
3332 | IN UINT32 Index\r | |
3333 | );\r | |
3334 | \r | |
3335 | /**\r | |
3336 | Writes a 64-bit value to a Machine Specific Register(MSR), and returns the\r | |
3337 | value.\r | |
3338 | \r | |
3339 | Writes the 64-bit value specified by Value to the MSR specified by Index. The\r | |
3340 | 64-bit value written to the MSR is returned. No parameter checking is\r | |
3341 | performed on Index or Value, and some of these may cause CPU exceptions. The\r | |
3342 | caller must either guarantee that Index and Value are valid, or the caller\r | |
3343 | must establish proper exception handlers. This function is only available on\r | |
3344 | IA-32 and X64.\r | |
3345 | \r | |
3346 | @param Index The 32-bit MSR index to write.\r | |
3347 | @param Value The 64-bit value to write to the MSR.\r | |
3348 | \r | |
3349 | @return Value\r | |
3350 | \r | |
3351 | **/\r | |
3352 | UINT64\r | |
3353 | EFIAPI\r | |
3354 | AsmWriteMsr64 (\r | |
3355 | IN UINT32 Index,\r | |
3356 | IN UINT64 Value\r | |
3357 | );\r | |
3358 | \r | |
3359 | /**\r | |
3360 | Reads a 64-bit MSR, performs a bitwise inclusive OR, and writes the result\r | |
3361 | back to the 64-bit MSR.\r | |
3362 | \r | |
3363 | Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR\r | |
3364 | between the read result and the value specified by OrData, and writes the\r | |
3365 | result to the 64-bit MSR specified by Index. The value written to the MSR is\r | |
3366 | returned. No parameter checking is performed on Index or OrData, and some of\r | |
3367 | these may cause CPU exceptions. The caller must either guarantee that Index\r | |
3368 | and OrData are valid, or the caller must establish proper exception handlers.\r | |
3369 | This function is only available on IA-32 and X64.\r | |
3370 | \r | |
3371 | @param Index The 32-bit MSR index to write.\r | |
3372 | @param OrData The value to OR with the read value from the MSR.\r | |
3373 | \r | |
3374 | @return The value written back to the MSR.\r | |
3375 | \r | |
3376 | **/\r | |
3377 | UINT64\r | |
3378 | EFIAPI\r | |
3379 | AsmMsrOr64 (\r | |
3380 | IN UINT32 Index,\r | |
3381 | IN UINT64 OrData\r | |
3382 | );\r | |
3383 | \r | |
3384 | /**\r | |
3385 | Reads a 64-bit MSR, performs a bitwise AND, and writes the result back to the\r | |
3386 | 64-bit MSR.\r | |
3387 | \r | |
3388 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r | |
3389 | read result and the value specified by OrData, and writes the result to the\r | |
3390 | 64-bit MSR specified by Index. The value written to the MSR is returned. No\r | |
3391 | parameter checking is performed on Index or OrData, and some of these may\r | |
3392 | cause CPU exceptions. The caller must either guarantee that Index and OrData\r | |
3393 | are valid, or the caller must establish proper exception handlers. This\r | |
3394 | function is only available on IA-32 and X64.\r | |
3395 | \r | |
3396 | @param Index The 32-bit MSR index to write.\r | |
3397 | @param AndData The value to AND with the read value from the MSR.\r | |
3398 | \r | |
3399 | @return The value written back to the MSR.\r | |
3400 | \r | |
3401 | **/\r | |
3402 | UINT64\r | |
3403 | EFIAPI\r | |
3404 | AsmMsrAnd64 (\r | |
3405 | IN UINT32 Index,\r | |
3406 | IN UINT64 AndData\r | |
3407 | );\r | |
3408 | \r | |
3409 | /**\r | |
3410 | Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise inclusive\r | |
3411 | OR, and writes the result back to the 64-bit MSR.\r | |
3412 | \r | |
3413 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between read\r | |
3414 | result and the value specified by AndData, performs a bitwise inclusive OR\r | |
3415 | between the result of the AND operation and the value specified by OrData,\r | |
3416 | and writes the result to the 64-bit MSR specified by Index. The value written\r | |
3417 | to the MSR is returned. No parameter checking is performed on Index, AndData,\r | |
3418 | or OrData, and some of these may cause CPU exceptions. The caller must either\r | |
3419 | guarantee that Index, AndData, and OrData are valid, or the caller must\r | |
3420 | establish proper exception handlers. This function is only available on IA-32\r | |
3421 | and X64.\r | |
3422 | \r | |
3423 | @param Index The 32-bit MSR index to write.\r | |
3424 | @param AndData The value to AND with the read value from the MSR.\r | |
3425 | @param OrData The value to OR with the result of the AND operation.\r | |
3426 | \r | |
3427 | @return The value written back to the MSR.\r | |
3428 | \r | |
3429 | **/\r | |
3430 | UINT64\r | |
3431 | EFIAPI\r | |
3432 | AsmMsrAndThenOr64 (\r | |
3433 | IN UINT32 Index,\r | |
3434 | IN UINT64 AndData,\r | |
3435 | IN UINT64 OrData\r | |
3436 | );\r | |
3437 | \r | |
3438 | /**\r | |
3439 | Reads a bit field of an MSR.\r | |
3440 | \r | |
3441 | Reads the bit field in the 64-bit MSR. The bit field is specified by the\r | |
3442 | StartBit and the EndBit. The value of the bit field is returned. The caller\r | |
3443 | must either guarantee that Index is valid, or the caller must set up\r | |
3444 | exception handlers to catch the exceptions. This function is only available\r | |
3445 | on IA-32 and X64.\r | |
3446 | \r | |
3447 | If StartBit is greater than 63, then ASSERT().\r | |
3448 | If EndBit is greater than 63, then ASSERT().\r | |
3449 | If EndBit is less than or equal to StartBit, then ASSERT().\r | |
3450 | \r | |
3451 | @param Index The 32-bit MSR index to read.\r | |
3452 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
3453 | Range 0..63.\r | |
3454 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
3455 | Range 0..63.\r | |
3456 | \r | |
3457 | @return The value read from the MSR.\r | |
3458 | \r | |
3459 | **/\r | |
3460 | UINT64\r | |
3461 | EFIAPI\r | |
3462 | AsmMsrBitFieldRead64 (\r | |
3463 | IN UINT32 Index,\r | |
3464 | IN UINTN StartBit,\r | |
3465 | IN UINTN EndBit\r | |
3466 | );\r | |
3467 | \r | |
3468 | /**\r | |
3469 | Writes a bit field to an MSR.\r | |
3470 | \r | |
3471 | Writes Value to a bit field in a 64-bit MSR. The bit field is specified by\r | |
3472 | the StartBit and the EndBit. All other bits in the destination MSR are\r | |
3473 | preserved. The MSR written is returned. Extra left bits in Value are\r | |
3474 | stripped. The caller must either guarantee that Index and the data written is\r | |
3475 | valid, or the caller must set up exception handlers to catch the exceptions.\r | |
3476 | This function is only available on IA-32 and X64.\r | |
3477 | \r | |
3478 | If StartBit is greater than 63, then ASSERT().\r | |
3479 | If EndBit is greater than 63, then ASSERT().\r | |
3480 | If EndBit is less than or equal to StartBit, then ASSERT().\r | |
3481 | \r | |
3482 | @param Index The 32-bit MSR index to write.\r | |
3483 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
3484 | Range 0..63.\r | |
3485 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
3486 | Range 0..63.\r | |
3487 | @param Value New value of the bit field.\r | |
3488 | \r | |
3489 | @return The value written back to the MSR.\r | |
3490 | \r | |
3491 | **/\r | |
3492 | UINT64\r | |
3493 | EFIAPI\r | |
3494 | AsmMsrBitFieldWrite64 (\r | |
3495 | IN UINT32 Index,\r | |
3496 | IN UINTN StartBit,\r | |
3497 | IN UINTN EndBit,\r | |
3498 | IN UINT64 Value\r | |
3499 | );\r | |
3500 | \r | |
3501 | /**\r | |
3502 | Reads a bit field in a 64-bit MSR, performs a bitwise inclusive OR, and\r | |
3503 | writes the result back to the bit field in the 64-bit MSR.\r | |
3504 | \r | |
3505 | Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR\r | |
3506 | between the read result and the value specified by OrData, and writes the\r | |
3507 | result to the 64-bit MSR specified by Index. The value written to the MSR is\r | |
3508 | returned. Extra left bits in OrData are stripped. The caller must either\r | |
3509 | guarantee that Index and the data written is valid, or the caller must set up\r | |
3510 | exception handlers to catch the exceptions. This function is only available\r | |
3511 | on IA-32 and X64.\r | |
3512 | \r | |
3513 | If StartBit is greater than 63, then ASSERT().\r | |
3514 | If EndBit is greater than 63, then ASSERT().\r | |
3515 | If EndBit is less than or equal to StartBit, then ASSERT().\r | |
3516 | \r | |
3517 | @param Index The 32-bit MSR index to write.\r | |
3518 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
3519 | Range 0..63.\r | |
3520 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
3521 | Range 0..63.\r | |
3522 | @param OrData The value to OR with the read value from the bit field.\r | |
3523 | \r | |
3524 | @return The value written back to the MSR.\r | |
3525 | \r | |
3526 | **/\r | |
3527 | UINT64\r | |
3528 | EFIAPI\r | |
3529 | AsmMsrBitFieldOr64 (\r | |
3530 | IN UINT32 Index,\r | |
3531 | IN UINTN StartBit,\r | |
3532 | IN UINTN EndBit,\r | |
3533 | IN UINT64 OrData\r | |
3534 | );\r | |
3535 | \r | |
3536 | /**\r | |
3537 | Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the\r | |
3538 | result back to the bit field in the 64-bit MSR.\r | |
3539 | \r | |
3540 | Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r | |
3541 | read result and the value specified by AndData, and writes the result to the\r | |
3542 | 64-bit MSR specified by Index. The value written to the MSR is returned.\r | |
3543 | Extra left bits in AndData are stripped. The caller must either guarantee\r | |
3544 | that Index and the data written is valid, or the caller must set up exception\r | |
3545 | handlers to catch the exceptions. This function is only available on IA-32\r | |
3546 | and X64.\r | |
3547 | \r | |
3548 | If StartBit is greater than 63, then ASSERT().\r | |
3549 | If EndBit is greater than 63, then ASSERT().\r | |
3550 | If EndBit is less than or equal to StartBit, then ASSERT().\r | |
3551 | \r | |
3552 | @param Index The 32-bit MSR index to write.\r | |
3553 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
3554 | Range 0..63.\r | |
3555 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
3556 | Range 0..63.\r | |
3557 | @param AndData The value to AND with the read value from the bit field.\r | |
3558 | \r | |
3559 | @return The value written back to the MSR.\r | |
3560 | \r | |
3561 | **/\r | |
3562 | UINT64\r | |
3563 | EFIAPI\r | |
3564 | AsmMsrBitFieldAnd64 (\r | |
3565 | IN UINT32 Index,\r | |
3566 | IN UINTN StartBit,\r | |
3567 | IN UINTN EndBit,\r | |
3568 | IN UINT64 AndData\r | |
3569 | );\r | |
3570 | \r | |
3571 | /**\r | |
3572 | Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a\r | |
3573 | bitwise inclusive OR, and writes the result back to the bit field in the\r | |
3574 | 64-bit MSR.\r | |
3575 | \r | |
3576 | Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by\r | |
3577 | a bitwise inclusive OR between the read result and the value specified by\r | |
3578 | AndData, and writes the result to the 64-bit MSR specified by Index. The\r | |
3579 | value written to the MSR is returned. Extra left bits in both AndData and\r | |
3580 | OrData are stripped. The caller must either guarantee that Index and the data\r | |
3581 | written is valid, or the caller must set up exception handlers to catch the\r | |
3582 | exceptions. This function is only available on IA-32 and X64.\r | |
3583 | \r | |
3584 | If StartBit is greater than 63, then ASSERT().\r | |
3585 | If EndBit is greater than 63, then ASSERT().\r | |
3586 | If EndBit is less than or equal to StartBit, then ASSERT().\r | |
3587 | \r | |
3588 | @param Index The 32-bit MSR index to write.\r | |
3589 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
3590 | Range 0..63.\r | |
3591 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
3592 | Range 0..63.\r | |
3593 | @param AndData The value to AND with the read value from the bit field.\r | |
3594 | @param OrData The value to OR with the result of the AND operation.\r | |
3595 | \r | |
3596 | @return The value written back to the MSR.\r | |
3597 | \r | |
3598 | **/\r | |
3599 | UINT64\r | |
3600 | EFIAPI\r | |
3601 | AsmMsrBitFieldAndThenOr64 (\r | |
3602 | IN UINT32 Index,\r | |
3603 | IN UINTN StartBit,\r | |
3604 | IN UINTN EndBit,\r | |
3605 | IN UINT64 AndData,\r | |
3606 | IN UINT64 OrData\r | |
3607 | );\r | |
3608 | \r | |
3609 | /**\r | |
3610 | Reads the current value of the EFLAGS register.\r | |
3611 | \r | |
3612 | Reads and returns the current value of the EFLAGS register. This function is\r | |
3613 | only available on IA-32 and X64. This returns a 32-bit value on IA-32 and a\r | |
3614 | 64-bit value on X64.\r | |
3615 | \r | |
3616 | @return EFLAGS on IA-32 or RFLAGS on X64.\r | |
3617 | \r | |
3618 | **/\r | |
3619 | UINTN\r | |
3620 | EFIAPI\r | |
3621 | AsmReadEflags (\r | |
3622 | VOID\r | |
3623 | );\r | |
3624 | \r | |
3625 | /**\r | |
3626 | Reads the current value of the Control Register 0 (CR0).\r | |
3627 | \r | |
3628 | Reads and returns the current value of CR0. This function is only available\r | |
3629 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r | |
3630 | X64.\r | |
3631 | \r | |
3632 | @return The value of the Control Register 0 (CR0).\r | |
3633 | \r | |
3634 | **/\r | |
3635 | UINTN\r | |
3636 | EFIAPI\r | |
3637 | AsmReadCr0 (\r | |
3638 | VOID\r | |
3639 | );\r | |
3640 | \r | |
3641 | /**\r | |
3642 | Reads the current value of the Control Register 2 (CR2).\r | |
3643 | \r | |
3644 | Reads and returns the current value of CR2. This function is only available\r | |
3645 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r | |
3646 | X64.\r | |
3647 | \r | |
3648 | @return The value of the Control Register 2 (CR2).\r | |
3649 | \r | |
3650 | **/\r | |
3651 | UINTN\r | |
3652 | EFIAPI\r | |
3653 | AsmReadCr2 (\r | |
3654 | VOID\r | |
3655 | );\r | |
3656 | \r | |
3657 | /**\r | |
3658 | Reads the current value of the Control Register 3 (CR3).\r | |
3659 | \r | |
3660 | Reads and returns the current value of CR3. This function is only available\r | |
3661 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r | |
3662 | X64.\r | |
3663 | \r | |
3664 | @return The value of the Control Register 3 (CR3).\r | |
3665 | \r | |
3666 | **/\r | |
3667 | UINTN\r | |
3668 | EFIAPI\r | |
3669 | AsmReadCr3 (\r | |
3670 | VOID\r | |
3671 | );\r | |
3672 | \r | |
3673 | /**\r | |
3674 | Reads the current value of the Control Register 4 (CR4).\r | |
3675 | \r | |
3676 | Reads and returns the current value of CR4. This function is only available\r | |
3677 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r | |
3678 | X64.\r | |
3679 | \r | |
3680 | @return The value of the Control Register 4 (CR4).\r | |
3681 | \r | |
3682 | **/\r | |
3683 | UINTN\r | |
3684 | EFIAPI\r | |
3685 | AsmReadCr4 (\r | |
3686 | VOID\r | |
3687 | );\r | |
3688 | \r | |
3689 | /**\r | |
3690 | Writes a value to Control Register 0 (CR0).\r | |
3691 | \r | |
3692 | Writes and returns a new value to CR0. This function is only available on\r | |
3693 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r | |
3694 | \r | |
3695 | @param Cr0 The value to write to CR0.\r | |
3696 | \r | |
3697 | @return The value written to CR0.\r | |
3698 | \r | |
3699 | **/\r | |
3700 | UINTN\r | |
3701 | EFIAPI\r | |
3702 | AsmWriteCr0 (\r | |
3703 | UINTN Cr0\r | |
3704 | );\r | |
3705 | \r | |
3706 | /**\r | |
3707 | Writes a value to Control Register 2 (CR2).\r | |
3708 | \r | |
3709 | Writes and returns a new value to CR2. This function is only available on\r | |
3710 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r | |
3711 | \r | |
3712 | @param Cr2 The value to write to CR2.\r | |
3713 | \r | |
3714 | @return The value written to CR2.\r | |
3715 | \r | |
3716 | **/\r | |
3717 | UINTN\r | |
3718 | EFIAPI\r | |
3719 | AsmWriteCr2 (\r | |
3720 | UINTN Cr2\r | |
3721 | );\r | |
3722 | \r | |
3723 | /**\r | |
3724 | Writes a value to Control Register 3 (CR3).\r | |
3725 | \r | |
3726 | Writes and returns a new value to CR3. This function is only available on\r | |
3727 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r | |
3728 | \r | |
3729 | @param Cr3 The value to write to CR3.\r | |
3730 | \r | |
3731 | @return The value written to CR3.\r | |
3732 | \r | |
3733 | **/\r | |
3734 | UINTN\r | |
3735 | EFIAPI\r | |
3736 | AsmWriteCr3 (\r | |
3737 | UINTN Cr3\r | |
3738 | );\r | |
3739 | \r | |
3740 | /**\r | |
3741 | Writes a value to Control Register 4 (CR4).\r | |
3742 | \r | |
3743 | Writes and returns a new value to CR4. This function is only available on\r | |
3744 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r | |
3745 | \r | |
3746 | @param Cr4 The value to write to CR4.\r | |
3747 | \r | |
3748 | @return The value written to CR4.\r | |
3749 | \r | |
3750 | **/\r | |
3751 | UINTN\r | |
3752 | EFIAPI\r | |
3753 | AsmWriteCr4 (\r | |
3754 | UINTN Cr4\r | |
3755 | );\r | |
3756 | \r | |
3757 | /**\r | |
3758 | Reads the current value of Debug Register 0 (DR0).\r | |
3759 | \r | |
3760 | Reads and returns the current value of DR0. This function is only available\r | |
3761 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r | |
3762 | X64.\r | |
3763 | \r | |
3764 | @return The value of Debug Register 0 (DR0).\r | |
3765 | \r | |
3766 | **/\r | |
3767 | UINTN\r | |
3768 | EFIAPI\r | |
3769 | AsmReadDr0 (\r | |
3770 | VOID\r | |
3771 | );\r | |
3772 | \r | |
3773 | /**\r | |
3774 | Reads the current value of Debug Register 1 (DR1).\r | |
3775 | \r | |
3776 | Reads and returns the current value of DR1. This function is only available\r | |
3777 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r | |
3778 | X64.\r | |
3779 | \r | |
3780 | @return The value of Debug Register 1 (DR1).\r | |
3781 | \r | |
3782 | **/\r | |
3783 | UINTN\r | |
3784 | EFIAPI\r | |
3785 | AsmReadDr1 (\r | |
3786 | VOID\r | |
3787 | );\r | |
3788 | \r | |
3789 | /**\r | |
3790 | Reads the current value of Debug Register 2 (DR2).\r | |
3791 | \r | |
3792 | Reads and returns the current value of DR2. This function is only available\r | |
3793 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r | |
3794 | X64.\r | |
3795 | \r | |
3796 | @return The value of Debug Register 2 (DR2).\r | |
3797 | \r | |
3798 | **/\r | |
3799 | UINTN\r | |
3800 | EFIAPI\r | |
3801 | AsmReadDr2 (\r | |
3802 | VOID\r | |
3803 | );\r | |
3804 | \r | |
3805 | /**\r | |
3806 | Reads the current value of Debug Register 3 (DR3).\r | |
3807 | \r | |
3808 | Reads and returns the current value of DR3. This function is only available\r | |
3809 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r | |
3810 | X64.\r | |
3811 | \r | |
3812 | @return The value of Debug Register 3 (DR3).\r | |
3813 | \r | |
3814 | **/\r | |
3815 | UINTN\r | |
3816 | EFIAPI\r | |
3817 | AsmReadDr3 (\r | |
3818 | VOID\r | |
3819 | );\r | |
3820 | \r | |
3821 | /**\r | |
3822 | Reads the current value of Debug Register 4 (DR4).\r | |
3823 | \r | |
3824 | Reads and returns the current value of DR4. This function is only available\r | |
3825 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r | |
3826 | X64.\r | |
3827 | \r | |
3828 | @return The value of Debug Register 4 (DR4).\r | |
3829 | \r | |
3830 | **/\r | |
3831 | UINTN\r | |
3832 | EFIAPI\r | |
3833 | AsmReadDr4 (\r | |
3834 | VOID\r | |
3835 | );\r | |
3836 | \r | |
3837 | /**\r | |
3838 | Reads the current value of Debug Register 5 (DR5).\r | |
3839 | \r | |
3840 | Reads and returns the current value of DR5. This function is only available\r | |
3841 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r | |
3842 | X64.\r | |
3843 | \r | |
3844 | @return The value of Debug Register 5 (DR5).\r | |
3845 | \r | |
3846 | **/\r | |
3847 | UINTN\r | |
3848 | EFIAPI\r | |
3849 | AsmReadDr5 (\r | |
3850 | VOID\r | |
3851 | );\r | |
3852 | \r | |
3853 | /**\r | |
3854 | Reads the current value of Debug Register 6 (DR6).\r | |
3855 | \r | |
3856 | Reads and returns the current value of DR6. This function is only available\r | |
3857 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r | |
3858 | X64.\r | |
3859 | \r | |
3860 | @return The value of Debug Register 6 (DR6).\r | |
3861 | \r | |
3862 | **/\r | |
3863 | UINTN\r | |
3864 | EFIAPI\r | |
3865 | AsmReadDr6 (\r | |
3866 | VOID\r | |
3867 | );\r | |
3868 | \r | |
3869 | /**\r | |
3870 | Reads the current value of Debug Register 7 (DR7).\r | |
3871 | \r | |
3872 | Reads and returns the current value of DR7. This function is only available\r | |
3873 | on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on\r | |
3874 | X64.\r | |
3875 | \r | |
3876 | @return The value of Debug Register 7 (DR7).\r | |
3877 | \r | |
3878 | **/\r | |
3879 | UINTN\r | |
3880 | EFIAPI\r | |
3881 | AsmReadDr7 (\r | |
3882 | VOID\r | |
3883 | );\r | |
3884 | \r | |
3885 | /**\r | |
3886 | Writes a value to Debug Register 0 (DR0).\r | |
3887 | \r | |
3888 | Writes and returns a new value to DR0. This function is only available on\r | |
3889 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r | |
3890 | \r | |
3891 | @param Dr0 The value to write to Dr0.\r | |
3892 | \r | |
3893 | @return The value written to Debug Register 0 (DR0).\r | |
3894 | \r | |
3895 | **/\r | |
3896 | UINTN\r | |
3897 | EFIAPI\r | |
3898 | AsmWriteDr0 (\r | |
3899 | UINTN Dr0\r | |
3900 | );\r | |
3901 | \r | |
3902 | /**\r | |
3903 | Writes a value to Debug Register 1 (DR1).\r | |
3904 | \r | |
3905 | Writes and returns a new value to DR1. This function is only available on\r | |
3906 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r | |
3907 | \r | |
3908 | @param Dr1 The value to write to Dr1.\r | |
3909 | \r | |
3910 | @return The value written to Debug Register 1 (DR1).\r | |
3911 | \r | |
3912 | **/\r | |
3913 | UINTN\r | |
3914 | EFIAPI\r | |
3915 | AsmWriteDr1 (\r | |
3916 | UINTN Dr1\r | |
3917 | );\r | |
3918 | \r | |
3919 | /**\r | |
3920 | Writes a value to Debug Register 2 (DR2).\r | |
3921 | \r | |
3922 | Writes and returns a new value to DR2. This function is only available on\r | |
3923 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r | |
3924 | \r | |
3925 | @param Dr2 The value to write to Dr2.\r | |
3926 | \r | |
3927 | @return The value written to Debug Register 2 (DR2).\r | |
3928 | \r | |
3929 | **/\r | |
3930 | UINTN\r | |
3931 | EFIAPI\r | |
3932 | AsmWriteDr2 (\r | |
3933 | UINTN Dr2\r | |
3934 | );\r | |
3935 | \r | |
3936 | /**\r | |
3937 | Writes a value to Debug Register 3 (DR3).\r | |
3938 | \r | |
3939 | Writes and returns a new value to DR3. This function is only available on\r | |
3940 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r | |
3941 | \r | |
3942 | @param Dr3 The value to write to Dr3.\r | |
3943 | \r | |
3944 | @return The value written to Debug Register 3 (DR3).\r | |
3945 | \r | |
3946 | **/\r | |
3947 | UINTN\r | |
3948 | EFIAPI\r | |
3949 | AsmWriteDr3 (\r | |
3950 | UINTN Dr3\r | |
3951 | );\r | |
3952 | \r | |
3953 | /**\r | |
3954 | Writes a value to Debug Register 4 (DR4).\r | |
3955 | \r | |
3956 | Writes and returns a new value to DR4. This function is only available on\r | |
3957 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r | |
3958 | \r | |
3959 | @param Dr4 The value to write to Dr4.\r | |
3960 | \r | |
3961 | @return The value written to Debug Register 4 (DR4).\r | |
3962 | \r | |
3963 | **/\r | |
3964 | UINTN\r | |
3965 | EFIAPI\r | |
3966 | AsmWriteDr4 (\r | |
3967 | UINTN Dr4\r | |
3968 | );\r | |
3969 | \r | |
3970 | /**\r | |
3971 | Writes a value to Debug Register 5 (DR5).\r | |
3972 | \r | |
3973 | Writes and returns a new value to DR5. This function is only available on\r | |
3974 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r | |
3975 | \r | |
3976 | @param Dr5 The value to write to Dr5.\r | |
3977 | \r | |
3978 | @return The value written to Debug Register 5 (DR5).\r | |
3979 | \r | |
3980 | **/\r | |
3981 | UINTN\r | |
3982 | EFIAPI\r | |
3983 | AsmWriteDr5 (\r | |
3984 | UINTN Dr5\r | |
3985 | );\r | |
3986 | \r | |
3987 | /**\r | |
3988 | Writes a value to Debug Register 6 (DR6).\r | |
3989 | \r | |
3990 | Writes and returns a new value to DR6. This function is only available on\r | |
3991 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r | |
3992 | \r | |
3993 | @param Dr6 The value to write to Dr6.\r | |
3994 | \r | |
3995 | @return The value written to Debug Register 6 (DR6).\r | |
3996 | \r | |
3997 | **/\r | |
3998 | UINTN\r | |
3999 | EFIAPI\r | |
4000 | AsmWriteDr6 (\r | |
4001 | UINTN Dr6\r | |
4002 | );\r | |
4003 | \r | |
4004 | /**\r | |
4005 | Writes a value to Debug Register 7 (DR7).\r | |
4006 | \r | |
4007 | Writes and returns a new value to DR7. This function is only available on\r | |
4008 | IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.\r | |
4009 | \r | |
4010 | @param Dr7 The value to write to Dr7.\r | |
4011 | \r | |
4012 | @return The value written to Debug Register 7 (DR7).\r | |
4013 | \r | |
4014 | **/\r | |
4015 | UINTN\r | |
4016 | EFIAPI\r | |
4017 | AsmWriteDr7 (\r | |
4018 | UINTN Dr7\r | |
4019 | );\r | |
4020 | \r | |
4021 | /**\r | |
4022 | Reads the current value of Code Segment Register (CS).\r | |
4023 | \r | |
4024 | Reads and returns the current value of CS. This function is only available on\r | |
4025 | IA-32 and X64.\r | |
4026 | \r | |
4027 | @return The current value of CS.\r | |
4028 | \r | |
4029 | **/\r | |
4030 | UINT16\r | |
4031 | EFIAPI\r | |
4032 | AsmReadCs (\r | |
4033 | VOID\r | |
4034 | );\r | |
4035 | \r | |
4036 | /**\r | |
4037 | Reads the current value of Data Segment Register (DS).\r | |
4038 | \r | |
4039 | Reads and returns the current value of DS. This function is only available on\r | |
4040 | IA-32 and X64.\r | |
4041 | \r | |
4042 | @return The current value of DS.\r | |
4043 | \r | |
4044 | **/\r | |
4045 | UINT16\r | |
4046 | EFIAPI\r | |
4047 | AsmReadDs (\r | |
4048 | VOID\r | |
4049 | );\r | |
4050 | \r | |
4051 | /**\r | |
4052 | Reads the current value of Extra Segment Register (ES).\r | |
4053 | \r | |
4054 | Reads and returns the current value of ES. This function is only available on\r | |
4055 | IA-32 and X64.\r | |
4056 | \r | |
4057 | @return The current value of ES.\r | |
4058 | \r | |
4059 | **/\r | |
4060 | UINT16\r | |
4061 | EFIAPI\r | |
4062 | AsmReadEs (\r | |
4063 | VOID\r | |
4064 | );\r | |
4065 | \r | |
4066 | /**\r | |
4067 | Reads the current value of FS Data Segment Register (FS).\r | |
4068 | \r | |
4069 | Reads and returns the current value of FS. This function is only available on\r | |
4070 | IA-32 and X64.\r | |
4071 | \r | |
4072 | @return The current value of FS.\r | |
4073 | \r | |
4074 | **/\r | |
4075 | UINT16\r | |
4076 | EFIAPI\r | |
4077 | AsmReadFs (\r | |
4078 | VOID\r | |
4079 | );\r | |
4080 | \r | |
4081 | /**\r | |
4082 | Reads the current value of GS Data Segment Register (GS).\r | |
4083 | \r | |
4084 | Reads and returns the current value of GS. This function is only available on\r | |
4085 | IA-32 and X64.\r | |
4086 | \r | |
4087 | @return The current value of GS.\r | |
4088 | \r | |
4089 | **/\r | |
4090 | UINT16\r | |
4091 | EFIAPI\r | |
4092 | AsmReadGs (\r | |
4093 | VOID\r | |
4094 | );\r | |
4095 | \r | |
4096 | /**\r | |
4097 | Reads the current value of Stack Segment Register (SS).\r | |
4098 | \r | |
4099 | Reads and returns the current value of SS. This function is only available on\r | |
4100 | IA-32 and X64.\r | |
4101 | \r | |
4102 | @return The current value of SS.\r | |
4103 | \r | |
4104 | **/\r | |
4105 | UINT16\r | |
4106 | EFIAPI\r | |
4107 | AsmReadSs (\r | |
4108 | VOID\r | |
4109 | );\r | |
4110 | \r | |
4111 | /**\r | |
4112 | Reads the current value of Task Register (TR).\r | |
4113 | \r | |
4114 | Reads and returns the current value of TR. This function is only available on\r | |
4115 | IA-32 and X64.\r | |
4116 | \r | |
4117 | @return The current value of TR.\r | |
4118 | \r | |
4119 | **/\r | |
4120 | UINT16\r | |
4121 | EFIAPI\r | |
4122 | AsmReadTr (\r | |
4123 | VOID\r | |
4124 | );\r | |
4125 | \r | |
4126 | /**\r | |
4127 | Reads the current Global Descriptor Table Register(GDTR) descriptor.\r | |
4128 | \r | |
4129 | Reads and returns the current GDTR descriptor and returns it in Gdtr. This\r | |
4130 | function is only available on IA-32 and X64.\r | |
4131 | \r | |
4132 | If Gdtr is NULL, then ASSERT().\r | |
4133 | \r | |
4134 | @param Gdtr Pointer to a GDTR descriptor.\r | |
4135 | \r | |
4136 | **/\r | |
4137 | VOID\r | |
4138 | EFIAPI\r | |
4139 | AsmReadGdtr (\r | |
4140 | OUT IA32_DESCRIPTOR *Gdtr\r | |
4141 | );\r | |
4142 | \r | |
4143 | /**\r | |
4144 | Writes the current Global Descriptor Table Register (GDTR) descriptor.\r | |
4145 | \r | |
4146 | Writes and the current GDTR descriptor specified by Gdtr. This function is\r | |
4147 | only available on IA-32 and X64.\r | |
4148 | \r | |
4149 | If Gdtr is NULL, then ASSERT().\r | |
4150 | \r | |
4151 | @param Gdtr Pointer to a GDTR descriptor.\r | |
4152 | \r | |
4153 | **/\r | |
4154 | VOID\r | |
4155 | EFIAPI\r | |
4156 | AsmWriteGdtr (\r | |
4157 | IN CONST IA32_DESCRIPTOR *Gdtr\r | |
4158 | );\r | |
4159 | \r | |
4160 | /**\r | |
4161 | Reads the current Interrupt Descriptor Table Register(GDTR) descriptor.\r | |
4162 | \r | |
4163 | Reads and returns the current IDTR descriptor and returns it in Idtr. This\r | |
4164 | function is only available on IA-32 and X64.\r | |
4165 | \r | |
4166 | If Idtr is NULL, then ASSERT().\r | |
4167 | \r | |
4168 | @param Idtr Pointer to a IDTR descriptor.\r | |
4169 | \r | |
4170 | **/\r | |
4171 | VOID\r | |
4172 | EFIAPI\r | |
4173 | AsmReadIdtr (\r | |
4174 | OUT IA32_DESCRIPTOR *Idtr\r | |
4175 | );\r | |
4176 | \r | |
4177 | /**\r | |
4178 | Writes the current Interrupt Descriptor Table Register(GDTR) descriptor.\r | |
4179 | \r | |
4180 | Writes the current IDTR descriptor and returns it in Idtr. This function is\r | |
4181 | only available on IA-32 and X64.\r | |
4182 | \r | |
4183 | If Idtr is NULL, then ASSERT().\r | |
4184 | \r | |
4185 | @param Idtr Pointer to a IDTR descriptor.\r | |
4186 | \r | |
4187 | **/\r | |
4188 | VOID\r | |
4189 | EFIAPI\r | |
4190 | AsmWriteIdtr (\r | |
4191 | IN CONST IA32_DESCRIPTOR *Idtr\r | |
4192 | );\r | |
4193 | \r | |
4194 | /**\r | |
4195 | Reads the current Local Descriptor Table Register(LDTR) selector.\r | |
4196 | \r | |
4197 | Reads and returns the current 16-bit LDTR descriptor value. This function is\r | |
4198 | only available on IA-32 and X64.\r | |
4199 | \r | |
4200 | @return The current selector of LDT.\r | |
4201 | \r | |
4202 | **/\r | |
4203 | UINT16\r | |
4204 | EFIAPI\r | |
4205 | AsmReadLdtr (\r | |
4206 | VOID\r | |
4207 | );\r | |
4208 | \r | |
4209 | /**\r | |
4210 | Writes the current Local Descriptor Table Register (GDTR) selector.\r | |
4211 | \r | |
4212 | Writes and the current LDTR descriptor specified by Ldtr. This function is\r | |
4213 | only available on IA-32 and X64.\r | |
4214 | \r | |
4215 | @param Ldtr 16-bit LDTR selector value.\r | |
4216 | \r | |
4217 | **/\r | |
4218 | VOID\r | |
4219 | EFIAPI\r | |
4220 | AsmWriteLdtr (\r | |
4221 | IN UINT16 Ldtr\r | |
4222 | );\r | |
4223 | \r | |
4224 | /**\r | |
4225 | Save the current floating point/SSE/SSE2 context to a buffer.\r | |
4226 | \r | |
4227 | Saves the current floating point/SSE/SSE2 state to the buffer specified by\r | |
4228 | Buffer. Buffer must be aligned on a 16-byte boundary. This function is only\r | |
4229 | available on IA-32 and X64.\r | |
4230 | \r | |
4231 | If Buffer is NULL, then ASSERT().\r | |
4232 | If Buffer is not aligned on a 16-byte boundary, then ASSERT().\r | |
4233 | \r | |
4234 | @param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context.\r | |
4235 | \r | |
4236 | **/\r | |
4237 | VOID\r | |
4238 | EFIAPI\r | |
4239 | AsmFxSave (\r | |
4240 | OUT IA32_FX_BUFFER *Buffer\r | |
4241 | );\r | |
4242 | \r | |
4243 | /**\r | |
4244 | Restores the current floating point/SSE/SSE2 context from a buffer.\r | |
4245 | \r | |
4246 | Restores the current floating point/SSE/SSE2 state from the buffer specified\r | |
4247 | by Buffer. Buffer must be aligned on a 16-byte boundary. This function is\r | |
4248 | only available on IA-32 and X64.\r | |
4249 | \r | |
4250 | If Buffer is NULL, then ASSERT().\r | |
4251 | If Buffer is not aligned on a 16-byte boundary, then ASSERT().\r | |
4252 | If Buffer was not saved with AsmFxSave(), then ASSERT().\r | |
4253 | \r | |
4254 | @param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context.\r | |
4255 | \r | |
4256 | **/\r | |
4257 | VOID\r | |
4258 | EFIAPI\r | |
4259 | AsmFxRestore (\r | |
4260 | IN CONST IA32_FX_BUFFER *Buffer\r | |
4261 | );\r | |
4262 | \r | |
4263 | /**\r | |
4264 | Reads the current value of 64-bit MMX Register #0 (MM0).\r | |
4265 | \r | |
4266 | Reads and returns the current value of MM0. This function is only available\r | |
4267 | on IA-32 and X64.\r | |
4268 | \r | |
4269 | @return The current value of MM0.\r | |
4270 | \r | |
4271 | **/\r | |
4272 | UINT64\r | |
4273 | EFIAPI\r | |
4274 | AsmReadMm0 (\r | |
4275 | VOID\r | |
4276 | );\r | |
4277 | \r | |
4278 | /**\r | |
4279 | Reads the current value of 64-bit MMX Register #1 (MM1).\r | |
4280 | \r | |
4281 | Reads and returns the current value of MM1. This function is only available\r | |
4282 | on IA-32 and X64.\r | |
4283 | \r | |
4284 | @return The current value of MM1.\r | |
4285 | \r | |
4286 | **/\r | |
4287 | UINT64\r | |
4288 | EFIAPI\r | |
4289 | AsmReadMm1 (\r | |
4290 | VOID\r | |
4291 | );\r | |
4292 | \r | |
4293 | /**\r | |
4294 | Reads the current value of 64-bit MMX Register #2 (MM2).\r | |
4295 | \r | |
4296 | Reads and returns the current value of MM2. This function is only available\r | |
4297 | on IA-32 and X64.\r | |
4298 | \r | |
4299 | @return The current value of MM2.\r | |
4300 | \r | |
4301 | **/\r | |
4302 | UINT64\r | |
4303 | EFIAPI\r | |
4304 | AsmReadMm2 (\r | |
4305 | VOID\r | |
4306 | );\r | |
4307 | \r | |
4308 | /**\r | |
4309 | Reads the current value of 64-bit MMX Register #3 (MM3).\r | |
4310 | \r | |
4311 | Reads and returns the current value of MM3. This function is only available\r | |
4312 | on IA-32 and X64.\r | |
4313 | \r | |
4314 | @return The current value of MM3.\r | |
4315 | \r | |
4316 | **/\r | |
4317 | UINT64\r | |
4318 | EFIAPI\r | |
4319 | AsmReadMm3 (\r | |
4320 | VOID\r | |
4321 | );\r | |
4322 | \r | |
4323 | /**\r | |
4324 | Reads the current value of 64-bit MMX Register #4 (MM4).\r | |
4325 | \r | |
4326 | Reads and returns the current value of MM4. This function is only available\r | |
4327 | on IA-32 and X64.\r | |
4328 | \r | |
4329 | @return The current value of MM4.\r | |
4330 | \r | |
4331 | **/\r | |
4332 | UINT64\r | |
4333 | EFIAPI\r | |
4334 | AsmReadMm4 (\r | |
4335 | VOID\r | |
4336 | );\r | |
4337 | \r | |
4338 | /**\r | |
4339 | Reads the current value of 64-bit MMX Register #5 (MM5).\r | |
4340 | \r | |
4341 | Reads and returns the current value of MM5. This function is only available\r | |
4342 | on IA-32 and X64.\r | |
4343 | \r | |
4344 | @return The current value of MM5.\r | |
4345 | \r | |
4346 | **/\r | |
4347 | UINT64\r | |
4348 | EFIAPI\r | |
4349 | AsmReadMm5 (\r | |
4350 | VOID\r | |
4351 | );\r | |
4352 | \r | |
4353 | /**\r | |
4354 | Reads the current value of 64-bit MMX Register #6 (MM6).\r | |
4355 | \r | |
4356 | Reads and returns the current value of MM6. This function is only available\r | |
4357 | on IA-32 and X64.\r | |
4358 | \r | |
4359 | @return The current value of MM6.\r | |
4360 | \r | |
4361 | **/\r | |
4362 | UINT64\r | |
4363 | EFIAPI\r | |
4364 | AsmReadMm6 (\r | |
4365 | VOID\r | |
4366 | );\r | |
4367 | \r | |
4368 | /**\r | |
4369 | Reads the current value of 64-bit MMX Register #7 (MM7).\r | |
4370 | \r | |
4371 | Reads and returns the current value of MM7. This function is only available\r | |
4372 | on IA-32 and X64.\r | |
4373 | \r | |
4374 | @return The current value of MM7.\r | |
4375 | \r | |
4376 | **/\r | |
4377 | UINT64\r | |
4378 | EFIAPI\r | |
4379 | AsmReadMm7 (\r | |
4380 | VOID\r | |
4381 | );\r | |
4382 | \r | |
4383 | /**\r | |
4384 | Writes the current value of 64-bit MMX Register #0 (MM0).\r | |
4385 | \r | |
4386 | Writes the current value of MM0. This function is only available on IA32 and\r | |
4387 | X64.\r | |
4388 | \r | |
4389 | @param Value The 64-bit value to write to MM0.\r | |
4390 | \r | |
4391 | **/\r | |
4392 | VOID\r | |
4393 | EFIAPI\r | |
4394 | AsmWriteMm0 (\r | |
4395 | IN UINT64 Value\r | |
4396 | );\r | |
4397 | \r | |
4398 | /**\r | |
4399 | Writes the current value of 64-bit MMX Register #1 (MM1).\r | |
4400 | \r | |
4401 | Writes the current value of MM1. This function is only available on IA32 and\r | |
4402 | X64.\r | |
4403 | \r | |
4404 | @param Value The 64-bit value to write to MM1.\r | |
4405 | \r | |
4406 | **/\r | |
4407 | VOID\r | |
4408 | EFIAPI\r | |
4409 | AsmWriteMm1 (\r | |
4410 | IN UINT64 Value\r | |
4411 | );\r | |
4412 | \r | |
4413 | /**\r | |
4414 | Writes the current value of 64-bit MMX Register #2 (MM2).\r | |
4415 | \r | |
4416 | Writes the current value of MM2. This function is only available on IA32 and\r | |
4417 | X64.\r | |
4418 | \r | |
4419 | @param Value The 64-bit value to write to MM2.\r | |
4420 | \r | |
4421 | **/\r | |
4422 | VOID\r | |
4423 | EFIAPI\r | |
4424 | AsmWriteMm2 (\r | |
4425 | IN UINT64 Value\r | |
4426 | );\r | |
4427 | \r | |
4428 | /**\r | |
4429 | Writes the current value of 64-bit MMX Register #3 (MM3).\r | |
4430 | \r | |
4431 | Writes the current value of MM3. This function is only available on IA32 and\r | |
4432 | X64.\r | |
4433 | \r | |
4434 | @param Value The 64-bit value to write to MM3.\r | |
4435 | \r | |
4436 | **/\r | |
4437 | VOID\r | |
4438 | EFIAPI\r | |
4439 | AsmWriteMm3 (\r | |
4440 | IN UINT64 Value\r | |
4441 | );\r | |
4442 | \r | |
4443 | /**\r | |
4444 | Writes the current value of 64-bit MMX Register #4 (MM4).\r | |
4445 | \r | |
4446 | Writes the current value of MM4. This function is only available on IA32 and\r | |
4447 | X64.\r | |
4448 | \r | |
4449 | @param Value The 64-bit value to write to MM4.\r | |
4450 | \r | |
4451 | **/\r | |
4452 | VOID\r | |
4453 | EFIAPI\r | |
4454 | AsmWriteMm4 (\r | |
4455 | IN UINT64 Value\r | |
4456 | );\r | |
4457 | \r | |
4458 | /**\r | |
4459 | Writes the current value of 64-bit MMX Register #5 (MM5).\r | |
4460 | \r | |
4461 | Writes the current value of MM5. This function is only available on IA32 and\r | |
4462 | X64.\r | |
4463 | \r | |
4464 | @param Value The 64-bit value to write to MM5.\r | |
4465 | \r | |
4466 | **/\r | |
4467 | VOID\r | |
4468 | EFIAPI\r | |
4469 | AsmWriteMm5 (\r | |
4470 | IN UINT64 Value\r | |
4471 | );\r | |
4472 | \r | |
4473 | /**\r | |
4474 | Writes the current value of 64-bit MMX Register #6 (MM6).\r | |
4475 | \r | |
4476 | Writes the current value of MM6. This function is only available on IA32 and\r | |
4477 | X64.\r | |
4478 | \r | |
4479 | @param Value The 64-bit value to write to MM6.\r | |
4480 | \r | |
4481 | **/\r | |
4482 | VOID\r | |
4483 | EFIAPI\r | |
4484 | AsmWriteMm6 (\r | |
4485 | IN UINT64 Value\r | |
4486 | );\r | |
4487 | \r | |
4488 | /**\r | |
4489 | Writes the current value of 64-bit MMX Register #7 (MM7).\r | |
4490 | \r | |
4491 | Writes the current value of MM7. This function is only available on IA32 and\r | |
4492 | X64.\r | |
4493 | \r | |
4494 | @param Value The 64-bit value to write to MM7.\r | |
4495 | \r | |
4496 | **/\r | |
4497 | VOID\r | |
4498 | EFIAPI\r | |
4499 | AsmWriteMm7 (\r | |
4500 | IN UINT64 Value\r | |
4501 | );\r | |
4502 | \r | |
4503 | /**\r | |
4504 | Reads the current value of Time Stamp Counter (TSC).\r | |
4505 | \r | |
4506 | Reads and returns the current value of TSC. This function is only available\r | |
4507 | on IA-32 and X64.\r | |
4508 | \r | |
4509 | @return The current value of TSC\r | |
4510 | \r | |
4511 | **/\r | |
4512 | UINT64\r | |
4513 | EFIAPI\r | |
4514 | AsmReadTsc (\r | |
4515 | VOID\r | |
4516 | );\r | |
4517 | \r | |
4518 | /**\r | |
4519 | Reads the current value of a Performance Counter (PMC).\r | |
4520 | \r | |
4521 | Reads and returns the current value of performance counter specified by\r | |
4522 | Index. This function is only available on IA-32 and X64.\r | |
4523 | \r | |
4524 | @param Index The 32-bit Performance Counter index to read.\r | |
4525 | \r | |
4526 | @return The value of the PMC specified by Index.\r | |
4527 | \r | |
4528 | **/\r | |
4529 | UINT64\r | |
4530 | EFIAPI\r | |
4531 | AsmReadPmc (\r | |
4532 | IN UINT32 Index\r | |
4533 | );\r | |
4534 | \r | |
4535 | /**\r | |
4536 | Sets up a monitor buffer that is used by AsmMwait().\r | |
4537 | \r | |
4538 | Executes a MONITOR instruction with the register state specified by Eax, Ecx\r | |
4539 | and Edx. Returns Eax. This function is only available on IA-32 and X64.\r | |
4540 | \r | |
4541 | @param Eax The value to load into EAX or RAX before executing the MONITOR\r | |
4542 | instruction.\r | |
4543 | @param Ecx The value to load into ECX or RCX before executing the MONITOR\r | |
4544 | instruction.\r | |
4545 | @param Edx The value to load into EDX or RDX before executing the MONITOR\r | |
4546 | instruction.\r | |
4547 | \r | |
4548 | @return Eax\r | |
4549 | \r | |
4550 | **/\r | |
4551 | UINTN\r | |
4552 | EFIAPI\r | |
4553 | AsmMonitor (\r | |
4554 | IN UINTN Eax,\r | |
4555 | IN UINTN Ecx,\r | |
4556 | IN UINTN Edx\r | |
4557 | );\r | |
4558 | \r | |
4559 | /**\r | |
4560 | Executes an MWAIT instruction.\r | |
4561 | \r | |
4562 | Executes an MWAIT instruction with the register state specified by Eax and\r | |
4563 | Ecx. Returns Eax. This function is only available on IA-32 and X64.\r | |
4564 | \r | |
4565 | @param Eax The value to load into EAX or RAX before executing the MONITOR\r | |
4566 | instruction.\r | |
4567 | @param Ecx The value to load into ECX or RCX before executing the MONITOR\r | |
4568 | instruction.\r | |
4569 | \r | |
4570 | @return Eax\r | |
4571 | \r | |
4572 | **/\r | |
4573 | UINTN\r | |
4574 | EFIAPI\r | |
4575 | AsmMwait (\r | |
4576 | IN UINTN Eax,\r | |
4577 | IN UINTN Ecx\r | |
4578 | );\r | |
4579 | \r | |
4580 | /**\r | |
4581 | Executes a WBINVD instruction.\r | |
4582 | \r | |
4583 | Executes a WBINVD instruction. This function is only available on IA-32 and\r | |
4584 | X64.\r | |
4585 | \r | |
4586 | **/\r | |
4587 | VOID\r | |
4588 | EFIAPI\r | |
4589 | AsmWbinvd (\r | |
4590 | VOID\r | |
4591 | );\r | |
4592 | \r | |
4593 | /**\r | |
4594 | Executes a INVD instruction.\r | |
4595 | \r | |
4596 | Executes a INVD instruction. This function is only available on IA-32 and\r | |
4597 | X64.\r | |
4598 | \r | |
4599 | **/\r | |
4600 | VOID\r | |
4601 | EFIAPI\r | |
4602 | AsmInvd (\r | |
4603 | VOID\r | |
4604 | );\r | |
4605 | \r | |
4606 | /**\r | |
4607 | Flushes a cache line from all the instruction and data caches within the\r | |
4608 | coherency domain of the CPU.\r | |
4609 | \r | |
4610 | Flushed the cache line specified by LinearAddress, and returns LinearAddress.\r | |
4611 | This function is only available on IA-32 and X64.\r | |
4612 | \r | |
4613 | @param LinearAddress The address of the cache line to flush. If the CPU is\r | |
4614 | in a physical addressing mode, then LinearAddress is a\r | |
4615 | physical address. If the CPU is in a virtual\r | |
4616 | addressing mode, then LinearAddress is a virtual\r | |
4617 | address.\r | |
4618 | \r | |
4619 | @return LinearAddress\r | |
4620 | **/\r | |
4621 | VOID *\r | |
4622 | EFIAPI\r | |
4623 | AsmFlushCacheLine (\r | |
4624 | IN VOID *LinearAddress\r | |
4625 | );\r | |
4626 | \r | |
4627 | /**\r | |
4628 | Enables the 32-bit paging mode on the CPU.\r | |
4629 | \r | |
4630 | Enables the 32-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables\r | |
4631 | must be properly initialized prior to calling this service. This function\r | |
4632 | assumes the current execution mode is 32-bit protected mode. This function is\r | |
4633 | only available on IA-32. After the 32-bit paging mode is enabled, control is\r | |
4634 | transferred to the function specified by EntryPoint using the new stack\r | |
4635 | specified by NewStack and passing in the parameters specified by Context1 and\r | |
4636 | Context2. Context1 and Context2 are optional and may be NULL. The function\r | |
4637 | EntryPoint must never return.\r | |
4638 | \r | |
4639 | If the current execution mode is not 32-bit protected mode, then ASSERT().\r | |
4640 | If EntryPoint is NULL, then ASSERT().\r | |
4641 | If NewStack is NULL, then ASSERT().\r | |
4642 | \r | |
4643 | There are a number of constraints that must be followed before calling this\r | |
4644 | function:\r | |
4645 | 1) Interrupts must be disabled.\r | |
4646 | 2) The caller must be in 32-bit protected mode with flat descriptors. This\r | |
4647 | means all descriptors must have a base of 0 and a limit of 4GB.\r | |
4648 | 3) CR0 and CR4 must be compatible with 32-bit protected mode with flat\r | |
4649 | descriptors.\r | |
4650 | 4) CR3 must point to valid page tables that will be used once the transition\r | |
4651 | is complete, and those page tables must guarantee that the pages for this\r | |
4652 | function and the stack are identity mapped.\r | |
4653 | \r | |
4654 | @param EntryPoint A pointer to function to call with the new stack after\r | |
4655 | paging is enabled.\r | |
4656 | @param Context1 A pointer to the context to pass into the EntryPoint\r | |
4657 | function as the first parameter after paging is enabled.\r | |
4658 | @param Context2 A pointer to the context to pass into the EntryPoint\r | |
4659 | function as the second parameter after paging is enabled.\r | |
4660 | @param NewStack A pointer to the new stack to use for the EntryPoint\r | |
4661 | function after paging is enabled.\r | |
4662 | \r | |
4663 | **/\r | |
4664 | VOID\r | |
4665 | EFIAPI\r | |
4666 | AsmEnablePaging32 (\r | |
4667 | IN SWITCH_STACK_ENTRY_POINT EntryPoint,\r | |
4668 | IN VOID *Context1, OPTIONAL\r | |
4669 | IN VOID *Context2, OPTIONAL\r | |
4670 | IN VOID *NewStack\r | |
4671 | );\r | |
4672 | \r | |
4673 | /**\r | |
4674 | Disables the 32-bit paging mode on the CPU.\r | |
4675 | \r | |
4676 | Disables the 32-bit paging mode on the CPU and returns to 32-bit protected\r | |
4677 | mode. This function assumes the current execution mode is 32-paged protected\r | |
4678 | mode. This function is only available on IA-32. After the 32-bit paging mode\r | |
4679 | is disabled, control is transferred to the function specified by EntryPoint\r | |
4680 | using the new stack specified by NewStack and passing in the parameters\r | |
4681 | specified by Context1 and Context2. Context1 and Context2 are optional and\r | |
4682 | may be NULL. The function EntryPoint must never return.\r | |
4683 | \r | |
4684 | If the current execution mode is not 32-bit paged mode, then ASSERT().\r | |
4685 | If EntryPoint is NULL, then ASSERT().\r | |
4686 | If NewStack is NULL, then ASSERT().\r | |
4687 | \r | |
4688 | There are a number of constraints that must be followed before calling this\r | |
4689 | function:\r | |
4690 | 1) Interrupts must be disabled.\r | |
4691 | 2) The caller must be in 32-bit paged mode.\r | |
4692 | 3) CR0, CR3, and CR4 must be compatible with 32-bit paged mode.\r | |
4693 | 4) CR3 must point to valid page tables that guarantee that the pages for\r | |
4694 | this function and the stack are identity mapped.\r | |
4695 | \r | |
4696 | @param EntryPoint A pointer to function to call with the new stack after\r | |
4697 | paging is disabled.\r | |
4698 | @param Context1 A pointer to the context to pass into the EntryPoint\r | |
4699 | function as the first parameter after paging is disabled.\r | |
4700 | @param Context2 A pointer to the context to pass into the EntryPoint\r | |
4701 | function as the second parameter after paging is\r | |
4702 | disabled.\r | |
4703 | @param NewStack A pointer to the new stack to use for the EntryPoint\r | |
4704 | function after paging is disabled.\r | |
4705 | \r | |
4706 | **/\r | |
4707 | VOID\r | |
4708 | EFIAPI\r | |
4709 | AsmDisablePaging32 (\r | |
4710 | IN SWITCH_STACK_ENTRY_POINT EntryPoint,\r | |
4711 | IN VOID *Context1, OPTIONAL\r | |
4712 | IN VOID *Context2, OPTIONAL\r | |
4713 | IN VOID *NewStack\r | |
4714 | );\r | |
4715 | \r | |
4716 | /**\r | |
4717 | Enables the 64-bit paging mode on the CPU.\r | |
4718 | \r | |
4719 | Enables the 64-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables\r | |
4720 | must be properly initialized prior to calling this service. This function\r | |
4721 | assumes the current execution mode is 32-bit protected mode with flat\r | |
4722 | descriptors. This function is only available on IA-32. After the 64-bit\r | |
4723 | paging mode is enabled, control is transferred to the function specified by\r | |
4724 | EntryPoint using the new stack specified by NewStack and passing in the\r | |
4725 | parameters specified by Context1 and Context2. Context1 and Context2 are\r | |
4726 | optional and may be 0. The function EntryPoint must never return.\r | |
4727 | \r | |
4728 | If the current execution mode is not 32-bit protected mode with flat\r | |
4729 | descriptors, then ASSERT().\r | |
4730 | If EntryPoint is 0, then ASSERT().\r | |
4731 | If NewStack is 0, then ASSERT().\r | |
4732 | \r | |
4733 | @param Cs The 16-bit selector to load in the CS before EntryPoint\r | |
4734 | is called. The descriptor in the GDT that this selector\r | |
4735 | references must be setup for long mode.\r | |
4736 | @param EntryPoint The 64-bit virtual address of the function to call with\r | |
4737 | the new stack after paging is enabled.\r | |
4738 | @param Context1 The 64-bit virtual address of the context to pass into\r | |
4739 | the EntryPoint function as the first parameter after\r | |
4740 | paging is enabled.\r | |
4741 | @param Context2 The 64-bit virtual address of the context to pass into\r | |
4742 | the EntryPoint function as the second parameter after\r | |
4743 | paging is enabled.\r | |
4744 | @param NewStack The 64-bit virtual address of the new stack to use for\r | |
4745 | the EntryPoint function after paging is enabled.\r | |
4746 | \r | |
4747 | **/\r | |
4748 | VOID\r | |
4749 | EFIAPI\r | |
4750 | AsmEnablePaging64 (\r | |
4751 | IN UINT16 CodeSelector,\r | |
4752 | IN UINT64 EntryPoint,\r | |
4753 | IN UINT64 Context1, OPTIONAL\r | |
4754 | IN UINT64 Context2, OPTIONAL\r | |
4755 | IN UINT64 NewStack\r | |
4756 | );\r | |
4757 | \r | |
4758 | /**\r | |
4759 | Disables the 64-bit paging mode on the CPU.\r | |
4760 | \r | |
4761 | Disables the 64-bit paging mode on the CPU and returns to 32-bit protected\r | |
4762 | mode. This function assumes the current execution mode is 64-paging mode.\r | |
4763 | This function is only available on X64. After the 64-bit paging mode is\r | |
4764 | disabled, control is transferred to the function specified by EntryPoint\r | |
4765 | using the new stack specified by NewStack and passing in the parameters\r | |
4766 | specified by Context1 and Context2. Context1 and Context2 are optional and\r | |
4767 | may be 0. The function EntryPoint must never return.\r | |
4768 | \r | |
4769 | If the current execution mode is not 64-bit paged mode, then ASSERT().\r | |
4770 | If EntryPoint is 0, then ASSERT().\r | |
4771 | If NewStack is 0, then ASSERT().\r | |
4772 | \r | |
4773 | @param Cs The 16-bit selector to load in the CS before EntryPoint\r | |
4774 | is called. The descriptor in the GDT that this selector\r | |
4775 | references must be setup for 32-bit protected mode.\r | |
4776 | @param EntryPoint The 64-bit virtual address of the function to call with\r | |
4777 | the new stack after paging is disabled.\r | |
4778 | @param Context1 The 64-bit virtual address of the context to pass into\r | |
4779 | the EntryPoint function as the first parameter after\r | |
4780 | paging is disabled.\r | |
4781 | @param Context2 The 64-bit virtual address of the context to pass into\r | |
4782 | the EntryPoint function as the second parameter after\r | |
4783 | paging is disabled.\r | |
4784 | @param NewStack The 64-bit virtual address of the new stack to use for\r | |
4785 | the EntryPoint function after paging is disabled.\r | |
4786 | \r | |
4787 | **/\r | |
4788 | VOID\r | |
4789 | EFIAPI\r | |
4790 | AsmDisablePaging64 (\r | |
4791 | IN UINT16 CodeSelector,\r | |
4792 | IN UINT32 EntryPoint,\r | |
4793 | IN UINT32 Context1, OPTIONAL\r | |
4794 | IN UINT32 Context2, OPTIONAL\r | |
4795 | IN UINT32 NewStack\r | |
4796 | );\r | |
4797 | \r | |
4798 | //\r | |
4799 | // 16-bit thunking services\r | |
4800 | //\r | |
4801 | \r | |
4802 | /**\r | |
4803 | Retrieves the properties for 16-bit thunk functions.\r | |
4804 | \r | |
4805 | Computes the size of the buffer and stack below 1MB required to use the\r | |
4806 | AsmPrepareThunk16(), AsmThunk16() and AsmPrepareAndThunk16() functions. This\r | |
4807 | buffer size is returned in RealModeBufferSize, and the stack size is returned\r | |
4808 | in ExtraStackSize. If parameters are passed to the 16-bit real mode code,\r | |
4809 | then the actual minimum stack size is ExtraStackSize plus the maximum number\r | |
4810 | of bytes that need to be passed to the 16-bit real mode code.\r | |
4811 | \r | |
4812 | If RealModeBufferSize is NULL, then ASSERT().\r | |
4813 | If ExtraStackSize is NULL, then ASSERT().\r | |
4814 | \r | |
4815 | @param RealModeBufferSize A pointer to the size of the buffer below 1MB\r | |
4816 | required to use the 16-bit thunk functions.\r | |
4817 | @param ExtraStackSize A pointer to the extra size of stack below 1MB\r | |
4818 | that the 16-bit thunk functions require for\r | |
4819 | temporary storage in the transition to and from\r | |
4820 | 16-bit real mode.\r | |
4821 | \r | |
4822 | **/\r | |
4823 | VOID\r | |
4824 | EFIAPI\r | |
4825 | AsmGetThunk16Properties (\r | |
4826 | OUT UINT32 *RealModeBufferSize,\r | |
4827 | OUT UINT32 *ExtraStackSize\r | |
4828 | );\r | |
4829 | \r | |
4830 | /**\r | |
4831 | Prepares all structures a code required to use AsmThunk16().\r | |
4832 | \r | |
4833 | Prepares all structures and code required to use AsmThunk16().\r | |
4834 | \r | |
4835 | If ThunkContext is NULL, then ASSERT().\r | |
4836 | \r | |
4837 | @param ThunkContext A pointer to the context structure that describes the\r | |
4838 | 16-bit real mode code to call.\r | |
4839 | \r | |
4840 | **/\r | |
4841 | VOID\r | |
4842 | EFIAPI\r | |
4843 | AsmPrepareThunk16 (\r | |
4844 | OUT THUNK_CONTEXT *ThunkContext\r | |
4845 | );\r | |
4846 | \r | |
4847 | /**\r | |
4848 | Transfers control to a 16-bit real mode entry point and returns the results.\r | |
4849 | \r | |
4850 | Transfers control to a 16-bit real mode entry point and returns the results.\r | |
4851 | AsmPrepareThunk16() must be called with ThunkContext before this function is\r | |
4852 | used.\r | |
4853 | \r | |
4854 | If ThunkContext is NULL, then ASSERT().\r | |
4855 | If AsmPrepareThunk16() was not previously called with ThunkContext, then ASSERT().\r | |
4856 | \r | |
4857 | @param ThunkContext A pointer to the context structure that describes the\r | |
4858 | 16-bit real mode code to call.\r | |
4859 | \r | |
4860 | **/\r | |
4861 | VOID\r | |
4862 | EFIAPI\r | |
4863 | AsmThunk16 (\r | |
4864 | IN OUT THUNK_CONTEXT *ThunkContext\r | |
4865 | );\r | |
4866 | \r | |
4867 | /**\r | |
4868 | Prepares all structures and code for a 16-bit real mode thunk, transfers\r | |
4869 | control to a 16-bit real mode entry point, and returns the results.\r | |
4870 | \r | |
4871 | Prepares all structures and code for a 16-bit real mode thunk, transfers\r | |
4872 | control to a 16-bit real mode entry point, and returns the results. If the\r | |
4873 | caller only need to perform a single 16-bit real mode thunk, then this\r | |
4874 | service should be used. If the caller intends to make more than one 16-bit\r | |
4875 | real mode thunk, then it is more efficient if AsmPrepareThunk16() is called\r | |
4876 | once and AsmThunk16() can be called for each 16-bit real mode thunk.\r | |
4877 | \r | |
4878 | If ThunkContext is NULL, then ASSERT().\r | |
4879 | \r | |
4880 | @param ThunkContext A pointer to the context structure that describes the\r | |
4881 | 16-bit real mode code to call.\r | |
4882 | \r | |
4883 | **/\r | |
4884 | VOID\r | |
4885 | EFIAPI\r | |
4886 | AsmPrepareAndThunk16 (\r | |
4887 | IN OUT THUNK_CONTEXT *ThunkContext\r | |
4888 | );\r | |
4889 | \r | |
4890 | #endif\r |