]>
Commit | Line | Data |
---|---|---|
1 | ;------------------------------------------------------------------------------\r | |
2 | ;\r | |
3 | ; CpuFlushTlb() for ARM\r | |
4 | ;\r | |
5 | ; Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r | |
6 | ; Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r | |
7 | ; SPDX-License-Identifier: BSD-2-Clause-Patent\r | |
8 | ;\r | |
9 | ;------------------------------------------------------------------------------\r | |
10 | \r | |
11 | EXPORT CpuFlushTlb\r | |
12 | AREA cpu_flush_tlb, CODE, READONLY\r | |
13 | \r | |
14 | ;/**\r | |
15 | ; Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU.\r | |
16 | ;\r | |
17 | ; Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU.\r | |
18 | ;\r | |
19 | ;**/\r | |
20 | ;VOID\r | |
21 | ;EFIAPI\r | |
22 | ;CpuFlushTlb (\r | |
23 | ; VOID\r | |
24 | ; );\r | |
25 | ;\r | |
26 | CpuFlushTlb\r | |
27 | MOV r0,#0\r | |
28 | MCR p15,0,r0,c8,c5,0 ;Invalidate all the unlocked entried in TLB\r | |
29 | BX LR\r | |
30 | \r | |
31 | END\r |