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1 | ;------------------------------------------------------------------------------\r | |
2 | ;\r | |
3 | ; Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>\r | |
4 | ; SPDX-License-Identifier: BSD-2-Clause-Patent\r | |
5 | ;\r | |
6 | ; Module Name:\r | |
7 | ;\r | |
8 | ; SetJump.Asm\r | |
9 | ;\r | |
10 | ; Abstract:\r | |
11 | ;\r | |
12 | ; Implementation of SetJump() on x64.\r | |
13 | ;\r | |
14 | ;------------------------------------------------------------------------------\r | |
15 | \r | |
16 | %include "Nasm.inc"\r | |
17 | \r | |
18 | DEFAULT REL\r | |
19 | SECTION .text\r | |
20 | \r | |
21 | extern ASM_PFX(InternalAssertJumpBuffer)\r | |
22 | extern ASM_PFX(PcdGet32 (PcdControlFlowEnforcementPropertyMask))\r | |
23 | \r | |
24 | ;------------------------------------------------------------------------------\r | |
25 | ; UINTN\r | |
26 | ; EFIAPI\r | |
27 | ; SetJump (\r | |
28 | ; OUT BASE_LIBRARY_JUMP_BUFFER *JumpBuffer\r | |
29 | ; );\r | |
30 | ;------------------------------------------------------------------------------\r | |
31 | global ASM_PFX(SetJump)\r | |
32 | ASM_PFX(SetJump):\r | |
33 | push rcx\r | |
34 | add rsp, -0x20\r | |
35 | call ASM_PFX(InternalAssertJumpBuffer)\r | |
36 | add rsp, 0x20\r | |
37 | pop rcx\r | |
38 | pop rdx\r | |
39 | \r | |
40 | xor rax, rax\r | |
41 | mov [rcx + 0xF8], rax ; save 0 to SSP\r | |
42 | \r | |
43 | mov eax, [ASM_PFX(PcdGet32 (PcdControlFlowEnforcementPropertyMask))]\r | |
44 | test eax, eax\r | |
45 | jz CetDone\r | |
46 | mov rax, cr4\r | |
47 | bt eax, 23 ; check if CET is enabled\r | |
48 | jnc CetDone\r | |
49 | \r | |
50 | mov rax, 1\r | |
51 | INCSSP_RAX ; to read original SSP\r | |
52 | READSSP_RAX\r | |
53 | mov [rcx + 0xF8], rax ; save SSP\r | |
54 | \r | |
55 | CetDone:\r | |
56 | \r | |
57 | mov [rcx], rbx\r | |
58 | mov [rcx + 8], rsp\r | |
59 | mov [rcx + 0x10], rbp\r | |
60 | mov [rcx + 0x18], rdi\r | |
61 | mov [rcx + 0x20], rsi\r | |
62 | mov [rcx + 0x28], r12\r | |
63 | mov [rcx + 0x30], r13\r | |
64 | mov [rcx + 0x38], r14\r | |
65 | mov [rcx + 0x40], r15\r | |
66 | mov [rcx + 0x48], rdx\r | |
67 | ; save non-volatile fp registers\r | |
68 | stmxcsr [rcx + 0x50]\r | |
69 | movdqu [rcx + 0x58], xmm6\r | |
70 | movdqu [rcx + 0x68], xmm7\r | |
71 | movdqu [rcx + 0x78], xmm8\r | |
72 | movdqu [rcx + 0x88], xmm9\r | |
73 | movdqu [rcx + 0x98], xmm10\r | |
74 | movdqu [rcx + 0xA8], xmm11\r | |
75 | movdqu [rcx + 0xB8], xmm12\r | |
76 | movdqu [rcx + 0xC8], xmm13\r | |
77 | movdqu [rcx + 0xD8], xmm14\r | |
78 | movdqu [rcx + 0xE8], xmm15\r | |
79 | xor rax, rax\r | |
80 | jmp rdx\r | |
81 | \r |