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1 | /** @file\r | |
2 | I/O Library basic function implementation and worker functions.\r | |
3 | \r | |
4 | Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>\r | |
5 | This program and the accompanying materials\r | |
6 | are licensed and made available under the terms and conditions of the BSD License\r | |
7 | which accompanies this distribution. The full text of the license may be found at\r | |
8 | http://opensource.org/licenses/bsd-license.php.\r | |
9 | \r | |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
12 | \r | |
13 | **/\r | |
14 | \r | |
15 | #include "DxeIoLibEsalInternal.h"\r | |
16 | \r | |
17 | /**\r | |
18 | Reads registers in the EFI CPU I/O space.\r | |
19 | \r | |
20 | Reads the I/O port specified by Port with registers width specified by Width.\r | |
21 | The read value is returned. If such operations are not supported, then ASSERT().\r | |
22 | This function must guarantee that all I/O read and write operations are serialized.\r | |
23 | \r | |
24 | @param Port The base address of the I/O operation.\r | |
25 | The caller is responsible for aligning the Address if required.\r | |
26 | @param Width The width of the I/O operation.\r | |
27 | \r | |
28 | @return Data read from registers in the EFI CPU I/O space.\r | |
29 | \r | |
30 | **/\r | |
31 | UINT64\r | |
32 | EFIAPI\r | |
33 | IoReadWorker (\r | |
34 | IN UINTN Port,\r | |
35 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width\r | |
36 | )\r | |
37 | {\r | |
38 | SAL_RETURN_REGS ReturnReg;\r | |
39 | UINT64 Data;\r | |
40 | \r | |
41 | Data = 0;\r | |
42 | \r | |
43 | ReturnReg = EsalCall (\r | |
44 | EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_LO,\r | |
45 | EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_HI,\r | |
46 | IoReadFunctionId, \r | |
47 | (UINT64)Width, \r | |
48 | Port, \r | |
49 | 1, \r | |
50 | (UINT64)&Data, \r | |
51 | 0, \r | |
52 | 0, \r | |
53 | 0\r | |
54 | );\r | |
55 | ASSERT (ReturnReg.Status == EFI_SAL_SUCCESS);\r | |
56 | return Data;\r | |
57 | }\r | |
58 | \r | |
59 | /**\r | |
60 | Writes registers in the EFI CPU I/O space.\r | |
61 | \r | |
62 | Writes the I/O port specified by Port with registers width and value specified by Width\r | |
63 | and Data respectively. Data is returned. If such operations are not supported, then ASSERT().\r | |
64 | This function must guarantee that all I/O read and write operations are serialized.\r | |
65 | \r | |
66 | @param Port The base address of the I/O operation.\r | |
67 | The caller is responsible for aligning the Address if required.\r | |
68 | @param Width The width of the I/O operation.\r | |
69 | @param Data The value to write to the I/O port.\r | |
70 | \r | |
71 | @return The paramter of Data.\r | |
72 | \r | |
73 | **/\r | |
74 | UINT64\r | |
75 | EFIAPI\r | |
76 | IoWriteWorker (\r | |
77 | IN UINTN Port,\r | |
78 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r | |
79 | IN UINT64 Data\r | |
80 | )\r | |
81 | {\r | |
82 | SAL_RETURN_REGS ReturnReg;\r | |
83 | \r | |
84 | ReturnReg = EsalCall (\r | |
85 | EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_LO,\r | |
86 | EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_HI,\r | |
87 | IoWriteFunctionId, \r | |
88 | (UINT64)Width, \r | |
89 | Port, \r | |
90 | 1, \r | |
91 | (UINT64)&Data, \r | |
92 | 0, \r | |
93 | 0, \r | |
94 | 0\r | |
95 | );\r | |
96 | ASSERT (ReturnReg.Status == EFI_SAL_SUCCESS);\r | |
97 | return Data;\r | |
98 | }\r | |
99 | \r | |
100 | /**\r | |
101 | Reads memory-mapped registers in the EFI system memory space.\r | |
102 | \r | |
103 | Reads the MMIO registers specified by Address with registers width specified by Width.\r | |
104 | The read value is returned. If such operations are not supported, then ASSERT().\r | |
105 | This function must guarantee that all MMIO read and write operations are serialized.\r | |
106 | \r | |
107 | @param Address The MMIO register to read.\r | |
108 | The caller is responsible for aligning the Address if required.\r | |
109 | @param Width The width of the I/O operation.\r | |
110 | \r | |
111 | @return Data read from registers in the EFI system memory space.\r | |
112 | \r | |
113 | **/\r | |
114 | UINT64\r | |
115 | EFIAPI\r | |
116 | MmioReadWorker (\r | |
117 | IN UINTN Address,\r | |
118 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width\r | |
119 | )\r | |
120 | {\r | |
121 | SAL_RETURN_REGS ReturnReg;\r | |
122 | UINT64 Data;\r | |
123 | \r | |
124 | Data = 0;\r | |
125 | \r | |
126 | ReturnReg = EsalCall (\r | |
127 | EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_LO,\r | |
128 | EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_HI,\r | |
129 | MemReadFunctionId, \r | |
130 | (UINT64)Width, \r | |
131 | Address, \r | |
132 | 1, \r | |
133 | (UINT64)&Data, \r | |
134 | 0, \r | |
135 | 0, \r | |
136 | 0\r | |
137 | );\r | |
138 | ASSERT (ReturnReg.Status == EFI_SAL_SUCCESS);\r | |
139 | return Data;\r | |
140 | }\r | |
141 | \r | |
142 | /**\r | |
143 | Writes memory-mapped registers in the EFI system memory space.\r | |
144 | \r | |
145 | Writes the MMIO registers specified by Address with registers width and value specified by Width\r | |
146 | and Data respectively. Data is returned. If such operations are not supported, then ASSERT().\r | |
147 | This function must guarantee that all MMIO read and write operations are serialized.\r | |
148 | \r | |
149 | @param Address The MMIO register to read.\r | |
150 | The caller is responsible for aligning the Address if required.\r | |
151 | @param Width The width of the I/O operation.\r | |
152 | @param Data The value to write to memory-mapped registers\r | |
153 | \r | |
154 | @return Data read from registers in the EFI system memory space.\r | |
155 | \r | |
156 | **/\r | |
157 | UINT64\r | |
158 | EFIAPI\r | |
159 | MmioWriteWorker (\r | |
160 | IN UINTN Address,\r | |
161 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r | |
162 | IN UINT64 Data\r | |
163 | )\r | |
164 | {\r | |
165 | SAL_RETURN_REGS ReturnReg;\r | |
166 | \r | |
167 | ReturnReg = EsalCall (\r | |
168 | EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_LO,\r | |
169 | EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_HI,\r | |
170 | MemWriteFunctionId, \r | |
171 | (UINT64)Width, \r | |
172 | Address, \r | |
173 | 1, \r | |
174 | (UINT64)&Data, \r | |
175 | 0, \r | |
176 | 0, \r | |
177 | 0\r | |
178 | );\r | |
179 | ASSERT (ReturnReg.Status == EFI_SAL_SUCCESS);\r | |
180 | return Data;\r | |
181 | }\r | |
182 | \r | |
183 | /**\r | |
184 | Reads an 8-bit I/O port.\r | |
185 | \r | |
186 | Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.\r | |
187 | This function must guarantee that all I/O read and write operations are\r | |
188 | serialized.\r | |
189 | \r | |
190 | If 8-bit I/O port operations are not supported, then ASSERT().\r | |
191 | \r | |
192 | @param Port The I/O port to read.\r | |
193 | \r | |
194 | @return The value read.\r | |
195 | \r | |
196 | **/\r | |
197 | UINT8\r | |
198 | EFIAPI\r | |
199 | IoRead8 (\r | |
200 | IN UINTN Port\r | |
201 | )\r | |
202 | {\r | |
203 | return (UINT8)IoReadWorker (Port, EfiCpuIoWidthUint8);\r | |
204 | }\r | |
205 | \r | |
206 | /**\r | |
207 | Writes an 8-bit I/O port.\r | |
208 | \r | |
209 | Writes the 8-bit I/O port specified by Port with the value specified by Value\r | |
210 | and returns Value. This function must guarantee that all I/O read and write\r | |
211 | operations are serialized.\r | |
212 | \r | |
213 | If 8-bit I/O port operations are not supported, then ASSERT().\r | |
214 | \r | |
215 | @param Port The I/O port to write.\r | |
216 | @param Value The value to write to the I/O port.\r | |
217 | \r | |
218 | @return The value written the I/O port.\r | |
219 | \r | |
220 | **/\r | |
221 | UINT8\r | |
222 | EFIAPI\r | |
223 | IoWrite8 (\r | |
224 | IN UINTN Port,\r | |
225 | IN UINT8 Value\r | |
226 | )\r | |
227 | {\r | |
228 | return (UINT8)IoWriteWorker (Port, EfiCpuIoWidthUint8, Value);\r | |
229 | }\r | |
230 | \r | |
231 | /**\r | |
232 | Reads a 16-bit I/O port.\r | |
233 | \r | |
234 | Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.\r | |
235 | This function must guarantee that all I/O read and write operations are\r | |
236 | serialized.\r | |
237 | \r | |
238 | If 16-bit I/O port operations are not supported, then ASSERT().\r | |
239 | \r | |
240 | @param Port The I/O port to read.\r | |
241 | \r | |
242 | @return The value read.\r | |
243 | \r | |
244 | **/\r | |
245 | UINT16\r | |
246 | EFIAPI\r | |
247 | IoRead16 (\r | |
248 | IN UINTN Port\r | |
249 | )\r | |
250 | {\r | |
251 | //\r | |
252 | // Make sure Port is aligned on a 16-bit boundary.\r | |
253 | //\r | |
254 | ASSERT ((Port & 1) == 0);\r | |
255 | return (UINT16)IoReadWorker (Port, EfiCpuIoWidthUint16);\r | |
256 | }\r | |
257 | \r | |
258 | /**\r | |
259 | Writes a 16-bit I/O port.\r | |
260 | \r | |
261 | Writes the 16-bit I/O port specified by Port with the value specified by Value\r | |
262 | and returns Value. This function must guarantee that all I/O read and write\r | |
263 | operations are serialized.\r | |
264 | \r | |
265 | If 16-bit I/O port operations are not supported, then ASSERT().\r | |
266 | \r | |
267 | @param Port The I/O port to write.\r | |
268 | @param Value The value to write to the I/O port.\r | |
269 | \r | |
270 | @return The value written the I/O port.\r | |
271 | \r | |
272 | **/\r | |
273 | UINT16\r | |
274 | EFIAPI\r | |
275 | IoWrite16 (\r | |
276 | IN UINTN Port,\r | |
277 | IN UINT16 Value\r | |
278 | )\r | |
279 | {\r | |
280 | //\r | |
281 | // Make sure Port is aligned on a 16-bit boundary.\r | |
282 | //\r | |
283 | ASSERT ((Port & 1) == 0);\r | |
284 | return (UINT16)IoWriteWorker (Port, EfiCpuIoWidthUint16, Value);\r | |
285 | }\r | |
286 | \r | |
287 | /**\r | |
288 | Reads a 32-bit I/O port.\r | |
289 | \r | |
290 | Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.\r | |
291 | This function must guarantee that all I/O read and write operations are\r | |
292 | serialized.\r | |
293 | \r | |
294 | If 32-bit I/O port operations are not supported, then ASSERT().\r | |
295 | \r | |
296 | @param Port The I/O port to read.\r | |
297 | \r | |
298 | @return The value read.\r | |
299 | \r | |
300 | **/\r | |
301 | UINT32\r | |
302 | EFIAPI\r | |
303 | IoRead32 (\r | |
304 | IN UINTN Port\r | |
305 | )\r | |
306 | {\r | |
307 | //\r | |
308 | // Make sure Port is aligned on a 32-bit boundary.\r | |
309 | //\r | |
310 | ASSERT ((Port & 3) == 0);\r | |
311 | return (UINT32)IoReadWorker (Port, EfiCpuIoWidthUint32);\r | |
312 | }\r | |
313 | \r | |
314 | /**\r | |
315 | Writes a 32-bit I/O port.\r | |
316 | \r | |
317 | Writes the 32-bit I/O port specified by Port with the value specified by Value\r | |
318 | and returns Value. This function must guarantee that all I/O read and write\r | |
319 | operations are serialized.\r | |
320 | \r | |
321 | If 32-bit I/O port operations are not supported, then ASSERT().\r | |
322 | \r | |
323 | @param Port The I/O port to write.\r | |
324 | @param Value The value to write to the I/O port.\r | |
325 | \r | |
326 | @return The value written the I/O port.\r | |
327 | \r | |
328 | **/\r | |
329 | UINT32\r | |
330 | EFIAPI\r | |
331 | IoWrite32 (\r | |
332 | IN UINTN Port,\r | |
333 | IN UINT32 Value\r | |
334 | )\r | |
335 | {\r | |
336 | //\r | |
337 | // Make sure Port is aligned on a 32-bit boundary.\r | |
338 | //\r | |
339 | ASSERT ((Port & 3) == 0);\r | |
340 | return (UINT32)IoWriteWorker (Port, EfiCpuIoWidthUint32, Value);\r | |
341 | }\r | |
342 | \r | |
343 | /**\r | |
344 | Reads a 64-bit I/O port.\r | |
345 | \r | |
346 | Reads the 64-bit I/O port specified by Port. The 64-bit read value is returned.\r | |
347 | This function must guarantee that all I/O read and write operations are\r | |
348 | serialized.\r | |
349 | \r | |
350 | If 64-bit I/O port operations are not supported, then ASSERT().\r | |
351 | \r | |
352 | @param Port The I/O port to read.\r | |
353 | \r | |
354 | @return The value read.\r | |
355 | \r | |
356 | **/\r | |
357 | UINT64\r | |
358 | EFIAPI\r | |
359 | IoRead64 (\r | |
360 | IN UINTN Port\r | |
361 | )\r | |
362 | {\r | |
363 | //\r | |
364 | // Make sure Port is aligned on a 64-bit boundary.\r | |
365 | //\r | |
366 | ASSERT ((Port & 7) == 0);\r | |
367 | return IoReadWorker (Port, EfiCpuIoWidthUint64);\r | |
368 | }\r | |
369 | \r | |
370 | /**\r | |
371 | Writes a 64-bit I/O port.\r | |
372 | \r | |
373 | Writes the 64-bit I/O port specified by Port with the value specified by Value\r | |
374 | and returns Value. This function must guarantee that all I/O read and write\r | |
375 | operations are serialized.\r | |
376 | \r | |
377 | If 64-bit I/O port operations are not supported, then ASSERT().\r | |
378 | \r | |
379 | @param Port The I/O port to write.\r | |
380 | @param Value The value to write to the I/O port.\r | |
381 | \r | |
382 | @return The value written the I/O port.\r | |
383 | \r | |
384 | **/\r | |
385 | UINT64\r | |
386 | EFIAPI\r | |
387 | IoWrite64 (\r | |
388 | IN UINTN Port,\r | |
389 | IN UINT64 Value\r | |
390 | )\r | |
391 | {\r | |
392 | //\r | |
393 | // Make sure Port is aligned on a 64-bit boundary.\r | |
394 | //\r | |
395 | ASSERT ((Port & 7) == 0);\r | |
396 | return IoWriteWorker (Port, EfiCpuIoWidthUint64, Value);\r | |
397 | }\r | |
398 | \r | |
399 | /**\r | |
400 | Reads an 8-bit MMIO register.\r | |
401 | \r | |
402 | Reads the 8-bit MMIO register specified by Address. The 8-bit read value is\r | |
403 | returned. This function must guarantee that all MMIO read and write\r | |
404 | operations are serialized.\r | |
405 | \r | |
406 | If 8-bit MMIO register operations are not supported, then ASSERT().\r | |
407 | \r | |
408 | @param Address The MMIO register to read.\r | |
409 | \r | |
410 | @return The value read.\r | |
411 | \r | |
412 | **/\r | |
413 | UINT8\r | |
414 | EFIAPI\r | |
415 | MmioRead8 (\r | |
416 | IN UINTN Address\r | |
417 | )\r | |
418 | {\r | |
419 | return (UINT8)MmioReadWorker (Address, EfiCpuIoWidthUint8);\r | |
420 | }\r | |
421 | \r | |
422 | /**\r | |
423 | Writes an 8-bit MMIO register.\r | |
424 | \r | |
425 | Writes the 8-bit MMIO register specified by Address with the value specified\r | |
426 | by Value and returns Value. This function must guarantee that all MMIO read\r | |
427 | and write operations are serialized.\r | |
428 | \r | |
429 | If 8-bit MMIO register operations are not supported, then ASSERT().\r | |
430 | \r | |
431 | @param Address The MMIO register to write.\r | |
432 | @param Value The value to write to the MMIO register.\r | |
433 | \r | |
434 | **/\r | |
435 | UINT8\r | |
436 | EFIAPI\r | |
437 | MmioWrite8 (\r | |
438 | IN UINTN Address,\r | |
439 | IN UINT8 Value\r | |
440 | )\r | |
441 | {\r | |
442 | return (UINT8)MmioWriteWorker (Address, EfiCpuIoWidthUint8, Value);\r | |
443 | }\r | |
444 | \r | |
445 | /**\r | |
446 | Reads a 16-bit MMIO register.\r | |
447 | \r | |
448 | Reads the 16-bit MMIO register specified by Address. The 16-bit read value is\r | |
449 | returned. This function must guarantee that all MMIO read and write\r | |
450 | operations are serialized.\r | |
451 | \r | |
452 | If 16-bit MMIO register operations are not supported, then ASSERT().\r | |
453 | \r | |
454 | @param Address The MMIO register to read.\r | |
455 | \r | |
456 | @return The value read.\r | |
457 | \r | |
458 | **/\r | |
459 | UINT16\r | |
460 | EFIAPI\r | |
461 | MmioRead16 (\r | |
462 | IN UINTN Address\r | |
463 | )\r | |
464 | {\r | |
465 | //\r | |
466 | // Make sure Address is aligned on a 16-bit boundary.\r | |
467 | //\r | |
468 | ASSERT ((Address & 1) == 0);\r | |
469 | return (UINT16)MmioReadWorker (Address, EfiCpuIoWidthUint16);\r | |
470 | }\r | |
471 | \r | |
472 | /**\r | |
473 | Writes a 16-bit MMIO register.\r | |
474 | \r | |
475 | Writes the 16-bit MMIO register specified by Address with the value specified\r | |
476 | by Value and returns Value. This function must guarantee that all MMIO read\r | |
477 | and write operations are serialized.\r | |
478 | \r | |
479 | If 16-bit MMIO register operations are not supported, then ASSERT().\r | |
480 | \r | |
481 | @param Address The MMIO register to write.\r | |
482 | @param Value The value to write to the MMIO register.\r | |
483 | \r | |
484 | **/\r | |
485 | UINT16\r | |
486 | EFIAPI\r | |
487 | MmioWrite16 (\r | |
488 | IN UINTN Address,\r | |
489 | IN UINT16 Value\r | |
490 | )\r | |
491 | {\r | |
492 | //\r | |
493 | // Make sure Address is aligned on a 16-bit boundary.\r | |
494 | //\r | |
495 | ASSERT ((Address & 1) == 0);\r | |
496 | return (UINT16)MmioWriteWorker (Address, EfiCpuIoWidthUint16, Value);\r | |
497 | }\r | |
498 | \r | |
499 | /**\r | |
500 | Reads a 32-bit MMIO register.\r | |
501 | \r | |
502 | Reads the 32-bit MMIO register specified by Address. The 32-bit read value is\r | |
503 | returned. This function must guarantee that all MMIO read and write\r | |
504 | operations are serialized.\r | |
505 | \r | |
506 | If 32-bit MMIO register operations are not supported, then ASSERT().\r | |
507 | \r | |
508 | @param Address The MMIO register to read.\r | |
509 | \r | |
510 | @return The value read.\r | |
511 | \r | |
512 | **/\r | |
513 | UINT32\r | |
514 | EFIAPI\r | |
515 | MmioRead32 (\r | |
516 | IN UINTN Address\r | |
517 | )\r | |
518 | {\r | |
519 | //\r | |
520 | // Make sure Address is aligned on a 32-bit boundary.\r | |
521 | //\r | |
522 | ASSERT ((Address & 3) == 0);\r | |
523 | return (UINT32)MmioReadWorker (Address, EfiCpuIoWidthUint32);\r | |
524 | }\r | |
525 | \r | |
526 | /**\r | |
527 | Writes a 32-bit MMIO register.\r | |
528 | \r | |
529 | Writes the 32-bit MMIO register specified by Address with the value specified\r | |
530 | by Value and returns Value. This function must guarantee that all MMIO read\r | |
531 | and write operations are serialized.\r | |
532 | \r | |
533 | If 32-bit MMIO register operations are not supported, then ASSERT().\r | |
534 | \r | |
535 | @param Address The MMIO register to write.\r | |
536 | @param Value The value to write to the MMIO register.\r | |
537 | \r | |
538 | **/\r | |
539 | UINT32\r | |
540 | EFIAPI\r | |
541 | MmioWrite32 (\r | |
542 | IN UINTN Address,\r | |
543 | IN UINT32 Value\r | |
544 | )\r | |
545 | {\r | |
546 | //\r | |
547 | // Make sure Address is aligned on a 32-bit boundary.\r | |
548 | //\r | |
549 | ASSERT ((Address & 3) == 0);\r | |
550 | return (UINT32)MmioWriteWorker (Address, EfiCpuIoWidthUint32, Value);\r | |
551 | }\r | |
552 | \r | |
553 | /**\r | |
554 | Reads a 64-bit MMIO register.\r | |
555 | \r | |
556 | Reads the 64-bit MMIO register specified by Address. The 64-bit read value is\r | |
557 | returned. This function must guarantee that all MMIO read and write\r | |
558 | operations are serialized.\r | |
559 | \r | |
560 | If 64-bit MMIO register operations are not supported, then ASSERT().\r | |
561 | \r | |
562 | @param Address The MMIO register to read.\r | |
563 | \r | |
564 | @return The value read.\r | |
565 | \r | |
566 | **/\r | |
567 | UINT64\r | |
568 | EFIAPI\r | |
569 | MmioRead64 (\r | |
570 | IN UINTN Address\r | |
571 | )\r | |
572 | {\r | |
573 | //\r | |
574 | // Make sure Address is aligned on a 64-bit boundary.\r | |
575 | //\r | |
576 | ASSERT ((Address & 7) == 0);\r | |
577 | return (UINT64)MmioReadWorker (Address, EfiCpuIoWidthUint64);\r | |
578 | }\r | |
579 | \r | |
580 | /**\r | |
581 | Writes a 64-bit MMIO register.\r | |
582 | \r | |
583 | Writes the 64-bit MMIO register specified by Address with the value specified\r | |
584 | by Value and returns Value. This function must guarantee that all MMIO read\r | |
585 | and write operations are serialized.\r | |
586 | \r | |
587 | If 64-bit MMIO register operations are not supported, then ASSERT().\r | |
588 | \r | |
589 | @param Address The MMIO register to write.\r | |
590 | @param Value The value to write to the MMIO register.\r | |
591 | \r | |
592 | **/\r | |
593 | UINT64\r | |
594 | EFIAPI\r | |
595 | MmioWrite64 (\r | |
596 | IN UINTN Address,\r | |
597 | IN UINT64 Value\r | |
598 | )\r | |
599 | {\r | |
600 | //\r | |
601 | // Make sure Address is aligned on a 64-bit boundary.\r | |
602 | //\r | |
603 | ASSERT ((Address & 7) == 0);\r | |
604 | return (UINT64)MmioWriteWorker (Address, EfiCpuIoWidthUint64, Value);\r | |
605 | }\r |