| | 1 | /** @file\r |
| | 2 | I/O Library. The implementations are based on EFI_PEI_SERVICE->CpuIo interface.\r |
| | 3 | \r |
| | 4 | Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r |
| | 5 | Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>\r |
| | 6 | \r |
| | 7 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
| | 8 | \r |
| | 9 | **/\r |
| | 10 | \r |
| | 11 | #include <PiPei.h>\r |
| | 12 | \r |
| | 13 | #include <Library/IoLib.h>\r |
| | 14 | #include <Library/DebugLib.h>\r |
| | 15 | #include <Library/BaseLib.h>\r |
| | 16 | #include <Library/PeiServicesTablePointerLib.h>\r |
| | 17 | \r |
| | 18 | /**\r |
| | 19 | Reads registers in the EFI CPU I/O space.\r |
| | 20 | \r |
| | 21 | Reads the I/O port specified by Port with registers width specified by Width.\r |
| | 22 | The port is read Count times, and the read data is stored in the provided Buffer.\r |
| | 23 | \r |
| | 24 | This function must guarantee that all I/O read and write operations are serialized.\r |
| | 25 | If such operations are not supported, then ASSERT().\r |
| | 26 | \r |
| | 27 | @param Port The base address of the I/O operation.\r |
| | 28 | The caller is responsible for aligning the Address if required.\r |
| | 29 | @param Width The width of the I/O operation.\r |
| | 30 | @param Count The number of times to read I/O port.\r |
| | 31 | @param Buffer The buffer to store the read data into.\r |
| | 32 | \r |
| | 33 | **/\r |
| | 34 | VOID\r |
| | 35 | EFIAPI\r |
| | 36 | IoReadFifoWorker (\r |
| | 37 | IN UINTN Port,\r |
| | 38 | IN EFI_PEI_CPU_IO_PPI_WIDTH Width,\r |
| | 39 | IN UINTN Count,\r |
| | 40 | IN VOID *Buffer\r |
| | 41 | )\r |
| | 42 | {\r |
| | 43 | CONST EFI_PEI_SERVICES **PeiServices;\r |
| | 44 | EFI_PEI_CPU_IO_PPI *CpuIo;\r |
| | 45 | EFI_STATUS Status;\r |
| | 46 | \r |
| | 47 | PeiServices = GetPeiServicesTablePointer ();\r |
| | 48 | CpuIo = (*PeiServices)->CpuIo;\r |
| | 49 | ASSERT (CpuIo != NULL);\r |
| | 50 | \r |
| | 51 | Status = CpuIo->Io.Read (PeiServices, CpuIo, Width, Port, Count, Buffer);\r |
| | 52 | ASSERT_EFI_ERROR (Status);\r |
| | 53 | }\r |
| | 54 | \r |
| | 55 | /**\r |
| | 56 | Writes registers in the EFI CPU I/O space.\r |
| | 57 | \r |
| | 58 | Writes the I/O port specified by Port with registers width specified by Width.\r |
| | 59 | The port is written Count times, and the write data is retrieved from the provided Buffer.\r |
| | 60 | \r |
| | 61 | This function must guarantee that all I/O read and write operations are serialized.\r |
| | 62 | If such operations are not supported, then ASSERT().\r |
| | 63 | \r |
| | 64 | @param Port The base address of the I/O operation.\r |
| | 65 | The caller is responsible for aligning the Address if required.\r |
| | 66 | @param Width The width of the I/O operation.\r |
| | 67 | @param Count The number of times to write I/O port.\r |
| | 68 | @param Buffer The buffer to store the read data into.\r |
| | 69 | \r |
| | 70 | **/\r |
| | 71 | VOID\r |
| | 72 | EFIAPI\r |
| | 73 | IoWriteFifoWorker (\r |
| | 74 | IN UINTN Port,\r |
| | 75 | IN EFI_PEI_CPU_IO_PPI_WIDTH Width,\r |
| | 76 | IN UINTN Count,\r |
| | 77 | IN VOID *Buffer\r |
| | 78 | )\r |
| | 79 | {\r |
| | 80 | CONST EFI_PEI_SERVICES **PeiServices;\r |
| | 81 | EFI_PEI_CPU_IO_PPI *CpuIo;\r |
| | 82 | EFI_STATUS Status;\r |
| | 83 | \r |
| | 84 | PeiServices = GetPeiServicesTablePointer ();\r |
| | 85 | CpuIo = (*PeiServices)->CpuIo;\r |
| | 86 | ASSERT (CpuIo != NULL);\r |
| | 87 | \r |
| | 88 | Status = CpuIo->Io.Write (PeiServices, CpuIo, Width, Port, Count, Buffer);\r |
| | 89 | ASSERT_EFI_ERROR (Status);\r |
| | 90 | }\r |
| | 91 | \r |
| | 92 | /**\r |
| | 93 | Reads an 8-bit I/O port.\r |
| | 94 | \r |
| | 95 | Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.\r |
| | 96 | This function must guarantee that all I/O read and write operations are\r |
| | 97 | serialized.\r |
| | 98 | \r |
| | 99 | If 8-bit I/O port operations are not supported, then ASSERT().\r |
| | 100 | \r |
| | 101 | @param Port The I/O port to read.\r |
| | 102 | \r |
| | 103 | @return The value read.\r |
| | 104 | \r |
| | 105 | **/\r |
| | 106 | UINT8\r |
| | 107 | EFIAPI\r |
| | 108 | IoRead8 (\r |
| | 109 | IN UINTN Port\r |
| | 110 | )\r |
| | 111 | {\r |
| | 112 | CONST EFI_PEI_SERVICES **PeiServices;\r |
| | 113 | EFI_PEI_CPU_IO_PPI *CpuIo;\r |
| | 114 | \r |
| | 115 | PeiServices = GetPeiServicesTablePointer ();\r |
| | 116 | CpuIo = (*PeiServices)->CpuIo;\r |
| | 117 | ASSERT (CpuIo != NULL);\r |
| | 118 | \r |
| | 119 | return CpuIo->IoRead8 (PeiServices, CpuIo, (UINT64)Port);\r |
| | 120 | }\r |
| | 121 | \r |
| | 122 | /**\r |
| | 123 | Writes an 8-bit I/O port.\r |
| | 124 | \r |
| | 125 | Writes the 8-bit I/O port specified by Port with the value specified by Value\r |
| | 126 | and returns Value. This function must guarantee that all I/O read and write\r |
| | 127 | operations are serialized.\r |
| | 128 | \r |
| | 129 | If 8-bit I/O port operations are not supported, then ASSERT().\r |
| | 130 | \r |
| | 131 | @param Port The I/O port to write.\r |
| | 132 | @param Value The value to write to the I/O port.\r |
| | 133 | \r |
| | 134 | @return The value written the I/O port.\r |
| | 135 | \r |
| | 136 | **/\r |
| | 137 | UINT8\r |
| | 138 | EFIAPI\r |
| | 139 | IoWrite8 (\r |
| | 140 | IN UINTN Port,\r |
| | 141 | IN UINT8 Value\r |
| | 142 | )\r |
| | 143 | {\r |
| | 144 | CONST EFI_PEI_SERVICES **PeiServices;\r |
| | 145 | EFI_PEI_CPU_IO_PPI *CpuIo;\r |
| | 146 | \r |
| | 147 | PeiServices = GetPeiServicesTablePointer ();\r |
| | 148 | CpuIo = (*PeiServices)->CpuIo;\r |
| | 149 | ASSERT (CpuIo != NULL);\r |
| | 150 | \r |
| | 151 | CpuIo->IoWrite8 (PeiServices, CpuIo, (UINT64)Port, Value);\r |
| | 152 | return Value;\r |
| | 153 | }\r |
| | 154 | \r |
| | 155 | /**\r |
| | 156 | Reads a 16-bit I/O port.\r |
| | 157 | \r |
| | 158 | Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.\r |
| | 159 | This function must guarantee that all I/O read and write operations are\r |
| | 160 | serialized.\r |
| | 161 | \r |
| | 162 | If 16-bit I/O port operations are not supported, then ASSERT().\r |
| | 163 | If Port is not aligned on a 16-bit boundary, then ASSERT().\r |
| | 164 | \r |
| | 165 | @param Port The I/O port to read.\r |
| | 166 | \r |
| | 167 | @return The value read.\r |
| | 168 | \r |
| | 169 | **/\r |
| | 170 | UINT16\r |
| | 171 | EFIAPI\r |
| | 172 | IoRead16 (\r |
| | 173 | IN UINTN Port\r |
| | 174 | )\r |
| | 175 | {\r |
| | 176 | CONST EFI_PEI_SERVICES **PeiServices;\r |
| | 177 | EFI_PEI_CPU_IO_PPI *CpuIo;\r |
| | 178 | \r |
| | 179 | PeiServices = GetPeiServicesTablePointer ();\r |
| | 180 | CpuIo = (*PeiServices)->CpuIo;\r |
| | 181 | ASSERT (CpuIo != NULL);\r |
| | 182 | //\r |
| | 183 | // Make sure Port is aligned on a 16-bit boundary.\r |
| | 184 | //\r |
| | 185 | ASSERT ((Port & 1) == 0);\r |
| | 186 | return CpuIo->IoRead16 (PeiServices, CpuIo, (UINT64)Port);\r |
| | 187 | }\r |
| | 188 | \r |
| | 189 | /**\r |
| | 190 | Writes a 16-bit I/O port.\r |
| | 191 | \r |
| | 192 | Writes the 16-bit I/O port specified by Port with the value specified by Value\r |
| | 193 | and returns Value. This function must guarantee that all I/O read and write\r |
| | 194 | operations are serialized.\r |
| | 195 | \r |
| | 196 | If 16-bit I/O port operations are not supported, then ASSERT().\r |
| | 197 | If Port is not aligned on a 16-bit boundary, then ASSERT().\r |
| | 198 | \r |
| | 199 | @param Port The I/O port to write.\r |
| | 200 | @param Value The value to write to the I/O port.\r |
| | 201 | \r |
| | 202 | @return The value written the I/O port.\r |
| | 203 | \r |
| | 204 | **/\r |
| | 205 | UINT16\r |
| | 206 | EFIAPI\r |
| | 207 | IoWrite16 (\r |
| | 208 | IN UINTN Port,\r |
| | 209 | IN UINT16 Value\r |
| | 210 | )\r |
| | 211 | {\r |
| | 212 | CONST EFI_PEI_SERVICES **PeiServices;\r |
| | 213 | EFI_PEI_CPU_IO_PPI *CpuIo;\r |
| | 214 | \r |
| | 215 | PeiServices = GetPeiServicesTablePointer ();\r |
| | 216 | CpuIo = (*PeiServices)->CpuIo;\r |
| | 217 | ASSERT (CpuIo != NULL);\r |
| | 218 | //\r |
| | 219 | // Make sure Port is aligned on a 16-bit boundary.\r |
| | 220 | //\r |
| | 221 | ASSERT ((Port & 1) == 0);\r |
| | 222 | CpuIo->IoWrite16 (PeiServices, CpuIo, (UINT64)Port, Value);\r |
| | 223 | return Value;\r |
| | 224 | }\r |
| | 225 | \r |
| | 226 | /**\r |
| | 227 | Reads a 32-bit I/O port.\r |
| | 228 | \r |
| | 229 | Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.\r |
| | 230 | This function must guarantee that all I/O read and write operations are\r |
| | 231 | serialized.\r |
| | 232 | \r |
| | 233 | If 32-bit I/O port operations are not supported, then ASSERT().\r |
| | 234 | If Port is not aligned on a 32-bit boundary, then ASSERT().\r |
| | 235 | \r |
| | 236 | @param Port The I/O port to read.\r |
| | 237 | \r |
| | 238 | @return The value read.\r |
| | 239 | \r |
| | 240 | **/\r |
| | 241 | UINT32\r |
| | 242 | EFIAPI\r |
| | 243 | IoRead32 (\r |
| | 244 | IN UINTN Port\r |
| | 245 | )\r |
| | 246 | {\r |
| | 247 | CONST EFI_PEI_SERVICES **PeiServices;\r |
| | 248 | EFI_PEI_CPU_IO_PPI *CpuIo;\r |
| | 249 | \r |
| | 250 | PeiServices = GetPeiServicesTablePointer ();\r |
| | 251 | CpuIo = (*PeiServices)->CpuIo;\r |
| | 252 | ASSERT (CpuIo != NULL);\r |
| | 253 | //\r |
| | 254 | // Make sure Port is aligned on a 32-bit boundary.\r |
| | 255 | //\r |
| | 256 | ASSERT ((Port & 3) == 0);\r |
| | 257 | return CpuIo->IoRead32 (PeiServices, CpuIo, (UINT64)Port);\r |
| | 258 | }\r |
| | 259 | \r |
| | 260 | /**\r |
| | 261 | Writes a 32-bit I/O port.\r |
| | 262 | \r |
| | 263 | Writes the 32-bit I/O port specified by Port with the value specified by Value\r |
| | 264 | and returns Value. This function must guarantee that all I/O read and write\r |
| | 265 | operations are serialized.\r |
| | 266 | \r |
| | 267 | If 32-bit I/O port operations are not supported, then ASSERT().\r |
| | 268 | If Port is not aligned on a 32-bit boundary, then ASSERT().\r |
| | 269 | \r |
| | 270 | @param Port The I/O port to write.\r |
| | 271 | @param Value The value to write to the I/O port.\r |
| | 272 | \r |
| | 273 | @return The value written the I/O port.\r |
| | 274 | \r |
| | 275 | **/\r |
| | 276 | UINT32\r |
| | 277 | EFIAPI\r |
| | 278 | IoWrite32 (\r |
| | 279 | IN UINTN Port,\r |
| | 280 | IN UINT32 Value\r |
| | 281 | )\r |
| | 282 | {\r |
| | 283 | CONST EFI_PEI_SERVICES **PeiServices;\r |
| | 284 | EFI_PEI_CPU_IO_PPI *CpuIo;\r |
| | 285 | \r |
| | 286 | PeiServices = GetPeiServicesTablePointer ();\r |
| | 287 | CpuIo = (*PeiServices)->CpuIo;\r |
| | 288 | ASSERT (CpuIo != NULL);\r |
| | 289 | //\r |
| | 290 | // Make sure Port is aligned on a 32-bit boundary.\r |
| | 291 | //\r |
| | 292 | ASSERT ((Port & 3) == 0);\r |
| | 293 | CpuIo->IoWrite32 (PeiServices, CpuIo, (UINT64)Port, Value);\r |
| | 294 | return Value;\r |
| | 295 | }\r |
| | 296 | \r |
| | 297 | /**\r |
| | 298 | Reads a 64-bit I/O port.\r |
| | 299 | \r |
| | 300 | Reads the 64-bit I/O port specified by Port. The 64-bit read value is returned.\r |
| | 301 | This function must guarantee that all I/O read and write operations are\r |
| | 302 | serialized.\r |
| | 303 | \r |
| | 304 | If 64-bit I/O port operations are not supported, then ASSERT().\r |
| | 305 | If Port is not aligned on a 64-bit boundary, then ASSERT().\r |
| | 306 | \r |
| | 307 | @param Port The I/O port to read.\r |
| | 308 | \r |
| | 309 | @return The value read.\r |
| | 310 | \r |
| | 311 | **/\r |
| | 312 | UINT64\r |
| | 313 | EFIAPI\r |
| | 314 | IoRead64 (\r |
| | 315 | IN UINTN Port\r |
| | 316 | )\r |
| | 317 | {\r |
| | 318 | CONST EFI_PEI_SERVICES **PeiServices;\r |
| | 319 | EFI_PEI_CPU_IO_PPI *CpuIo;\r |
| | 320 | \r |
| | 321 | PeiServices = GetPeiServicesTablePointer ();\r |
| | 322 | CpuIo = (*PeiServices)->CpuIo;\r |
| | 323 | ASSERT (CpuIo != NULL);\r |
| | 324 | //\r |
| | 325 | // Make sure Port is aligned on a 64-bit boundary.\r |
| | 326 | //\r |
| | 327 | ASSERT ((Port & 7) == 0);\r |
| | 328 | return CpuIo->IoRead64 (PeiServices, CpuIo, (UINT64)Port);\r |
| | 329 | }\r |
| | 330 | \r |
| | 331 | /**\r |
| | 332 | Writes a 64-bit I/O port.\r |
| | 333 | \r |
| | 334 | Writes the 64-bit I/O port specified by Port with the value specified by Value\r |
| | 335 | and returns Value. This function must guarantee that all I/O read and write\r |
| | 336 | operations are serialized.\r |
| | 337 | \r |
| | 338 | If 64-bit I/O port operations are not supported, then ASSERT().\r |
| | 339 | If Port is not aligned on a 64-bit boundary, then ASSERT().\r |
| | 340 | \r |
| | 341 | @param Port The I/O port to write.\r |
| | 342 | @param Value The value to write to the I/O port.\r |
| | 343 | \r |
| | 344 | @return The value written the I/O port.\r |
| | 345 | \r |
| | 346 | **/\r |
| | 347 | UINT64\r |
| | 348 | EFIAPI\r |
| | 349 | IoWrite64 (\r |
| | 350 | IN UINTN Port,\r |
| | 351 | IN UINT64 Value\r |
| | 352 | )\r |
| | 353 | {\r |
| | 354 | CONST EFI_PEI_SERVICES **PeiServices;\r |
| | 355 | EFI_PEI_CPU_IO_PPI *CpuIo;\r |
| | 356 | \r |
| | 357 | PeiServices = GetPeiServicesTablePointer ();\r |
| | 358 | CpuIo = (*PeiServices)->CpuIo;\r |
| | 359 | ASSERT (CpuIo != NULL);\r |
| | 360 | //\r |
| | 361 | // Make sure Port is aligned on a 64-bit boundary.\r |
| | 362 | //\r |
| | 363 | ASSERT ((Port & 7) == 0);\r |
| | 364 | CpuIo->IoWrite64 (PeiServices, CpuIo, (UINT64)Port, Value);\r |
| | 365 | return Value;\r |
| | 366 | }\r |
| | 367 | \r |
| | 368 | /**\r |
| | 369 | Reads an 8-bit I/O port fifo into a block of memory.\r |
| | 370 | \r |
| | 371 | Reads the 8-bit I/O fifo port specified by Port.\r |
| | 372 | The port is read Count times, and the read data is\r |
| | 373 | stored in the provided Buffer.\r |
| | 374 | \r |
| | 375 | This function must guarantee that all I/O read and write operations are\r |
| | 376 | serialized.\r |
| | 377 | \r |
| | 378 | If 8-bit I/O port operations are not supported, then ASSERT().\r |
| | 379 | \r |
| | 380 | @param Port The I/O port to read.\r |
| | 381 | @param Count The number of times to read I/O port.\r |
| | 382 | @param Buffer The buffer to store the read data into.\r |
| | 383 | \r |
| | 384 | **/\r |
| | 385 | VOID\r |
| | 386 | EFIAPI\r |
| | 387 | IoReadFifo8 (\r |
| | 388 | IN UINTN Port,\r |
| | 389 | IN UINTN Count,\r |
| | 390 | OUT VOID *Buffer\r |
| | 391 | )\r |
| | 392 | {\r |
| | 393 | IoReadFifoWorker (Port, EfiPeiCpuIoWidthFifoUint8, Count, Buffer);\r |
| | 394 | }\r |
| | 395 | \r |
| | 396 | /**\r |
| | 397 | Writes a block of memory into an 8-bit I/O port fifo.\r |
| | 398 | \r |
| | 399 | Writes the 8-bit I/O fifo port specified by Port.\r |
| | 400 | The port is written Count times, and the write data is\r |
| | 401 | retrieved from the provided Buffer.\r |
| | 402 | \r |
| | 403 | This function must guarantee that all I/O write and write operations are\r |
| | 404 | serialized.\r |
| | 405 | \r |
| | 406 | If 8-bit I/O port operations are not supported, then ASSERT().\r |
| | 407 | \r |
| | 408 | @param Port The I/O port to write.\r |
| | 409 | @param Count The number of times to write I/O port.\r |
| | 410 | @param Buffer The buffer to retrieve the write data from.\r |
| | 411 | \r |
| | 412 | **/\r |
| | 413 | VOID\r |
| | 414 | EFIAPI\r |
| | 415 | IoWriteFifo8 (\r |
| | 416 | IN UINTN Port,\r |
| | 417 | IN UINTN Count,\r |
| | 418 | IN VOID *Buffer\r |
| | 419 | )\r |
| | 420 | {\r |
| | 421 | IoWriteFifoWorker (Port, EfiPeiCpuIoWidthFifoUint8, Count, Buffer);\r |
| | 422 | }\r |
| | 423 | \r |
| | 424 | /**\r |
| | 425 | Reads a 16-bit I/O port fifo into a block of memory.\r |
| | 426 | \r |
| | 427 | Reads the 16-bit I/O fifo port specified by Port.\r |
| | 428 | The port is read Count times, and the read data is\r |
| | 429 | stored in the provided Buffer.\r |
| | 430 | \r |
| | 431 | This function must guarantee that all I/O read and write operations are\r |
| | 432 | serialized.\r |
| | 433 | \r |
| | 434 | If 16-bit I/O port operations are not supported, then ASSERT().\r |
| | 435 | \r |
| | 436 | @param Port The I/O port to read.\r |
| | 437 | @param Count The number of times to read I/O port.\r |
| | 438 | @param Buffer The buffer to store the read data into.\r |
| | 439 | \r |
| | 440 | **/\r |
| | 441 | VOID\r |
| | 442 | EFIAPI\r |
| | 443 | IoReadFifo16 (\r |
| | 444 | IN UINTN Port,\r |
| | 445 | IN UINTN Count,\r |
| | 446 | OUT VOID *Buffer\r |
| | 447 | )\r |
| | 448 | {\r |
| | 449 | //\r |
| | 450 | // Make sure Port is aligned on a 16-bit boundary.\r |
| | 451 | //\r |
| | 452 | ASSERT ((Port & 1) == 0);\r |
| | 453 | IoReadFifoWorker (Port, EfiPeiCpuIoWidthFifoUint16, Count, Buffer);\r |
| | 454 | }\r |
| | 455 | \r |
| | 456 | /**\r |
| | 457 | Writes a block of memory into a 16-bit I/O port fifo.\r |
| | 458 | \r |
| | 459 | Writes the 16-bit I/O fifo port specified by Port.\r |
| | 460 | The port is written Count times, and the write data is\r |
| | 461 | retrieved from the provided Buffer.\r |
| | 462 | \r |
| | 463 | This function must guarantee that all I/O write and write operations are\r |
| | 464 | serialized.\r |
| | 465 | \r |
| | 466 | If 16-bit I/O port operations are not supported, then ASSERT().\r |
| | 467 | \r |
| | 468 | @param Port The I/O port to write.\r |
| | 469 | @param Count The number of times to write I/O port.\r |
| | 470 | @param Buffer The buffer to retrieve the write data from.\r |
| | 471 | \r |
| | 472 | **/\r |
| | 473 | VOID\r |
| | 474 | EFIAPI\r |
| | 475 | IoWriteFifo16 (\r |
| | 476 | IN UINTN Port,\r |
| | 477 | IN UINTN Count,\r |
| | 478 | IN VOID *Buffer\r |
| | 479 | )\r |
| | 480 | {\r |
| | 481 | //\r |
| | 482 | // Make sure Port is aligned on a 16-bit boundary.\r |
| | 483 | //\r |
| | 484 | ASSERT ((Port & 1) == 0);\r |
| | 485 | IoWriteFifoWorker (Port, EfiPeiCpuIoWidthFifoUint16, Count, Buffer);\r |
| | 486 | }\r |
| | 487 | \r |
| | 488 | /**\r |
| | 489 | Reads a 32-bit I/O port fifo into a block of memory.\r |
| | 490 | \r |
| | 491 | Reads the 32-bit I/O fifo port specified by Port.\r |
| | 492 | The port is read Count times, and the read data is\r |
| | 493 | stored in the provided Buffer.\r |
| | 494 | \r |
| | 495 | This function must guarantee that all I/O read and write operations are\r |
| | 496 | serialized.\r |
| | 497 | \r |
| | 498 | If 32-bit I/O port operations are not supported, then ASSERT().\r |
| | 499 | \r |
| | 500 | @param Port The I/O port to read.\r |
| | 501 | @param Count The number of times to read I/O port.\r |
| | 502 | @param Buffer The buffer to store the read data into.\r |
| | 503 | \r |
| | 504 | **/\r |
| | 505 | VOID\r |
| | 506 | EFIAPI\r |
| | 507 | IoReadFifo32 (\r |
| | 508 | IN UINTN Port,\r |
| | 509 | IN UINTN Count,\r |
| | 510 | OUT VOID *Buffer\r |
| | 511 | )\r |
| | 512 | {\r |
| | 513 | //\r |
| | 514 | // Make sure Port is aligned on a 32-bit boundary.\r |
| | 515 | //\r |
| | 516 | ASSERT ((Port & 3) == 0);\r |
| | 517 | IoReadFifoWorker (Port, EfiPeiCpuIoWidthFifoUint32, Count, Buffer);\r |
| | 518 | }\r |
| | 519 | \r |
| | 520 | /**\r |
| | 521 | Writes a block of memory into a 32-bit I/O port fifo.\r |
| | 522 | \r |
| | 523 | Writes the 32-bit I/O fifo port specified by Port.\r |
| | 524 | The port is written Count times, and the write data is\r |
| | 525 | retrieved from the provided Buffer.\r |
| | 526 | \r |
| | 527 | This function must guarantee that all I/O write and write operations are\r |
| | 528 | serialized.\r |
| | 529 | \r |
| | 530 | If 32-bit I/O port operations are not supported, then ASSERT().\r |
| | 531 | \r |
| | 532 | @param Port The I/O port to write.\r |
| | 533 | @param Count The number of times to write I/O port.\r |
| | 534 | @param Buffer The buffer to retrieve the write data from.\r |
| | 535 | \r |
| | 536 | **/\r |
| | 537 | VOID\r |
| | 538 | EFIAPI\r |
| | 539 | IoWriteFifo32 (\r |
| | 540 | IN UINTN Port,\r |
| | 541 | IN UINTN Count,\r |
| | 542 | IN VOID *Buffer\r |
| | 543 | )\r |
| | 544 | {\r |
| | 545 | //\r |
| | 546 | // Make sure Port is aligned on a 32-bit boundary.\r |
| | 547 | //\r |
| | 548 | ASSERT ((Port & 3) == 0);\r |
| | 549 | IoWriteFifoWorker (Port, EfiPeiCpuIoWidthFifoUint32, Count, Buffer);\r |
| | 550 | }\r |
| | 551 | \r |
| | 552 | /**\r |
| | 553 | Reads an 8-bit MMIO register.\r |
| | 554 | \r |
| | 555 | Reads the 8-bit MMIO register specified by Address. The 8-bit read value is\r |
| | 556 | returned. This function must guarantee that all MMIO read and write\r |
| | 557 | operations are serialized.\r |
| | 558 | \r |
| | 559 | If 8-bit MMIO register operations are not supported, then ASSERT().\r |
| | 560 | \r |
| | 561 | @param Address The MMIO register to read.\r |
| | 562 | \r |
| | 563 | @return The value read.\r |
| | 564 | \r |
| | 565 | **/\r |
| | 566 | UINT8\r |
| | 567 | EFIAPI\r |
| | 568 | MmioRead8 (\r |
| | 569 | IN UINTN Address\r |
| | 570 | )\r |
| | 571 | {\r |
| | 572 | CONST EFI_PEI_SERVICES **PeiServices;\r |
| | 573 | EFI_PEI_CPU_IO_PPI *CpuIo;\r |
| | 574 | \r |
| | 575 | PeiServices = GetPeiServicesTablePointer ();\r |
| | 576 | CpuIo = (*PeiServices)->CpuIo;\r |
| | 577 | ASSERT (CpuIo != NULL);\r |
| | 578 | \r |
| | 579 | return CpuIo->MemRead8 (PeiServices, CpuIo, (UINT64)Address);\r |
| | 580 | }\r |
| | 581 | \r |
| | 582 | /**\r |
| | 583 | Writes an 8-bit MMIO register.\r |
| | 584 | \r |
| | 585 | Writes the 8-bit MMIO register specified by Address with the value specified\r |
| | 586 | by Value and returns Value. This function must guarantee that all MMIO read\r |
| | 587 | and write operations are serialized.\r |
| | 588 | \r |
| | 589 | If 8-bit MMIO register operations are not supported, then ASSERT().\r |
| | 590 | \r |
| | 591 | @param Address The MMIO register to write.\r |
| | 592 | @param Value The value to write to the MMIO register.\r |
| | 593 | \r |
| | 594 | @return Value.\r |
| | 595 | \r |
| | 596 | **/\r |
| | 597 | UINT8\r |
| | 598 | EFIAPI\r |
| | 599 | MmioWrite8 (\r |
| | 600 | IN UINTN Address,\r |
| | 601 | IN UINT8 Value\r |
| | 602 | )\r |
| | 603 | {\r |
| | 604 | CONST EFI_PEI_SERVICES **PeiServices;\r |
| | 605 | EFI_PEI_CPU_IO_PPI *CpuIo;\r |
| | 606 | \r |
| | 607 | PeiServices = GetPeiServicesTablePointer ();\r |
| | 608 | CpuIo = (*PeiServices)->CpuIo;\r |
| | 609 | ASSERT (CpuIo != NULL);\r |
| | 610 | \r |
| | 611 | CpuIo->MemWrite8 (PeiServices, CpuIo, (UINT64)Address, Value);\r |
| | 612 | return Value;\r |
| | 613 | }\r |
| | 614 | \r |
| | 615 | /**\r |
| | 616 | Reads a 16-bit MMIO register.\r |
| | 617 | \r |
| | 618 | Reads the 16-bit MMIO register specified by Address. The 16-bit read value is\r |
| | 619 | returned. This function must guarantee that all MMIO read and write\r |
| | 620 | operations are serialized.\r |
| | 621 | \r |
| | 622 | If 16-bit MMIO register operations are not supported, then ASSERT().\r |
| | 623 | If Address is not aligned on a 16-bit boundary, then ASSERT().\r |
| | 624 | \r |
| | 625 | @param Address The MMIO register to read.\r |
| | 626 | \r |
| | 627 | @return The value read.\r |
| | 628 | \r |
| | 629 | **/\r |
| | 630 | UINT16\r |
| | 631 | EFIAPI\r |
| | 632 | MmioRead16 (\r |
| | 633 | IN UINTN Address\r |
| | 634 | )\r |
| | 635 | {\r |
| | 636 | CONST EFI_PEI_SERVICES **PeiServices;\r |
| | 637 | EFI_PEI_CPU_IO_PPI *CpuIo;\r |
| | 638 | \r |
| | 639 | PeiServices = GetPeiServicesTablePointer ();\r |
| | 640 | CpuIo = (*PeiServices)->CpuIo;\r |
| | 641 | ASSERT (CpuIo != NULL);\r |
| | 642 | //\r |
| | 643 | // Make sure Address is aligned on a 16-bit boundary.\r |
| | 644 | //\r |
| | 645 | ASSERT ((Address & 1) == 0);\r |
| | 646 | return CpuIo->MemRead16 (PeiServices, CpuIo, (UINT64)Address);\r |
| | 647 | }\r |
| | 648 | \r |
| | 649 | /**\r |
| | 650 | Writes a 16-bit MMIO register.\r |
| | 651 | \r |
| | 652 | Writes the 16-bit MMIO register specified by Address with the value specified\r |
| | 653 | by Value and returns Value. This function must guarantee that all MMIO read\r |
| | 654 | and write operations are serialized.\r |
| | 655 | \r |
| | 656 | If 16-bit MMIO register operations are not supported, then ASSERT().\r |
| | 657 | If Address is not aligned on a 16-bit boundary, then ASSERT().\r |
| | 658 | \r |
| | 659 | @param Address The MMIO register to write.\r |
| | 660 | @param Value The value to write to the MMIO register.\r |
| | 661 | \r |
| | 662 | @return Value.\r |
| | 663 | \r |
| | 664 | **/\r |
| | 665 | UINT16\r |
| | 666 | EFIAPI\r |
| | 667 | MmioWrite16 (\r |
| | 668 | IN UINTN Address,\r |
| | 669 | IN UINT16 Value\r |
| | 670 | )\r |
| | 671 | {\r |
| | 672 | CONST EFI_PEI_SERVICES **PeiServices;\r |
| | 673 | EFI_PEI_CPU_IO_PPI *CpuIo;\r |
| | 674 | \r |
| | 675 | PeiServices = GetPeiServicesTablePointer ();\r |
| | 676 | CpuIo = (*PeiServices)->CpuIo;\r |
| | 677 | ASSERT (CpuIo != NULL);\r |
| | 678 | //\r |
| | 679 | // Make sure Address is aligned on a 16-bit boundary.\r |
| | 680 | //\r |
| | 681 | ASSERT ((Address & 1) == 0);\r |
| | 682 | CpuIo->MemWrite16 (PeiServices, CpuIo, (UINT64)Address, Value);\r |
| | 683 | return Value;\r |
| | 684 | }\r |
| | 685 | \r |
| | 686 | /**\r |
| | 687 | Reads a 32-bit MMIO register.\r |
| | 688 | \r |
| | 689 | Reads the 32-bit MMIO register specified by Address. The 32-bit read value is\r |
| | 690 | returned. This function must guarantee that all MMIO read and write\r |
| | 691 | operations are serialized.\r |
| | 692 | \r |
| | 693 | If 32-bit MMIO register operations are not supported, then ASSERT().\r |
| | 694 | If Address is not aligned on a 32-bit boundary, then ASSERT().\r |
| | 695 | \r |
| | 696 | @param Address The MMIO register to read.\r |
| | 697 | \r |
| | 698 | @return The value read.\r |
| | 699 | \r |
| | 700 | **/\r |
| | 701 | UINT32\r |
| | 702 | EFIAPI\r |
| | 703 | MmioRead32 (\r |
| | 704 | IN UINTN Address\r |
| | 705 | )\r |
| | 706 | {\r |
| | 707 | CONST EFI_PEI_SERVICES **PeiServices;\r |
| | 708 | EFI_PEI_CPU_IO_PPI *CpuIo;\r |
| | 709 | \r |
| | 710 | PeiServices = GetPeiServicesTablePointer ();\r |
| | 711 | CpuIo = (*PeiServices)->CpuIo;\r |
| | 712 | ASSERT (CpuIo != NULL);\r |
| | 713 | //\r |
| | 714 | // Make sure Address is aligned on a 32-bit boundary.\r |
| | 715 | //\r |
| | 716 | ASSERT ((Address & 3) == 0);\r |
| | 717 | return CpuIo->MemRead32 (PeiServices, CpuIo, (UINT64)Address);\r |
| | 718 | }\r |
| | 719 | \r |
| | 720 | /**\r |
| | 721 | Writes a 32-bit MMIO register.\r |
| | 722 | \r |
| | 723 | Writes the 32-bit MMIO register specified by Address with the value specified\r |
| | 724 | by Value and returns Value. This function must guarantee that all MMIO read\r |
| | 725 | and write operations are serialized.\r |
| | 726 | \r |
| | 727 | If 32-bit MMIO register operations are not supported, then ASSERT().\r |
| | 728 | If Address is not aligned on a 32-bit boundary, then ASSERT().\r |
| | 729 | \r |
| | 730 | @param Address The MMIO register to write.\r |
| | 731 | @param Value The value to write to the MMIO register.\r |
| | 732 | \r |
| | 733 | @return Value.\r |
| | 734 | \r |
| | 735 | **/\r |
| | 736 | UINT32\r |
| | 737 | EFIAPI\r |
| | 738 | MmioWrite32 (\r |
| | 739 | IN UINTN Address,\r |
| | 740 | IN UINT32 Value\r |
| | 741 | )\r |
| | 742 | {\r |
| | 743 | CONST EFI_PEI_SERVICES **PeiServices;\r |
| | 744 | EFI_PEI_CPU_IO_PPI *CpuIo;\r |
| | 745 | \r |
| | 746 | PeiServices = GetPeiServicesTablePointer ();\r |
| | 747 | CpuIo = (*PeiServices)->CpuIo;\r |
| | 748 | ASSERT (CpuIo != NULL);\r |
| | 749 | //\r |
| | 750 | // Make sure Address is aligned on a 32-bit boundary.\r |
| | 751 | //\r |
| | 752 | ASSERT ((Address & 3) == 0);\r |
| | 753 | CpuIo->MemWrite32 (PeiServices, CpuIo, (UINT64)Address, Value);\r |
| | 754 | return Value;\r |
| | 755 | }\r |
| | 756 | \r |
| | 757 | /**\r |
| | 758 | Reads a 64-bit MMIO register.\r |
| | 759 | \r |
| | 760 | Reads the 64-bit MMIO register specified by Address. The 64-bit read value is\r |
| | 761 | returned. This function must guarantee that all MMIO read and write\r |
| | 762 | operations are serialized.\r |
| | 763 | \r |
| | 764 | If 64-bit MMIO register operations are not supported, then ASSERT().\r |
| | 765 | If Address is not aligned on a 64-bit boundary, then ASSERT().\r |
| | 766 | \r |
| | 767 | @param Address The MMIO register to read.\r |
| | 768 | \r |
| | 769 | @return The value read.\r |
| | 770 | \r |
| | 771 | **/\r |
| | 772 | UINT64\r |
| | 773 | EFIAPI\r |
| | 774 | MmioRead64 (\r |
| | 775 | IN UINTN Address\r |
| | 776 | )\r |
| | 777 | {\r |
| | 778 | CONST EFI_PEI_SERVICES **PeiServices;\r |
| | 779 | EFI_PEI_CPU_IO_PPI *CpuIo;\r |
| | 780 | \r |
| | 781 | PeiServices = GetPeiServicesTablePointer ();\r |
| | 782 | CpuIo = (*PeiServices)->CpuIo;\r |
| | 783 | ASSERT (CpuIo != NULL);\r |
| | 784 | //\r |
| | 785 | // Make sure Address is aligned on a 64-bit boundary.\r |
| | 786 | //\r |
| | 787 | ASSERT ((Address & (sizeof (UINT64) - 1)) == 0);\r |
| | 788 | return CpuIo->MemRead64 (PeiServices, CpuIo, (UINT64)Address);\r |
| | 789 | }\r |
| | 790 | \r |
| | 791 | /**\r |
| | 792 | Writes a 64-bit MMIO register.\r |
| | 793 | \r |
| | 794 | Writes the 64-bit MMIO register specified by Address with the value specified\r |
| | 795 | by Value and returns Value. This function must guarantee that all MMIO read\r |
| | 796 | and write operations are serialized.\r |
| | 797 | \r |
| | 798 | If 64-bit MMIO register operations are not supported, then ASSERT().\r |
| | 799 | If Address is not aligned on a 64-bit boundary, then ASSERT().\r |
| | 800 | \r |
| | 801 | @param Address The MMIO register to write.\r |
| | 802 | @param Value The value to write to the MMIO register.\r |
| | 803 | \r |
| | 804 | **/\r |
| | 805 | UINT64\r |
| | 806 | EFIAPI\r |
| | 807 | MmioWrite64 (\r |
| | 808 | IN UINTN Address,\r |
| | 809 | IN UINT64 Value\r |
| | 810 | )\r |
| | 811 | {\r |
| | 812 | CONST EFI_PEI_SERVICES **PeiServices;\r |
| | 813 | EFI_PEI_CPU_IO_PPI *CpuIo;\r |
| | 814 | \r |
| | 815 | PeiServices = GetPeiServicesTablePointer ();\r |
| | 816 | CpuIo = (*PeiServices)->CpuIo;\r |
| | 817 | ASSERT (CpuIo != NULL);\r |
| | 818 | //\r |
| | 819 | // Make sure Address is aligned on a 64-bit boundary.\r |
| | 820 | //\r |
| | 821 | ASSERT ((Address & 7) == 0);\r |
| | 822 | CpuIo->MemWrite64 (PeiServices, CpuIo, (UINT64)Address, Value);\r |
| | 823 | return Value;\r |
| | 824 | }\r |
projects / mirror_edk2.git / blame_incremental