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1 | /** @file\r | |
2 | I/O Library.\r | |
3 | \r | |
4 | Copyright (c) 2006, Intel Corporation<BR>\r | |
5 | All rights reserved. This program and the accompanying materials\r | |
6 | are licensed and made available under the terms and conditions of the BSD License\r | |
7 | which accompanies this distribution. The full text of the license may be found at\r | |
8 | http://opensource.org/licenses/bsd-license.php\r | |
9 | \r | |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
12 | \r | |
13 | Module Name: IoLib.c\r | |
14 | \r | |
15 | **/\r | |
16 | \r | |
17 | #include "DxeCpuIoLibInternal.h"\r | |
18 | \r | |
19 | //\r | |
20 | // Globle varible to cache pointer to CpuIo protocol.\r | |
21 | //\r | |
22 | STATIC EFI_CPU_IO_PROTOCOL *mCpuIo = NULL;\r | |
23 | \r | |
24 | /**\r | |
25 | The constructor function caches the pointer to CpuIo protocol.\r | |
26 | \r | |
27 | The constructor function locates CpuIo protocol from protocol database.\r | |
28 | It will ASSERT() if that operation fails and it will always return EFI_SUCCESS.\r | |
29 | \r | |
30 | @param ImageHandle The firmware allocated handle for the EFI image.\r | |
31 | @param SystemTable A pointer to the EFI System Table.\r | |
32 | \r | |
33 | @retval EFI_SUCCESS The constructor always returns EFI_SUCCESS.\r | |
34 | \r | |
35 | **/\r | |
36 | EFI_STATUS\r | |
37 | EFIAPI\r | |
38 | IoLibConstructor (\r | |
39 | IN EFI_HANDLE ImageHandle,\r | |
40 | IN EFI_SYSTEM_TABLE *SystemTable\r | |
41 | )\r | |
42 | {\r | |
43 | EFI_STATUS Status;\r | |
44 | \r | |
45 | Status = gBS->LocateProtocol (&gEfiCpuIoProtocolGuid, NULL, (VOID**) &mCpuIo);\r | |
46 | ASSERT_EFI_ERROR (Status);\r | |
47 | \r | |
48 | return Status;\r | |
49 | }\r | |
50 | \r | |
51 | /**\r | |
52 | Reads registers in the EFI CPU I/O space.\r | |
53 | \r | |
54 | Reads the I/O port specified by Port with registers width specified by Width.\r | |
55 | The read value is returned. If such operations are not supported, then ASSERT().\r | |
56 | This function must guarantee that all I/O read and write operations are serialized.\r | |
57 | \r | |
58 | @param Port The base address of the I/O operation.\r | |
59 | The caller is responsible for aligning the Address if required.\r | |
60 | @param Width The width of the I/O operation.\r | |
61 | \r | |
62 | @return Data read from registers in the EFI CPU I/O space.\r | |
63 | \r | |
64 | **/\r | |
65 | UINT64\r | |
66 | EFIAPI\r | |
67 | IoReadWorker (\r | |
68 | IN UINTN Port,\r | |
69 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width\r | |
70 | )\r | |
71 | {\r | |
72 | EFI_STATUS Status;\r | |
73 | UINT64 Data;\r | |
74 | \r | |
75 | Status = mCpuIo->Io.Read (mCpuIo, Width, Port, 1, &Data);\r | |
76 | ASSERT_EFI_ERROR (Status);\r | |
77 | \r | |
78 | return Data;\r | |
79 | }\r | |
80 | \r | |
81 | /**\r | |
82 | Writes registers in the EFI CPU I/O space.\r | |
83 | \r | |
84 | Writes the I/O port specified by Port with registers width and value specified by Width\r | |
85 | and Data respectively. Data is returned. If such operations are not supported, then ASSERT().\r | |
86 | This function must guarantee that all I/O read and write operations are serialized.\r | |
87 | \r | |
88 | @param Port The base address of the I/O operation.\r | |
89 | The caller is responsible for aligning the Address if required.\r | |
90 | @param Width The width of the I/O operation.\r | |
91 | @param Data The value to write to the I/O port.\r | |
92 | \r | |
93 | @return The paramter of Data.\r | |
94 | \r | |
95 | **/\r | |
96 | UINT64\r | |
97 | EFIAPI\r | |
98 | IoWriteWorker (\r | |
99 | IN UINTN Port,\r | |
100 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r | |
101 | IN UINT64 Data\r | |
102 | )\r | |
103 | {\r | |
104 | EFI_STATUS Status;\r | |
105 | \r | |
106 | Status = mCpuIo->Io.Write (mCpuIo, Width, Port, 1, &Data);\r | |
107 | ASSERT_EFI_ERROR (Status);\r | |
108 | \r | |
109 | return Data;\r | |
110 | }\r | |
111 | \r | |
112 | /**\r | |
113 | Reads memory-mapped registers in the EFI system memory space.\r | |
114 | \r | |
115 | Reads the MMIO registers specified by Address with registers width specified by Width.\r | |
116 | The read value is returned. If such operations are not supported, then ASSERT().\r | |
117 | This function must guarantee that all MMIO read and write operations are serialized.\r | |
118 | \r | |
119 | @param Address The MMIO register to read.\r | |
120 | The caller is responsible for aligning the Address if required.\r | |
121 | @param Width The width of the I/O operation.\r | |
122 | \r | |
123 | @return Data read from registers in the EFI system memory space.\r | |
124 | \r | |
125 | **/\r | |
126 | UINT64\r | |
127 | EFIAPI\r | |
128 | MmioReadWorker (\r | |
129 | IN UINTN Address,\r | |
130 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width\r | |
131 | )\r | |
132 | {\r | |
133 | EFI_STATUS Status;\r | |
134 | UINT64 Data;\r | |
135 | \r | |
136 | Status = mCpuIo->Mem.Read (mCpuIo, Width, Address, 1, &Data);\r | |
137 | ASSERT_EFI_ERROR (Status);\r | |
138 | \r | |
139 | return Data;\r | |
140 | }\r | |
141 | \r | |
142 | /**\r | |
143 | Writes memory-mapped registers in the EFI system memory space.\r | |
144 | \r | |
145 | Writes the MMIO registers specified by Address with registers width and value specified by Width\r | |
146 | and Data respectively. Data is returned. If such operations are not supported, then ASSERT().\r | |
147 | This function must guarantee that all MMIO read and write operations are serialized.\r | |
148 | \r | |
149 | @param Address The MMIO register to read.\r | |
150 | The caller is responsible for aligning the Address if required.\r | |
151 | @param Width The width of the I/O operation.\r | |
152 | \r | |
153 | @return Data read from registers in the EFI system memory space.\r | |
154 | \r | |
155 | **/\r | |
156 | UINT64\r | |
157 | EFIAPI\r | |
158 | MmioWriteWorker (\r | |
159 | IN UINTN Address,\r | |
160 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r | |
161 | IN UINT64 Data\r | |
162 | )\r | |
163 | {\r | |
164 | EFI_STATUS Status;\r | |
165 | \r | |
166 | Status = mCpuIo->Mem.Write (mCpuIo, Width, Address, 1, &Data);\r | |
167 | ASSERT_EFI_ERROR (Status);\r | |
168 | \r | |
169 | return Data;\r | |
170 | }\r | |
171 | \r | |
172 | /**\r | |
173 | Reads an 8-bit I/O port.\r | |
174 | \r | |
175 | Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.\r | |
176 | This function must guarantee that all I/O read and write operations are\r | |
177 | serialized.\r | |
178 | \r | |
179 | If 8-bit I/O port operations are not supported, then ASSERT().\r | |
180 | \r | |
181 | @param Port The I/O port to read.\r | |
182 | \r | |
183 | @return The value read.\r | |
184 | \r | |
185 | **/\r | |
186 | UINT8\r | |
187 | EFIAPI\r | |
188 | IoRead8 (\r | |
189 | IN UINTN Port\r | |
190 | )\r | |
191 | {\r | |
192 | return (UINT8)IoReadWorker (Port, EfiCpuIoWidthUint8);\r | |
193 | }\r | |
194 | \r | |
195 | /**\r | |
196 | Writes an 8-bit I/O port.\r | |
197 | \r | |
198 | Writes the 8-bit I/O port specified by Port with the value specified by Value\r | |
199 | and returns Value. This function must guarantee that all I/O read and write\r | |
200 | operations are serialized.\r | |
201 | \r | |
202 | If 8-bit I/O port operations are not supported, then ASSERT().\r | |
203 | \r | |
204 | @param Port The I/O port to write.\r | |
205 | @param Value The value to write to the I/O port.\r | |
206 | \r | |
207 | @return The value written the I/O port.\r | |
208 | \r | |
209 | **/\r | |
210 | UINT8\r | |
211 | EFIAPI\r | |
212 | IoWrite8 (\r | |
213 | IN UINTN Port,\r | |
214 | IN UINT8 Value\r | |
215 | )\r | |
216 | {\r | |
217 | return (UINT8)IoWriteWorker (Port, EfiCpuIoWidthUint8, Value);\r | |
218 | }\r | |
219 | \r | |
220 | /**\r | |
221 | Reads a 16-bit I/O port.\r | |
222 | \r | |
223 | Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.\r | |
224 | This function must guarantee that all I/O read and write operations are\r | |
225 | serialized.\r | |
226 | \r | |
227 | If 16-bit I/O port operations are not supported, then ASSERT().\r | |
228 | \r | |
229 | @param Port The I/O port to read.\r | |
230 | \r | |
231 | @return The value read.\r | |
232 | \r | |
233 | **/\r | |
234 | UINT16\r | |
235 | EFIAPI\r | |
236 | IoRead16 (\r | |
237 | IN UINTN Port\r | |
238 | )\r | |
239 | {\r | |
240 | //\r | |
241 | // Make sure Port is aligned on a 16-bit boundary.\r | |
242 | //\r | |
243 | ASSERT ((Port & 1) == 0);\r | |
244 | return (UINT16)IoReadWorker (Port, EfiCpuIoWidthUint16);\r | |
245 | }\r | |
246 | \r | |
247 | /**\r | |
248 | Writes a 16-bit I/O port.\r | |
249 | \r | |
250 | Writes the 16-bit I/O port specified by Port with the value specified by Value\r | |
251 | and returns Value. This function must guarantee that all I/O read and write\r | |
252 | operations are serialized.\r | |
253 | \r | |
254 | If 16-bit I/O port operations are not supported, then ASSERT().\r | |
255 | \r | |
256 | @param Port The I/O port to write.\r | |
257 | @param Value The value to write to the I/O port.\r | |
258 | \r | |
259 | @return The value written the I/O port.\r | |
260 | \r | |
261 | **/\r | |
262 | UINT16\r | |
263 | EFIAPI\r | |
264 | IoWrite16 (\r | |
265 | IN UINTN Port,\r | |
266 | IN UINT16 Value\r | |
267 | )\r | |
268 | {\r | |
269 | //\r | |
270 | // Make sure Port is aligned on a 16-bit boundary.\r | |
271 | //\r | |
272 | ASSERT ((Port & 1) == 0);\r | |
273 | return (UINT16)IoWriteWorker (Port, EfiCpuIoWidthUint16, Value);\r | |
274 | }\r | |
275 | \r | |
276 | /**\r | |
277 | Reads a 32-bit I/O port.\r | |
278 | \r | |
279 | Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.\r | |
280 | This function must guarantee that all I/O read and write operations are\r | |
281 | serialized.\r | |
282 | \r | |
283 | If 32-bit I/O port operations are not supported, then ASSERT().\r | |
284 | \r | |
285 | @param Port The I/O port to read.\r | |
286 | \r | |
287 | @return The value read.\r | |
288 | \r | |
289 | **/\r | |
290 | UINT32\r | |
291 | EFIAPI\r | |
292 | IoRead32 (\r | |
293 | IN UINTN Port\r | |
294 | )\r | |
295 | {\r | |
296 | //\r | |
297 | // Make sure Port is aligned on a 32-bit boundary.\r | |
298 | //\r | |
299 | ASSERT ((Port & 3) == 0);\r | |
300 | return (UINT32)IoReadWorker (Port, EfiCpuIoWidthUint32);\r | |
301 | }\r | |
302 | \r | |
303 | /**\r | |
304 | Writes a 32-bit I/O port.\r | |
305 | \r | |
306 | Writes the 32-bit I/O port specified by Port with the value specified by Value\r | |
307 | and returns Value. This function must guarantee that all I/O read and write\r | |
308 | operations are serialized.\r | |
309 | \r | |
310 | If 32-bit I/O port operations are not supported, then ASSERT().\r | |
311 | \r | |
312 | @param Port The I/O port to write.\r | |
313 | @param Value The value to write to the I/O port.\r | |
314 | \r | |
315 | @return The value written the I/O port.\r | |
316 | \r | |
317 | **/\r | |
318 | UINT32\r | |
319 | EFIAPI\r | |
320 | IoWrite32 (\r | |
321 | IN UINTN Port,\r | |
322 | IN UINT32 Value\r | |
323 | )\r | |
324 | {\r | |
325 | //\r | |
326 | // Make sure Port is aligned on a 32-bit boundary.\r | |
327 | //\r | |
328 | ASSERT ((Port & 3) == 0);\r | |
329 | return (UINT32)IoWriteWorker (Port, EfiCpuIoWidthUint32, Value);\r | |
330 | }\r | |
331 | \r | |
332 | /**\r | |
333 | Reads a 64-bit I/O port.\r | |
334 | \r | |
335 | Reads the 64-bit I/O port specified by Port. The 64-bit read value is returned.\r | |
336 | This function must guarantee that all I/O read and write operations are\r | |
337 | serialized.\r | |
338 | \r | |
339 | If 64-bit I/O port operations are not supported, then ASSERT().\r | |
340 | \r | |
341 | @param Port The I/O port to read.\r | |
342 | \r | |
343 | @return The value read.\r | |
344 | \r | |
345 | **/\r | |
346 | UINT64\r | |
347 | EFIAPI\r | |
348 | IoRead64 (\r | |
349 | IN UINTN Port\r | |
350 | )\r | |
351 | {\r | |
352 | //\r | |
353 | // Make sure Port is aligned on a 64-bit boundary.\r | |
354 | //\r | |
355 | ASSERT ((Port & 7) == 0);\r | |
356 | return IoReadWorker (Port, EfiCpuIoWidthUint64);\r | |
357 | }\r | |
358 | \r | |
359 | /**\r | |
360 | Writes a 64-bit I/O port.\r | |
361 | \r | |
362 | Writes the 64-bit I/O port specified by Port with the value specified by Value\r | |
363 | and returns Value. This function must guarantee that all I/O read and write\r | |
364 | operations are serialized.\r | |
365 | \r | |
366 | If 64-bit I/O port operations are not supported, then ASSERT().\r | |
367 | \r | |
368 | @param Port The I/O port to write.\r | |
369 | @param Value The value to write to the I/O port.\r | |
370 | \r | |
371 | @return The value written the I/O port.\r | |
372 | \r | |
373 | **/\r | |
374 | UINT64\r | |
375 | EFIAPI\r | |
376 | IoWrite64 (\r | |
377 | IN UINTN Port,\r | |
378 | IN UINT64 Value\r | |
379 | )\r | |
380 | {\r | |
381 | //\r | |
382 | // Make sure Port is aligned on a 64-bit boundary.\r | |
383 | //\r | |
384 | ASSERT ((Port & 7) == 0);\r | |
385 | return IoWriteWorker (Port, EfiCpuIoWidthUint64, Value);\r | |
386 | }\r | |
387 | \r | |
388 | /**\r | |
389 | Reads an 8-bit MMIO register.\r | |
390 | \r | |
391 | Reads the 8-bit MMIO register specified by Address. The 8-bit read value is\r | |
392 | returned. This function must guarantee that all MMIO read and write\r | |
393 | operations are serialized.\r | |
394 | \r | |
395 | If 8-bit MMIO register operations are not supported, then ASSERT().\r | |
396 | \r | |
397 | @param Address The MMIO register to read.\r | |
398 | \r | |
399 | @return The value read.\r | |
400 | \r | |
401 | **/\r | |
402 | UINT8\r | |
403 | EFIAPI\r | |
404 | MmioRead8 (\r | |
405 | IN UINTN Address\r | |
406 | )\r | |
407 | {\r | |
408 | return (UINT8)MmioReadWorker (Address, EfiCpuIoWidthUint8);\r | |
409 | }\r | |
410 | \r | |
411 | /**\r | |
412 | Writes an 8-bit MMIO register.\r | |
413 | \r | |
414 | Writes the 8-bit MMIO register specified by Address with the value specified\r | |
415 | by Value and returns Value. This function must guarantee that all MMIO read\r | |
416 | and write operations are serialized.\r | |
417 | \r | |
418 | If 8-bit MMIO register operations are not supported, then ASSERT().\r | |
419 | \r | |
420 | @param Address The MMIO register to write.\r | |
421 | @param Value The value to write to the MMIO register.\r | |
422 | \r | |
423 | **/\r | |
424 | UINT8\r | |
425 | EFIAPI\r | |
426 | MmioWrite8 (\r | |
427 | IN UINTN Address,\r | |
428 | IN UINT8 Value\r | |
429 | )\r | |
430 | {\r | |
431 | return (UINT8)MmioWriteWorker (Address, EfiCpuIoWidthUint8, Value);\r | |
432 | }\r | |
433 | \r | |
434 | /**\r | |
435 | Reads a 16-bit MMIO register.\r | |
436 | \r | |
437 | Reads the 16-bit MMIO register specified by Address. The 16-bit read value is\r | |
438 | returned. This function must guarantee that all MMIO read and write\r | |
439 | operations are serialized.\r | |
440 | \r | |
441 | If 16-bit MMIO register operations are not supported, then ASSERT().\r | |
442 | \r | |
443 | @param Address The MMIO register to read.\r | |
444 | \r | |
445 | @return The value read.\r | |
446 | \r | |
447 | **/\r | |
448 | UINT16\r | |
449 | EFIAPI\r | |
450 | MmioRead16 (\r | |
451 | IN UINTN Address\r | |
452 | )\r | |
453 | {\r | |
454 | //\r | |
455 | // Make sure Address is aligned on a 16-bit boundary.\r | |
456 | //\r | |
457 | ASSERT ((Address & 1) == 0);\r | |
458 | return (UINT16)MmioReadWorker (Address, EfiCpuIoWidthUint16);\r | |
459 | }\r | |
460 | \r | |
461 | /**\r | |
462 | Writes a 16-bit MMIO register.\r | |
463 | \r | |
464 | Writes the 16-bit MMIO register specified by Address with the value specified\r | |
465 | by Value and returns Value. This function must guarantee that all MMIO read\r | |
466 | and write operations are serialized.\r | |
467 | \r | |
468 | If 16-bit MMIO register operations are not supported, then ASSERT().\r | |
469 | \r | |
470 | @param Address The MMIO register to write.\r | |
471 | @param Value The value to write to the MMIO register.\r | |
472 | \r | |
473 | **/\r | |
474 | UINT16\r | |
475 | EFIAPI\r | |
476 | MmioWrite16 (\r | |
477 | IN UINTN Address,\r | |
478 | IN UINT16 Value\r | |
479 | )\r | |
480 | {\r | |
481 | //\r | |
482 | // Make sure Address is aligned on a 16-bit boundary.\r | |
483 | //\r | |
484 | ASSERT ((Address & 1) == 0);\r | |
485 | return (UINT16)MmioWriteWorker (Address, EfiCpuIoWidthUint16, Value);\r | |
486 | }\r | |
487 | \r | |
488 | /**\r | |
489 | Reads a 32-bit MMIO register.\r | |
490 | \r | |
491 | Reads the 32-bit MMIO register specified by Address. The 32-bit read value is\r | |
492 | returned. This function must guarantee that all MMIO read and write\r | |
493 | operations are serialized.\r | |
494 | \r | |
495 | If 32-bit MMIO register operations are not supported, then ASSERT().\r | |
496 | \r | |
497 | @param Address The MMIO register to read.\r | |
498 | \r | |
499 | @return The value read.\r | |
500 | \r | |
501 | **/\r | |
502 | UINT32\r | |
503 | EFIAPI\r | |
504 | MmioRead32 (\r | |
505 | IN UINTN Address\r | |
506 | )\r | |
507 | {\r | |
508 | //\r | |
509 | // Make sure Address is aligned on a 32-bit boundary.\r | |
510 | //\r | |
511 | ASSERT ((Address & 3) == 0);\r | |
512 | return (UINT32)MmioReadWorker (Address, EfiCpuIoWidthUint32);\r | |
513 | }\r | |
514 | \r | |
515 | /**\r | |
516 | Writes a 32-bit MMIO register.\r | |
517 | \r | |
518 | Writes the 32-bit MMIO register specified by Address with the value specified\r | |
519 | by Value and returns Value. This function must guarantee that all MMIO read\r | |
520 | and write operations are serialized.\r | |
521 | \r | |
522 | If 32-bit MMIO register operations are not supported, then ASSERT().\r | |
523 | \r | |
524 | @param Address The MMIO register to write.\r | |
525 | @param Value The value to write to the MMIO register.\r | |
526 | \r | |
527 | **/\r | |
528 | UINT32\r | |
529 | EFIAPI\r | |
530 | MmioWrite32 (\r | |
531 | IN UINTN Address,\r | |
532 | IN UINT32 Value\r | |
533 | )\r | |
534 | {\r | |
535 | //\r | |
536 | // Make sure Address is aligned on a 32-bit boundary.\r | |
537 | //\r | |
538 | ASSERT ((Address & 3) == 0);\r | |
539 | return (UINT32)MmioWriteWorker (Address, EfiCpuIoWidthUint32, Value);\r | |
540 | }\r | |
541 | \r | |
542 | /**\r | |
543 | Reads a 64-bit MMIO register.\r | |
544 | \r | |
545 | Reads the 64-bit MMIO register specified by Address. The 64-bit read value is\r | |
546 | returned. This function must guarantee that all MMIO read and write\r | |
547 | operations are serialized.\r | |
548 | \r | |
549 | If 64-bit MMIO register operations are not supported, then ASSERT().\r | |
550 | \r | |
551 | @param Address The MMIO register to read.\r | |
552 | \r | |
553 | @return The value read.\r | |
554 | \r | |
555 | **/\r | |
556 | UINT64\r | |
557 | EFIAPI\r | |
558 | MmioRead64 (\r | |
559 | IN UINTN Address\r | |
560 | )\r | |
561 | {\r | |
562 | //\r | |
563 | // Make sure Address is aligned on a 64-bit boundary.\r | |
564 | //\r | |
565 | ASSERT ((Address & 7) == 0);\r | |
566 | return (UINT64)MmioReadWorker (Address, EfiCpuIoWidthUint64);\r | |
567 | }\r | |
568 | \r | |
569 | /**\r | |
570 | Writes a 64-bit MMIO register.\r | |
571 | \r | |
572 | Writes the 64-bit MMIO register specified by Address with the value specified\r | |
573 | by Value and returns Value. This function must guarantee that all MMIO read\r | |
574 | and write operations are serialized.\r | |
575 | \r | |
576 | If 64-bit MMIO register operations are not supported, then ASSERT().\r | |
577 | \r | |
578 | @param Address The MMIO register to write.\r | |
579 | @param Value The value to write to the MMIO register.\r | |
580 | \r | |
581 | **/\r | |
582 | UINT64\r | |
583 | EFIAPI\r | |
584 | MmioWrite64 (\r | |
585 | IN UINTN Address,\r | |
586 | IN UINT64 Value\r | |
587 | )\r | |
588 | {\r | |
589 | //\r | |
590 | // Make sure Address is aligned on a 64-bit boundary.\r | |
591 | //\r | |
592 | ASSERT ((Address & 7) == 0);\r | |
593 | return (UINT64)MmioWriteWorker (Address, EfiCpuIoWidthUint64, Value);\r | |
594 | }\r |