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1 | /** @file\r | |
2 | Debug Agent timer lib for OMAP 35xx.\r | |
3 | \r | |
4 | Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>\r | |
5 | \r | |
6 | SPDX-License-Identifier: BSD-2-Clause-Patent\r | |
7 | \r | |
8 | **/\r | |
9 | #include <Base.h>\r | |
10 | #include <Library/BaseLib.h>\r | |
11 | #include <Library/IoLib.h>\r | |
12 | #include <Library/OmapLib.h>\r | |
13 | #include <Library/ArmLib.h>\r | |
14 | #include <Library/PcdLib.h>\r | |
15 | \r | |
16 | #include <Omap3530/Omap3530.h>\r | |
17 | \r | |
18 | \r | |
19 | volatile UINT32 gVector;\r | |
20 | \r | |
21 | // Cached registers\r | |
22 | volatile UINT32 gTISR;\r | |
23 | volatile UINT32 gTCLR;\r | |
24 | volatile UINT32 gTLDR;\r | |
25 | volatile UINT32 gTCRR;\r | |
26 | volatile UINT32 gTIER;\r | |
27 | \r | |
28 | VOID\r | |
29 | EnableInterruptSource (\r | |
30 | VOID\r | |
31 | )\r | |
32 | {\r | |
33 | UINTN Bank;\r | |
34 | UINTN Bit;\r | |
35 | \r | |
36 | // Map vector to FIQ, IRQ is default\r | |
37 | MmioWrite32 (INTCPS_ILR (gVector), 1);\r | |
38 | \r | |
39 | Bank = gVector / 32;\r | |
40 | Bit = 1UL << (gVector % 32);\r | |
41 | \r | |
42 | MmioWrite32 (INTCPS_MIR_CLEAR(Bank), Bit);\r | |
43 | }\r | |
44 | \r | |
45 | VOID\r | |
46 | DisableInterruptSource (\r | |
47 | VOID\r | |
48 | )\r | |
49 | {\r | |
50 | UINTN Bank;\r | |
51 | UINTN Bit;\r | |
52 | \r | |
53 | Bank = gVector / 32;\r | |
54 | Bit = 1UL << (gVector % 32);\r | |
55 | \r | |
56 | MmioWrite32 (INTCPS_MIR_SET(Bank), Bit);\r | |
57 | }\r | |
58 | \r | |
59 | \r | |
60 | \r | |
61 | /**\r | |
62 | Setup all the hardware needed for the debug agents timer.\r | |
63 | \r | |
64 | This function is used to set up debug enviroment. It may enable interrupts.\r | |
65 | \r | |
66 | **/\r | |
67 | VOID\r | |
68 | EFIAPI\r | |
69 | DebugAgentTimerIntialize (\r | |
70 | VOID\r | |
71 | )\r | |
72 | {\r | |
73 | UINT32 TimerBaseAddress;\r | |
74 | UINT32 TimerNumber;\r | |
75 | \r | |
76 | TimerNumber = PcdGet32(PcdOmap35xxDebugAgentTimer);\r | |
77 | gVector = InterruptVectorForTimer (TimerNumber);\r | |
78 | \r | |
79 | // Set up the timer registers\r | |
80 | TimerBaseAddress = TimerBase (TimerNumber);\r | |
81 | gTISR = TimerBaseAddress + GPTIMER_TISR;\r | |
82 | gTCLR = TimerBaseAddress + GPTIMER_TCLR;\r | |
83 | gTLDR = TimerBaseAddress + GPTIMER_TLDR;\r | |
84 | gTCRR = TimerBaseAddress + GPTIMER_TCRR;\r | |
85 | gTIER = TimerBaseAddress + GPTIMER_TIER;\r | |
86 | \r | |
87 | if ((TimerNumber < 2) || (TimerNumber > 9)) {\r | |
88 | // This code assumes one the General Purpose timers is used\r | |
89 | // GPT2 - GPT9\r | |
90 | CpuDeadLoop ();\r | |
91 | }\r | |
92 | // Set source clock for GPT2 - GPT9 to SYS_CLK\r | |
93 | MmioOr32 (CM_CLKSEL_PER, 1 << (TimerNumber - 2));\r | |
94 | \r | |
95 | }\r | |
96 | \r | |
97 | \r | |
98 | /**\r | |
99 | Set the period for the debug agent timer. Zero means disable the timer.\r | |
100 | \r | |
101 | @param[in] TimerPeriodMilliseconds Frequency of the debug agent timer.\r | |
102 | \r | |
103 | **/\r | |
104 | VOID\r | |
105 | EFIAPI\r | |
106 | DebugAgentTimerSetPeriod (\r | |
107 | IN UINT32 TimerPeriodMilliseconds\r | |
108 | )\r | |
109 | {\r | |
110 | UINT64 TimerCount;\r | |
111 | INT32 LoadValue;\r | |
112 | \r | |
113 | if (TimerPeriodMilliseconds == 0) {\r | |
114 | // Turn off GPTIMER3\r | |
115 | MmioWrite32 (gTCLR, TCLR_ST_OFF);\r | |
116 | \r | |
117 | DisableInterruptSource ();\r | |
118 | } else {\r | |
119 | // Calculate required timer count\r | |
120 | TimerCount = DivU64x32(TimerPeriodMilliseconds * 1000000, PcdGet32(PcdDebugAgentTimerFreqNanoSeconds));\r | |
121 | \r | |
122 | // Set GPTIMER5 Load register\r | |
123 | LoadValue = (INT32) -TimerCount;\r | |
124 | MmioWrite32 (gTLDR, LoadValue);\r | |
125 | MmioWrite32 (gTCRR, LoadValue);\r | |
126 | \r | |
127 | // Enable Overflow interrupt\r | |
128 | MmioWrite32 (gTIER, TIER_TCAR_IT_DISABLE | TIER_OVF_IT_ENABLE | TIER_MAT_IT_DISABLE);\r | |
129 | \r | |
130 | // Turn on GPTIMER3, it will reload at overflow\r | |
131 | MmioWrite32 (gTCLR, TCLR_AR_AUTORELOAD | TCLR_ST_ON);\r | |
132 | \r | |
133 | EnableInterruptSource ();\r | |
134 | }\r | |
135 | }\r | |
136 | \r | |
137 | \r | |
138 | /**\r | |
139 | Perform End Of Interrupt for the debug agent timer. This is called in the\r | |
140 | interrupt handler after the interrupt has been processed.\r | |
141 | \r | |
142 | **/\r | |
143 | VOID\r | |
144 | EFIAPI\r | |
145 | DebugAgentTimerEndOfInterrupt (\r | |
146 | VOID\r | |
147 | )\r | |
148 | {\r | |
149 | // Clear all timer interrupts\r | |
150 | MmioWrite32 (gTISR, TISR_CLEAR_ALL);\r | |
151 | \r | |
152 | // Poll interrupt status bits to ensure clearing\r | |
153 | while ((MmioRead32 (gTISR) & TISR_ALL_INTERRUPT_MASK) != TISR_NO_INTERRUPTS_PENDING);\r | |
154 | \r | |
155 | MmioWrite32 (INTCPS_CONTROL, INTCPS_CONTROL_NEWFIQAGR);\r | |
156 | ArmDataSynchronizationBarrier ();\r | |
157 | \r | |
158 | }\r | |
159 | \r |