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1 | /** @file\r | |
2 | \r | |
3 | Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>\r | |
4 | \r | |
5 | SPDX-License-Identifier: BSD-2-Clause-Patent\r | |
6 | \r | |
7 | **/\r | |
8 | \r | |
9 | #ifndef _VESA_BIOS_EXTENSIONS_H_\r | |
10 | #define _VESA_BIOS_EXTENSIONS_H_\r | |
11 | \r | |
12 | //\r | |
13 | // Turn on byte packing of data structures\r | |
14 | //\r | |
15 | #pragma pack(1)\r | |
16 | //\r | |
17 | // VESA BIOS Extensions status codes\r | |
18 | //\r | |
19 | #define VESA_BIOS_EXTENSIONS_STATUS_SUCCESS 0x004f\r | |
20 | \r | |
21 | //\r | |
22 | // VESA BIOS Extensions Services\r | |
23 | //\r | |
24 | #define VESA_BIOS_EXTENSIONS_RETURN_CONTROLLER_INFORMATION 0x4f00\r | |
25 | \r | |
26 | /*++\r | |
27 | \r | |
28 | Routine Description:\r | |
29 | Function 00 : Return Controller Information\r | |
30 | \r | |
31 | Arguments:\r | |
32 | Inputs:\r | |
33 | AX = 0x4f00\r | |
34 | ES:DI = Pointer to buffer to place VESA_BIOS_EXTENSIONS_INFORMATION_BLOCK structure\r | |
35 | Outputs:\r | |
36 | AX = Return Status\r | |
37 | \r | |
38 | --*/\r | |
39 | #define VESA_BIOS_EXTENSIONS_RETURN_MODE_INFORMATION 0x4f01\r | |
40 | \r | |
41 | /*++\r | |
42 | \r | |
43 | Routine Description:\r | |
44 | Function 01 : Return Mode Information\r | |
45 | \r | |
46 | Arguments:\r | |
47 | Inputs:\r | |
48 | AX = 0x4f01\r | |
49 | CX = Mode Number\r | |
50 | ES:DI = Pointer to buffer to place VESA_BIOS_EXTENSIONS_MODE_INFORMATION_BLOCK structure\r | |
51 | Outputs:\r | |
52 | AX = Return Status\r | |
53 | \r | |
54 | --*/\r | |
55 | #define VESA_BIOS_EXTENSIONS_SET_MODE 0x4f02\r | |
56 | \r | |
57 | /*++\r | |
58 | \r | |
59 | Routine Description:\r | |
60 | Function 02 : Set Mode\r | |
61 | \r | |
62 | Arguments:\r | |
63 | Inputs:\r | |
64 | AX = 0x4f02\r | |
65 | BX = Desired mode to set\r | |
66 | D0-D8 = Mode Number\r | |
67 | D9-D10 = Reserved (must be 0)\r | |
68 | D11 = 0 - Use current default refresh rate\r | |
69 | = 1 - Use user specfieid CRTC values for refresh rate\r | |
70 | D12-D13 = Reserved (must be 0)\r | |
71 | D14 = 0 - Use windowed frame buffer model\r | |
72 | = 1 - Use linear/flat frame buffer model\r | |
73 | D15 = 0 - Clear display memory\r | |
74 | = 1 - Don't clear display memory\r | |
75 | ES:DI = Pointer to buffer to the VESA_BIOS_EXTENSIONS_CRTC_INFORMATION_BLOCK structure\r | |
76 | Outputs:\r | |
77 | AX = Return Status\r | |
78 | \r | |
79 | --*/\r | |
80 | #define VESA_BIOS_EXTENSIONS_RETURN_CURRENT_MODE 0x4f03\r | |
81 | \r | |
82 | /*++\r | |
83 | \r | |
84 | Routine Description:\r | |
85 | Function 03 : Return Current Mode\r | |
86 | \r | |
87 | Arguments:\r | |
88 | Inputs:\r | |
89 | AX = 0x4f03\r | |
90 | Outputs:\r | |
91 | AX = Return Status\r | |
92 | BX = Current mode\r | |
93 | D0-D13 = Mode Number\r | |
94 | D14 = 0 - Windowed frame buffer model\r | |
95 | = 1 - Linear/flat frame buffer model\r | |
96 | D15 = 0 - Memory cleared at last mode set\r | |
97 | = 1 - Memory not cleared at last mode set\r | |
98 | \r | |
99 | --*/\r | |
100 | #define VESA_BIOS_EXTENSIONS_SAVE_RESTORE_STATE 0x4f04\r | |
101 | \r | |
102 | /*++\r | |
103 | \r | |
104 | Routine Description:\r | |
105 | Function 04 : Save/Restore State\r | |
106 | \r | |
107 | Arguments:\r | |
108 | Inputs:\r | |
109 | AX = 0x4f03\r | |
110 | DL = 0x00 - Return Save/Restore State buffer size\r | |
111 | = 0x01 - Save State\r | |
112 | = 0x02 - Restore State\r | |
113 | CX = Requested Status\r | |
114 | D0 = Save/Restore controller hardware state\r | |
115 | D1 = Save/Restore BIOS data state\r | |
116 | D2 = Save/Restore DAC state\r | |
117 | D3 = Save/Restore Regsiter state\r | |
118 | ES:BX = Pointer to buffer if DL=1 or DL=2\r | |
119 | Outputs:\r | |
120 | AX = Return Status\r | |
121 | BX = Number of 64 byte blocks to hold the state buffer if DL=0\r | |
122 | \r | |
123 | --*/\r | |
124 | #define VESA_BIOS_EXTENSIONS_EDID 0x4f15\r | |
125 | \r | |
126 | /*++\r | |
127 | \r | |
128 | Routine Description:\r | |
129 | Function 15 : implement VBE/DDC service\r | |
130 | \r | |
131 | Arguments:\r | |
132 | Inputs:\r | |
133 | AX = 0x4f15\r | |
134 | BL = 0x00 - Report VBE/DDC Capabilities\r | |
135 | CX = 0x00 - Controller unit number (00 = primary controller)\r | |
136 | ES:DI = Null pointer, must be 0:0 in version 1.0\r | |
137 | Outputs:\r | |
138 | AX = Return Status\r | |
139 | BH = Approx. time in seconds, rounded up, to transfer one EDID block(128 bytes)\r | |
140 | BL = DDC level supported\r | |
141 | D0 = 0 DDC1 not supported\r | |
142 | = 1 DDC1 supported\r | |
143 | D1 = 0 DDC2 not supported\r | |
144 | = 1 DDC2 supported\r | |
145 | D2 = 0 Screen not blanked during data transfer\r | |
146 | = 1 Screen blanked during data transfer\r | |
147 | \r | |
148 | Inputs:\r | |
149 | AX = 0x4f15\r | |
150 | BL = 0x01 - Read EDID\r | |
151 | CX = 0x00 - Controller unit number (00 = primary controller)\r | |
152 | DX = 0x00 - EDID block number\r | |
153 | ES:DI = Pointer to buffer in which the EDID block is returned\r | |
154 | Outputs:\r | |
155 | AX = Return Status\r | |
156 | --*/\r | |
157 | \r | |
158 | //\r | |
159 | // Timing data from EDID data block\r | |
160 | //\r | |
161 | #define VESA_BIOS_EXTENSIONS_EDID_BLOCK_SIZE 128\r | |
162 | #define VESA_BIOS_EXTENSIONS_EDID_ESTABLISHED_TIMING_MAX_NUMBER 17\r | |
163 | \r | |
164 | //\r | |
165 | // Established Timings: 24 possible resolutions\r | |
166 | // Standard Timings: 8 possible resolutions\r | |
167 | // Detailed Timings: 4 possible resolutions\r | |
168 | //\r | |
169 | #define VESA_BIOS_EXTENSIONS_EDID_TIMING_MAX_NUMBER 36\r | |
170 | \r | |
171 | //\r | |
172 | // Timing data size for Established Timings, Standard Timings and Detailed Timings\r | |
173 | //\r | |
174 | #define VESA_BIOS_EXTENSIONS_ESTABLISHED_TIMING_SIZE 3\r | |
175 | #define VESA_BIOS_EXTENSIONS_STANDARD_TIMING_SIZE 16\r | |
176 | #define VESA_BIOS_EXTENSIONS_DETAILED_TIMING_EACH_DESCRIPTOR_SIZE 18\r | |
177 | #define VESA_BIOS_EXTENSIONS_DETAILED_TIMING_DESCRIPTOR_MAX_SIZE 72\r | |
178 | \r | |
179 | typedef struct {\r | |
180 | UINT16 HorizontalResolution;\r | |
181 | UINT16 VerticalResolution;\r | |
182 | UINT16 RefreshRate;\r | |
183 | } VESA_BIOS_EXTENSIONS_EDID_TIMING;\r | |
184 | \r | |
185 | typedef struct {\r | |
186 | UINT32 ValidNumber;\r | |
187 | UINT32 Key[VESA_BIOS_EXTENSIONS_EDID_TIMING_MAX_NUMBER];\r | |
188 | } VESA_BIOS_EXTENSIONS_VALID_EDID_TIMING;\r | |
189 | \r | |
190 | typedef struct {\r | |
191 | UINT8 Header[8]; // EDID header "00 FF FF FF FF FF FF 00"\r | |
192 | UINT16 ManufactureName; // EISA 3-character ID\r | |
193 | UINT16 ProductCode; // Vendor assigned code\r | |
194 | UINT32 SerialNumber; // 32-bit serial number\r | |
195 | UINT8 WeekOfManufacture; // Week number\r | |
196 | UINT8 YearOfManufacture; // Year\r | |
197 | UINT8 EdidVersion; // EDID Structure Version\r | |
198 | UINT8 EdidRevision; // EDID Structure Revision\r | |
199 | UINT8 VideoInputDefinition;\r | |
200 | UINT8 MaxHorizontalImageSize; // cm\r | |
201 | UINT8 MaxVerticalImageSize; // cm\r | |
202 | UINT8 DisplayTransferCharacteristic;\r | |
203 | UINT8 FeatureSupport;\r | |
204 | UINT8 RedGreenLowBits; // Rx1 Rx0 Ry1 Ry0 Gx1 Gx0 Gy1Gy0\r | |
205 | UINT8 BlueWhiteLowBits; // Bx1 Bx0 By1 By0 Wx1 Wx0 Wy1 Wy0\r | |
206 | UINT8 RedX; // Red-x Bits 9 - 2\r | |
207 | UINT8 RedY; // Red-y Bits 9 - 2\r | |
208 | UINT8 GreenX; // Green-x Bits 9 - 2\r | |
209 | UINT8 GreenY; // Green-y Bits 9 - 2\r | |
210 | UINT8 BlueX; // Blue-x Bits 9 - 2\r | |
211 | UINT8 BlueY; // Blue-y Bits 9 - 2\r | |
212 | UINT8 WhiteX; // White-x Bits 9 - 2\r | |
213 | UINT8 WhiteY; // White-x Bits 9 - 2\r | |
214 | UINT8 EstablishedTimings[VESA_BIOS_EXTENSIONS_ESTABLISHED_TIMING_SIZE];\r | |
215 | UINT8 StandardTimingIdentification[VESA_BIOS_EXTENSIONS_STANDARD_TIMING_SIZE];\r | |
216 | UINT8 DetailedTimingDescriptions[VESA_BIOS_EXTENSIONS_DETAILED_TIMING_DESCRIPTOR_MAX_SIZE];\r | |
217 | UINT8 ExtensionFlag; // Number of (optional) 128-byte EDID extension blocks to follow\r | |
218 | UINT8 Checksum;\r | |
219 | } VESA_BIOS_EXTENSIONS_EDID_DATA_BLOCK;\r | |
220 | \r | |
221 | //\r | |
222 | // Super VGA Information Block\r | |
223 | //\r | |
224 | typedef struct {\r | |
225 | UINT32 VESASignature; // 'VESA' 4 byte signature\r | |
226 | UINT16 VESAVersion; // VBE version number\r | |
227 | UINT32 OEMStringPtr; // Pointer to OEM string\r | |
228 | UINT32 Capabilities; // Capabilities of video card\r | |
229 | UINT32 VideoModePtr; // Pointer to an array of 16-bit supported modes values terminated by 0xFFFF\r | |
230 | UINT16 TotalMemory; // Number of 64kb memory blocks\r | |
231 | UINT16 OemSoftwareRev; // VBE implementation Software revision\r | |
232 | UINT32 OemVendorNamePtr; // VbeFarPtr to Vendor Name String\r | |
233 | UINT32 OemProductNamePtr; // VbeFarPtr to Product Name String\r | |
234 | UINT32 OemProductRevPtr; // VbeFarPtr to Product Revision String\r | |
235 | UINT8 Reserved[222]; // Reserved for VBE implementation scratch area\r | |
236 | UINT8 OemData[256]; // Data area for OEM strings. Pad to 512 byte block size\r | |
237 | } VESA_BIOS_EXTENSIONS_INFORMATION_BLOCK;\r | |
238 | \r | |
239 | //\r | |
240 | // Super VGA Information Block VESASignature values\r | |
241 | //\r | |
242 | #define VESA_BIOS_EXTENSIONS_VESA_SIGNATURE SIGNATURE_32 ('V', 'E', 'S', 'A')\r | |
243 | #define VESA_BIOS_EXTENSIONS_VBE2_SIGNATURE SIGNATURE_32 ('V', 'B', 'E', '2')\r | |
244 | \r | |
245 | //\r | |
246 | // Super VGA Information Block VESAVersion values\r | |
247 | //\r | |
248 | #define VESA_BIOS_EXTENSIONS_VERSION_1_2 0x0102\r | |
249 | #define VESA_BIOS_EXTENSIONS_VERSION_2_0 0x0200\r | |
250 | #define VESA_BIOS_EXTENSIONS_VERSION_3_0 0x0300\r | |
251 | \r | |
252 | //\r | |
253 | // Super VGA Information Block Capabilities field bit definitions\r | |
254 | //\r | |
255 | #define VESA_BIOS_EXTENSIONS_CAPABILITY_8_BIT_DAC 0x01 // 0: DAC width is fixed at 6 bits/color\r | |
256 | // 1: DAC width switchable to 8 bits/color\r | |
257 | //\r | |
258 | #define VESA_BIOS_EXTENSIONS_CAPABILITY_NOT_VGA 0x02 // 0: Controller is VGA compatible\r | |
259 | // 1: Controller is not VGA compatible\r | |
260 | //\r | |
261 | #define VESA_BIOS_EXTENSIONS_CAPABILITY_NOT_NORMAL_RAMDAC 0x04 // 0: Normal RAMDAC operation\r | |
262 | // 1: Use blank bit in function 9 to program RAMDAC\r | |
263 | //\r | |
264 | #define VESA_BIOS_EXTENSIONS_CAPABILITY_STEREOSCOPIC 0x08 // 0: No hardware stereoscopic signal support\r | |
265 | // 1: Hardware stereoscopic signal support\r | |
266 | //\r | |
267 | #define VESA_BIOS_EXTENSIONS_CAPABILITY_VESA_EVC 0x10 // 0: Stero signaling supported via external VESA stereo connector\r | |
268 | // 1: Stero signaling supported via VESA EVC connector\r | |
269 | //\r | |
270 | // Super VGA mode number bite field definitions\r | |
271 | //\r | |
272 | #define VESA_BIOS_EXTENSIONS_MODE_NUMBER_VESA 0x0100 // 0: Not a VESA defined VBE mode\r | |
273 | // 1: A VESA defined VBE mode\r | |
274 | //\r | |
275 | #define VESA_BIOS_EXTENSIONS_MODE_NUMBER_REFRESH_CONTROL_USER 0x0800 // 0: Use current BIOS default referesh rate\r | |
276 | // 1: Use the user specified CRTC values for refresh rate\r | |
277 | //\r | |
278 | #define VESA_BIOS_EXTENSIONS_MODE_NUMBER_LINEAR_FRAME_BUFFER 0x4000 // 0: Use a banked/windowed frame buffer\r | |
279 | // 1: Use a linear/flat frame buffer\r | |
280 | //\r | |
281 | #define VESA_BIOS_EXTENSIONS_MODE_NUMBER_PRESERVE_MEMORY 0x8000 // 0: Clear display memory\r | |
282 | // 1: Preseve display memory\r | |
283 | //\r | |
284 | // Super VGA Information Block mode list terminator value\r | |
285 | //\r | |
286 | #define VESA_BIOS_EXTENSIONS_END_OF_MODE_LIST 0xffff\r | |
287 | \r | |
288 | //\r | |
289 | // Window Function\r | |
290 | //\r | |
291 | typedef\r | |
292 | VOID\r | |
293 | (*VESA_BIOS_EXTENSIONS_WINDOW_FUNCTION) (\r | |
294 | VOID\r | |
295 | );\r | |
296 | \r | |
297 | //\r | |
298 | // Super VGA Mode Information Block\r | |
299 | //\r | |
300 | typedef struct {\r | |
301 | //\r | |
302 | // Manadory fields for all VESA Bios Extensions revisions\r | |
303 | //\r | |
304 | UINT16 ModeAttributes; // Mode attributes\r | |
305 | UINT8 WinAAttributes; // Window A attributes\r | |
306 | UINT8 WinBAttributes; // Window B attributes\r | |
307 | UINT16 WinGranularity; // Window granularity in k\r | |
308 | UINT16 WinSize; // Window size in k\r | |
309 | UINT16 WinASegment; // Window A segment\r | |
310 | UINT16 WinBSegment; // Window B segment\r | |
311 | UINT32 WindowFunction; // Pointer to window function\r | |
312 | UINT16 BytesPerScanLine; // Bytes per scanline\r | |
313 | //\r | |
314 | // Manadory fields for VESA Bios Extensions 1.2 and above\r | |
315 | //\r | |
316 | UINT16 XResolution; // Horizontal resolution\r | |
317 | UINT16 YResolution; // Vertical resolution\r | |
318 | UINT8 XCharSize; // Character cell width\r | |
319 | UINT8 YCharSize; // Character cell height\r | |
320 | UINT8 NumberOfPlanes; // Number of memory planes\r | |
321 | UINT8 BitsPerPixel; // Bits per pixel\r | |
322 | UINT8 NumberOfBanks; // Number of CGA style banks\r | |
323 | UINT8 MemoryModel; // Memory model type\r | |
324 | UINT8 BankSize; // Size of CGA style banks\r | |
325 | UINT8 NumberOfImagePages; // Number of images pages\r | |
326 | UINT8 Reserved1; // Reserved\r | |
327 | UINT8 RedMaskSize; // Size of direct color red mask\r | |
328 | UINT8 RedFieldPosition; // Bit posn of lsb of red mask\r | |
329 | UINT8 GreenMaskSize; // Size of direct color green mask\r | |
330 | UINT8 GreenFieldPosition; // Bit posn of lsb of green mask\r | |
331 | UINT8 BlueMaskSize; // Size of direct color blue mask\r | |
332 | UINT8 BlueFieldPosition; // Bit posn of lsb of blue mask\r | |
333 | UINT8 RsvdMaskSize; // Size of direct color res mask\r | |
334 | UINT8 RsvdFieldPosition; // Bit posn of lsb of res mask\r | |
335 | UINT8 DirectColorModeInfo; // Direct color mode attributes\r | |
336 | //\r | |
337 | // Manadory fields for VESA Bios Extensions 2.0 and above\r | |
338 | //\r | |
339 | UINT32 PhysBasePtr; // Physical Address for flat memory frame buffer\r | |
340 | UINT32 Reserved2; // Reserved\r | |
341 | UINT16 Reserved3; // Reserved\r | |
342 | //\r | |
343 | // Manadory fields for VESA Bios Extensions 3.0 and above\r | |
344 | //\r | |
345 | UINT16 LinBytesPerScanLine; // Bytes/scan line for linear modes\r | |
346 | UINT8 BnkNumberOfImagePages; // Number of images for banked modes\r | |
347 | UINT8 LinNumberOfImagePages; // Number of images for linear modes\r | |
348 | UINT8 LinRedMaskSize; // Size of direct color red mask (linear mode)\r | |
349 | UINT8 LinRedFieldPosition; // Bit posiiton of lsb of red mask (linear modes)\r | |
350 | UINT8 LinGreenMaskSize; // Size of direct color green mask (linear mode)\r | |
351 | UINT8 LinGreenFieldPosition; // Bit posiiton of lsb of green mask (linear modes)\r | |
352 | UINT8 LinBlueMaskSize; // Size of direct color blue mask (linear mode)\r | |
353 | UINT8 LinBlueFieldPosition; // Bit posiiton of lsb of blue mask (linear modes)\r | |
354 | UINT8 LinRsvdMaskSize; // Size of direct color reserved mask (linear mode)\r | |
355 | UINT8 LinRsvdFieldPosition; // Bit posiiton of lsb of reserved mask (linear modes)\r | |
356 | UINT32 MaxPixelClock; // Maximum pixel clock (in Hz) for graphics mode\r | |
357 | UINT8 Pad[190]; // Pad to 256 byte block size\r | |
358 | } VESA_BIOS_EXTENSIONS_MODE_INFORMATION_BLOCK;\r | |
359 | \r | |
360 | //\r | |
361 | // Super VGA Mode Information Block ModeAttributes field bit definitions\r | |
362 | //\r | |
363 | #define VESA_BIOS_EXTENSIONS_MODE_ATTRIBUTE_HARDWARE 0x0001 // 0: Mode not supported in handware\r | |
364 | // 1: Mode supported in handware\r | |
365 | //\r | |
366 | #define VESA_BIOS_EXTENSIONS_MODE_ATTRIBUTE_TTY 0x0004 // 0: TTY Output functions not supported by BIOS\r | |
367 | // 1: TTY Output functions supported by BIOS\r | |
368 | //\r | |
369 | #define VESA_BIOS_EXTENSIONS_MODE_ATTRIBUTE_COLOR 0x0008 // 0: Monochrome mode\r | |
370 | // 1: Color mode\r | |
371 | //\r | |
372 | #define VESA_BIOS_EXTENSIONS_MODE_ATTRIBUTE_GRAPHICS 0x0010 // 0: Text mode\r | |
373 | // 1: Graphics mode\r | |
374 | //\r | |
375 | #define VESA_BIOS_EXTENSIONS_MODE_ATTRIBUTE_NOT_VGA 0x0020 // 0: VGA compatible mode\r | |
376 | // 1: Not a VGA compatible mode\r | |
377 | //\r | |
378 | #define VESA_BIOS_EXTENSIONS_MODE_ATTRIBUTE_NOT_WINDOWED 0x0040 // 0: VGA compatible windowed memory mode\r | |
379 | // 1: Not a VGA compatible windowed memory mode\r | |
380 | //\r | |
381 | #define VESA_BIOS_EXTENSIONS_MODE_ATTRIBUTE_LINEAR_FRAME_BUFFER 0x0080 // 0: No linear fram buffer mode available\r | |
382 | // 1: Linear frame buffer mode available\r | |
383 | //\r | |
384 | #define VESA_BIOS_EXTENSIONS_MODE_ATTRIBUTE_DOUBLE_SCAN 0x0100 // 0: No double scan mode available\r | |
385 | // 1: Double scan mode available\r | |
386 | //\r | |
387 | #define VESA_BIOS_EXTENSIONS_MODE_ATTRIBUTE_INTERLACED 0x0200 // 0: No interlaced mode is available\r | |
388 | // 1: Interlaced mode is available\r | |
389 | //\r | |
390 | #define VESA_BIOS_EXTENSIONS_MODE_ATTRIBUTE_NO_TRIPPLE_BUFFER 0x0400 // 0: No hardware triple buffer mode support available\r | |
391 | // 1: Hardware triple buffer mode support available\r | |
392 | //\r | |
393 | #define VESA_BIOS_EXTENSIONS_MODE_ATTRIBUTE_STEREOSCOPIC 0x0800 // 0: No hardware steroscopic display support\r | |
394 | // 1: Hardware steroscopic display support\r | |
395 | //\r | |
396 | #define VESA_BIOS_EXTENSIONS_MODE_ATTRIBUTE_DUAL_DISPLAY 0x1000 // 0: No dual display start address support\r | |
397 | // 1: Dual display start address support\r | |
398 | //\r | |
399 | // Super VGA Mode Information Block WinAAttribite/WinBAttributes field bit definitions\r | |
400 | //\r | |
401 | #define VESA_BIOS_EXTENSIONS_WINX_ATTRIBUTE_RELOCATABLE 0x01 // 0: Single non-relocatable window only\r | |
402 | // 1: Relocatable window(s) are supported\r | |
403 | //\r | |
404 | #define VESA_BIOS_EXTENSIONS_WINX_ATTRIBUTE_READABLE 0x02 // 0: Window is not readable\r | |
405 | // 1: Window is readable\r | |
406 | //\r | |
407 | #define VESA_BIOS_EXTENSIONS_WINX_ATTRIBUTE_WRITABLE 0x04 // 0: Window is not writable\r | |
408 | // 1: Window is writable\r | |
409 | //\r | |
410 | // Super VGA Mode Information Block DirectColorMode field bit definitions\r | |
411 | //\r | |
412 | #define VESA_BIOS_EXTENSIONS_DIRECT_COLOR_MODE_PROG_COLOR_RAMP 0x01 // 0: Color ram is fixed\r | |
413 | // 1: Color ramp is programmable\r | |
414 | //\r | |
415 | #define VESA_BIOS_EXTENSIONS_DIRECT_COLOR_MODE_RSVD_USABLE 0x02 // 0: Bits in Rsvd field are reserved\r | |
416 | // 1: Bits in Rsdv field are usable\r | |
417 | //\r | |
418 | // Super VGA Memory Models\r | |
419 | //\r | |
420 | typedef enum {\r | |
421 | MemPL = 3, // Planar memory model\r | |
422 | MemPK = 4, // Packed pixel memory model\r | |
423 | MemRGB = 6, // Direct color RGB memory model\r | |
424 | MemYUV = 7 // Direct color YUV memory model\r | |
425 | } VESA_BIOS_EXTENSIONS_MEMORY_MODELS;\r | |
426 | \r | |
427 | //\r | |
428 | // Super VGA CRTC Information Block\r | |
429 | //\r | |
430 | typedef struct {\r | |
431 | UINT16 HorizontalTotal; // Horizontal total in pixels\r | |
432 | UINT16 HorizontalSyncStart; // Horizontal sync start in pixels\r | |
433 | UINT16 HorizontalSyncEnd; // Horizontal sync end in pixels\r | |
434 | UINT16 VericalTotal; // Vertical total in pixels\r | |
435 | UINT16 VericalSyncStart; // Vertical sync start in pixels\r | |
436 | UINT16 VericalSyncEnd; // Vertical sync end in pixels\r | |
437 | UINT8 Flags; // Flags (Interlaced/DoubleScan/etc).\r | |
438 | UINT32 PixelClock; // Pixel clock in units of Hz\r | |
439 | UINT16 RefreshRate; // Refresh rate in units of 0.01 Hz\r | |
440 | UINT8 Reserved[40]; // Pad\r | |
441 | } VESA_BIOS_EXTENSIONS_CRTC_INFORMATION_BLOCK;\r | |
442 | \r | |
443 | #define VESA_BIOS_EXTENSIONS_CRTC_FLAGS_DOUBLE_SCAN 0x01 // 0: Graphics mode is not souble scanned\r | |
444 | // 1: Graphics mode is double scanned\r | |
445 | //\r | |
446 | #define VESA_BIOS_EXTENSIONS_CRTC_FLAGSINTERLACED 0x02 // 0: Graphics mode is not interlaced\r | |
447 | // 1: Graphics mode is interlaced\r | |
448 | //\r | |
449 | #define VESA_BIOS_EXTENSIONS_CRTC_HORIZONTAL_SYNC_NEGATIVE 0x04 // 0: Horizontal sync polarity is positive(+)\r | |
450 | // 0: Horizontal sync polarity is negative(-)\r | |
451 | //\r | |
452 | #define VESA_BIOS_EXTENSIONS_CRTC_VERITICAL_SYNC_NEGATIVE 0x08 // 0: Verical sync polarity is positive(+)\r | |
453 | // 0: Verical sync polarity is negative(-)\r | |
454 | //\r | |
455 | // Turn off byte packing of data structures\r | |
456 | //\r | |
457 | #pragma pack()\r | |
458 | \r | |
459 | #endif\r |