]>
Commit | Line | Data |
---|---|---|
1 | /** @file\r | |
2 | This protocol abstracts the 8259 interrupt controller. This includes\r | |
3 | PCI IRQ routing needed to program the PCI Interrupt Line register.\r | |
4 | \r | |
5 | Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>\r | |
6 | SPDX-License-Identifier: BSD-2-Clause-Patent\r | |
7 | \r | |
8 | @par Revision Reference:\r | |
9 | This protocol is defined in Framework for EFI Compatibility Support Module spec\r | |
10 | Version 0.97.\r | |
11 | \r | |
12 | **/\r | |
13 | \r | |
14 | #ifndef _EFI_LEGACY_8259_H_\r | |
15 | #define _EFI_LEGACY_8259_H_\r | |
16 | \r | |
17 | #define EFI_LEGACY_8259_PROTOCOL_GUID \\r | |
18 | { \\r | |
19 | 0x38321dba, 0x4fe0, 0x4e17, {0x8a, 0xec, 0x41, 0x30, 0x55, 0xea, 0xed, 0xc1 } \\r | |
20 | }\r | |
21 | \r | |
22 | typedef struct _EFI_LEGACY_8259_PROTOCOL EFI_LEGACY_8259_PROTOCOL;\r | |
23 | \r | |
24 | typedef enum {\r | |
25 | Efi8259Irq0,\r | |
26 | Efi8259Irq1,\r | |
27 | Efi8259Irq2,\r | |
28 | Efi8259Irq3,\r | |
29 | Efi8259Irq4,\r | |
30 | Efi8259Irq5,\r | |
31 | Efi8259Irq6,\r | |
32 | Efi8259Irq7,\r | |
33 | Efi8259Irq8,\r | |
34 | Efi8259Irq9,\r | |
35 | Efi8259Irq10,\r | |
36 | Efi8259Irq11,\r | |
37 | Efi8259Irq12,\r | |
38 | Efi8259Irq13,\r | |
39 | Efi8259Irq14,\r | |
40 | Efi8259Irq15,\r | |
41 | Efi8259IrqMax\r | |
42 | } EFI_8259_IRQ;\r | |
43 | \r | |
44 | typedef enum {\r | |
45 | Efi8259LegacyMode,\r | |
46 | Efi8259ProtectedMode,\r | |
47 | Efi8259MaxMode\r | |
48 | } EFI_8259_MODE;\r | |
49 | \r | |
50 | /**\r | |
51 | Get the 8259 interrupt masks for Irq0 - Irq15. A different mask exists for\r | |
52 | the legacy mode mask and the protected mode mask. The base address for the 8259\r | |
53 | is different for legacy and protected mode, so two masks are required.\r | |
54 | \r | |
55 | @param This The protocol instance pointer.\r | |
56 | @param MasterBase The base vector for the Master PIC in the 8259 controller.\r | |
57 | @param SlaveBase The base vector for the Slave PIC in the 8259 controller.\r | |
58 | \r | |
59 | @retval EFI_SUCCESS The new bases were programmed.\r | |
60 | @retval EFI_DEVICE_ERROR A device error occurred programming the vector bases.\r | |
61 | \r | |
62 | **/\r | |
63 | typedef\r | |
64 | EFI_STATUS\r | |
65 | (EFIAPI *EFI_LEGACY_8259_SET_VECTOR_BASE)(\r | |
66 | IN EFI_LEGACY_8259_PROTOCOL *This,\r | |
67 | IN UINT8 MasterBase,\r | |
68 | IN UINT8 SlaveBase\r | |
69 | );\r | |
70 | \r | |
71 | /**\r | |
72 | Get the 8259 interrupt masks for Irq0 - Irq15. A different mask exists for\r | |
73 | the legacy mode mask and the protected mode mask. The base address for the 8259\r | |
74 | is different for legacy and protected mode, so two masks are required.\r | |
75 | \r | |
76 | @param This The protocol instance pointer.\r | |
77 | @param LegacyMask Bit 0 is Irq0 - Bit 15 is Irq15.\r | |
78 | @param LegacyEdgeLevel Bit 0 is Irq0 - Bit 15 is Irq15.\r | |
79 | @param ProtectedMask Bit 0 is Irq0 - Bit 15 is Irq15.\r | |
80 | @param ProtectedEdgeLevel Bit 0 is Irq0 - Bit 15 is Irq15.\r | |
81 | \r | |
82 | @retval EFI_SUCCESS 8259 status returned.\r | |
83 | @retval EFI_DEVICE_ERROR Error reading 8259.\r | |
84 | \r | |
85 | **/\r | |
86 | typedef\r | |
87 | EFI_STATUS\r | |
88 | (EFIAPI *EFI_LEGACY_8259_GET_MASK)(\r | |
89 | IN EFI_LEGACY_8259_PROTOCOL *This,\r | |
90 | OUT UINT16 *LegacyMask OPTIONAL,\r | |
91 | OUT UINT16 *LegacyEdgeLevel OPTIONAL,\r | |
92 | OUT UINT16 *ProtectedMask OPTIONAL,\r | |
93 | OUT UINT16 *ProtectedEdgeLevel OPTIONAL\r | |
94 | );\r | |
95 | \r | |
96 | /**\r | |
97 | Set the 8259 interrupt masks for Irq0 - Irq15. A different mask exists for\r | |
98 | the legacy mode mask and the protected mode mask. The base address for the 8259\r | |
99 | is different for legacy and protected mode, so two masks are required.\r | |
100 | Also set the edge/level masks.\r | |
101 | \r | |
102 | @param This The protocol instance pointer.\r | |
103 | @param LegacyMask Bit 0 is Irq0 - Bit 15 is Irq15.\r | |
104 | @param LegacyEdgeLevel Bit 0 is Irq0 - Bit 15 is Irq15.\r | |
105 | @param ProtectedMask Bit 0 is Irq0 - Bit 15 is Irq15.\r | |
106 | @param ProtectedEdgeLevel Bit 0 is Irq0 - Bit 15 is Irq15.\r | |
107 | \r | |
108 | @retval EFI_SUCCESS 8259 status returned.\r | |
109 | @retval EFI_DEVICE_ERROR Error writing 8259.\r | |
110 | \r | |
111 | **/\r | |
112 | typedef\r | |
113 | EFI_STATUS\r | |
114 | (EFIAPI *EFI_LEGACY_8259_SET_MASK)(\r | |
115 | IN EFI_LEGACY_8259_PROTOCOL *This,\r | |
116 | IN UINT16 *LegacyMask OPTIONAL,\r | |
117 | IN UINT16 *LegacyEdgeLevel OPTIONAL,\r | |
118 | IN UINT16 *ProtectedMask OPTIONAL,\r | |
119 | IN UINT16 *ProtectedEdgeLevel OPTIONAL\r | |
120 | );\r | |
121 | \r | |
122 | /**\r | |
123 | Set the 8259 mode of operation. The base address for the 8259 is different for\r | |
124 | legacy and protected mode. The legacy mode requires the master 8259 to have a\r | |
125 | master base of 0x08 and the slave base of 0x70. The protected mode base locations\r | |
126 | are not defined. Interrupts must be masked by the caller before this function\r | |
127 | is called. The interrupt mask from the current mode is saved. The interrupt\r | |
128 | mask for the new mode is Mask, or if Mask does not exist the previously saved\r | |
129 | mask is used.\r | |
130 | \r | |
131 | @param This The protocol instance pointer.\r | |
132 | @param Mode The mode of operation. i.e. the real mode or protected mode.\r | |
133 | @param Mask Optional interupt mask for the new mode.\r | |
134 | @param EdgeLevel Optional trigger mask for the new mode.\r | |
135 | \r | |
136 | @retval EFI_SUCCESS 8259 programmed.\r | |
137 | @retval EFI_DEVICE_ERROR Error writing to 8259.\r | |
138 | \r | |
139 | **/\r | |
140 | typedef\r | |
141 | EFI_STATUS\r | |
142 | (EFIAPI *EFI_LEGACY_8259_SET_MODE)(\r | |
143 | IN EFI_LEGACY_8259_PROTOCOL *This,\r | |
144 | IN EFI_8259_MODE Mode,\r | |
145 | IN UINT16 *Mask OPTIONAL,\r | |
146 | IN UINT16 *EdgeLevel OPTIONAL\r | |
147 | );\r | |
148 | \r | |
149 | /**\r | |
150 | Convert from IRQ to processor interrupt vector number.\r | |
151 | \r | |
152 | @param This The protocol instance pointer.\r | |
153 | @param Irq 8259 IRQ0 - IRQ15.\r | |
154 | @param Vector The processor vector number that matches an Irq.\r | |
155 | \r | |
156 | @retval EFI_SUCCESS The Vector matching Irq is returned.\r | |
157 | @retval EFI_INVALID_PARAMETER The Irq not valid.\r | |
158 | \r | |
159 | **/\r | |
160 | typedef\r | |
161 | EFI_STATUS\r | |
162 | (EFIAPI *EFI_LEGACY_8259_GET_VECTOR)(\r | |
163 | IN EFI_LEGACY_8259_PROTOCOL *This,\r | |
164 | IN EFI_8259_IRQ Irq,\r | |
165 | OUT UINT8 *Vector\r | |
166 | );\r | |
167 | \r | |
168 | /**\r | |
169 | Enable Irq by unmasking interrupt in 8259\r | |
170 | \r | |
171 | @param This The protocol instance pointer.\r | |
172 | @param Irq 8259 IRQ0 - IRQ15.\r | |
173 | @param LevelTriggered TRUE if level triggered. FALSE if edge triggered.\r | |
174 | \r | |
175 | @retval EFI_SUCCESS The Irq was enabled on 8259.\r | |
176 | @retval EFI_INVALID_PARAMETER The Irq is not valid.\r | |
177 | \r | |
178 | **/\r | |
179 | typedef\r | |
180 | EFI_STATUS\r | |
181 | (EFIAPI *EFI_LEGACY_8259_ENABLE_IRQ)(\r | |
182 | IN EFI_LEGACY_8259_PROTOCOL *This,\r | |
183 | IN EFI_8259_IRQ Irq,\r | |
184 | IN BOOLEAN LevelTriggered\r | |
185 | );\r | |
186 | \r | |
187 | /**\r | |
188 | Disable Irq by masking interrupt in 8259\r | |
189 | \r | |
190 | @param This The protocol instance pointer.\r | |
191 | @param Irq 8259 IRQ0 - IRQ15.\r | |
192 | \r | |
193 | @retval EFI_SUCCESS The Irq was disabled on 8259.\r | |
194 | @retval EFI_INVALID_PARAMETER The Irq is not valid.\r | |
195 | \r | |
196 | **/\r | |
197 | typedef\r | |
198 | EFI_STATUS\r | |
199 | (EFIAPI *EFI_LEGACY_8259_DISABLE_IRQ)(\r | |
200 | IN EFI_LEGACY_8259_PROTOCOL *This,\r | |
201 | IN EFI_8259_IRQ Irq\r | |
202 | );\r | |
203 | \r | |
204 | /**\r | |
205 | PciHandle represents a PCI config space of a PCI function. Vector\r | |
206 | represents Interrupt Pin (from PCI config space) and it is the data\r | |
207 | that is programmed into the Interrupt Line (from the PCI config space)\r | |
208 | register.\r | |
209 | \r | |
210 | @param This The protocol instance pointer.\r | |
211 | @param PciHandle The PCI function to return the vector for.\r | |
212 | @param Vector The vector for the function it matches.\r | |
213 | \r | |
214 | @retval EFI_SUCCESS A valid Vector was returned.\r | |
215 | @retval EFI_INVALID_PARAMETER PciHandle not valid.\r | |
216 | \r | |
217 | **/\r | |
218 | typedef\r | |
219 | EFI_STATUS\r | |
220 | (EFIAPI *EFI_LEGACY_8259_GET_INTERRUPT_LINE)(\r | |
221 | IN EFI_LEGACY_8259_PROTOCOL *This,\r | |
222 | IN EFI_HANDLE PciHandle,\r | |
223 | OUT UINT8 *Vector\r | |
224 | );\r | |
225 | \r | |
226 | /**\r | |
227 | Send an EOI to 8259\r | |
228 | \r | |
229 | @param This The protocol instance pointer.\r | |
230 | @param Irq 8259 IRQ0 - IRQ15.\r | |
231 | \r | |
232 | @retval EFI_SUCCESS EOI was successfully sent to 8259.\r | |
233 | @retval EFI_INVALID_PARAMETER The Irq isnot valid.\r | |
234 | \r | |
235 | **/\r | |
236 | typedef\r | |
237 | EFI_STATUS\r | |
238 | (EFIAPI *EFI_LEGACY_8259_END_OF_INTERRUPT)(\r | |
239 | IN EFI_LEGACY_8259_PROTOCOL *This,\r | |
240 | IN EFI_8259_IRQ Irq\r | |
241 | );\r | |
242 | \r | |
243 | /**\r | |
244 | @par Protocol Description:\r | |
245 | Abstracts the 8259 and APIC hardware control between EFI usage and\r | |
246 | Compatibility16 usage.\r | |
247 | \r | |
248 | @param SetVectorBase\r | |
249 | Sets the vector bases for master and slave PICs.\r | |
250 | \r | |
251 | @param GetMask\r | |
252 | Gets IRQ and edge/level masks for 16-bit real mode and 32-bit protected mode.\r | |
253 | \r | |
254 | @param SetMask\r | |
255 | Sets the IRQ and edge\level masks for 16-bit real mode and 32-bit protected mode.\r | |
256 | \r | |
257 | @param SetMode\r | |
258 | Sets PIC mode to 16-bit real mode or 32-bit protected mode.\r | |
259 | \r | |
260 | @param GetVector\r | |
261 | Gets the base vector assigned to an IRQ.\r | |
262 | \r | |
263 | @param EnableIrq\r | |
264 | Enables an IRQ.\r | |
265 | \r | |
266 | @param DisableIrq\r | |
267 | Disables an IRQ.\r | |
268 | \r | |
269 | @param GetInterruptLine\r | |
270 | Gets an IRQ that is assigned to a PCI device.\r | |
271 | \r | |
272 | @param EndOfInterrupt\r | |
273 | Issues the end of interrupt command.\r | |
274 | \r | |
275 | **/\r | |
276 | struct _EFI_LEGACY_8259_PROTOCOL {\r | |
277 | EFI_LEGACY_8259_SET_VECTOR_BASE SetVectorBase;\r | |
278 | EFI_LEGACY_8259_GET_MASK GetMask;\r | |
279 | EFI_LEGACY_8259_SET_MASK SetMask;\r | |
280 | EFI_LEGACY_8259_SET_MODE SetMode;\r | |
281 | EFI_LEGACY_8259_GET_VECTOR GetVector;\r | |
282 | EFI_LEGACY_8259_ENABLE_IRQ EnableIrq;\r | |
283 | EFI_LEGACY_8259_DISABLE_IRQ DisableIrq;\r | |
284 | EFI_LEGACY_8259_GET_INTERRUPT_LINE GetInterruptLine;\r | |
285 | EFI_LEGACY_8259_END_OF_INTERRUPT EndOfInterrupt;\r | |
286 | };\r | |
287 | \r | |
288 | extern EFI_GUID gEfiLegacy8259ProtocolGuid;\r | |
289 | \r | |
290 | #endif\r |