OvmfPkg/PciHostBridgeLib: clear PCI aperture vars for (re)init

[mirror_edk2.git] / OvmfPkg / Library / QemuFwCfgLib / QemuFwCfgPei.c

/** @file\r
\r
  Stateful and implicitly initialized fw_cfg library implementation.\r
\r
  Copyright (C) 2013, Red Hat, Inc.\r
  Copyright (c) 2011 - 2013, Intel Corporation. All rights reserved.<BR>\r
  Copyright (c) 2017, Advanced Micro Devices. All rights reserved.<BR>\r
\r
  This program and the accompanying materials are licensed and made available\r
  under the terms and conditions of the BSD License which accompanies this\r
  distribution.  The full text of the license may be found at\r
  http://opensource.org/licenses/bsd-license.php\r
\r
  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT\r
  WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
**/\r
\r
#include <Library/BaseLib.h>\r
#include <Library/IoLib.h>\r
#include <Library/DebugLib.h>\r
#include <Library/QemuFwCfgLib.h>\r
#include <Library/MemEncryptSevLib.h>\r
\r
#include "QemuFwCfgLibInternal.h"\r
\r
STATIC BOOLEAN mQemuFwCfgSupported = FALSE;\r
STATIC BOOLEAN mQemuFwCfgDmaSupported;\r
\r
\r
/**\r
  Returns a boolean indicating if the firmware configuration interface\r
  is available or not.\r
\r
  This function may change fw_cfg state.\r
\r
  @retval    TRUE   The interface is available\r
  @retval    FALSE  The interface is not available\r
\r
**/\r
BOOLEAN\r
EFIAPI\r
QemuFwCfgIsAvailable (\r
  VOID\r
  )\r
{\r
  return InternalQemuFwCfgIsAvailable ();\r
}\r
\r
\r
RETURN_STATUS\r
EFIAPI\r
QemuFwCfgInitialize (\r
  VOID\r
  )\r
{\r
  UINT32 Signature;\r
  UINT32 Revision;\r
\r
  //\r
  // Enable the access routines while probing to see if it is supported.\r
  // For probing we always use the IO Port (IoReadFifo8()) access method.\r
  //\r
  mQemuFwCfgSupported = TRUE;\r
  mQemuFwCfgDmaSupported = FALSE;\r
\r
  QemuFwCfgSelectItem (QemuFwCfgItemSignature);\r
  Signature = QemuFwCfgRead32 ();\r
  DEBUG ((EFI_D_INFO, "FW CFG Signature: 0x%x\n", Signature));\r
  QemuFwCfgSelectItem (QemuFwCfgItemInterfaceVersion);\r
  Revision = QemuFwCfgRead32 ();\r
  DEBUG ((EFI_D_INFO, "FW CFG Revision: 0x%x\n", Revision));\r
  if ((Signature != SIGNATURE_32 ('Q', 'E', 'M', 'U')) ||\r
      (Revision < 1)\r
     ) {\r
    DEBUG ((EFI_D_INFO, "QemuFwCfg interface not supported.\n"));\r
    mQemuFwCfgSupported = FALSE;\r
    return RETURN_SUCCESS;\r
  }\r
\r
  if ((Revision & FW_CFG_F_DMA) == 0) {\r
    DEBUG ((DEBUG_INFO, "QemuFwCfg interface (IO Port) is supported.\n"));\r
  } else {\r
    //\r
    // If SEV is enabled then we do not support DMA operations in PEI phase.\r
    // This is mainly because DMA in SEV guest requires using bounce buffer\r
    // (which need to allocate dynamic memory and allocating a PAGE size'd\r
    // buffer can be challenge in PEI phase)\r
    //\r
    if (MemEncryptSevIsEnabled ()) {\r
      DEBUG ((DEBUG_INFO, "SEV: QemuFwCfg fallback to IO Port interface.\n"));\r
    } else {\r
      mQemuFwCfgDmaSupported = TRUE;\r
      DEBUG ((DEBUG_INFO, "QemuFwCfg interface (DMA) is supported.\n"));\r
    }\r
  }\r
  return RETURN_SUCCESS;\r
}\r
\r
\r
/**\r
  Returns a boolean indicating if the firmware configuration interface is\r
  available for library-internal purposes.\r
\r
  This function never changes fw_cfg state.\r
\r
  @retval    TRUE   The interface is available internally.\r
  @retval    FALSE  The interface is not available internally.\r
**/\r
BOOLEAN\r
InternalQemuFwCfgIsAvailable (\r
  VOID\r
  )\r
{\r
  return mQemuFwCfgSupported;\r
}\r
\r
/**\r
  Returns a boolean indicating whether QEMU provides the DMA-like access method\r
  for fw_cfg.\r
\r
  @retval    TRUE   The DMA-like access method is available.\r
  @retval    FALSE  The DMA-like access method is unavailable.\r
**/\r
BOOLEAN\r
InternalQemuFwCfgDmaIsAvailable (\r
  VOID\r
  )\r
{\r
  return mQemuFwCfgDmaSupported;\r
}\r
\r
/**\r
  Transfer an array of bytes, or skip a number of bytes, using the DMA\r
  interface.\r
\r
  @param[in]     Size     Size in bytes to transfer or skip.\r
\r
  @param[in,out] Buffer   Buffer to read data into or write data from. Ignored,\r
                          and may be NULL, if Size is zero, or Control is\r
                          FW_CFG_DMA_CTL_SKIP.\r
\r
  @param[in]     Control  One of the following:\r
                          FW_CFG_DMA_CTL_WRITE - write to fw_cfg from Buffer.\r
                          FW_CFG_DMA_CTL_READ  - read from fw_cfg into Buffer.\r
                          FW_CFG_DMA_CTL_SKIP  - skip bytes in fw_cfg.\r
**/\r
VOID\r
InternalQemuFwCfgDmaBytes (\r
  IN     UINT32   Size,\r
  IN OUT VOID     *Buffer OPTIONAL,\r
  IN     UINT32   Control\r
  )\r
{\r
  volatile FW_CFG_DMA_ACCESS Access;\r
  UINT32                     AccessHigh, AccessLow;\r
  UINT32                     Status;\r
\r
  ASSERT (Control == FW_CFG_DMA_CTL_WRITE || Control == FW_CFG_DMA_CTL_READ ||\r
    Control == FW_CFG_DMA_CTL_SKIP);\r
\r
  if (Size == 0) {\r
    return;\r
  }\r
\r
  //\r
  // SEV does not support DMA operations in PEI stage, we should\r
  // not have reached here.\r
  //\r
  ASSERT (!MemEncryptSevIsEnabled ());\r
\r
  Access.Control = SwapBytes32 (Control);\r
  Access.Length  = SwapBytes32 (Size);\r
  Access.Address = SwapBytes64 ((UINTN)Buffer);\r
\r
  //\r
  // Delimit the transfer from (a) modifications to Access, (b) in case of a\r
  // write, from writes to Buffer by the caller.\r
  //\r
  MemoryFence ();\r
\r
  //\r
  // Start the transfer.\r
  //\r
  AccessHigh = (UINT32)RShiftU64 ((UINTN)&Access, 32);\r
  AccessLow  = (UINT32)(UINTN)&Access;\r
  IoWrite32 (FW_CFG_IO_DMA_ADDRESS,     SwapBytes32 (AccessHigh));\r
  IoWrite32 (FW_CFG_IO_DMA_ADDRESS + 4, SwapBytes32 (AccessLow));\r
\r
  //\r
  // Don't look at Access.Control before starting the transfer.\r
  //\r
  MemoryFence ();\r
\r
  //\r
  // Wait for the transfer to complete.\r
  //\r
  do {\r
    Status = SwapBytes32 (Access.Control);\r
    ASSERT ((Status & FW_CFG_DMA_CTL_ERROR) == 0);\r
  } while (Status != 0);\r
\r
  //\r
  // After a read, the caller will want to use Buffer.\r
  //\r
  MemoryFence ();\r
}\r
\r