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Update definition of EFI_SMM_CPU_SAVE_STATE to exclude Itanium save state. Note this...
[mirror_edk2.git] / OvmfPkg / OvmfPkgIa32.fdf
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CommitLineData
1## @file\r
2# Open Virtual Machine Firmware: FDF\r
3#\r
4# Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>\r
5#\r
6# This program and the accompanying materials\r
7# are licensed and made available under the terms and conditions of the BSD License\r
8# which accompanies this distribution. The full text of the license may be found at\r
9# http://opensource.org/licenses/bsd-license.php\r
10#\r
11# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
12# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
13#\r
14##\r
15\r
16################################################################################\r
17[FD.OVMF]\r
18BaseAddress = 0xFFF00000\r
19Size = 0x00100000\r
20ErasePolarity = 1\r
21BlockSize = 0x1000\r
22NumBlocks = 0x100\r
23\r
240x00000000|0x000EE000\r
25FV = FVMAIN_COMPACT\r
26\r
270x000EE000|0x12000\r
28FV = SECFV\r
29\r
30################################################################################\r
31\r
32[FD.MEMFD]\r
33BaseAddress = 0x800000|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfMemFvBase\r
34Size = 0x400000|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfMemFvSize\r
35ErasePolarity = 1\r
36BlockSize = 0x10000\r
37NumBlocks = 0x40\r
38\r
390x0|0x400000\r
40FV = MAINFV\r
41\r
42################################################################################\r
43\r
44[FV.SECFV]\r
45BlockSize = 0x1000\r
46FvAlignment = 16\r
47ERASE_POLARITY = 1\r
48MEMORY_MAPPED = TRUE\r
49STICKY_WRITE = TRUE\r
50LOCK_CAP = TRUE\r
51LOCK_STATUS = TRUE\r
52WRITE_DISABLED_CAP = TRUE\r
53WRITE_ENABLED_CAP = TRUE\r
54WRITE_STATUS = TRUE\r
55WRITE_LOCK_CAP = TRUE\r
56WRITE_LOCK_STATUS = TRUE\r
57READ_DISABLED_CAP = TRUE\r
58READ_ENABLED_CAP = TRUE\r
59READ_STATUS = TRUE\r
60READ_LOCK_CAP = TRUE\r
61READ_LOCK_STATUS = TRUE\r
62\r
63#\r
64# SEC Phase modules\r
65#\r
66# The code in this FV handles the initial firmware startup, and\r
67# decompresses the MAINFV which handles the majority of the boot sequence.\r
68#\r
69INF OvmfPkg/Sec/SecMain.inf\r
70\r
71INF RuleOverride=RESET_VECTOR UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.inf\r
72\r
73################################################################################\r
74[FV.MAINFV]\r
75BlockSize = 0x10000\r
76FvAlignment = 16\r
77ERASE_POLARITY = 1\r
78MEMORY_MAPPED = TRUE\r
79STICKY_WRITE = TRUE\r
80LOCK_CAP = TRUE\r
81LOCK_STATUS = TRUE\r
82WRITE_DISABLED_CAP = TRUE\r
83WRITE_ENABLED_CAP = TRUE\r
84WRITE_STATUS = TRUE\r
85WRITE_LOCK_CAP = TRUE\r
86WRITE_LOCK_STATUS = TRUE\r
87READ_DISABLED_CAP = TRUE\r
88READ_ENABLED_CAP = TRUE\r
89READ_STATUS = TRUE\r
90READ_LOCK_CAP = TRUE\r
91READ_LOCK_STATUS = TRUE\r
92\r
93#\r
94# Files to be placed in MAIN FV\r
95#\r
96# This firmware volume will have files placed in it uncompressed,\r
97# and then then entire firmware volume will be compressed in a\r
98# single compression operation in order to achieve better\r
99# overall compression.\r
100#\r
101\r
102APRIORI PEI {\r
103 INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf\r
104}\r
105\r
106#\r
107# PEI Phase modules\r
108#\r
109INF MdeModulePkg/Core/Pei/PeiMain.inf\r
110INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf\r
111INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf\r
112INF OvmfPkg/PlatformPei/PlatformPei.inf\r
113INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf\r
114\r
115FILE FV_IMAGE = A4EF5A93-3F1B-4232-A1C4-F0910E6D1D9C {\r
116 SECTION FV_IMAGE = DXEFV\r
117}\r
118\r
119################################################################################\r
120\r
121[FV.DXEFV]\r
122BlockSize = 0x10000\r
123FvAlignment = 16\r
124ERASE_POLARITY = 1\r
125MEMORY_MAPPED = TRUE\r
126STICKY_WRITE = TRUE\r
127LOCK_CAP = TRUE\r
128LOCK_STATUS = TRUE\r
129WRITE_DISABLED_CAP = TRUE\r
130WRITE_ENABLED_CAP = TRUE\r
131WRITE_STATUS = TRUE\r
132WRITE_LOCK_CAP = TRUE\r
133WRITE_LOCK_STATUS = TRUE\r
134READ_DISABLED_CAP = TRUE\r
135READ_ENABLED_CAP = TRUE\r
136READ_STATUS = TRUE\r
137READ_LOCK_CAP = TRUE\r
138READ_LOCK_STATUS = TRUE\r
139\r
140APRIORI DXE {\r
141 INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf\r
142}\r
143\r
144#\r
145# DXE Phase modules\r
146#\r
147INF MdeModulePkg/Core/Dxe/DxeMain.inf\r
148\r
149INF IntelFrameworkModulePkg/Universal/StatusCode/RuntimeDxe/StatusCodeRuntimeDxe.inf\r
150INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf\r
151\r
152INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf\r
153INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf\r
154INF MdeModulePkg/Universal/EbcDxe/EbcDxe.inf\r
155INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf\r
156INF PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf\r
157INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf\r
158INF UefiCpuPkg/CpuDxe/CpuDxe.inf\r
159INF PcAtChipsetPkg/8254TimerDxe/8254Timer.inf\r
160INF PcAtChipsetPkg/PciHostBridgeDxe/PciHostBridgeDxe.inf\r
161INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf\r
162INF PcAtChipsetPkg/KbcResetDxe/Reset.inf\r
163INF MdeModulePkg/Universal/Metronome/Metronome.inf\r
164INF PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf\r
165\r
166INF OvmfPkg/BlockMmioToBlockIoDxe/BlockIo.inf\r
167INF OvmfPkg/EmuVariableFvbRuntimeDxe/Fvb.inf\r
168INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf\r
169INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf\r
170INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf\r
171INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf\r
172INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf\r
173INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf\r
174INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf\r
175INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf\r
176\r
177!ifndef $(SOURCE_DEBUG_ENABLE)\r
178INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf\r
179!endif\r
180\r
181INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf\r
182INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf\r
183INF MdeModulePkg/Universal/PrintDxe/PrintDxe.inf\r
184INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf\r
185INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf\r
186INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf\r
187INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf\r
188INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf\r
189INF IntelFrameworkModulePkg/Bus/Pci/IdeBusDxe/IdeBusDxe.inf\r
190INF PcAtChipsetPkg/Bus/Pci/IdeControllerDxe/IdeControllerDxe.inf\r
191INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf\r
192INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf\r
193\r
194INF PcAtChipsetPkg/IsaAcpiDxe/IsaAcpi.inf\r
195INF IntelFrameworkModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.inf\r
196INF IntelFrameworkModulePkg/Bus/Isa/IsaSerialDxe/IsaSerialDxe.inf\r
197INF IntelFrameworkModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2keyboardDxe.inf\r
198INF IntelFrameworkModulePkg/Bus/Isa/IsaFloppyDxe/IsaFloppyDxe.inf\r
199\r
200INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf\r
201INF MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf\r
202INF RuleOverride=ACPITABLE OvmfPkg/AcpiTables/AcpiTables.inf\r
203INF OptionRomPkg/CirrusLogic5430Dxe/CirrusLogic5430Dxe.inf\r
204\r
205INF RuleOverride = BINARY FatBinPkg/EnhancedFatDxe/Fat.inf\r
206INF RuleOverride = BINARY EdkShellBinPkg/FullShell/FullShell.inf\r
207\r
208FILE FREEFORM = PCD(gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdLogoFile) {\r
209 SECTION RAW = MdeModulePkg/Logo/Logo.bmp\r
210}\r
211\r
212#\r
213# Network modules\r
214#\r
215!if $(NETWORK_ENABLE)\r
216 FILE DRIVER = 5D695E11-9B3F-4b83-B25F-4A8D5D69BE07 {\r
217 SECTION PE32 = Intel3.5/EFI32/E3507E2.EFI\r
218 }\r
219 INF MdeModulePkg/Universal/Network/SnpDxe/SnpDxe.inf\r
220 INF MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf\r
221 INF MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf\r
222 INF MdeModulePkg/Universal/Network/VlanConfigDxe/VlanConfigDxe.inf\r
223 INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf\r
224 INF MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf\r
225 INF MdeModulePkg/Universal/Network/Ip4ConfigDxe/Ip4ConfigDxe.inf\r
226 INF MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf\r
227 INF MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf\r
228 INF MdeModulePkg/Universal/Network/Tcp4Dxe/Tcp4Dxe.inf\r
229 INF MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf\r
230 INF MdeModulePkg/Universal/Network/UefiPxeBcDxe/UefiPxeBcDxe.inf\r
231 INF MdeModulePkg/Universal/Network/IScsiDxe/IScsiDxe.inf\r
232!endif\r
233\r
234################################################################################\r
235\r
236[FV.FVMAIN_COMPACT]\r
237FvAlignment = 16\r
238ERASE_POLARITY = 1\r
239MEMORY_MAPPED = TRUE\r
240STICKY_WRITE = TRUE\r
241LOCK_CAP = TRUE\r
242LOCK_STATUS = TRUE\r
243WRITE_DISABLED_CAP = TRUE\r
244WRITE_ENABLED_CAP = TRUE\r
245WRITE_STATUS = TRUE\r
246WRITE_LOCK_CAP = TRUE\r
247WRITE_LOCK_STATUS = TRUE\r
248READ_DISABLED_CAP = TRUE\r
249READ_ENABLED_CAP = TRUE\r
250READ_STATUS = TRUE\r
251READ_LOCK_CAP = TRUE\r
252READ_LOCK_STATUS = TRUE\r
253\r
254FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {\r
255 SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {\r
256 SECTION FV_IMAGE = MAINFV\r
257 }\r
258 }\r
259\r
260################################################################################\r
261\r
262[Rule.Common.SEC]\r
263 FILE SEC = $(NAMED_GUID) {\r
264 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
265 UI STRING ="$(MODULE_NAME)" Optional\r
266 VERSION STRING ="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
267 }\r
268\r
269[Rule.Common.PEI_CORE]\r
270 FILE PEI_CORE = $(NAMED_GUID) {\r
271 PE32 PE32 Align=32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
272 UI STRING ="$(MODULE_NAME)" Optional\r
273 VERSION STRING ="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
274 }\r
275\r
276[Rule.Common.PEIM]\r
277 FILE PEIM = $(NAMED_GUID) {\r
278 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
279 PE32 PE32 Align=32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
280 UI STRING="$(MODULE_NAME)" Optional\r
281 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
282 }\r
283\r
284[Rule.Common.DXE_CORE]\r
285 FILE DXE_CORE = $(NAMED_GUID) {\r
286 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
287 UI STRING="$(MODULE_NAME)" Optional\r
288 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
289 }\r
290\r
291[Rule.Common.DXE_DRIVER]\r
292 FILE DRIVER = $(NAMED_GUID) {\r
293 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
294 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
295 UI STRING="$(MODULE_NAME)" Optional\r
296 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
297 }\r
298\r
299[Rule.Common.DXE_RUNTIME_DRIVER]\r
300 FILE DRIVER = $(NAMED_GUID) {\r
301 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
302 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
303 UI STRING="$(MODULE_NAME)" Optional\r
304 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
305 }\r
306\r
307[Rule.Common.UEFI_DRIVER]\r
308 FILE DRIVER = $(NAMED_GUID) {\r
309 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
310 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
311 UI STRING="$(MODULE_NAME)" Optional\r
312 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
313 }\r
314\r
315[Rule.Common.UEFI_DRIVER.BINARY]\r
316 FILE DRIVER = $(NAMED_GUID) {\r
317 DXE_DEPEX DXE_DEPEX Optional |.depex\r
318 PE32 PE32 |.efi\r
319 UI STRING="$(MODULE_NAME)" Optional\r
320 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
321 }\r
322 \r
323[Rule.Common.UEFI_APPLICATION]\r
324 FILE APPLICATION = $(NAMED_GUID) {\r
325 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
326 UI STRING="$(MODULE_NAME)" Optional\r
327 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
328 }\r
329\r
330[Rule.Common.UEFI_APPLICATION.BINARY]\r
331 FILE APPLICATION = $(NAMED_GUID) {\r
332 PE32 PE32 |.efi\r
333 UI STRING="$(MODULE_NAME)" Optional\r
334 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
335 }\r
336 \r
337[Rule.Common.USER_DEFINED.ACPITABLE]\r
338 FILE FREEFORM = $(NAMED_GUID) {\r
339 RAW ACPI |.acpi\r
340 RAW ASL |.aml\r
341 }\r
342\r
343[Rule.Common.SEC.RESET_VECTOR]\r
344 FILE RAW = $(NAMED_GUID) {\r
345 RAW RAW |.raw\r
346 }\r
347\r
348[OptionRom.CirrusLogic5446]\r
349INF OptionRomPkg/CirrusLogic5430Dxe/CirrusLogic5430Dxe.inf {\r
350 PCI_DEVICE_ID = 0x00B8\r
351 }\r
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