[mirror_edk2.git] / OvmfPkg / QemuVideoDxe / Initialize.c

/** @file\r
  Graphics Output Protocol functions for the QEMU video controller.\r
\r
  Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>\r
\r
  This program and the accompanying materials\r
  are licensed and made available under the terms and conditions of the BSD License\r
  which accompanies this distribution. The full text of the license may be found at\r
  http://opensource.org/licenses/bsd-license.php\r
\r
  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
**/\r
\r
#include "Qemu.h"\r
\r
\r
///\r
/// Generic Attribute Controller Register Settings\r
///\r
UINT8  AttributeController[21] = {\r
  0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,\r
  0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,\r
  0x41, 0x00, 0x0F, 0x00, 0x00\r
};\r
\r
///\r
/// Generic Graphics Controller Register Settings\r
///\r
UINT8 GraphicsController[9] = {\r
  0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F, 0xFF\r
};\r
\r
//\r
// 640 x 480 x 256 color @ 60 Hertz\r
//\r
UINT8 Crtc_640_480_256_60[28] = {\r
  0x5d, 0x4f, 0x50, 0x82, 0x53, 0x9f, 0x00, 0x3e,\r
  0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
  0xe1, 0x83, 0xdf, 0x50, 0x00, 0xe7, 0x04, 0xe3,\r
  0xff, 0x00, 0x00, 0x22\r
};\r
\r
UINT8 Crtc_640_480_32bpp_60[28] = {\r
  0x5d, 0x4f, 0x50, 0x82, 0x53, 0x9f, 0x00, 0x3e,\r
  0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
  0xe1, 0x83, 0xdf, 0x40, 0x00, 0xe7, 0x04, 0xe3,\r
  0xff, 0x00, 0x00, 0x32\r
};\r
\r
UINT16 Seq_640_480_256_60[15] = {\r
  0x0100, 0x0101, 0x0f02, 0x0003, 0x0e04, 0x1107, 0x0008, 0x4a0b,\r
  0x5b0c, 0x450d, 0x7e0e, 0x2b1b, 0x2f1c, 0x301d, 0x331e\r
};\r
\r
UINT16 Seq_640_480_32bpp_60[15] = {\r
  0x0100, 0x0101, 0x0f02, 0x0003, 0x0e04, 0x1907, 0x0008, 0x4a0b,\r
  0x5b0c, 0x450d, 0x7e0e, 0x2b1b, 0x2f1c, 0x301d, 0x331e\r
};\r
\r
//\r
// 800 x 600 x 256 color @ 60 Hertz\r
//\r
UINT8 Crtc_800_600_256_60[28] = {\r
  0x7F, 0x63, 0x64, 0x80, 0x6B, 0x1B, 0x72, 0xF0,\r
  0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
  0x58, 0x8C, 0x57, 0x64, 0x00, 0x5F, 0x91, 0xE3,\r
  0xFF, 0x00, 0x00, 0x22\r
};\r
\r
UINT8 Crtc_800_600_32bpp_60[28] = {\r
  0x7F, 0x63, 0x64, 0x80, 0x6B, 0x1B, 0x72, 0xF0,\r
  0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
  0x58, 0x8C, 0x57, 0x90, 0x00, 0x5F, 0x91, 0xE3,\r
  0xFF, 0x00, 0x00, 0x32\r
};\r
\r
UINT16 Seq_800_600_256_60[15] = {\r
  0x0100, 0x0101, 0x0f02, 0x0003, 0x0e04, 0x1107, 0x0008, 0x4a0b,\r
  0x5b0c, 0x450d, 0x510e, 0x2b1b, 0x2f1c, 0x301d, 0x3a1e\r
};\r
\r
UINT16 Seq_800_600_32bpp_60[15] = {\r
  0x0100, 0x0101, 0x0f02, 0x0003, 0x0e04, 0x1907, 0x0008, 0x4a0b,\r
  0x5b0c, 0x450d, 0x510e, 0x2b1b, 0x2f1c, 0x301d, 0x3a1e\r
};\r
\r
UINT8 Crtc_960_720_32bpp_60[28] = {\r
  0xA3, 0x77, 0x80, 0x86, 0x85, 0x96, 0x24, 0xFD,\r
  0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
  0x02, 0x88, 0xCF, 0xe0, 0x00, 0x00, 0x64, 0xE3,\r
  0xFF, 0x4A, 0x00, 0x32\r
};\r
\r
UINT16 Seq_960_720_32bpp_60[15] = {\r
  0x0100, 0x0101, 0x0f02, 0x0003, 0x0e04, 0x1907, 0x0008, 0x4a0b,\r
  0x5b0c, 0x450d, 0x760e, 0x2b1b, 0x2f1c, 0x301d, 0x341e\r
};\r
\r
//\r
// 1024 x 768 x 256 color @ 60 Hertz\r
//\r
UINT8 Crtc_1024_768_256_60[28] = {\r
  0xA3, 0x7F, 0x80, 0x86, 0x85, 0x96, 0x24, 0xFD,\r
  0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
  0x02, 0x88, 0xFF, 0x80, 0x00, 0x00, 0x24, 0xE3,\r
  0xFF, 0x4A, 0x00, 0x22\r
};\r
\r
UINT16 Seq_1024_768_256_60[15] = {\r
  0x0100, 0x0101, 0x0f02, 0x0003, 0x0e04, 0x1107, 0x0008, 0x4a0b,\r
  0x5b0c, 0x450d, 0x760e, 0x2b1b, 0x2f1c, 0x301d, 0x341e\r
};\r
\r
//\r
// 1024 x 768 x 24-bit color @ 60 Hertz\r
//\r
UINT8 Crtc_1024_768_24bpp_60[28] = {\r
  0xA3, 0x7F, 0x80, 0x86, 0x85, 0x96, 0x24, 0xFD,\r
  0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
  0x02, 0x88, 0xFF, 0x80, 0x00, 0x00, 0x24, 0xE3,\r
  0xFF, 0x4A, 0x00, 0x32\r
};\r
\r
UINT16 Seq_1024_768_24bpp_60[15] = {\r
  0x0100, 0x0101, 0x0f02, 0x0003, 0x0e04, 0x1507, 0x0008, 0x4a0b,\r
  0x5b0c, 0x450d, 0x760e, 0x2b1b, 0x2f1c, 0x301d, 0x341e\r
};\r
\r
UINT8 Crtc_1024_768_32bpp_60[28] = {\r
  0xA3, 0x7F, 0x80, 0x86, 0x85, 0x96, 0x24, 0xFD,\r
  0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
  0x02, 0x88, 0xFF, 0xe0, 0x00, 0x00, 0x64, 0xE3,\r
  0xFF, 0x4A, 0x00, 0x32\r
};\r
\r
UINT16 Seq_1024_768_32bpp_60[15] = {\r
  0x0100, 0x0101, 0x0f02, 0x0003, 0x0e04, 0x1907, 0x0008, 0x4a0b,\r
  0x5b0c, 0x450d, 0x760e, 0x2b1b, 0x2f1c, 0x301d, 0x341e\r
};\r
\r
///\r
/// Table of supported video modes\r
///\r
QEMU_VIDEO_CIRRUS_MODES  QemuVideoCirrusModes[] = {\r
//  {  640, 480, 8, 60, Crtc_640_480_256_60,  Seq_640_480_256_60,  0xe3 },\r
//  {  800, 600, 8, 60, Crtc_800_600_256_60,  Seq_800_600_256_60,  0xef },\r
  {  640, 480, 32, 60, Crtc_640_480_32bpp_60,  Seq_640_480_32bpp_60,  0xef },\r
  {  800, 600, 32, 60, Crtc_800_600_32bpp_60,  Seq_800_600_32bpp_60,  0xef },\r
//  { 1024, 768, 8, 60, Crtc_1024_768_256_60, Seq_1024_768_256_60, 0xef }\r
  { 1024, 768, 24, 60, Crtc_1024_768_24bpp_60, Seq_1024_768_24bpp_60, 0xef }\r
//  { 1024, 768, 32, 60, Crtc_1024_768_32bpp_60, Seq_1024_768_32bpp_60, 0xef }\r
//  { 960, 720, 32, 60, Crtc_960_720_32bpp_60, Seq_1024_768_32bpp_60, 0xef }\r
};\r
\r
#define QEMU_VIDEO_CIRRUS_MODE_COUNT \\r
  (sizeof (QemuVideoCirrusModes) / sizeof (QemuVideoCirrusModes[0]))\r
\r
/**\r
  Construct the valid video modes for QemuVideo.\r
\r
**/\r
EFI_STATUS\r
QemuVideoCirrusModeSetup (\r
  QEMU_VIDEO_PRIVATE_DATA  *Private\r
  )\r
{\r
  UINT32                                 Index;\r
  QEMU_VIDEO_MODE_DATA                   *ModeData;\r
  QEMU_VIDEO_CIRRUS_MODES                *VideoMode;\r
\r
  //\r
  // Setup Video Modes\r
  //\r
  Private->ModeData = AllocatePool (\r
                        sizeof (Private->ModeData[0]) * QEMU_VIDEO_CIRRUS_MODE_COUNT\r
                        );\r
  if (Private->ModeData == NULL) {\r
    return EFI_OUT_OF_RESOURCES;\r
  }\r
  ModeData = Private->ModeData;\r
  VideoMode = &QemuVideoCirrusModes[0];\r
  for (Index = 0; Index < QEMU_VIDEO_CIRRUS_MODE_COUNT; Index ++) {\r
    ModeData->InternalModeIndex = Index;\r
    ModeData->HorizontalResolution          = VideoMode->Width;\r
    ModeData->VerticalResolution            = VideoMode->Height;\r
    ModeData->ColorDepth                    = VideoMode->ColorDepth;\r
    ModeData->RefreshRate                   = VideoMode->RefreshRate;\r
    DEBUG ((EFI_D_INFO,\r
      "Adding Mode %d as Cirrus Internal Mode %d: %dx%d, %d-bit, %d Hz\n",\r
      (INT32) (ModeData - Private->ModeData),\r
      ModeData->InternalModeIndex,\r
      ModeData->HorizontalResolution,\r
      ModeData->VerticalResolution,\r
      ModeData->ColorDepth,\r
      ModeData->RefreshRate\r
      ));\r
\r
    ModeData ++ ;\r
    VideoMode ++;\r
  }\r
  Private->MaxMode = ModeData - Private->ModeData;\r
\r
  return EFI_SUCCESS;\r
}\r
\r
///\r
/// Table of supported video modes\r
///\r
QEMU_VIDEO_BOCHS_MODES  QemuVideoBochsModes[] = {\r
  {  640,  480, 32 },\r
  {  800,  480, 32 },\r
  {  800,  600, 32 },\r
  {  832,  624, 32 },\r
  {  960,  640, 32 },\r
  { 1024,  600, 32 },\r
  { 1024,  768, 32 },\r
  { 1152,  864, 32 },\r
  { 1152,  870, 32 },\r
  { 1280,  720, 32 },\r
  { 1280,  760, 32 },\r
  { 1280,  768, 32 },\r
  { 1280,  800, 32 },\r
  { 1280,  960, 32 },\r
  { 1280, 1024, 32 },\r
  { 1360,  768, 32 },\r
  { 1366,  768, 32 },\r
  { 1400, 1050, 32 },\r
  { 1440,  900, 32 },\r
  { 1600,  900, 32 },\r
  { 1600, 1200, 32 },\r
  { 1680, 1050, 32 },\r
  { 1920, 1080, 32 },\r
  { 1920, 1200, 32 },\r
  { 1920, 1440, 32 },\r
  { 2000, 2000, 32 },\r
  { 2048, 1536, 32 },\r
  { 2048, 2048, 32 },\r
  { 2560, 1440, 32 },\r
  { 2560, 1600, 32 },\r
  { 2560, 2048, 32 },\r
  { 2800, 2100, 32 },\r
  { 3200, 2400, 32 },\r
  { 3840, 2160, 32 },\r
  { 4096, 2160, 32 },\r
  { 7680, 4320, 32 },\r
  { 8192, 4320, 32 }\r
};\r
\r
#define QEMU_VIDEO_BOCHS_MODE_COUNT \\r
  (sizeof (QemuVideoBochsModes) / sizeof (QemuVideoBochsModes[0]))\r
\r
EFI_STATUS\r
QemuVideoBochsModeSetup (\r
  QEMU_VIDEO_PRIVATE_DATA  *Private\r
  )\r
{\r
  UINT32                                 AvailableFbSize;\r
  UINT32                                 Index;\r
  QEMU_VIDEO_MODE_DATA                   *ModeData;\r
  QEMU_VIDEO_BOCHS_MODES                 *VideoMode;\r
\r
  //\r
  // fetch available framebuffer size\r
  //\r
  AvailableFbSize  = BochsRead (Private, VBE_DISPI_INDEX_VIDEO_MEMORY_64K);\r
  AvailableFbSize *= SIZE_64KB;\r
  DEBUG ((EFI_D_VERBOSE, "%a: AvailableFbSize=0x%x\n", __FUNCTION__,\r
    AvailableFbSize));\r
\r
  //\r
  // Setup Video Modes\r
  //\r
  Private->ModeData = AllocatePool (\r
                        sizeof (Private->ModeData[0]) * QEMU_VIDEO_BOCHS_MODE_COUNT\r
                        );\r
  if (Private->ModeData == NULL) {\r
    return EFI_OUT_OF_RESOURCES;\r
  }\r
  ModeData = Private->ModeData;\r
  VideoMode = &QemuVideoBochsModes[0];\r
  for (Index = 0; Index < QEMU_VIDEO_BOCHS_MODE_COUNT; Index ++) {\r
    UINTN RequiredFbSize;\r
\r
    ASSERT (VideoMode->ColorDepth % 8 == 0);\r
    RequiredFbSize = (UINTN) VideoMode->Width * VideoMode->Height *\r
                     (VideoMode->ColorDepth / 8);\r
    if (RequiredFbSize <= AvailableFbSize) {\r
      ModeData->InternalModeIndex    = Index;\r
      ModeData->HorizontalResolution = VideoMode->Width;\r
      ModeData->VerticalResolution   = VideoMode->Height;\r
      ModeData->ColorDepth           = VideoMode->ColorDepth;\r
      ModeData->RefreshRate          = 60;\r
      DEBUG ((EFI_D_INFO,\r
        "Adding Mode %d as Bochs Internal Mode %d: %dx%d, %d-bit, %d Hz\n",\r
        (INT32) (ModeData - Private->ModeData),\r
        ModeData->InternalModeIndex,\r
        ModeData->HorizontalResolution,\r
        ModeData->VerticalResolution,\r
        ModeData->ColorDepth,\r
        ModeData->RefreshRate\r
        ));\r
\r
      ModeData ++ ;\r
    }\r
    VideoMode ++;\r
  }\r
  Private->MaxMode = ModeData - Private->ModeData;\r
\r
  return EFI_SUCCESS;\r
}\r
\r
Commit	Line	Data
	1	/** @file\r
	2	Graphics Output Protocol functions for the QEMU video controller.\r
	3	\r
	4	Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>\r
	5	\r
	6	This program and the accompanying materials\r
	7	are licensed and made available under the terms and conditions of the BSD License\r
	8	which accompanies this distribution. The full text of the license may be found at\r
	9	http://opensource.org/licenses/bsd-license.php\r
	10	\r
	11	THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
	12	WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
	13	\r
	14	**/\r
	15	\r
	16	#include "Qemu.h"\r
	17	\r
	18	\r
	19	///\r
	20	/// Generic Attribute Controller Register Settings\r
	21	///\r
	22	UINT8 AttributeController[21] = {\r
	23	0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,\r
	24	0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,\r
	25	0x41, 0x00, 0x0F, 0x00, 0x00\r
	26	};\r
	27	\r
	28	///\r
	29	/// Generic Graphics Controller Register Settings\r
	30	///\r
	31	UINT8 GraphicsController[9] = {\r
	32	0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F, 0xFF\r
	33	};\r
	34	\r
	35	//\r
	36	// 640 x 480 x 256 color @ 60 Hertz\r
	37	//\r
	38	UINT8 Crtc_640_480_256_60[28] = {\r
	39	0x5d, 0x4f, 0x50, 0x82, 0x53, 0x9f, 0x00, 0x3e,\r
	40	0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
	41	0xe1, 0x83, 0xdf, 0x50, 0x00, 0xe7, 0x04, 0xe3,\r
	42	0xff, 0x00, 0x00, 0x22\r
	43	};\r
	44	\r
	45	UINT8 Crtc_640_480_32bpp_60[28] = {\r
	46	0x5d, 0x4f, 0x50, 0x82, 0x53, 0x9f, 0x00, 0x3e,\r
	47	0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
	48	0xe1, 0x83, 0xdf, 0x40, 0x00, 0xe7, 0x04, 0xe3,\r
	49	0xff, 0x00, 0x00, 0x32\r
	50	};\r
	51	\r
	52	UINT16 Seq_640_480_256_60[15] = {\r
	53	0x0100, 0x0101, 0x0f02, 0x0003, 0x0e04, 0x1107, 0x0008, 0x4a0b,\r
	54	0x5b0c, 0x450d, 0x7e0e, 0x2b1b, 0x2f1c, 0x301d, 0x331e\r
	55	};\r
	56	\r
	57	UINT16 Seq_640_480_32bpp_60[15] = {\r
	58	0x0100, 0x0101, 0x0f02, 0x0003, 0x0e04, 0x1907, 0x0008, 0x4a0b,\r
	59	0x5b0c, 0x450d, 0x7e0e, 0x2b1b, 0x2f1c, 0x301d, 0x331e\r
	60	};\r
	61	\r
	62	//\r
	63	// 800 x 600 x 256 color @ 60 Hertz\r
	64	//\r
	65	UINT8 Crtc_800_600_256_60[28] = {\r
	66	0x7F, 0x63, 0x64, 0x80, 0x6B, 0x1B, 0x72, 0xF0,\r
	67	0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
	68	0x58, 0x8C, 0x57, 0x64, 0x00, 0x5F, 0x91, 0xE3,\r
	69	0xFF, 0x00, 0x00, 0x22\r
	70	};\r
	71	\r
	72	UINT8 Crtc_800_600_32bpp_60[28] = {\r
	73	0x7F, 0x63, 0x64, 0x80, 0x6B, 0x1B, 0x72, 0xF0,\r
	74	0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
	75	0x58, 0x8C, 0x57, 0x90, 0x00, 0x5F, 0x91, 0xE3,\r
	76	0xFF, 0x00, 0x00, 0x32\r
	77	};\r
	78	\r
	79	UINT16 Seq_800_600_256_60[15] = {\r
	80	0x0100, 0x0101, 0x0f02, 0x0003, 0x0e04, 0x1107, 0x0008, 0x4a0b,\r
	81	0x5b0c, 0x450d, 0x510e, 0x2b1b, 0x2f1c, 0x301d, 0x3a1e\r
	82	};\r
	83	\r
	84	UINT16 Seq_800_600_32bpp_60[15] = {\r
	85	0x0100, 0x0101, 0x0f02, 0x0003, 0x0e04, 0x1907, 0x0008, 0x4a0b,\r
	86	0x5b0c, 0x450d, 0x510e, 0x2b1b, 0x2f1c, 0x301d, 0x3a1e\r
	87	};\r
	88	\r
	89	UINT8 Crtc_960_720_32bpp_60[28] = {\r
	90	0xA3, 0x77, 0x80, 0x86, 0x85, 0x96, 0x24, 0xFD,\r
	91	0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
	92	0x02, 0x88, 0xCF, 0xe0, 0x00, 0x00, 0x64, 0xE3,\r
	93	0xFF, 0x4A, 0x00, 0x32\r
	94	};\r
	95	\r
	96	UINT16 Seq_960_720_32bpp_60[15] = {\r
	97	0x0100, 0x0101, 0x0f02, 0x0003, 0x0e04, 0x1907, 0x0008, 0x4a0b,\r
	98	0x5b0c, 0x450d, 0x760e, 0x2b1b, 0x2f1c, 0x301d, 0x341e\r
	99	};\r
	100	\r
	101	//\r
	102	// 1024 x 768 x 256 color @ 60 Hertz\r
	103	//\r
	104	UINT8 Crtc_1024_768_256_60[28] = {\r
	105	0xA3, 0x7F, 0x80, 0x86, 0x85, 0x96, 0x24, 0xFD,\r
	106	0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
	107	0x02, 0x88, 0xFF, 0x80, 0x00, 0x00, 0x24, 0xE3,\r
	108	0xFF, 0x4A, 0x00, 0x22\r
	109	};\r
	110	\r
	111	UINT16 Seq_1024_768_256_60[15] = {\r
	112	0x0100, 0x0101, 0x0f02, 0x0003, 0x0e04, 0x1107, 0x0008, 0x4a0b,\r
	113	0x5b0c, 0x450d, 0x760e, 0x2b1b, 0x2f1c, 0x301d, 0x341e\r
	114	};\r
	115	\r
	116	//\r
	117	// 1024 x 768 x 24-bit color @ 60 Hertz\r
	118	//\r
	119	UINT8 Crtc_1024_768_24bpp_60[28] = {\r
	120	0xA3, 0x7F, 0x80, 0x86, 0x85, 0x96, 0x24, 0xFD,\r
	121	0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
	122	0x02, 0x88, 0xFF, 0x80, 0x00, 0x00, 0x24, 0xE3,\r
	123	0xFF, 0x4A, 0x00, 0x32\r
	124	};\r
	125	\r
	126	UINT16 Seq_1024_768_24bpp_60[15] = {\r
	127	0x0100, 0x0101, 0x0f02, 0x0003, 0x0e04, 0x1507, 0x0008, 0x4a0b,\r
	128	0x5b0c, 0x450d, 0x760e, 0x2b1b, 0x2f1c, 0x301d, 0x341e\r
	129	};\r
	130	\r
	131	UINT8 Crtc_1024_768_32bpp_60[28] = {\r
	132	0xA3, 0x7F, 0x80, 0x86, 0x85, 0x96, 0x24, 0xFD,\r
	133	0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
	134	0x02, 0x88, 0xFF, 0xe0, 0x00, 0x00, 0x64, 0xE3,\r
	135	0xFF, 0x4A, 0x00, 0x32\r
	136	};\r
	137	\r
	138	UINT16 Seq_1024_768_32bpp_60[15] = {\r
	139	0x0100, 0x0101, 0x0f02, 0x0003, 0x0e04, 0x1907, 0x0008, 0x4a0b,\r
	140	0x5b0c, 0x450d, 0x760e, 0x2b1b, 0x2f1c, 0x301d, 0x341e\r
	141	};\r
	142	\r
	143	///\r
	144	/// Table of supported video modes\r
	145	///\r
	146	QEMU_VIDEO_CIRRUS_MODES QemuVideoCirrusModes[] = {\r
	147	// { 640, 480, 8, 60, Crtc_640_480_256_60, Seq_640_480_256_60, 0xe3 },\r
	148	// { 800, 600, 8, 60, Crtc_800_600_256_60, Seq_800_600_256_60, 0xef },\r
	149	{ 640, 480, 32, 60, Crtc_640_480_32bpp_60, Seq_640_480_32bpp_60, 0xef },\r
	150	{ 800, 600, 32, 60, Crtc_800_600_32bpp_60, Seq_800_600_32bpp_60, 0xef },\r
	151	// { 1024, 768, 8, 60, Crtc_1024_768_256_60, Seq_1024_768_256_60, 0xef }\r
	152	{ 1024, 768, 24, 60, Crtc_1024_768_24bpp_60, Seq_1024_768_24bpp_60, 0xef }\r
	153	// { 1024, 768, 32, 60, Crtc_1024_768_32bpp_60, Seq_1024_768_32bpp_60, 0xef }\r
	154	// { 960, 720, 32, 60, Crtc_960_720_32bpp_60, Seq_1024_768_32bpp_60, 0xef }\r
	155	};\r
	156	\r
	157	#define QEMU_VIDEO_CIRRUS_MODE_COUNT \\r
	158	(sizeof (QemuVideoCirrusModes) / sizeof (QemuVideoCirrusModes[0]))\r
	159	\r
	160	/**\r
	161	Construct the valid video modes for QemuVideo.\r
	162	\r
	163	**/\r
	164	EFI_STATUS\r
	165	QemuVideoCirrusModeSetup (\r
	166	QEMU_VIDEO_PRIVATE_DATA *Private\r
	167	)\r
	168	{\r
	169	UINT32 Index;\r
	170	QEMU_VIDEO_MODE_DATA *ModeData;\r
	171	QEMU_VIDEO_CIRRUS_MODES *VideoMode;\r
	172	\r
	173	//\r
	174	// Setup Video Modes\r
	175	//\r
	176	Private->ModeData = AllocatePool (\r
	177	sizeof (Private->ModeData[0]) * QEMU_VIDEO_CIRRUS_MODE_COUNT\r
	178	);\r
	179	if (Private->ModeData == NULL) {\r
	180	return EFI_OUT_OF_RESOURCES;\r
	181	}\r
	182	ModeData = Private->ModeData;\r
	183	VideoMode = &QemuVideoCirrusModes[0];\r
	184	for (Index = 0; Index < QEMU_VIDEO_CIRRUS_MODE_COUNT; Index ++) {\r
	185	ModeData->InternalModeIndex = Index;\r
	186	ModeData->HorizontalResolution = VideoMode->Width;\r
	187	ModeData->VerticalResolution = VideoMode->Height;\r
	188	ModeData->ColorDepth = VideoMode->ColorDepth;\r
	189	ModeData->RefreshRate = VideoMode->RefreshRate;\r
	190	DEBUG ((EFI_D_INFO,\r
	191	"Adding Mode %d as Cirrus Internal Mode %d: %dx%d, %d-bit, %d Hz\n",\r
	192	(INT32) (ModeData - Private->ModeData),\r
	193	ModeData->InternalModeIndex,\r
	194	ModeData->HorizontalResolution,\r
	195	ModeData->VerticalResolution,\r
	196	ModeData->ColorDepth,\r
	197	ModeData->RefreshRate\r
	198	));\r
	199	\r
	200	ModeData ++ ;\r
	201	VideoMode ++;\r
	202	}\r
	203	Private->MaxMode = ModeData - Private->ModeData;\r
	204	\r
	205	return EFI_SUCCESS;\r
	206	}\r
	207	\r
	208	///\r
	209	/// Table of supported video modes\r
	210	///\r
	211	QEMU_VIDEO_BOCHS_MODES QemuVideoBochsModes[] = {\r
	212	{ 640, 480, 32 },\r
	213	{ 800, 480, 32 },\r
	214	{ 800, 600, 32 },\r
	215	{ 832, 624, 32 },\r
	216	{ 960, 640, 32 },\r
	217	{ 1024, 600, 32 },\r
	218	{ 1024, 768, 32 },\r
	219	{ 1152, 864, 32 },\r
	220	{ 1152, 870, 32 },\r
	221	{ 1280, 720, 32 },\r
	222	{ 1280, 760, 32 },\r
	223	{ 1280, 768, 32 },\r
	224	{ 1280, 800, 32 },\r
	225	{ 1280, 960, 32 },\r
	226	{ 1280, 1024, 32 },\r
	227	{ 1360, 768, 32 },\r
	228	{ 1366, 768, 32 },\r
	229	{ 1400, 1050, 32 },\r
	230	{ 1440, 900, 32 },\r
	231	{ 1600, 900, 32 },\r
	232	{ 1600, 1200, 32 },\r
	233	{ 1680, 1050, 32 },\r
	234	{ 1920, 1080, 32 },\r
	235	{ 1920, 1200, 32 },\r
	236	{ 1920, 1440, 32 },\r
	237	{ 2000, 2000, 32 },\r
	238	{ 2048, 1536, 32 },\r
	239	{ 2048, 2048, 32 },\r
	240	{ 2560, 1440, 32 },\r
	241	{ 2560, 1600, 32 },\r
	242	{ 2560, 2048, 32 },\r
	243	{ 2800, 2100, 32 },\r
	244	{ 3200, 2400, 32 },\r
	245	{ 3840, 2160, 32 },\r
	246	{ 4096, 2160, 32 },\r
	247	{ 7680, 4320, 32 },\r
	248	{ 8192, 4320, 32 }\r
	249	};\r
	250	\r
	251	#define QEMU_VIDEO_BOCHS_MODE_COUNT \\r
	252	(sizeof (QemuVideoBochsModes) / sizeof (QemuVideoBochsModes[0]))\r
	253	\r
	254	EFI_STATUS\r
	255	QemuVideoBochsModeSetup (\r
	256	QEMU_VIDEO_PRIVATE_DATA *Private\r
	257	)\r
	258	{\r
	259	UINT32 AvailableFbSize;\r
	260	UINT32 Index;\r
	261	QEMU_VIDEO_MODE_DATA *ModeData;\r
	262	QEMU_VIDEO_BOCHS_MODES *VideoMode;\r
	263	\r
	264	//\r
	265	// fetch available framebuffer size\r
	266	//\r
	267	AvailableFbSize = BochsRead (Private, VBE_DISPI_INDEX_VIDEO_MEMORY_64K);\r
	268	AvailableFbSize *= SIZE_64KB;\r
	269	DEBUG ((EFI_D_VERBOSE, "%a: AvailableFbSize=0x%x\n", __FUNCTION__,\r
	270	AvailableFbSize));\r
	271	\r
	272	//\r
	273	// Setup Video Modes\r
	274	//\r
	275	Private->ModeData = AllocatePool (\r
	276	sizeof (Private->ModeData[0]) * QEMU_VIDEO_BOCHS_MODE_COUNT\r
	277	);\r
	278	if (Private->ModeData == NULL) {\r
	279	return EFI_OUT_OF_RESOURCES;\r
	280	}\r
	281	ModeData = Private->ModeData;\r
	282	VideoMode = &QemuVideoBochsModes[0];\r
	283	for (Index = 0; Index < QEMU_VIDEO_BOCHS_MODE_COUNT; Index ++) {\r
	284	UINTN RequiredFbSize;\r
	285	\r
	286	ASSERT (VideoMode->ColorDepth % 8 == 0);\r
	287	RequiredFbSize = (UINTN) VideoMode->Width * VideoMode->Height *\r
	288	(VideoMode->ColorDepth / 8);\r
	289	if (RequiredFbSize <= AvailableFbSize) {\r
	290	ModeData->InternalModeIndex = Index;\r
	291	ModeData->HorizontalResolution = VideoMode->Width;\r
	292	ModeData->VerticalResolution = VideoMode->Height;\r
	293	ModeData->ColorDepth = VideoMode->ColorDepth;\r
	294	ModeData->RefreshRate = 60;\r
	295	DEBUG ((EFI_D_INFO,\r
	296	"Adding Mode %d as Bochs Internal Mode %d: %dx%d, %d-bit, %d Hz\n",\r
	297	(INT32) (ModeData - Private->ModeData),\r
	298	ModeData->InternalModeIndex,\r
	299	ModeData->HorizontalResolution,\r
	300	ModeData->VerticalResolution,\r
	301	ModeData->ColorDepth,\r
	302	ModeData->RefreshRate\r
	303	));\r
	304	\r
	305	ModeData ++ ;\r
	306	}\r
	307	VideoMode ++;\r
	308	}\r
	309	Private->MaxMode = ModeData - Private->ModeData;\r
	310	\r
	311	return EFI_SUCCESS;\r
	312	}\r
	313	\r