UefiCpuPkg: Move AsmRelocateApLoopStart from Mpfuncs.nasm to AmdSev.nasm

[mirror_edk2.git] / OvmfPkg / ResetVector / Ia32 / PageTables64.asm

;------------------------------------------------------------------------------\r
; @file\r
; Sets the CR3 register for 64-bit paging\r
;\r
; Copyright (c) 2008 - 2013, Intel Corporation. All rights reserved.<BR>\r
; Copyright (c) 2017 - 2020, Advanced Micro Devices, Inc. All rights reserved.<BR>\r
; SPDX-License-Identifier: BSD-2-Clause-Patent\r
;\r
;------------------------------------------------------------------------------\r
\r
BITS    32\r
\r
%define PAGE_PRESENT            0x01\r
%define PAGE_READ_WRITE         0x02\r
%define PAGE_USER_SUPERVISOR    0x04\r
%define PAGE_WRITE_THROUGH      0x08\r
%define PAGE_CACHE_DISABLE     0x010\r
%define PAGE_ACCESSED          0x020\r
%define PAGE_DIRTY             0x040\r
%define PAGE_PAT               0x080\r
%define PAGE_GLOBAL           0x0100\r
%define PAGE_2M_MBO            0x080\r
%define PAGE_2M_PAT          0x01000\r
\r
%define PAGE_4K_PDE_ATTR (PAGE_ACCESSED + \\r
                          PAGE_DIRTY + \\r
                          PAGE_READ_WRITE + \\r
                          PAGE_PRESENT)\r
\r
%define PAGE_2M_PDE_ATTR (PAGE_2M_MBO + \\r
                          PAGE_ACCESSED + \\r
                          PAGE_DIRTY + \\r
                          PAGE_READ_WRITE + \\r
                          PAGE_PRESENT)\r
\r
%define PAGE_PDP_ATTR (PAGE_ACCESSED + \\r
                       PAGE_READ_WRITE + \\r
                       PAGE_PRESENT)\r
\r
%define TDX_BSP         1\r
%define TDX_AP          2\r
\r
;\r
; Modified:  EAX, EBX, ECX, EDX\r
;\r
SetCr3ForPageTables64:\r
    ; Check the TDX features.\r
    ; If it is TDX APs, then jump to SetCr3 directly.\r
    ; In TD guest the initialization is done by BSP, including building\r
    ; the page tables. APs will spin on until byte[TDX_WORK_AREA_PGTBL_READY]\r
    ; is set.\r
    OneTimeCall   CheckTdxFeaturesBeforeBuildPagetables\r
    cmp       eax, TDX_BSP\r
    je        ClearOvmfPageTables\r
    cmp       eax, TDX_AP\r
    je        SetCr3\r
\r
    ; Check whether the SEV is active and populate the SevEsWorkArea\r
    OneTimeCall   CheckSevFeatures\r
\r
    ; If SEV is enabled, the C-bit position is always above 31.\r
    ; The mask will be saved in the EDX and applied during the\r
    ; the page table build below.\r
    OneTimeCall   GetSevCBitMaskAbove31\r
\r
ClearOvmfPageTables:\r
    ;\r
    ; For OVMF, build some initial page tables at\r
    ; PcdOvmfSecPageTablesBase - (PcdOvmfSecPageTablesBase + 0x6000).\r
    ;\r
    ; This range should match with PcdOvmfSecPageTablesSize which is\r
    ; declared in the FDF files.\r
    ;\r
    ; At the end of PEI, the pages tables will be rebuilt into a\r
    ; more permanent location by DxeIpl.\r
    ;\r
\r
    mov     ecx, 6 * 0x1000 / 4\r
    xor     eax, eax\r
clearPageTablesMemoryLoop:\r
    mov     dword[ecx * 4 + PT_ADDR (0) - 4], eax\r
    loop    clearPageTablesMemoryLoop\r
\r
    ;\r
    ; Top level Page Directory Pointers (1 * 512GB entry)\r
    ;\r
    mov     dword[PT_ADDR (0)], PT_ADDR (0x1000) + PAGE_PDP_ATTR\r
    mov     dword[PT_ADDR (4)], edx\r
\r
    ;\r
    ; Next level Page Directory Pointers (4 * 1GB entries => 4GB)\r
    ;\r
    mov     dword[PT_ADDR (0x1000)], PT_ADDR (0x2000) + PAGE_PDP_ATTR\r
    mov     dword[PT_ADDR (0x1004)], edx\r
    mov     dword[PT_ADDR (0x1008)], PT_ADDR (0x3000) + PAGE_PDP_ATTR\r
    mov     dword[PT_ADDR (0x100C)], edx\r
    mov     dword[PT_ADDR (0x1010)], PT_ADDR (0x4000) + PAGE_PDP_ATTR\r
    mov     dword[PT_ADDR (0x1014)], edx\r
    mov     dword[PT_ADDR (0x1018)], PT_ADDR (0x5000) + PAGE_PDP_ATTR\r
    mov     dword[PT_ADDR (0x101C)], edx\r
\r
    ;\r
    ; Page Table Entries (2048 * 2MB entries => 4GB)\r
    ;\r
    mov     ecx, 0x800\r
pageTableEntriesLoop:\r
    mov     eax, ecx\r
    dec     eax\r
    shl     eax, 21\r
    add     eax, PAGE_2M_PDE_ATTR\r
    mov     [ecx * 8 + PT_ADDR (0x2000 - 8)], eax\r
    mov     [(ecx * 8 + PT_ADDR (0x2000 - 8)) + 4], edx\r
    loop    pageTableEntriesLoop\r
\r
    ; Clear the C-bit from the GHCB page if the SEV-ES is enabled.\r
    OneTimeCall   SevClearPageEncMaskForGhcbPage\r
\r
    ; TDX will do some PostBuildPages task, such as setting\r
    ; byte[TDX_WORK_AREA_PGTBL_READY].\r
    OneTimeCall   TdxPostBuildPageTables\r
\r
SetCr3:\r
    ;\r
    ; Set CR3 now that the paging structures are available\r
    ;\r
    mov     eax, PT_ADDR (0)\r
    mov     cr3, eax\r
\r
    OneTimeCallRet SetCr3ForPageTables64\r