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1 | ;------------------------------------------------------------------------------\r | |
2 | ;\r | |
3 | ; Copyright (c) 2010 - 2015, Intel Corporation. All rights reserved.<BR>\r | |
4 | ; This program and the accompanying materials\r | |
5 | ; are licensed and made available under the terms and conditions of the BSD License\r | |
6 | ; which accompanies this distribution. The full text of the license may be found at\r | |
7 | ; http://opensource.org/licenses/bsd-license.php.\r | |
8 | ;\r | |
9 | ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
10 | ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
11 | ;\r | |
12 | ; Module Name:\r | |
13 | ;\r | |
14 | ; AsmFuncs.asm\r | |
15 | ;\r | |
16 | ; Abstract:\r | |
17 | ;\r | |
18 | ; Debug interrupt handle functions.\r | |
19 | ;\r | |
20 | ;------------------------------------------------------------------------------\r | |
21 | \r | |
22 | #include "DebugException.h"\r | |
23 | \r | |
24 | .686p\r | |
25 | .xmm\r | |
26 | .model flat,c\r | |
27 | \r | |
28 | ;\r | |
29 | ; InterruptProcess()\r | |
30 | ;\r | |
31 | InterruptProcess PROTO C\r | |
32 | \r | |
33 | public Exception0Handle, TimerInterruptHandle, ExceptionStubHeaderSize\r | |
34 | \r | |
35 | AGENT_HANDLER_SIGNATURE MACRO\r | |
36 | db 41h, 47h, 54h, 48h ; SIGNATURE_32('A','G','T','H')\r | |
37 | ENDM\r | |
38 | \r | |
39 | .data\r | |
40 | \r | |
41 | ExceptionStubHeaderSize DD Exception1Handle - Exception0Handle\r | |
42 | CommonEntryAddr DD CommonEntry\r | |
43 | \r | |
44 | .code\r | |
45 | \r | |
46 | AGENT_HANDLER_SIGNATURE\r | |
47 | Exception0Handle:\r | |
48 | cli\r | |
49 | push eax\r | |
50 | mov eax, 0\r | |
51 | jmp dword ptr [CommonEntryAddr]\r | |
52 | AGENT_HANDLER_SIGNATURE\r | |
53 | Exception1Handle:\r | |
54 | cli\r | |
55 | push eax\r | |
56 | mov eax, 1\r | |
57 | jmp dword ptr [CommonEntryAddr]\r | |
58 | AGENT_HANDLER_SIGNATURE\r | |
59 | Exception2Handle:\r | |
60 | cli\r | |
61 | push eax\r | |
62 | mov eax, 2\r | |
63 | jmp dword ptr [CommonEntryAddr]\r | |
64 | AGENT_HANDLER_SIGNATURE\r | |
65 | Exception3Handle:\r | |
66 | cli\r | |
67 | push eax\r | |
68 | mov eax, 3\r | |
69 | jmp dword ptr [CommonEntryAddr]\r | |
70 | AGENT_HANDLER_SIGNATURE\r | |
71 | Exception4Handle:\r | |
72 | cli\r | |
73 | push eax\r | |
74 | mov eax, 4\r | |
75 | jmp dword ptr [CommonEntryAddr]\r | |
76 | AGENT_HANDLER_SIGNATURE\r | |
77 | Exception5Handle:\r | |
78 | cli\r | |
79 | push eax\r | |
80 | mov eax, 5\r | |
81 | jmp dword ptr [CommonEntryAddr]\r | |
82 | AGENT_HANDLER_SIGNATURE\r | |
83 | Exception6Handle:\r | |
84 | cli\r | |
85 | push eax\r | |
86 | mov eax, 6\r | |
87 | jmp dword ptr [CommonEntryAddr]\r | |
88 | AGENT_HANDLER_SIGNATURE\r | |
89 | Exception7Handle:\r | |
90 | cli\r | |
91 | push eax\r | |
92 | mov eax, 7\r | |
93 | jmp dword ptr [CommonEntryAddr]\r | |
94 | AGENT_HANDLER_SIGNATURE\r | |
95 | Exception8Handle:\r | |
96 | cli\r | |
97 | push eax\r | |
98 | mov eax, 8\r | |
99 | jmp dword ptr [CommonEntryAddr]\r | |
100 | AGENT_HANDLER_SIGNATURE\r | |
101 | Exception9Handle:\r | |
102 | cli\r | |
103 | push eax\r | |
104 | mov eax, 9\r | |
105 | jmp dword ptr [CommonEntryAddr]\r | |
106 | AGENT_HANDLER_SIGNATURE\r | |
107 | Exception10Handle:\r | |
108 | cli\r | |
109 | push eax\r | |
110 | mov eax, 10\r | |
111 | jmp dword ptr [CommonEntryAddr]\r | |
112 | AGENT_HANDLER_SIGNATURE\r | |
113 | Exception11Handle:\r | |
114 | cli\r | |
115 | push eax\r | |
116 | mov eax, 11\r | |
117 | jmp dword ptr [CommonEntryAddr]\r | |
118 | AGENT_HANDLER_SIGNATURE\r | |
119 | Exception12Handle:\r | |
120 | cli\r | |
121 | push eax\r | |
122 | mov eax, 12\r | |
123 | jmp dword ptr [CommonEntryAddr]\r | |
124 | AGENT_HANDLER_SIGNATURE\r | |
125 | Exception13Handle:\r | |
126 | cli\r | |
127 | push eax\r | |
128 | mov eax, 13\r | |
129 | jmp dword ptr [CommonEntryAddr]\r | |
130 | AGENT_HANDLER_SIGNATURE\r | |
131 | Exception14Handle:\r | |
132 | cli\r | |
133 | push eax\r | |
134 | mov eax, 14\r | |
135 | jmp dword ptr [CommonEntryAddr]\r | |
136 | AGENT_HANDLER_SIGNATURE\r | |
137 | Exception15Handle:\r | |
138 | cli\r | |
139 | push eax\r | |
140 | mov eax, 15\r | |
141 | jmp dword ptr [CommonEntryAddr]\r | |
142 | AGENT_HANDLER_SIGNATURE\r | |
143 | Exception16Handle:\r | |
144 | cli\r | |
145 | push eax\r | |
146 | mov eax, 16\r | |
147 | jmp dword ptr [CommonEntryAddr]\r | |
148 | AGENT_HANDLER_SIGNATURE\r | |
149 | Exception17Handle:\r | |
150 | cli\r | |
151 | push eax\r | |
152 | mov eax, 17\r | |
153 | jmp dword ptr [CommonEntryAddr]\r | |
154 | AGENT_HANDLER_SIGNATURE\r | |
155 | Exception18Handle:\r | |
156 | cli\r | |
157 | push eax\r | |
158 | mov eax, 18\r | |
159 | jmp dword ptr [CommonEntryAddr]\r | |
160 | AGENT_HANDLER_SIGNATURE\r | |
161 | Exception19Handle:\r | |
162 | cli\r | |
163 | push eax\r | |
164 | mov eax, 19\r | |
165 | jmp dword ptr [CommonEntryAddr]\r | |
166 | AGENT_HANDLER_SIGNATURE\r | |
167 | TimerInterruptHandle:\r | |
168 | cli\r | |
169 | push eax\r | |
170 | mov eax, 32\r | |
171 | jmp dword ptr [CommonEntryAddr]\r | |
172 | \r | |
173 | CommonEntry:\r | |
174 | ;\r | |
175 | ; +---------------------+\r | |
176 | ; + EFlags +\r | |
177 | ; +---------------------+\r | |
178 | ; + CS +\r | |
179 | ; +---------------------+\r | |
180 | ; + EIP +\r | |
181 | ; +---------------------+\r | |
182 | ; + Error Code +\r | |
183 | ; +---------------------+\r | |
184 | ; + EAX / Vector Number +\r | |
185 | ; +---------------------+\r | |
186 | ; + EBP +\r | |
187 | ; +---------------------+ <-- EBP\r | |
188 | ;\r | |
189 | cmp eax, DEBUG_EXCEPT_DOUBLE_FAULT\r | |
190 | je NoExtrPush\r | |
191 | cmp eax, DEBUG_EXCEPT_INVALID_TSS\r | |
192 | je NoExtrPush\r | |
193 | cmp eax, DEBUG_EXCEPT_SEG_NOT_PRESENT\r | |
194 | je NoExtrPush\r | |
195 | cmp eax, DEBUG_EXCEPT_STACK_FAULT\r | |
196 | je NoExtrPush\r | |
197 | cmp eax, DEBUG_EXCEPT_GP_FAULT\r | |
198 | je NoExtrPush\r | |
199 | cmp eax, DEBUG_EXCEPT_PAGE_FAULT\r | |
200 | je NoExtrPush\r | |
201 | cmp eax, DEBUG_EXCEPT_ALIGNMENT_CHECK\r | |
202 | je NoExtrPush\r | |
203 | \r | |
204 | push [esp]\r | |
205 | mov dword ptr [esp + 4], 0\r | |
206 | \r | |
207 | NoExtrPush:\r | |
208 | \r | |
209 | push ebp\r | |
210 | mov ebp, esp ; save esp in ebp\r | |
211 | ;\r | |
212 | ; Make stack 16-byte alignment to make sure save fxrstor later\r | |
213 | ;\r | |
214 | and esp, 0fffffff0h\r | |
215 | sub esp, 12\r | |
216 | \r | |
217 | ; store UINT32 Edi, Esi, Ebp, Ebx, Edx, Ecx, Eax;\r | |
218 | push dword ptr [ebp + 4] ; original eax\r | |
219 | push ebx\r | |
220 | push ecx\r | |
221 | push edx\r | |
222 | mov ebx, eax ; save vector in ebx\r | |
223 | mov eax, ebp\r | |
224 | add eax, 4 * 6\r | |
225 | push eax ; original ESP\r | |
226 | push dword ptr [ebp] ; EBP\r | |
227 | push esi\r | |
228 | push edi\r | |
229 | \r | |
230 | ;; UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;\r | |
231 | ;; insure FXSAVE/FXRSTOR is enabled in CR4...\r | |
232 | ;; ... while we're at it, make sure DE is also enabled...\r | |
233 | mov eax, 1\r | |
234 | push ebx ; temporarily save value of ebx on stack \r | |
235 | cpuid ; use CPUID to determine if FXSAVE/FXRESTOR and\r | |
236 | ; DE are supported\r | |
237 | pop ebx ; retore value of ebx that was overwritten by CPUID \r | |
238 | mov eax, cr4\r | |
239 | push eax ; push cr4 firstly\r | |
240 | test edx, BIT24 ; Test for FXSAVE/FXRESTOR support\r | |
241 | jz @F\r | |
242 | or eax, BIT9 ; Set CR4.OSFXSR\r | |
243 | @@: \r | |
244 | test edx, BIT2 ; Test for Debugging Extensions support\r | |
245 | jz @F\r | |
246 | or eax, BIT3 ; Set CR4.DE\r | |
247 | @@: \r | |
248 | mov cr4, eax\r | |
249 | mov eax, cr3\r | |
250 | push eax\r | |
251 | mov eax, cr2\r | |
252 | push eax\r | |
253 | push 0 ; cr0 will not saved???\r | |
254 | mov eax, cr0\r | |
255 | push eax\r | |
256 | \r | |
257 | xor ecx, ecx\r | |
258 | mov ecx, Ss\r | |
259 | push ecx\r | |
260 | mov ecx, Cs\r | |
261 | push ecx\r | |
262 | mov ecx, Ds\r | |
263 | push ecx\r | |
264 | mov ecx, Es\r | |
265 | push ecx\r | |
266 | mov ecx, Fs\r | |
267 | push ecx\r | |
268 | mov ecx, Gs\r | |
269 | push ecx\r | |
270 | \r | |
271 | ;; EIP\r | |
272 | mov ecx, [ebp + 4 * 3] ; EIP\r | |
273 | push ecx\r | |
274 | \r | |
275 | ;; UINT32 Gdtr[2], Idtr[2];\r | |
276 | sub esp, 8\r | |
277 | sidt fword ptr [esp]\r | |
278 | sub esp, 8\r | |
279 | sgdt fword ptr [esp]\r | |
280 | \r | |
281 | ;; UINT32 Ldtr, Tr;\r | |
282 | xor eax, eax\r | |
283 | str ax\r | |
284 | push eax\r | |
285 | sldt ax\r | |
286 | push eax\r | |
287 | \r | |
288 | ;; EFlags\r | |
289 | mov ecx, [ebp + 4 * 5]\r | |
290 | push ecx\r | |
291 | \r | |
292 | ;; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r | |
293 | mov eax, dr7\r | |
294 | push eax\r | |
295 | \r | |
296 | ;; clear Dr7 while executing debugger itself\r | |
297 | xor eax, eax\r | |
298 | mov dr7, eax\r | |
299 | \r | |
300 | ;; Dr6\r | |
301 | mov eax, dr6\r | |
302 | push eax\r | |
303 | \r | |
304 | ;; insure all status bits in dr6 are clear...\r | |
305 | xor eax, eax\r | |
306 | mov dr6, eax\r | |
307 | \r | |
308 | mov eax, dr3\r | |
309 | push eax\r | |
310 | mov eax, dr2\r | |
311 | push eax\r | |
312 | mov eax, dr1\r | |
313 | push eax\r | |
314 | mov eax, dr0\r | |
315 | push eax\r | |
316 | \r | |
317 | ;; Clear Direction Flag\r | |
318 | cld\r | |
319 | \r | |
320 | ;; FX_SAVE_STATE_IA32 FxSaveState;\r | |
321 | sub esp, 512\r | |
322 | mov edi, esp\r | |
323 | ;; Clear the buffer\r | |
324 | xor eax, eax\r | |
325 | mov ecx, 128 ;= 512 / 4\r | |
326 | rep stosd\r | |
327 | mov edi, esp\r | |
328 | \r | |
329 | test edx, BIT24 ; Test for FXSAVE/FXRESTOR support.\r | |
330 | ; edx still contains result from CPUID above\r | |
331 | jz @F\r | |
332 | db 0fh, 0aeh, 00000111y ;fxsave [edi]\r | |
333 | @@: \r | |
334 | \r | |
335 | ;; save the exception data\r | |
336 | push dword ptr [ebp + 8]\r | |
337 | \r | |
338 | ; call the C interrupt process function\r | |
339 | push esp ; Structure\r | |
340 | push ebx ; vector\r | |
341 | call InterruptProcess\r | |
342 | add esp, 8\r | |
343 | \r | |
344 | ; skip the exception data\r | |
345 | add esp, 4\r | |
346 | \r | |
347 | ;; FX_SAVE_STATE_IA32 FxSaveState;\r | |
348 | mov esi, esp\r | |
349 | mov eax, 1\r | |
350 | cpuid ; use CPUID to determine if FXSAVE/FXRESTOR are supported\r | |
351 | test edx, BIT24 ; Test for FXSAVE/FXRESTOR support\r | |
352 | jz @F\r | |
353 | db 0fh, 0aeh, 00001110y ; fxrstor [esi]\r | |
354 | @@: \r | |
355 | add esp, 512\r | |
356 | \r | |
357 | ;; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r | |
358 | pop eax\r | |
359 | mov dr0, eax\r | |
360 | pop eax\r | |
361 | mov dr1, eax\r | |
362 | pop eax\r | |
363 | mov dr2, eax\r | |
364 | pop eax\r | |
365 | mov dr3, eax\r | |
366 | ;; skip restore of dr6. We cleared dr6 during the context save.\r | |
367 | add esp, 4\r | |
368 | pop eax\r | |
369 | mov dr7, eax\r | |
370 | \r | |
371 | ;; set EFlags\r | |
372 | pop dword ptr [ebp + 4 * 5] ; set EFLAGS in stack\r | |
373 | \r | |
374 | ;; UINT32 Ldtr, Tr;\r | |
375 | ;; UINT32 Gdtr[2], Idtr[2];\r | |
376 | ;; Best not let anyone mess with these particular registers...\r | |
377 | add esp, 24\r | |
378 | \r | |
379 | ;; UINT32 Eip;\r | |
380 | pop dword ptr [ebp + 4 * 3] ; set EIP in stack\r | |
381 | \r | |
382 | ;; UINT32 Gs, Fs, Es, Ds, Cs, Ss;\r | |
383 | ;; NOTE - modified segment registers could hang the debugger... We\r | |
384 | ;; could attempt to insulate ourselves against this possibility,\r | |
385 | ;; but that poses risks as well.\r | |
386 | ;;\r | |
387 | pop gs\r | |
388 | pop fs\r | |
389 | pop es\r | |
390 | pop ds\r | |
391 | pop dword ptr [ebp + 4 * 4] ; set CS in stack\r | |
392 | pop ss\r | |
393 | \r | |
394 | ;; UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;\r | |
395 | pop eax\r | |
396 | mov cr0, eax\r | |
397 | add esp, 4 ; skip for Cr1\r | |
398 | pop eax\r | |
399 | mov cr2, eax\r | |
400 | pop eax\r | |
401 | mov cr3, eax\r | |
402 | pop eax\r | |
403 | mov cr4, eax\r | |
404 | \r | |
405 | ;; restore general register\r | |
406 | pop edi\r | |
407 | pop esi\r | |
408 | pop dword ptr [ebp] ; save updated ebp\r | |
409 | pop dword ptr [ebp + 4] ; save updated esp\r | |
410 | pop edx\r | |
411 | pop ecx\r | |
412 | pop ebx\r | |
413 | pop eax\r | |
414 | \r | |
415 | mov esp, ebp\r | |
416 | pop ebp ; restore ebp maybe updated\r | |
417 | pop esp ; restore esp maybe updated\r | |
418 | sub esp, 4 * 3 ; restore interupt pushced stack\r | |
419 | \r | |
420 | iretd\r | |
421 | \r | |
422 | END\r |